TLC393IPW [TI]

DUAL MICROPOWER LinCMOS VOLTAGE COMPARATOR; 双通道，微路LinCMOS电压比较器


型号：	TLC393IPW
厂家：	TEXAS INSTRUMENTS
描述：	DUAL MICROPOWER LinCMOS VOLTAGE COMPARATOR 双通道，微路LinCMOS电压比较器比较器
文件：	总31页 (文件大小：1201K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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ꢔꢍ ꢁꢀꢉꢕ ꢐ ꢂꢍ ꢊꢎꢉ ꢌꢉꢀꢍ ꢌ

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SLCS115E − DECEMBER 1986 − REVISED JULY 2003

D, JG, P, OR PW PACKAGE

(TOP VIEW)

Very Low Power . . . 110 µW Typ at 5 V

Fast Response Time . . . t

With 5-mV Overdrive

= 2.5 µs Typ

PLH

1OUT

Single Supply Operation:

1IN−

1IN+

GND

2OUT

2IN−

2IN+

TLC393C . . . 3 V to 16 V

TLC393I . . . 3 V to 16 V

TLC393Q . . . 4 V to 16 V

TLC393M . . . 4 V to 16 V

TLC193M . . . 4 V to 16 V

FK PACKAGE

(TOP VIEW)

On-Chip ESD Protection

description

The TLC193 and TLC393 consist of dual

independent micropower voltage comparators

designed to operate from a single supply. They

are functionally similar to the LM393 but uses

one-twentieth the power for similar response

times. The open-drain MOS output stage

interfaces to a variety of loads and supplies. For

2 1 20 19

1IN−

2OUT

1IN+

2IN−

9 10 11 12 13

similar device with a push-pull output

configuration (see the TLC3702 data sheet).

NC − No internal connection

Texas Instruments LinCMOS process offers

superior analog performance to standard CMOS

processes. Along with the standard CMOS

advantages of low power without sacrificing

speed, high input impedance, and low bias

symbol (each comparator)

currents, the LinCMOS

process offers ex-

IN+

IN−

tremely stable input offset voltages, even with

differential input stresses of several volts. This

characteristic makes it possible to build reliable

CMOS comparators.

OUT

The TLC393C is characterized for operation over the commercial temperature range of T = 0°C to 70°C. The

TLC393I is characterized for operation over the extended industrial temperature range of T = −40°C to 85°C.

The TLC393Q is characterized for operation over the full automotive temperature range of T = −40°C to 125°C.

The TLC193M and TLC393M are characterized for operation over the full military temperature range of

T = −55°C to 125°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

LinCMOS is a trademark of Texas Instruments Incorporated. All other trademarks are the property of their respective owners.

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ꢜ ꢠ ꢝ ꢜꢑ ꢒꢪ ꢘꢗ ꢛ ꢣꢣ ꢡꢛ ꢙ ꢛ ꢚ ꢠ ꢜ ꢠ ꢙ ꢝ ꢥ

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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443

ꢀ ꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢀ ꢁ ꢂ ꢅꢄ ꢅ

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ꢔ ꢍꢁꢀꢉꢕ ꢐ ꢂꢍ ꢊ ꢎꢉꢌꢉꢀꢍ ꢌ

SLCS115D − DECEMBER 1986 − REVISED JULY 2003

AVAILABLE OPTIONS

PACKAGES

max

SMALL OUTLINE

(D)

CHIP CARRIER

(FK)

CERAMIC DIP

(JG)

PLASTIC DIP

(P)

TSSOP

(PW)

at 25°C

0°C to 70°C

− 40°C to 85°C

− 40°C to 125°C

− 55°C to 125°C

5 mV

TLC393CD

TLC393ID

TLC393QD

TLC393MD

—

TLC393CP

TLC393IP

—

TLC393CPWLE

—

TLC393IPWLE

—

TLC193MFK

TLC193MJG

TLC393MP

The D package is available taped and reeled. Add the suffix R to the device type (e.g., TLC393CDR).

schematic

OUT

OPEN-DRAIN CMOS OUTPUT

†

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V

(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 0.3 V to 18 V

Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V

Input voltage range, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 0.3 V to V

Output voltage range, V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 0.3 V to 16 V

Input current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5 mA

Output current, I (each output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA

Total supply current into V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA

Total current out of GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA

Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table

Operating free-air temperature range: TLC393C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C

TLC393I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 40°C to 85°C

TLC393Q . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 40°C to 125°C

TLC393M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 55°C to 125°C

TLC193M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 55°C to 125°C

Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 65°C to 150°C

Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P package . . . . . . . . . . . . . . . . . 260°C

Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package . . . . . . . . . . . . . . . . . . . . 300°C

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values, except differential voltages, are with respect to network ground.

2. Differential voltages are at IN+ with respect to IN−.

DISSIPATION RATING TABLE

≤ 25°C

DERATING FACTOR

= 70°C

= 85°C

T = 125°C

POWER RATING

PACKAGE

POWER RATING

ABOVE T = 25°C

POWER RATING

725 mW

5.8 mW/°C

11.0 mW/°C

8.4 mW/°C

8.0 mW/°C

4.2 mW/°C

464 mW

377 mW

145 mW

275 mW

210 mW

—

1375 mW

1050 mW

1000 mW

525 mW

880 mW

715 mW

672 mW

546 mW

640 mW

520 mW

336 mW

273 mW

—

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

^{POST OFFICE BOX 1443}• HOUSTON, TEXAS 77251−1443

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SLCS115E − DECEMBER 1986 − REVISED JULY 2003

recommended operating conditions

TLC393C

UNIT

MIN NOM

MAX

Supply voltage, V

Common-mode input voltage, V

−0.2

− 1.5

Low-level output current, I

°C

Operating free-air temperature, T

electrical characteristics at specified operating free-air temperature, V

noted)

= 5 V (unless otherwise

TLC393C

UNIT

†

PARAMETER

TEST CONDITIONS

MIN

TYP MAX

= V

min,

= 5 V to 10 V,

25°C

1.4

ICR

Input offset voltage

0°C to 70°C

6.5

See Note 3

25°C

70°C

Input offset current

= 2.5 V

0.3

0.6

25°C

Input bias current

70°C

25°C

0 to V

− 1

− 1.5

Common-mode input voltage range

ICR

0°C to 70°C

25°C

0 to V

70°C

CMMR Common-mode rejection ratio

= V

ICR

min

0°C

25°C

70°C

Supply-voltage rejection ratio

= 5 V to 10 V

SVR

0°C

25°C

300

400

650

Low-level output voltage

= −1 V,

= 6 mA

= 5 V

70°C

25°C

0.8

High-level output current

= 1 V,

70°C

µA

25°C

Supply current (both comparators)

Outputs low, No load

µA

0°C to 70°C

†

All characteristics are measured with zero common-mode voltage unless otherwise noted.

NOTE 3: The offset voltage limits given are the maximum values required to drive the output up to 4.5 V or down to 0.3 V.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

^{POST OFFICE BOX 1443}• HOUSTON, TEXAS 77251−1443

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ꢔ ꢍꢁꢀꢉꢕ ꢐ ꢂꢍ ꢊ ꢎꢉꢌꢉꢀꢍ ꢌ

SLCS115D − DECEMBER 1986 − REVISED JULY 2003

recommended operating conditions

TLC393I

MIN NOM

UNIT

MAX

Supply voltage, V

Common-mode input voltage, V

− 0.2

− 1.5

Low-level output current, I

°C

Operating free-air temperature, T

− 40

electrical characteristics at specified operating free-air temperature, V

noted)

= 5 V (unless otherwise

TLC393I

UNIT

†

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

= V

min,

= 5 V to 10 V,

25°C

1.4

ICR

Input offset voltage

−40°C to 85°C

See Note 3

25°C

85°C

Input offset current

= 2.5 V

25°C

Input bias current

85°C

25°C

0 to V

− 1

− 1.5

Common-mode input voltage range

ICR

−40°C to 85°C 0 to V

25°C

85°C

CMMR Common-mode rejection ratio

= V

ICR

min

− 40°C

25°C

85°C

Supply-voltage rejection ratio

= 5 V to 10 V

SVR

− 40°C

25°C

300

400

700

Low-level output voltage

= −1 V,

= 6 mA

= 5 V

85°C

25°C

0.8

High-level output current

= 1 V,

85°C

µA

25°C

Supply current (both comparators)

Outputs low, No load

µA

−40°C to 85°C

†

All characteristics are measured with zero common-mode voltage unless otherwise noted.

NOTE 3: The offset voltage limits given are the maximum values required to drive the output up to 4.5 V or down to 0.3 V.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

^{POST OFFICE BOX 1443}• HOUSTON, TEXAS 77251−1443

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SLCS115E − DECEMBER 1986 − REVISED JULY 2003

recommended operating conditions

TLC393Q

UNIT

MIN NOM

MAX

Supply voltage, V

Common-mode input voltage, V

− 1.5

Low-level output current, I

°C

Operating free-air temperature, T

−40

125

electrical characteristics at specified operating free-air temperature, V

noted)

= 5 V (unless otherwise

TLC393Q

UNIT

†

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

= V

min,

= 5 V to 10 V,

25°C

1.4

ICR

Input offset voltage

−40°C to 125°C

See Note 4

25°C

125°C

Input offset current

= 2.5 V

25°C

Input bias current

125°C

25°C

0 to V

− 1

− 1.5

Common-mode input voltage range

ICR

−40°C to 125°C 0 to V

25°C

125°C

CMMR Common-mode rejection ratio

= V

ICR

min

−40°C

25°C

125°C

Supply-voltage rejection ratio

= 5 V to 10 V

SVR

−40°C

25°C

300

400

800

Low-level output voltage

= −1 V,

= 6 mA

= 5 V

125°C

25°C

0.8

High-level output current

= 1 V,

125°C

µA

25°C

Supply current (both comparators)

Outputs low, No load

µA

−40°C to 125°C

†

All characteristics are measured with zero common-mode voltage unless otherwise noted.

NOTE 4: The offset voltage limits given are the maximum values required to drive the output up to 4.5 V or down to 0.3 V (with a 2.5-kΩ load to

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

^{POST OFFICE BOX 1443}• HOUSTON, TEXAS 77251−1443

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SLCS115D − DECEMBER 1986 − REVISED JULY 2003

recommended operating conditions

TLC193M, TLC393M

UNIT

MIN NOM

MAX

Supply voltage, V

Common-mode input voltage, V

− 1.5

Low-level output current, I

°C

Operating free-air temperature, T

−55

125

electrical characteristics at specified operating free-air temperature, V

noted)

= 5 V (unless otherwise

TLC193M, TLC393M

†

PARAMETER

UNIT

TEST CONDITIONS

MIN

TYP

MAX

= V

min,

= 5 V to 10 V,

25°C

1.4

ICR

Input offset voltage

−55°C to 125°C

See Note 4

25°C

125°C

Input offset current

= 2.5 V

25°C

Input bias current

125°C

25°C

0 to V

− 1

− 1.5

Common-mode input voltage range

ICR

−55°C to 125°C 0 to V

25°C

125°C

CMMR Common-mode rejection ratio

= V

ICR

min

−55°C

25°C

125°C

Supply-voltage rejection ratio

= 5 V to 10 V

SVR

−55°C

25°C

300

400

800

Low-level output voltage

= −1 V,

= 6 mA

= 5 V

125°C

25°C

0.8

High-level output current

= 1 V,

125°C

µA

25°C

Supply current (both comparators)

Outputs low, No load

µA

−55°C to 125°C

†

All characteristics are measured with zero common-mode voltage unless otherwise noted.

NOTE 4: The offset voltage limits given are the maximum values required to drive the output up to 4.5 V or down to 0.3 V (with a 2.5-kΩ load to

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

^{POST OFFICE BOX 1443}• HOUSTON, TEXAS 77251−1443

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SLCS115E − DECEMBER 1986 − REVISED JULY 2003

switching characteristics, V

= 5 V, T = 25°C (see Figure 3)

TLC393C, TLC393I

TLC393Q, TLC193M,

PARAMETER

TEST CONDITIONS

UNIT

TLC393M

TYP

4.5

MIN

MAX

Overdrive = 2 mV

Overdrive = 5 mV

Overdrive = 10 mV

Overdrive = 20 mV

Overdrive = 40 mV

2.5

f = 10 kHz,

= 15 pF

1.7

Propagation delay time, low-to-high-level output

µs

PLH

1.2

1.1

V = 1.4-V step at IN+

1.1

Overdrive = 2 mV

3.6

Overdrive = 5 mV

Overdrive = 10 mV

Overdrive = 20 mV

Overdrive = 40 mV

2.1

f = 10 kHz,

= 15 pF

1.3

Propagation delay time, high-to-low-level output

µs

PHL

0.85

0.55

0.10

V = 1.4-V step at IN+

f = 10 kHz,

Fall time, output

Overdrive = 50 mV

= 15 pF

PARAMETER MEASUREMENT INFORMATION

The TLC393 contains a digital output stage which, if held in the linear region of the transfer curve, can cause

damage to the device. Conventional operational amplifier/comparator testing incorporates the use of a servo

loop that is designed to force the device output to a level within this linear region. Since the servo-loop method

of testing cannot be used, the following alternatives for testing parameters such as input offset voltage,

common-mode rejection ratio, etc., are suggested.

To verify that the input offset voltage falls within the limits specified, the limit value is applied to the input as shown

in Figure 1(a). With the noninverting input positive with respect to the inverting input, the output should be high.

With the input polarity reversed, the output should be low.

A similar test can be made to verify the input offset voltage at the common-mode extremes. The supply voltages

can be slewed as shown in Figure 1(b) for the V

greater accuracy.

test, rather than changing the input voltages, to provide

ICR

5 V

1 V

5.1 kΩ

−

Applied V

Limit

Applied V

Limit

− 4 V

(a) V WITH V = 0 V

IO IC

(b) V WITH V = 4 V

IO IC

Figure 1. Method for Verifying That Input Offset Voltage Is Within Specified Limits

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

^{POST OFFICE BOX 1443}• HOUSTON, TEXAS 77251−1443

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ꢏꢐ

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SLCS115D − DECEMBER 1986 − REVISED JULY 2003

PARAMETER MEASUREMENT INFORMATION

A close approximation of the input offset voltage can be obtained by using a binary search method to vary the

differential input voltage while monitoring the output state. When the applied input voltage differential is equal,

but opposite in polarity, to the input offset voltage, the output changes states.

Figure 2 illustrates a practical circuit for direct dc measurement of input offset voltage that does not bias the

comparator in the linear region. The circuit consists of a switching-mode servo loop in which U1A generates

a triangular waveform of approximately 20-mV amplitude. U1B acts as a buffer, with C2 and R4 removing any

residual dc offset. The signal is then applied to the inverting input of the comparator under test, while the

noninverting input is driven by the output of the integrator formed by U1C through the voltage divider formed

by R9 and R10. The loop reaches a stable operating point when the output of the comparator under test has

a duty cycle of exactly 50%, which can only occur when the incoming triangle wave is sliced symmetrically or

when the voltage at the noninverting input exactly equals the input offset voltage.

The voltage divider formed by R9 and R10 provides an increase in input offset voltage by a factor of 100 to

make measurement easier. The values of R5, R8, R9, and R10 can significantly influence the accuracy of the

reading; therefore, it is suggested that their tolerance level be 1% or lower.

Measuring the extremely low values of input current requires isolation from all other sources of leakage current

and compensation for the leakage of the test socket and board. With a good picoammeter, the socket and board

leakage can be measured with no device in the socket. Subsequently, this open-socket leakage value can be

subtracted from the measurement obtained with a device in the socket to obtain the actual input current of the

device.

0.68 µF

U1B

1/4 TLC274CN

1.8 kΩ, 1%

1 µF

Buffer

U1C

1/4 TLC274CN

5.1 kΩ

−

DUT

−

47 kΩ

1 MΩ

(X100)

240 kΩ

Integrator

1.8 kΩ, 1%

U1A

1/4 TLC274CN

0.1 µF

−

0.1 µF

Triangle

Generator

10 kΩ, 1%

R10

100 Ω, 1%

10 kΩ

100 kΩ

Figure 2. Circuit for Input Offset Voltage Measurement

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ꢍ

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ꢌ

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ꢒ

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SLCS115E − DECEMBER 1986 − REVISED JULY 2003

PARAMETER MEASUREMENT INFORMATION

Propagation delay time is defined as the interval between the application of an input step function and the instant

when the output reaches 50% of its maximum value. Propagation delay time, low-to-high-level output, is

measured from the leading edge of the input pulse, while propagation delay time, high-to-low-level output, is

measured from the trailing edge of the input pulse. Propagation delay time measurement at low input signal

levels can be greatly affected by the input offset voltage. The offset voltage should be balanced by the

adjustment at the inverting input (as shown in Figure 3) so that the circuit is just at the transition point. Then a

low signal, for example, 105 mV or 5 mV overdrive, causes the output to change state.

1 µF

5.1 kΩ

Pulse

Generator

50 Ω

DUT

1 V

Input Offset Voltage

Compensation

Adjustment

10 Ω

10 Turn

(see Note A)

1 kΩ

0.1 µF

− 1 V

TEST CIRCUIT

Overdrive

Input

100 mV

Input

100 mV

90%

Low-to-High-

Level Output

High-to-Low-

Level Output

50%

10%

50%

10%

PHL

PLH

VOLTAGE WAVEFORMS

NOTE A: C includes probe and jig capacitance.

Figure 3. Propagation Delay, Rise Time, and Fall Time Circuit and Voltage Waveforms

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SLCS115D − DECEMBER 1986 − REVISED JULY 2003

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

Input offset voltage

Input bias current

Distribution

vs Free-air temperature

CMRR Common-mode rejection ratio

Supply-voltage rejection ratio

SVR

vs Low-level output current

vs Free-air temperature

Low-level output voltage

vs High-level output voltage

vs Free-air temperature

Low-level output current

Supply current

vs Supply voltage

vs Free-air temperature

Low-to-high level output propagation delay time

High-to-low level output propagation delay time

Low-to-high-level output response

High-to-low level output response

Fall time

vs Supply voltage

PLH

vs Supply voltage

PHL

Low-to-high level output propagation delay time

High-to-low level output propagation delay time

vs Supply voltage

INPUT BIAS CURRENT

DISTRIBUTION OF INPUT

†

FREE-AIR TEMPERATURE

†

OFFSET VOLTAGE

100

= 5 V

= 2.5 V

= 5 V

= 2.5 V

= 25°C

0.1

0.01

0.001

100

125

−5 −4 −3 −2 −1

− Free-Air Temperature − °C

− Input Offset Voltage − mV

Figure 4

Figure 5

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

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ꢈ

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ꢁ

ꢊ

ꢋ

ꢂ

ꢌ

ꢍ

ꢎ

ꢍꢏ

ꢐ

ꢌ

ꢁ

ꢑ

ꢒ

ꢂ

ꢊ

ꢍ

ꢓ

SLCS115E − DECEMBER 1986 − REVISED JULY 2003

†

TYPICAL CHARACTERISTICS

SUPPLY VOLTAGE REJECTION RATIO

COMMON-MODE REJECTION RATIO

FREE-AIR TEMPERATURE

= 5 V to 10 V

= 5 V

−75 −50 −25

100 125

−75 −50 −25

100 125

− Free-Air Temperature − °C

Figure 6

Figure 7

LOW-LEVEL OUTPUT VOLTAGE

LOW-LEVEL OUTPUT CURRENT

LOW-LEVEL OUTPUT VOLTAGE

FREE-AIR TEMPERATURE

1.5

600

500

400

= 5 V

= 6 mA

= 25°C

4 V

1.25

= 3 V

5 V

0.75

300

200

10 V

0.5

0.25

100

= 16 V

10 12 14 16 18

−75 −50 −25

100 125

− Low-Level Output Current − mA

− Free-Air Temperature − °C

Figure 8

Figure 9

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

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ꢔ ꢍꢁꢀꢉꢕ ꢐ ꢂꢍ ꢊ ꢎꢉꢌꢉꢀꢍ ꢌ

SLCS115D − DECEMBER 1986 − REVISED JULY 2003

†

TYPICAL CHARACTERISTICS

HIGH-LEVEL OUTPUT CURRENT

FREE-AIR TEMPERATURE

HIGH-LEVEL OUTPUT VOLTAGE

1000

100

1000

100

= V = 5 V

= 125°C

= 85°C

= 70°C

= 25°C

= V

0.1

100

125

− High-Level Output Voltage − V

− Free-Air Temperature − °C

Figure 10

Figure 11

SUPPLY CURRENT

FREE-AIR TEMPERATURE

SUPPLY CURRENT

SUPPLY VOLTAGE

= 5 V

Outputs Low

No Loads

No Load

= − 55°C

= − 40°C

= 25°C

Outputs Low

= 85°C

= 125°C

Outputs High

−75 −50 −25

100 125

− Free-Air Temperature − °C

− Supply Voltage − V

Figure 12

Figure 13

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

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ꢍ

ꢎ

ꢍ

ꢏ

ꢐ

ꢌ

ꢁ

ꢑ

ꢒ

ꢂ

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ꢍ

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SLCS115E − DECEMBER 1986 − REVISED JULY 2003

TYPICAL CHARACTERISTICS

LOW-TO-HIGH-LEVEL

OUTPUT RESPONSE TIME

HIGH-TO-LOW-LEVEL

OUTPUT RESPONSE TIME

SUPPLY VOLTAGE

= 15 pF

= 5.1 kΩ (pullup to V

= 25°C

= 15 pF

= 5.1 kΩ (pullup to V

= 25°C

)

4.5

)

3.5

Overdrive = 2 mV

5 mV

Overdrive = 2 mV

2.5

5 mV

10 mV

20 mV

10 mV

20 mV

1.5

40 mV

0.5

40 mV

− Supply Voltage − V

Figure 14

Figure 15

HIGH-TO-LOW-LEVEL OUTPUT

PROPAGATION DELAY

LOW-TO-HIGH-LEVEL OUTPUT

PROPAGATION DELAY

FOR VARIOUS INPUT OVERDRIVES

40 mV

20 mV

10 mV

5 mV

40 mV

20 mV

10 mV

5 mV

2 mV

100

= 5 V

= 15 pF

= 5.1 kΩ (pullup to V

= 25°C

)

= 5 V

= 15 pF

= 5.1 kΩ (pullup to V

= 25°C

)

− High-to-Low-Level Output

Propagation Delay Time − µs

− Low-to-High-Level Output

Propagation Delay Time − µs

PHL

PLH

Figure 16

Figure 17

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SLCS115D − DECEMBER 1986 − REVISED JULY 2003

TYPICAL CHARACTERISTICS

OUTPUT FALL TIME

SUPPLY VOLTAGE

= 100 pF

50 pF

15 pF

50-mV Overdrive

= 5.1 kΩ (pullup to V

= 25°C

)

− Supply Voltage − V

Figure 18

APPLICATION INFORMATION

The input should always remain within the supply rails in order to avoid forward biasing the diodes in the electrostatic

discharge (ESD) protection structure. If either input exceeds this range, the device will not be damaged as long as

the input current is limited to less than 5 mA. To maintain the expected output state, the inputs must remain within

the common-mode range. For example, at 25°C with V

to assure proper device operation.

= 5 V, both inputs must remain between −0.2 V and 4 V

To assure reliable operation, the supply should be decoupled with a capacitor (0.1-µF) positioned as close to the

device as possible.

The TLC393 has internal ESD-protection circuits that prevent functional failures at voltages up to 2000 V as tested

under MIL-STD-883C, Method 3015.2; however, care should be exercised in handling these devices, as exposure

to ESD may result in the degradation of the device parametric performance.

Table of Applications

FIGURE

Pulse-width-modulated motor speed controller

Enhanced supply supervisor

Two-phase nonoverlapping clock generator

Micropower switching regulator

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SLCS115E − DECEMBER 1986 − REVISED JULY 2003

APPLICATION INFORMATION

12 V

SN75603

Half-H Driver

DIR

12 V

5 V

(see Note A)

5.1 kΩ

100 kΩ

5.1 kΩ

10 kΩ

−

5 V

Motor

10 kΩ

−

1/2 TLC393

0.01 µF

12 V

1/2 TLC393

(see Note B)

SN75604

Half-H Driver

DIR

5 V

10 kΩ

Motor Speed Control

Potentiometer

5 V

Direction

Control

SPDT

NOTES: A. The recommended minimum capacitance is 10 µF to eliminate common ground switching noise.

B. Adjust C1 for change in oscillator frequency.

Figure 19. Pulse-Width-Modulated Motor Speed Controller

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SLCS115D − DECEMBER 1986 − REVISED JULY 2003

APPLICATION INFORMATION

5 V

12 V

5 V

SENSE

3.3 kΩ

10 kΩ

5.1 kΩ

12-V

Sense

To µP

Reset

TL7705A

RESIN

REF

RESET

GND

1 kΩ

−

1/2 TLC393

2.5 V

12 V

1 µF

(see Note B)

5.1 kΩ

To µP Interrupt

Early Power Fail

UNREG

−

1/2 TLC393

(see Note A)

Monitors 5-VDC Rail

Monitors 12-VDC Rail

Early Power Fail Warning

(R1 +R2)

NOTES: A. V_UNREG+ 2.5

B. The value of C determines the time delay of reset.

Figure 20. Enhanced Supply Supervisor

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SLCS115E − DECEMBER 1986 − REVISED JULY 2003

APPLICATION INFORMATION

12 V

100 Ω

(see Note B)

5.1 kΩ

−

12 V

1OUT

5 kΩ

1/2 TLC393

(see Note C)

5.1 kΩ

100 kΩ

−

12 V

1/2 TLC393

22 kΩ

5.1 kΩ

−

0.01 µF

(see Note A)

2OUT

100 kΩ

1/2 TLC393

100 kΩ

(see Note B)

12 V

1OUT

2OUT

NOTES: A. Adjust C1 for a change in oscillator frequency where:

1/f = 1.85(100 kΩ)C1

B. Adjust R1 and R3 to change duty cycle

C. Adjust R2 to change deadtime

Figure 21. Two-Phase Nonoverlapping Clock Generator

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PACKAGE OPTION ADDENDUM

www.ti.com

24-Jan-2013

PACKAGING INFORMATION

Orderable Device

5962-9555101NXD

5962-9555101NXDR

5962-9555101QPA

Status Package Type Package Pins Package Qty

Eco Plan Lead/Ball Finish

MSL Peak Temp

Op Temp (°C)

Top-Side Markings

Samples

Drawing

(1)

(2)

(3)

(4)

ACTIVE

SOIC

CDIP

2500

Green (RoHS

& no Sb/Br)

CU NIPDAU

Call TI

Level-1-260C-UNLIM

Call TI

Q193M

ACTIVE

Green (RoHS

& no Sb/Br)

TBD

-55 to 125 9555101QPA

TLC193M

TLC193MFKB

TLC193MJGB

OBSOLETE

ACTIVE

LCCC

CDIP

TBD

Call TI

A42

Call TI

-55 to 125

N / A for Pkg Type

-55 to 125 9555101QPA

TLC193M

TLC393CD

TLC393CDG4

TLC393CDR

ACTIVE

SOIC

PDIP

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

N / A for Pkg Type

0 to 70

C393C

TLC393CP

P393

Green (RoHS

& no Sb/Br)

2500

Green (RoHS

& no Sb/Br)

TLC393CDRG4

TLC393CP

Green (RoHS

& no Sb/Br)

Pb-Free

(RoHS)

TLC393CPE4

TLC393CPSR

TLC393CPSRG4

TLC393CPW

TLC393CPWG4

Pb-Free

(RoHS)

N / A for Pkg Type

2000

150

Green (RoHS

& no Sb/Br)

Level-1-260C-UNLIM

Green (RoHS

& no Sb/Br)

P393

TSSOP

Green (RoHS

& no Sb/Br)

P393

Green (RoHS

& no Sb/Br)

P393

TLC393CPWLE

TLC393CPWR

OBSOLETE

ACTIVE

TSSOP

TBD

Call TI

0 to 70

2000

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

P393

TLC393CPWRG4

ACTIVE

TSSOP

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

0 to 70

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

24-Jan-2013

Orderable Device

Status Package Type Package Pins Package Qty

Eco Plan Lead/Ball Finish

MSL Peak Temp

Op Temp (°C)

-40 to 85

Top-Side Markings

Samples

Drawing

(1)

(2)

(3)

(4)

TLC393ID

TLC393IDG4

TLC393IDR

TLC393IDRG4

TLC393IP

ACTIVE

SOIC

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

N / A for Pkg Type

C393I

Green (RoHS

& no Sb/Br)

C393I

SOIC

2500

Green (RoHS

& no Sb/Br)

C393I

SOIC

Green (RoHS

& no Sb/Br)

C393I

PDIP

Pb-Free

(RoHS)

TLC393IP

Y393

TLC393IPE4

TLC393IPW

TLC393IPWG4

PDIP

Pb-Free

(RoHS)

N / A for Pkg Type

TSSOP

150

Green (RoHS

& no Sb/Br)

Level-1-260C-UNLIM

Green (RoHS

& no Sb/Br)

Y393

TLC393IPWLE

TLC393IPWR

OBSOLETE

ACTIVE

TSSOP

TBD

Call TI

-40 to 85

2000

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

Y393

TLC393IPWRG4

ACTIVE

TSSOP

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

-40 to 85

TLC393MD

TLC393MP

TLC393QDR

OBSOLETE

ACTIVE

SOIC

PDIP

SOIC

TBD

Call TI

-55 to 125

2500

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

-40 to 125 C393Q

TLC393QDRG4

ACTIVE

SOIC

Green (RoHS

& no Sb/Br)

CU NIPDAU

Level-1-260C-UNLIM

C393Q

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

Addendum-Page 2

PACKAGE OPTION ADDENDUM

www.ti.com

24-Jan-2013

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between

the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight

in homogeneous material)

⁽³⁾MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

⁽⁴⁾Only one of markings shown within the brackets will appear on the physical device.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF TLC393 :

Automotive: TLC393-Q1

•

NOTE: Qualified Version Definitions:

Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

•

Addendum-Page 3

PACKAGE MATERIALS INFORMATION

www.ti.com

14-Mar-2013

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

5962-9555101NXDR

TLC393CDR

SOIC

2500

2000

2500

330.0

12.4

16.4

12.4

6.4

8.2

6.4

5.2

6.6

5.2

2.1

2.5

2.1

8.0

12.0

8.0

12.0

16.0

12.0

TLC393CPSR

TLC393IDR

SOIC

TLC393QDR

TLC393QDRG4

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

14-Mar-2013

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

5962-9555101NXDR

TLC393CDR

SOIC

2500

2000

2500

367.0

340.5

367.0

340.5

367.0

338.1

367.0

338.1

367.0

35.0

20.6

38.0

20.6

35.0

TLC393CPSR

TLC393IDR

SOIC

TLC393QDR

TLC393QDRG4

Pack Materials-Page 2

MECHANICAL DATA

MCER001A – JANUARY 1995 – REVISED JANUARY 1997

JG (R-GDIP-T8)

CERAMIC DUAL-IN-LINE

0.400 (10,16)

0.355 (9,00)

0.280 (7,11)

0.245 (6,22)

0.065 (1,65)

0.045 (1,14)

0.310 (7,87)

0.290 (7,37)

0.063 (1,60)

0.015 (0,38)

0.020 (0,51) MIN

0.200 (5,08) MAX

0.130 (3,30) MIN

Seating Plane

0.023 (0,58)

0.015 (0,38)

0°–15°

0.100 (2,54)

0.014 (0,36)

0.008 (0,20)

4040107/C 08/96

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.

C. This package can be hermetically sealed with a ceramic lid using glass frit.

D. Index point is provided on cap for terminal identification.

E. Falls within MIL STD 1835 GDIP1-T8

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TLC393IPW [TI]

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