TLC7725QPWR [TI]
Micropower Supply Voltage Supervisors; 微功率电源电压监控器
| 型号： | TLC7725QPWR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Micropower Supply Voltage Supervisors |
| 文件： | 总36页 (文件大小：1674K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TLC7701, TLC7725, TLC7703
TLC7733, TLC7705
www.ti.com
SLVS087M –DECEMBER 1994–REVISED MARCH 2012
Micropower Supply Voltage Supervisors
Check for Samples: TLC7701, TLC7725, TLC7703 , TLC7733, TLC7705
1
FEATURES
DRB PACKAGE
•
•
Power-On Reset Generator
Automatic Reset Generation After Voltage
Drop
•
•
•
Precision Voltage Sensor
Temperature-Compensated Voltage Reference
Programmable Delay Time by External
Capacitor
•
•
•
Supply Voltage Range . . . 2 V to 6 V
Defined RESET Output from VDD ≥ 1 V
Power-Down Control Support for Static RAM
With Battery Backup
•
•
•
Maximum Supply Current of 16 µA
Power Saving Totem-Pole Outputs
Temperature Range . . . Up to –55°C to 125°C
APPLICATIONS
•
Medical Imaging
DESCRIPTION
The TLC77xx family of micropower supply voltage
supervisors provide reset control, primarily in
microcomputer and microprocessor systems.
During power-on, RESET is asserted when VDD
reaches
1 V. After minimum VDD (≥2 V) is
established, the circuit monitors SENSE voltage and
keeps the reset outputs active as long as SENSE
voltage (VI(SENSE)
) remains below the threshold
voltage. An internal timer delays return of the output
to the inactive state to ensure proper system reset.
The delay time, td, is determined by an external
capacitor:
td = 2.1 × 104 × CT
Where
CT is in farads
td is in seconds
SPACER
Except for the TLC7701, which can be customized with two external resistors, each supervisor has a fixed sense
threshold voltage set by an internal voltage divider. When SENSE voltage drops below the threshold voltage, the
outputs become active and stay in that state until SENSE voltage returns above threshold voltage and the delay
time, td, has expired.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 1994–2012, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TLC7701, TLC7725, TLC7703
TLC7733, TLC7705
SLVS087M –DECEMBER 1994–REVISED MARCH 2012
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DESCRIPTION (CONTINUED)
In addition to the power-on-reset and undervoltage-supervisor function, the TLC77xx adds power-down control
support for static RAM. When CONTROL is tied to GND, RESET will act as active high. The voltage monitor
contains additional logic intended for control of static memories with battery backup during power failure. By
driving the chip select (CS) of the memory circuit with the RESET output of the TLC77xx and with the CONTROL
driven by the memory bank select signal (CSH1) of the microprocessor (see Figure 10), the memory circuit is
automatically disabled during a power loss. (In this application the TLC77xx power has to be supplied by the
battery.)
The TLC77xxI is characterized for operation over a temperature range of –40°C to 85°C; the TLC77xxQ is
characterized for operation over a temperature range of –40°C to 125°C; and the TLC77xxM is characterized for
operation over the full Military temperature range of –55°C to 125°C.
The 3x3 mm DRB package is also available as a non-magnetic package for medical imaging application.
AVAILABLE OPTIONS
PACKAGED DEVICES
THRESHOLD
VOLTAGE
(V)
THIN SHRINK
SMALL OUTLINE
(PW)(2)
CHIP
CARRIER
CERAMIC
DIP
CERAMIC
DUAL
SMALL OUTLINE
NO LEAD
TA
PLASTIC DIP
(P)
SMALL
OUTLINE (D)(1)
(DRB)
(FK)
—
—
—
—
—
—
—
—
—
—
—
—
—
(JG)
—
—
—
—
—
—
—
—
—
—
—
—
—
FLATPACK (U)
1.1
2.25
2.63
2.93
4.55
1.1
TCLC7701ID
TLC7725ID
TLC7703ID
TLC7733ID
TLC7705ID
TLC7701IDBR
TLC7701QD
TLC7725QD
TLC7703QD
TLC7733QD
TLC7705QD
—
—
—
—
—
—
—
—
—
—
—
—
—
—
TCLC7701IP
TLC7725IP
TLC7703IP
TLC7733IP
TLC7705IP
—
TCLC7701IPWR
TLC7725IPWR
TLC7703IPWR
TLC7733IPWR
TLC7705IPWR
—
—
—
—
–40°C to
85°C
—
—
TLC7701IDRBT-NM
1.1
TLC7701QP
TLC7725QP
TLC7703QP
TLC7733QP
TLC7705QP
—
TLC7701QPWR
TLC7725QPWR
TLC7703QPWR
TLC7733QPWR
TLC7705QPWR
—
—
—
—
—
—
—
—
2.25
2.63
2.93
4.55
2.93
4.55
–40°C to
125°C
–55°C to
125°C
—
—
—
(1) The D package is available taped and reeled. Add the suffix R to the device type when ordering (e.g., TLC7705QDR).
(2) The PW package is only available left-end taped and reeled (indicated by the R suffix on the device type; e.g., TLC7705QPWR).
Table 1. FUNCTION TABLE
CONT RESIN
ROL
VI(SENSE)>VIT+
RESE
T
RESET
L
L
L
L
L
H
H
L
L
H
H
False
True
False
True
False
True
False
True
H
H
H
L(1)
H
H
H
H
L
L
L
H(1)
L
L
L
H(1)
L
H
H
H
H
(1) RESET and RESET states shown are valid for t > td.
2
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Product Folder Link(s): TLC7701, TLC7725, TLC7703 TLC7733, TLC7705
TLC7701, TLC7725, TLC7703
TLC7733, TLC7705
www.ti.com
SLVS087M –DECEMBER 1994–REVISED MARCH 2012
LOGIC SYMBOL
(1) This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Copyright © 1994–2012, Texas Instruments Incorporated
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TLC7701, TLC7725, TLC7703
TLC7733, TLC7705
SLVS087M –DECEMBER 1994–REVISED MARCH 2012
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FUNCTIONAL BLOCK DIAGRAM
TIMING DIAGRAM
4
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TLC7701, TLC7725, TLC7703
TLC7733, TLC7705
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SLVS087M –DECEMBER 1994–REVISED MARCH 2012
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
VALUE
UNIT
V
VDD
Supply voltage(2)
7
Input voltage range, CONTROL, RESIN, SENSE(2)
–0.3 to 7
V
IOL
IOH
IIK
Maximum low output current
10
mA
mA
mA
mA
Maximum high output current,
Input clamp current, (VI < 0 or VI > VDD)
Output clamp current, (VO 0 or VO > VDD)
Continuous total power dissipation
TL77xxI
–10
±10
IOK
±10
See Dissipation Rating Table
–40 to 84
°C
°C
°C
°C
Operating free-air
temperature range
TA
TL77xxQ
–40 to 125
TL77xxM
–55 to 125
Tstg
Storage temperature range
–65 to 150
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to GND.
DISSIPATION RATINGS
T
A ≤ 25°C
DERATING FACTOR
ABOVE TA = 25°C
TA = 85°C
POWER RATING
TA = 125°C
POWER RATING
PACKAGE
POWER RATING
D
DRB
FK
JG
P
725 mW
5.8 mW/°C
377 mW
145 mW
1375 mW
1050 mW
1000 mW
525 mW
700 mW
11.0 mW/°C
8.4 mW/°C
8.0 mW/°C
4.2 mW/°C
5.5 mW/°C
715 mW
546 mW
520 mW
273 mW
370 mW
275 mW
210 mW
200 mW
105 mW
150 mW
PW
U
RECOMMENDED OPERATING CONDITIONS
at specified temperature range
MIN
MAX UNIT
VDD
VI
Supply voltage
2
6
V
V
V
V
Input voltage
0
VDD
VIH
VIL
High-level input voltage at RESIN and CONTROL(1)
Low-level input voltage at RESIN and CONTROL(1)
High-level output current
0.7×VDD
0.2×VDD
IOH
IOL
–2 mA
mA
Low-level output current
2
Δt/ΔV
input transition rise and fall rate at RESIN and CONTROL
TLC77xxI
100 ns/ V
85
–40
–40
–55
Operating free-air
temperature range
TA
TLC77xxQ
125
125
°C
TLC77xxM
(1) To ensure a low supply current, VIL should be kept <0.3 V and VIH > VDD –0.3 V.
Copyright © 1994–2012, Texas Instruments Incorporated
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TLC7701, TLC7725, TLC7703
TLC7733, TLC7705
SLVS087M –DECEMBER 1994–REVISED MARCH 2012
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ELECTRICAL CHARACTERISTICS
over recommended operating conditions(1) (unless otherwise noted)
TLC77xx
MIN TYP MAX
PARAMETER
TEST CONDITIONS
UNIT
VDD = 2 V
1.8
2.5
4.3
3.7
IOH = –20 µA
IOH = 2 –mA
IOL = 20 µA
IOL = 2 mA
VDD = 2.7 V
VDD = 4.5 V
VDD = 4.5 V
VDD = 2 V
High-level output
voltage
VOH
V
V
0.2
0.2
VDD = 2.7 V
VDD = 4.5 V
VDD = 4.5 V
Low-Level output
voltage
VOL
0.2
0.5
TCLC7701
TLC7725
TLC7703
TLC7733
TLC7705
TCLC7701
TLC7725
TLC7703
TLC7733
TLC7705
1.04
2.18
2.56
2.86
4.47
1.1
2.25
2.63
2.93
4.55
30
1.16
2.32
2.70
3
Negative-going input threshold voltage,
SENSE(2)
VIT–
VDD = 2 V to 6 V
mV
mV
4.63
Vhus
Hysteresis voltage, SENSE
VDD = 2 V to 6 V
70
Vres
Power-up reset voltage(3)
RESIN
IOL = 20 µA
VI = 0 V to VDD
VI = VDD
1
2
V
CONTROL
Input current
SENSE
7
5
15
10
2
II
µA
VI = 5 V
SENSE, TLC7701 only
VI = 5 V
RESIN = VDD, SENSE = VDD ≥ VITmax + 0.2 V,
CONTROL = 0 V, Outputs open
IDD
Supply current
9
16
µA
VDD = 5 V, VCT = 0,
IDD(d) Supply current during td
CI Input capacitance, SENSE
RESIN = VDD, SENSE = VDD
CONTROL = 0 V, Outputs open
,
120
50
150
µA
pF
VI = 0 V to VDD
(1) All characteristics are measured with CT = 0.1 µF.
(2) To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 mF) should be connected near the supply terminals.
(3) The lowest supply voltage at which RESET becomes active. The symbol Vres is not currently listed within EIA or JEDEC standards for
semiconductor symbology. Rise time of VDD≥ 15 µs/V.
6
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TLC7701, TLC7725, TLC7703
TLC7733, TLC7705
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SLVS087M –DECEMBER 1994–REVISED MARCH 2012
ELECTRICAL CHARACTERISTICS
over recommended operating conditions(1) (unless otherwise noted)
TLC77xxM
MIN TYP(2) MAX
PARAMETER
TEST CONDITIONS
UNIT
V
TA = 25°C
1.8
1.7
2.5
2.3
4.3
4.2
3.7
3.6
0.2
0.2
0.2
0.2
0.2
0.2
0.5
0.5
VDD = 2 V
TA = –55°C to 125°C
TA = 25°C
IOH = –20 µA
VDD = 2.7 V
VDD = 4.5 V
VDD = 4.5 V
VDD = 2 V
V
TA = –55°C to 125°C
TA = 25°C
High-level output
voltage
VOH
V
TA = –55°C to 125°C
TA = 25°C
IOH = –2 µA
V
TA = –55°C to 125°C
TA = 25°C
V
TA = –55°C to 125°C
TA = 25°C
IOL = –20 µA
VDD = 2.7 V
VDD = 4.5 V
VDD = 4.5 V
VDD = 2 V to 6 V
V
TA = –55°C to 125°C
TA = 25°C
Low-level output
voltage
VOL
V
TA = –55°C to 125°C
TA = 25°C
IOL = 2 mA
V
TA = –55°C to 125°C
TLC7733
TLC7705
2.86
4.3
2.93
4.5
70
3.1
4.8
Negative-going input threshold
VIT–
V
(3)
voltage, SENSE
Vhys Hysteresis voltage, SENSE
Vres Power-up reset voltage(2)
RESIN
VDD = 2 V to 6 V
IOL = 20 µA
VI = 0 V to VDD
VI = VDD
mV
V
1
2
CONTROL
SENSE
7
5
15
10
2
II
Input current
µA
µA
VI = 5 V
SENSE, TLC7701 only
VI = 5 V
RESIN = VDD,
SENSE = VDD ≥ VITmax + 0.2 V
CONTROL = 0 V,
IDD
Supply current
9
16
Outputs open
TLC7733
TLC7705
VCT = 0 ,
RESIN = VDD
CONTROL = 0 V,
SENSE = VDD
VDD = 3.3 V
250
,
120 150
IDD(d) Supply current during td
µA
pF
VDD = 5 V
,
Outputs open
CI
Input capacitance, SENSE
VI = 0 V to VDD
50
(1) All characteristics are measured with CT = 0.1 µF.
(2) Typical values apply at TA = 25°C.
(3) To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 mF) should be connected near the supply terminals.
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TLC7733, TLC7705
SLVS087M –DECEMBER 1994–REVISED MARCH 2012
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SWITCHING CHARACTERISTICS
at VDD = 5 V, RL = 2 kΩ, CL = 50 pF, TA = 25°C (unless otherwise noted)
MEASURED
TLC77xx
MIN TYP MAX
PARAMETER
TEST CONDITIONS
UNIT
FROM
TO
(INPUT)
(OUTPUT)
RESET
and
RESET
RESIN = 0.7 × VDD
CONTROL = 0.2 × VDD, CT = 100 nF,
TA = Full range, See timing diagram
,
td
Delay time
V
I(SENSE) ≥ VIT+
1.1
2.1
4.2
ms
µs
Propagation delay time, low-
to-high-level output
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
20
5
RESET
RESET
RESET
RESET
RESET
Propagation delay time, high-
to-low-level output
VIH = VIT+max + 0.2 V, VIL = VIT-min – 0.2 V,
RESIN = 0.7 × VDD, CONTROL = 0.2 × VDD
CT = NC(1)
SENSE
,
Propagation delay time, low-
to-high-level output
5
Propagation delay time, high-
to-low-level output
20
20
40
45
20
38
38
Propagation delay time, low-
to-high-level output
µs
ns
Propagation delay time, high-
to-low-level output
VIH = 0.7 × VDD, VIL = 0.2 × VDD
SENSE = VIT+max + 0.2 V,
CONTROL = 0.2 × VDD
CT = NC(1)
,
,
RESIN
,
Propagation delay time, low-
to-high-level output
Propagation delay time, high-
to-low-level output
µs
ns
ns
Propagation delay time, low-
to-high-level output
VIH = 0.7 × VDD, VIL = 0.2 × VDD
SENSE = VIT+max + 0.2 V, RESIN = 0.7 × VDD
CT = NC(1)
CONTROL
,
Propagation delay time, high-
to-low-level output
Low-level minimum pulse
duration to switch RESET
and RESET
SENSE
RESIN
VIH = VIT+max + 0.2 V, VIL = VIT-min –0.2 V,
VIL = 0.2 × VDD, VIH = 0.7 × VDD
10% to 90%
tr
tf
Rise time
Fall time
RESET
and
RESET
90% to 10%
(1) NC = No capacitor, and includes up to 100-pF probe and jig capacitance.
8
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TLC7701, TLC7725, TLC7703
TLC7733, TLC7705
www.ti.com
SLVS087M –DECEMBER 1994–REVISED MARCH 2012
SWITCHING CHARACTERISTICS
at VDD = 5 V, RL = 2 kΩ, CL = 50 pF, TA = 25°C (unless otherwise noted)
MEASURED
TLC77xxM
PARAMETER
TEST CONDITIONS
TA
UNIT
FROM
(INPUT)
TO
(OUTPUT)
MIN
TYP MAX
RESET
and
RESET
RESIN = 2.7 V, CONTROL = 0.4 V,
CT = 100 nF, See timing diagram
td
Delay time
VI(SENSE) ≥ VIT+
Full range
1.1
2.1
4.2
ms
25°C
Full range
25°C
20
24
5
VIH = VIT+max + 0.2 V,
VIL = VIT-min - 0.2 V,
RESIN = 2.7 V, CONTROL = 0.4 V,
CT = NC(1)
RESET
RESET
RESET
RESET
RESET
RESET
RESET
RESET
µs
µs
µs
µs
µs
ns
ns
µs
Propagation delay
time, low-to-high-level
output
tPLH
SENSE
Full range
25°C
7
5
VIH = VIT+max + 0.2 V,
VIL = VIT-min - 0.2 V,
RESIN = 2.7 V, CONTROL = 0.4 V,
CT = NC(1)
Propagation delay
time, high-to-low-level
output
Full range
25°C
7
tPHL
tPLH
tPHL
SENSE
RESIN
RESIN
20
24
20
24
45
65
40
60
20
24
38
Full range
25°C
VIH = 2.7 V, VIL = 0.4 V,
SENSE = VIT+max + 0.2 V,
CONTROL = 0.4 V,
CT = NC(1)
Propagation delay
time, low-to-high-level
output
Full range
25°C
Full range
25°C
VIH = 2.7 V, VIL = 0.4 V,
SENSE = VIT+max + 0.2 V,
CONTROL = 0.4 V,
CT = NC(1)
Propagation delay
time, high-to-low-level
output
Full range
25°C
Full range
25°C
Propagation delay
time, low-to-high-level
output
tPLH
ns
ns
VIH = 2.7 V, VIL = 0.4 V,
SENSE = VIT+max + 0.2 V,
RESIN = 2.7 V,
CT = NC(1)
Full range
25°C
58
38
58
CONTROL
RESET
Propagation delay
time, high-to-low-level
output
tPHL
Full Range
VIH = VIT+max + 0.2 V,
VIL = VIT-min - 0.2 V
SENSE
RESIN
3
1
Low-level minimum
pulse duration
Full range
Full range
µs
VIL = 0.4 V, VIH = 2.7 V
10% to 90%
tr
tf
Rise time
Fall time
RESET
and
RESET
8
4
ns/V
90% to 10%
(1) NC = No capacitor, and includes up to 100-pF probe and jig capacitance.
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TLC7701, TLC7725, TLC7703
TLC7733, TLC7705
SLVS087M –DECEMBER 1994–REVISED MARCH 2012
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PARAMETER MEASUREMENT INFORMATION
Figure 1. RESET and RESET Output Configurations
Figure 2. Input Pulse Definition Waveforms
10
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TLC7701, TLC7725, TLC7703
TLC7733, TLC7705
www.ti.com
SLVS087M –DECEMBER 1994–REVISED MARCH 2012
TYPICAL CHARACTERISTICS
NORMALIZED INPUT THRESHOLD VOLTAGE
SUPPLY CURRENT
vs
vs
TEMPERATURE
SUPPLY VOLTAGE
Figure 3.
Figure 4.
HIGH-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT CURRENT
Figure 5.
Figure 6.
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TLC7733, TLC7705
SLVS087M –DECEMBER 1994–REVISED MARCH 2012
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TYPICAL CHARACTERISTICS (continued)
INPUT CURRENT
MINIMUM PULSE DURATION AT SENSE
vs
vs
INPUT VOLTAGE AT SENSE
SENSE THRESHOLD OVERDRIVE
Figure 7.
Figure 8.
12
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TLC7733, TLC7705
www.ti.com
SLVS087M –DECEMBER 1994–REVISED MARCH 2012
APPLICATION INFORMATION
Figure 9. Reset Controller in a Microcomputer System
Figure 10. Data Retention During Power Down Using Static CMOS RAMs
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TLC7701, TLC7725, TLC7703
TLC7733, TLC7705
SLVS087M –DECEMBER 1994–REVISED MARCH 2012
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Changes from Revision L (February 2003) to Revision M
Page
•
Updated the DRB package Pin Out dimensions and Ordering Information. ........................................................................ 1
14
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PACKAGE OPTION ADDENDUM
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13-Oct-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
5962-9750901Q2A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
5962-
9750901Q2A
TLC7733
MFKB
5962-9750901QPA
5962-9751301Q2A
ACTIVE
ACTIVE
CDIP
JG
FK
8
1
1
TBD
TBD
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
9750901QPA
TLC7733M
LCCC
20
POST-PLATE
5962-
9751301Q2A
TLC7705
MFKB
5962-9751301QHA
5962-9751301QPA
TLC7701ID
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
CFP
CDIP
SOIC
SOIC
SOIC
SON
U
JG
D
10
8
8
8
8
8
8
8
8
8
8
1
1
TBD
TBD
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
-40 to 85
-40 to 85
-40 to 85
-40 to 125
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
9751301QHA
TLC7705M
A42
9751301QPA
TLC7705M
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
N / A for Pkg Type
C7701I
C7701I
C7701I
7701N
TLC7701IDG4
TLC7701IDR
D
75
Green (RoHS
& no Sb/Br)
D
2500
250
2500
50
Green (RoHS
& no Sb/Br)
TLC7701IDRBT-NM
TLC7701IDRG4
TLC7701IP
DRB
D
Green (RoHS
& no Sb/Br)
SOIC
PDIP
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
C7701I
TLC7701IP
TLC7701IP
Y7701
P
Pb-Free
(RoHS)
TLC7701IPE4
TLC7701IPW
PDIP
P
50
Pb-Free
(RoHS)
N / A for Pkg Type
TSSOP
TSSOP
PW
PW
150
150
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Level-1-260C-UNLIM
TLC7701IPWG4
Green (RoHS
& no Sb/Br)
Y7701
TLC7701IPWLE
TLC7701IPWR
OBSOLETE
ACTIVE
TSSOP
TSSOP
PW
PW
8
8
TBD
Call TI
Call TI
-40 to 85
-40 to 85
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Y7701
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
13-Oct-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
TLC7701IPWRG4
TLC7701QD
ACTIVE
TSSOP
SOIC
PW
8
8
8
8
8
8
8
8
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
Y7701
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
D
D
75
75
Green (RoHS
& no Sb/Br)
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
C7701Q
C7701Q
C7701Q
C7701Q
TLC7701QP
TLC7701QP
TD701
TLC7701QDG4
TLC7701QDR
TLC7701QDRG4
TLC7701QP
SOIC
Green (RoHS
& no Sb/Br)
SOIC
D
2500
2500
50
Green (RoHS
& no Sb/Br)
SOIC
D
Green (RoHS
& no Sb/Br)
PDIP
P
Pb-Free
(RoHS)
TLC7701QPE4
TLC7701QPW
TLC7701QPWG4
PDIP
P
50
Pb-Free
(RoHS)
N / A for Pkg Type
TSSOP
TSSOP
PW
PW
150
150
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Green (RoHS
& no Sb/Br)
TD701
TLC7701QPWLE
TLC7701QPWR
PREVIEW
ACTIVE
TSSOP
TSSOP
PW
PW
8
8
TBD
Call TI
Call TI
-40 to 125
-40 to 125
2000
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TD701
TD701
TLC7701QPWRG4
ACTIVE
TSSOP
PW
8
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
TLC7703-W
TLC7703ID
ACTIVE WAFERSALE
YS
D
0
8
TBD
Call TI
Call TI
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
PDIP
75
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
C7703I
TLC7703IDG4
TLC7703IDR
TLC7703IDRG4
TLC7703IP
D
D
D
P
8
8
8
8
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
C7703I
2500
2500
50
Green (RoHS
& no Sb/Br)
C7703I
Green (RoHS
& no Sb/Br)
C7703I
Pb-Free
(RoHS)
TLC7703IP
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
13-Oct-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
TLC7703IPE4
TLC7703IPW
ACTIVE
PDIP
P
8
8
8
50
Pb-Free
(RoHS)
CU NIPDAU
CU NIPDAU
CU NIPDAU
N / A for Pkg Type
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
TLC7703IP
ACTIVE
ACTIVE
TSSOP
TSSOP
PW
PW
150
150
Green (RoHS
& no Sb/Br)
Y7703
Y7703
TLC7703IPWG4
Green (RoHS
& no Sb/Br)
TLC7703IPWLE
TLC7703IPWR
OBSOLETE
ACTIVE
TSSOP
TSSOP
PW
PW
8
8
TBD
Call TI
Call TI
-40 to 85
-40 to 85
2000
2000
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Y7703
TLC7703IPWRG4
TLC7703QD
ACTIVE
ACTIVE
ACTIVE
TSSOP
SOIC
PW
D
8
8
8
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 125
-40 to 125
Y7703
Green (RoHS
& no Sb/Br)
C7703Q
C7703Q
TLC7703QDG4
SOIC
D
75
Green (RoHS
& no Sb/Br)
TLC7703QPE4
TLC7703QPW
ACTIVE
ACTIVE
PDIP
P
8
8
TBD
Call TI
Call TI
-40 to 125
-40 to 125
TSSOP
PW
150
150
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TD703
TLC7703QPWG4
TLC7705ID
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
TSSOP
SOIC
SOIC
SOIC
SOIC
PDIP
PW
D
8
8
8
8
8
8
8
8
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
-40 to 125
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
TD703
Green (RoHS
& no Sb/Br)
C7705I
C7705I
C7705I
C7705I
TLC7705IP
TLC7705IP
Y7705
TLC7705IDG4
TLC7705IDR
TLC7705IDRG4
TLC7705IP
D
75
Green (RoHS
& no Sb/Br)
D
2500
2500
50
Green (RoHS
& no Sb/Br)
D
Green (RoHS
& no Sb/Br)
P
Pb-Free
(RoHS)
TLC7705IPE4
TLC7705IPW
PDIP
P
50
Pb-Free
(RoHS)
N / A for Pkg Type
TSSOP
PW
150
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
13-Oct-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
TLC7705IPWG4
ACTIVE
TSSOP
PW
8
150
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Y7705
TLC7705IPWLE
TLC7705IPWR
OBSOLETE
ACTIVE
TSSOP
TSSOP
PW
PW
8
8
TBD
Call TI
Call TI
-40 to 85
-40 to 85
2000
2000
1
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Y7705
Y7705
TLC7705IPWRG4
TLC7705MFKB
ACTIVE
ACTIVE
TSSOP
LCCC
PW
FK
8
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
N / A for Pkg Type
-40 to 85
20
TBD
POST-PLATE
-55 to 125
5962-
9751301Q2A
TLC7705
MFKB
TLC7705MJG
TLC7705MJGB
TLC7705MUB
TLC7705QD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
CDIP
CDIP
CFP
JG
JG
U
8
8
1
1
TBD
TBD
TBD
A42
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 125
-55 to 125
-55 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
TLC7705
MJG
A42
9751301QPA
TLC7705M
10
8
1
A42
9751301QHA
TLC7705M
SOIC
SOIC
SOIC
SOIC
PDIP
D
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
C7705Q
C7705Q
C7705Q
C7705Q
TLC7705QP
TLC7705QP
TD705
TLC7705QDG4
TLC7705QDR
TLC7705QDRG4
TLC7705QP
D
8
75
Green (RoHS
& no Sb/Br)
D
8
2500
2500
50
Green (RoHS
& no Sb/Br)
D
8
Green (RoHS
& no Sb/Br)
P
8
Pb-Free
(RoHS)
TLC7705QPE4
TLC7705QPW
TLC7705QPWG4
PDIP
P
8
50
Pb-Free
(RoHS)
TSSOP
TSSOP
PW
PW
8
150
150
Green (RoHS
& no Sb/Br)
8
Green (RoHS
& no Sb/Br)
TD705
TLC7705QPWLE
TLC7705QPWR
OBSOLETE
ACTIVE
TSSOP
TSSOP
PW
PW
8
8
TBD
Call TI
Call TI
-40 to 125
-40 to 125
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TD705
Addendum-Page 4
PACKAGE OPTION ADDENDUM
www.ti.com
13-Oct-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
TLC7705QPWRG4
TLC7725ID
ACTIVE
TSSOP
SOIC
PW
8
8
8
8
8
8
8
8
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
TD705
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
D
D
75
75
Green (RoHS
& no Sb/Br)
C7725I
TLC7725IDG4
TLC7725IDR
SOIC
Green (RoHS
& no Sb/Br)
C7725I
SOIC
D
2500
2500
50
Green (RoHS
& no Sb/Br)
C7725I
TLC7725IDRG4
TLC7725IP
SOIC
D
Green (RoHS
& no Sb/Br)
C7725I
PDIP
P
Pb-Free
(RoHS)
TLC7725IP
TLC7725IP
Y7725
TLC7725IPE4
TLC7725IPW
TLC7725IPWG4
PDIP
P
50
Pb-Free
(RoHS)
N / A for Pkg Type
TSSOP
TSSOP
PW
PW
150
150
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Green (RoHS
& no Sb/Br)
Y7725
TLC7725IPWLE
TLC7725IPWR
OBSOLETE
ACTIVE
TSSOP
TSSOP
PW
PW
8
8
TBD
Call TI
Call TI
-40 to 85
-40 to 85
2000
2000
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Y7725
TLC7725IPWRG4
TLC7725QD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
TSSOP
SOIC
SOIC
SOIC
SOIC
PDIP
PW
D
8
8
8
8
8
8
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Call TI
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Call TI
-40 to 85
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
Y7725
Green (RoHS
& no Sb/Br)
C7725Q
C7725Q
C7725Q
C7725Q
TLC7725QDG4
TLC7725QDR
TLC7725QDRG4
TLC7725QPE4
D
75
Green (RoHS
& no Sb/Br)
D
2500
2500
Green (RoHS
& no Sb/Br)
D
Green (RoHS
& no Sb/Br)
P
TBD
TLC7725QPWLE
TLC7725QPWR
OBSOLETE
ACTIVE
TSSOP
TSSOP
PW
PW
8
8
TBD
Call TI
Call TI
-40 to 125
-40 to 125
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TD725
Addendum-Page 5
PACKAGE OPTION ADDENDUM
www.ti.com
13-Oct-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
TLC7725QPWRG4
TLC7733ID
ACTIVE
TSSOP
SOIC
PW
8
8
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
POST-PLATE
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
TD725
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
D
D
75
75
Green (RoHS
& no Sb/Br)
C7733I
C7733I
C7733I
C7733I
TLC7733IP
TLC7733IP
Y7733
TLC7733IDG4
TLC7733IDR
SOIC
8
Green (RoHS
& no Sb/Br)
SOIC
D
8
2500
2500
50
Green (RoHS
& no Sb/Br)
TLC7733IDRG4
TLC7733IP
SOIC
D
8
Green (RoHS
& no Sb/Br)
PDIP
P
8
Pb-Free
(RoHS)
TLC7733IPE4
TLC7733IPW
PDIP
P
8
50
Pb-Free
(RoHS)
N / A for Pkg Type
TSSOP
TSSOP
TSSOP
TSSOP
LCCC
PW
PW
PW
PW
FK
8
150
150
2000
2000
1
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
TLC7733IPWG4
TLC7733IPWR
TLC7733IPWRG4
TLC7733MFKB
8
Green (RoHS
& no Sb/Br)
Y7733
8
Green (RoHS
& no Sb/Br)
-40 to 85
-40 to 85
-55 to 125
Y7733
8
Green (RoHS
& no Sb/Br)
Y7733
20
TBD
5962-
9750901Q2A
TLC7733
MFKB
TLC7733MJG
TLC7733MJGB
TLC7733QD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
CDIP
CDIP
SOIC
SOIC
SOIC
JG
JG
D
8
8
8
8
8
1
1
TBD
TBD
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
-40 to 125
-40 to 125
-40 to 125
TLC7733
MJG
A42
9750901QPA
TLC7733M
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
C7733Q
C7733Q
C7733Q
TLC7733QDG4
TLC7733QDR
D
75
Green (RoHS
& no Sb/Br)
D
2500
Green (RoHS
& no Sb/Br)
Addendum-Page 6
PACKAGE OPTION ADDENDUM
www.ti.com
13-Oct-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
TLC7733QDRG4
TLC7733QP
ACTIVE
SOIC
PDIP
D
8
8
8
8
8
8
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
C7733Q
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
P
50
50
Pb-Free
(RoHS)
N / A for Pkg Type
TLC7733QP
TLC7733QP
TD733
TLC7733QPE4
TLC7733QPW
PDIP
P
Pb-Free
(RoHS)
N / A for Pkg Type
TSSOP
TSSOP
TSSOP
TSSOP
PW
PW
PW
PW
150
150
2000
2000
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
TLC7733QPWG4
TLC7733QPWR
TLC7733QPWRG4
Green (RoHS
& no Sb/Br)
TD733
Green (RoHS
& no Sb/Br)
TD733
Green (RoHS
& no Sb/Br)
TD733
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 7
PACKAGE OPTION ADDENDUM
www.ti.com
13-Oct-2013
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLC7701, TLC7705, TLC7705M, TLC7733, TLC7733M :
Catalog: TLC7705, TLC7733
•
Automotive: TLC7701-Q1, TLC7705-Q1, TLC7705-Q1, TLC7733-Q1, TLC7733-Q1
•
Enhanced Product: TLC7701-EP, TLC7705-EP, TLC7705-EP, TLC7733-EP, TLC7733-EP
•
Military: TLC7705M, TLC7733M
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
Enhanced Product - Supports Defense, Aerospace and Medical Applications
•
Military - QML certified for Military and Defense Applications
•
Addendum-Page 8
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Oct-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TLC7701IDR
TLC7701IDRBT-NM
TLC7701IPWR
TLC7701QDR
TLC7701QPWR
TLC7703IDR
SOIC
SON
D
DRB
PW
D
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
2500
250
330.0
180.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
12.4
6.4
3.3
7.0
6.4
7.0
6.4
7.0
6.4
7.0
6.4
7.0
6.4
7.0
6.4
7.0
6.4
6.4
7.0
5.2
3.3
3.6
5.2
3.6
5.2
3.6
5.2
3.6
5.2
3.6
5.2
3.6
5.2
3.6
5.2
5.2
3.6
2.1
1.1
1.6
2.1
1.6
2.1
1.6
2.1
1.6
2.1
1.6
2.1
1.6
2.1
1.6
2.1
2.1
1.6
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
12.0
Q1
Q2
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
TSSOP
SOIC
2000
2500
2000
2500
2000
2500
2000
2500
2000
2500
2000
2500
2000
2500
2500
2000
TSSOP
SOIC
PW
D
TLC7703IPWR
TLC7705IDR
TSSOP
SOIC
PW
D
TLC7705IPWR
TLC7705QDR
TLC7705QPWR
TLC7725IDR
TSSOP
SOIC
PW
D
TSSOP
SOIC
PW
D
TLC7725IPWR
TLC7725QDR
TLC7725QPWR
TLC7733IDR
TSSOP
SOIC
PW
D
TSSOP
SOIC
PW
D
TLC7733IDR
SOIC
D
TLC7733IPWR
TSSOP
PW
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Oct-2013
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TLC7733QDR
TLC7733QDR
TLC7733QPWR
SOIC
SOIC
D
D
8
8
8
2500
2500
2000
330.0
330.0
330.0
12.4
12.4
12.4
6.4
6.4
7.0
5.2
5.2
3.6
2.1
2.1
1.6
8.0
8.0
8.0
12.0
12.0
12.0
Q1
Q1
Q1
TSSOP
PW
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TLC7701IDR
TLC7701IDRBT-NM
TLC7701IPWR
TLC7701QDR
TLC7701QPWR
TLC7703IDR
SOIC
SON
D
DRB
PW
D
8
8
8
8
8
8
8
8
8
8
8
8
8
8
2500
250
367.0
210.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
185.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
TSSOP
SOIC
2000
2500
2000
2500
2000
2500
2000
2500
2000
2500
2000
2500
TSSOP
SOIC
PW
D
TLC7703IPWR
TLC7705IDR
TSSOP
SOIC
PW
D
TLC7705IPWR
TLC7705QDR
TLC7705QPWR
TLC7725IDR
TSSOP
SOIC
PW
D
TSSOP
SOIC
PW
D
TLC7725IPWR
TLC7725QDR
TSSOP
SOIC
PW
D
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Oct-2013
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TLC7725QPWR
TLC7733IDR
TSSOP
SOIC
PW
D
8
8
8
8
8
8
8
2000
2500
2500
2000
2500
2500
2000
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
TLC7733IDR
SOIC
D
TLC7733IPWR
TLC7733QDR
TLC7733QDR
TLC7733QPWR
TSSOP
SOIC
PW
D
SOIC
D
TSSOP
PW
Pack Materials-Page 3
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.063 (1,60)
0.015 (0,38)
0.020 (0,51) MIN
0.200 (5,08) MAX
0.130 (3,30) MIN
Seating Plane
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
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