TLE2024ACDWRG4 [TI]
EXCALIBUR HIGH-SPEED LOW-POWER PRECISION OPERATIONAL AMPLIFIERS; 神剑高速低功耗精密运算放大器
| 型号： | TLE2024ACDWRG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | EXCALIBUR HIGH-SPEED LOW-POWER PRECISION OPERATIONAL AMPLIFIERS |
| 文件： | 总72页 (文件大小：1491K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢇꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢀꢁ ꢂꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎ ꢏꢌ ꢐꢏ ꢑꢒꢓꢂ ꢂꢔ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎ ꢓ ꢎꢂ ꢋ ꢌꢒ ꢌ ꢕꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁ ꢇꢘ ꢓ ꢁꢌ ꢙꢌ ꢂꢎ ꢒ
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SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
D
D
D
D
D
D
Supply Current . . . 300 µA Max
High Unity-Gain Bandwidth . . . 2 MHz Typ
High Slew Rate . . . 0.45 V/µs Min
D
High Open-Loop Gain . . . 6.5 V/µV
(136 dB) Typ
D
Low Offset Voltage . . . 100 µV Max
Offset Voltage Drift With Time
0.005 µV/mo Typ
Low Input Bias Current . . . 50 nA Max
D
Supply-Current Change Over Military Temp
Range . . . 10 µA Typ at V
=
15 V
CC
D
D
Specified for Both 5-V Single-Supply and
15-V Operation
Low Noise Voltage . . . 19 nV/√Hz Typ
Phase-Reversal Protection
description
The TLE202x, TLE202xA, and TLE202xB devices are precision, high-speed, low-power operational amplifiers
using a new Texas Instruments Excalibur process. These devices combine the best features of the OP21 with
highly improved slew rate and unity-gain bandwidth.
The complementary bipolar Excalibur process utilizes isolated vertical pnp transistors that yield dramatic
improvement in unity-gain bandwidth and slew rate over similar devices.
The addition of a bias circuit in conjunction with this process results in extremely stable parameters with both
time and temperature. This means that a precision device remains a precision device even with changes in
temperature and over years of use.
This combination of excellent dc performance with a common-mode input voltage range that includes the
negative rail makes these devices the ideal choice for low-level signal conditioning applications in either
single-supply or split-supply configurations. In addition, these devices offer phase-reversal protection circuitry
that eliminates an unexpected change in output states when one of the inputs goes below the negative supply
rail.
A variety of available options includes small-outline and chip-carrier versions for high-density systems
applications.
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized
for operation from −40°C to 85°C. The M-suffix devices are characterized for operation over the full military
temperature range of −55°C to 125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
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Copyright 1997−2007, Texas Instruments Incorporated
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TLE2021 AVAILABLE OPTIONS
PACKAGED DEVICES
CHIP
CHIP
FORM
(Y)
V
max
IO
SMALL
OUTLINE
(D)
§
‡
‡
T
A
CERAMIC DIP PLASTIC DIP
TSSOP
(PW)
SSOP
(DB)
AT 25°C
†
CARRIER
(FK)
(JG)
(P)
—
—
0°C to
70°C
200 µV
500 µV
TLE2021ACD
TLE2021CD
TLE2021ACP
TLE2021CP
TLE2021CDBLE
—
—
—
—
TLE2021CPWLE TLE2021Y
−40°C
to
85°C
200 µV
500 µV
TLE2021AID
TLE2021ID
TLE2021AIP
TLE2021IP
—
—
—
—
—
−55°C
to
125°C
100 µV
200 µV
500 µV
—
TLE2021BMFK TLE2021BMJG
—
—
TLE2021AMD
TLE2021MD
TLE2021AMFK TLE2021AMJG TLE2021AMP
TLE2021MFK TLE2021MJG TLE2021MP
†
‡
§
The D packages are available taped and reeled. To order a taped and reeled part, add the suffix R (e.g., TLE2021CDR).
The DB and PW packages are only available left-end taped and reeled.
Chip forms are tested at 25°C only.
TLE2022 AVAILABLE OPTIONS
PACKAGED DEVICES
CHIP
FORM
(Y)
V
max
CHIP
CARRIER
(FK)
CERAMIC
DIP
PLASTIC
DIP
IO
AT 25°C
SMALL
OUTLINE
(D)
§
‡
‡
T
A
TSSOP
(PW)
SSOP
(DB)
†
(JG)
(P)
—
—
—
—
—
—
0°C
to
70°C
150 µV TLE2022BCD
300 µV TLE2022ACD
500 µV TLE2022CD
—
TLE2022ACP
TLE2022CP
—
—
TLE2022CPWLE TLE2022Y
TLE2022CDBLE
−40°C
to
85°C
150 µV TLE2022BID
300 µV TLE2022AID
500 µV TLE2022ID
—
—
—
—
—
—
—
—
—
TLE2022AIP
TLE2022IP
−55°C
to
125°C
150 µV
—
TLE2022BMJG
—
300 µV TLE2022AMD
500 µV TLE2022MD
TLE2022AMFK TLE2022AMJG TLE2022AMP
TLE2022MFK TLE2022MJG TLE2022MP
—
†
‡
§
The D packages are available taped and reeled. To order a taped and reeled part, add the suffix R (e.g., TLE2022CDR).
The DB and PW packages are only available left-end taped and reeled.
Chip forms are tested at 25°C only.
TLE2024 AVAILABLE OPTIONS
PACKAGED DEVICES
CHIP
FORM
(Y)
V
max
SMALL
OUTLINE
(DW)
CHIP
CARRIER
(FK)
CERAMIC
DIP
PLASTIC
DIP
IO
AT 25°C
§
T
A
(J)
(N)
500 µV TLE2024BCDW
750 µV TLE2024ACDW
1000 µV TLE2024CDW
TLE2024BCN
TLE2024ACN
TLE2024CN
—
—
0°C to 70°C
−40°C to 85°C
−55°C to 125°C
—
—
—
—
TLE2024Y
500 µV TLE2024BIDW
750 µV TLE2024AIDW
1000 µV TLE2024IDW
TLE2024BIN
TLE2024AIN
TLE2024IN
—
500 µV TLE2024BMDW
750 µV TLE2024AMDW
1000 µV TLE2024MDW
TLE2024BMFK
TLE2024AMFK
TLE2024MFK
TLE2024BMJ
TLE2024AMJ
TLE2024MJ
TLE2024BMN
TLE2024AMN
TLE2024MN
—
§
Chip forms are tested at 25°C only.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢇꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢀꢁ ꢂꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎ ꢏꢌ ꢐꢏ ꢑꢒꢓꢂ ꢂꢔ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎ ꢓ ꢎꢂ ꢋ ꢌꢒ ꢌ ꢕꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁ ꢇꢘ ꢓ ꢁꢌ ꢙꢌ ꢂꢎ ꢒ
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SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TLE2021
D, DB, JG, P, OR PW PACKAGE
(TOP VIEW)
TLE2021
FK PACKAGE
(TOP VIEW)
OFFSET N1
IN−
NC
V
OUT
1
2
3
4
8
7
6
5
CC+
IN+
V
/GND
OFFSET N2
CC −
3
2
1
20 19
18
NC
V
NC
4
5
6
7
8
IN−
NC
IN+
NC
17
16
CC+
NC − No internal connection
NC
15 OUT
14
NC
9 10 11 12 13
D, DB, JG, P, OR PW PACKAGE
(TOP VIEW)
FK PACKAGE
(TOP VIEW)
1OUT
1IN−
1IN+
V
CC+
1
2
3
4
8
7
6
5
2OUT
2IN−
2IN+
3
2
1
20 19
18
NC
NC
4
5
6
7
8
V
/GND
CC −
2OUT
NC
1IN −
NC
17
16
15 2IN −
14
1IN +
NC
NC − No internal connection
NC
9 10 11 12 13
DW PACKAGE
(TOP VIEW)
FK PACKAGE
(TOP VIEW)
J OR N PACKAGE
(TOP VIEW)
4OUT
4IN−
4IN+
1OUT
1IN−
1IN+
1OUT
1IN−
1IN+
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
4OUT
4IN−
4IN+
1
2
3
4
5
6
7
14
13
12
11
10
9
3
2
1
20 19
18
4IN+
NC
1IN+
NC
4
5
6
7
8
V
/GND
V
V
V
/GND
CC −
CC+
CC+
CC−
17
16
15
14
3IN+
3IN−
3OUT
NC
2IN+
2IN−
2OUT
NC
2IN+
2IN−
2OUT
3IN+
3IN−
3OUT
V
/GND
V
CC−
CC+
NC
NC
8
3IN+
2IN+
9 10 11 12 13
NC − No internal connection
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TLE2021Y chip information
This chip, when properly assembled, display characteristics similar to the TLE2021. Thermal compression or
ultrasonic bonding may be used on the doped-aluminum bonding pads. This chip may be mounted with
conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
(7)
(6)
(5)
V
CC+
(7)
(1)
(3)
OFFSET N1
IN+
+
(6)
OUT
(2)
(5)
IN−
−
OFFSET N2
(4)
V
CC−
/GND
78
CHIP THICKNESS: 15 MILS TYPICAL
BONDING PADS: 4 × 4 MILS MINIMUM
T = 150°C
Jmax
TOLERANCES ARE 10%.
ALL DIMENSIONS ARE IN MILS.
(4)
(3)
(1)
PIN (4) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
(2)
54
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎ ꢏꢌ ꢐꢏ ꢑꢒꢓꢂ ꢂꢔ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎ ꢓ ꢎꢂ ꢋ ꢌꢒ ꢌ ꢕꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁ ꢇꢘ ꢓ ꢁꢌ ꢙꢌ ꢂꢎ ꢒ
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SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TLE2022Y chip information
This chip, when properly assembled, displays characteristics similar to TLE2022. Thermal compression or
ultrasonic bonding may be used on the doped-aluminum bonding pads. This chip may be mounted with
conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
(7)
(6)
V
CC+
(8)
(3)
(2)
IN+
IN−
+
−
(1)
OUT
(5)
(6)
+
IN+
IN−
(7)
OUT
(8)
(1)
−
(5)
(4)
(4)
80
V
CC−
CHIP THICKNESS: 15 MILS TYPICAL
BONDING PADS: 4 × 4 MILS MINIMUM
T max = 150°C
J
TOLERANCES ARE 10%.
ALL DIMENSIONS ARE IN MILS.
(2)
(3)
PIN (4) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
86
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TLE2024Y chip information
This chip, when properly assembled, displays characteristics similar to the TLE2024. Thermal compression or
ultrasonic bonding may be used on the doped aluminum-bonding pads. This chip may be mounted with
conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
V
CC+
(4)
(3)
(2)
1IN+
1IN−
+
(1)
1OUT
−
(5)
(6)
+
2IN+
2IN−
(7)
2OUT
2IN+
3IN−
−
(10)
(9)
+
−
100
(8)
3OUT
(12)
(13)
+
−
4IN+
4IN−
(14)
V
4OUT
(11)
CC−/GND
140
CHIP THICKNESS: 15 MILS TYPICAL
BONDING PADS: 4 × 4 MILS MINIMUM
T max = 150°C
J
TOLERANCES ARE 10%.
ALL DIMENSIONS ARE IN MILS.
PIN (11) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
equivalent schematic (each amplifier)
V
CC+
Q13
Q22
Q3
Q17
Q7
Q28
Q29
Q31 Q35
Q19
Q1
Q32
Q34
Q39
Q24
Q20
Q5
Q8
Q36
Q38
Q11
D3
D4
Q2
C4
OUT
Q40
IN −
IN +
Q4
Q14
Q12
R7
C3
Q23 Q25
C2
Q10
D2
D1
Q21
Q27
R6
R1
C1
Q6
R2
R3
Q9
R4
R5
Q15
Q37
Q30 Q33
Q26
Q18
OFFSET N1
OFFSET N2
Q16
V
CC−
/GND
ACTUAL DEVICE COMPONENT COUNT
COMPONENT
TLE2021
TLE2022
TLE2024
160
28
Transistors
Resistors
Diodes
40
7
80
14
8
4
16
Capacitors
4
8
16
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢇ
ꢆ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃꢅ
ꢈ
ꢆ
ꢀꢁ
ꢂ
ꢃ
ꢄ
ꢃ
ꢅ
ꢉ
ꢚ
ꢂ
ꢊꢋ
ꢇ
ꢁ
ꢌ
ꢈꢍ
ꢎ
ꢏ
ꢌ
ꢐ
ꢏ
ꢑ
ꢒ
ꢓ
ꢂ
ꢂ
ꢔ
ꢁ
ꢕ
ꢖ
ꢑ
ꢓ
ꢕ
ꢖ
ꢂ
ꢎ
ꢓ
ꢎ
ꢂ
ꢋ
ꢌ
ꢒ
ꢌ
ꢕ
ꢗ
ꢕ
ꢓ
ꢂ
ꢎ
ꢇ
ꢀ
ꢌ
ꢕ
ꢗ
ꢇ
ꢁ
ꢇ
ꢘ
ꢓ
ꢁ
ꢌ
ꢙ
ꢌ
ꢂ
ꢎ
ꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 V
CC+
CC−
Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6 V
Input voltage range, V (any input, see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ID
V
I
CC
Input current, I (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 mA
I
Output current, I (each output): TLE2021 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
O
TLE2022 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
TLE2024 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA
Total current into V
Total current out of V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 mA
CC+
CC−
Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, T : C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
A
I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C
M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Case temperature for 60 seconds, T : FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
stg
C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, DP, P, or PW package . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG package . . . . . . . . . . . . . . . . . . . . 300°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between V
, and V .
CC+
CC−
2. Differential voltages are at IN+ with respect to IN−. Excessive current flows if a differential input voltage in excess of approximately
600 mV is applied between the inputs unless some limiting resistance is used.
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING FACTOR
T
= 70°C
T
= 85°C
T = 125°C
A
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING
POWER RATING
377 mW
—
POWER RATING
145 mW
—
A
D−8
DB−8
DW−16
FK
725 mW
5.8 mW/°C
4.2 mW/°C
8.2 mW/°C
11.0 mW/°C
11.0 mW/°C
8.4 mW/°C
9.2 mW/°C
8.0 mW/°C
4.2 mW/°C
464 mW
525 mW
336 mW
1025 mW
1375 mW
1375 mW
1050 mW
1150 mW
1000 mW
525 mW
656 mW
533 mW
715 mW
715 mW
546 mW
598 mW
520 mW
—
205 mW
275 mW
275 mW
210 mW
230 mW
200 mW
—
880 mW
J−14
JG−8
N−14
P−8
880 mW
672 mW
736 mW
640 mW
PW−8
336 mW
recommended operating conditions
C SUFFIX
I SUFFIX
M SUFFIX
UNIT
MIN
2
MAX
MIN
2
MAX
20
MIN
2
MAX
20
Supply voltage, V
CC
20
3.5
V
V
V
=
5 V
0
0
3.2
0
3.2
CC
Common-mode input voltage, V
IC
V
=
15 V
−15
0
13.5
70
−15
−40
13.2
85
−15
−55
13.2
125
CC
Operating free-air temperature, T
°C
A
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆꢰ ꢀꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢇꢆꢰ ꢀꢁ ꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢰꢀ ꢁꢂ ꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎꢰꢏ ꢌꢐ ꢏꢑꢒꢓ ꢂꢂꢔꢰ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎꢰ ꢓꢎ ꢂꢋ ꢌ ꢒꢌ ꢕ ꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁꢰꢇꢘꢓ ꢁꢌ ꢙ ꢌꢂ ꢎꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
•
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃ ꢄ ꢃꢅ ꢆ ꢰ ꢀ ꢁ ꢂꢃꢄ ꢃ ꢅꢇ ꢆꢰ ꢀ ꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢰꢀ ꢁ ꢂ ꢃ ꢄ ꢃ ꢅ ꢉ
ꢂ ꢊꢋ ꢇ ꢁꢌ ꢈ ꢍ ꢎ ꢰ ꢏ ꢌ ꢐꢏ ꢑꢒꢓ ꢂ ꢂꢔ ꢰꢁ ꢕ ꢖꢑꢓ ꢕꢖ ꢂ ꢎꢰ ꢓꢎꢂ ꢋꢌ ꢒꢌꢕ ꢗ
ꢕꢓ ꢂꢎ ꢇꢀ ꢌ ꢕꢗ ꢇ ꢁꢰꢇꢘ ꢓꢁ ꢌ ꢙꢌ ꢂ ꢎꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
10
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆꢰ ꢀꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢇꢆꢰ ꢀꢁ ꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢰꢀ ꢁꢂ ꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎꢰꢏ ꢌꢐ ꢏꢑꢒꢓ ꢂꢂꢔꢰ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎꢰ ꢓꢎ ꢂꢋ ꢌ ꢒꢌ ꢕ ꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁꢰꢇꢘꢓ ꢁꢌ ꢙ ꢌꢂ ꢎꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
•
11
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃ ꢄ ꢃꢅ ꢆ ꢰ ꢀ ꢁ ꢂꢃꢄ ꢃ ꢅꢇ ꢆꢰ ꢀ ꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢰꢀ ꢁ ꢂ ꢃ ꢄ ꢃ ꢅ ꢉ
ꢂ ꢊꢋ ꢇ ꢁꢌ ꢈ ꢍ ꢎ ꢰ ꢏ ꢌ ꢐꢏ ꢑꢒꢓ ꢂ ꢂꢔ ꢰꢁ ꢕ ꢖꢑꢓ ꢕꢖ ꢂ ꢎꢰ ꢓꢎꢂ ꢋꢌ ꢒꢌꢕ ꢗ
ꢕꢓ ꢂꢎ ꢇꢀ ꢌ ꢕꢗ ꢇ ꢁꢰꢇꢘ ꢓꢁ ꢌ ꢙꢌ ꢂ ꢎꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
12
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆꢰ ꢀꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢇꢆꢰ ꢀꢁ ꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢰꢀ ꢁꢂ ꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎꢰꢏ ꢌꢐ ꢏꢑꢒꢓ ꢂꢂꢔꢰ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎꢰ ꢓꢎ ꢂꢋ ꢌ ꢒꢌ ꢕ ꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁꢰꢇꢘꢓ ꢁꢌ ꢙ ꢌꢂ ꢎꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
•
13
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃ ꢄ ꢃꢅ ꢆ ꢰ ꢀ ꢁ ꢂꢃꢄ ꢃ ꢅꢇ ꢆꢰ ꢀ ꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢰꢀ ꢁ ꢂ ꢃ ꢄ ꢃ ꢅ ꢉ
ꢂ ꢊꢋ ꢇ ꢁꢌ ꢈ ꢍ ꢎ ꢰ ꢏ ꢌ ꢐꢏ ꢑꢒꢓ ꢂ ꢂꢔ ꢰꢁ ꢕ ꢖꢑꢓ ꢕꢖ ꢂ ꢎꢰ ꢓꢎꢂ ꢋꢌ ꢒꢌꢕ ꢗ
ꢕꢓ ꢂꢎ ꢇꢀ ꢌ ꢕꢗ ꢇ ꢁꢰꢇꢘ ꢓꢁ ꢌ ꢙꢌ ꢂ ꢎꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
14
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆꢰ ꢀꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢇꢆꢰ ꢀꢁ ꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢰꢀ ꢁꢂ ꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎꢰꢏ ꢌꢐ ꢏꢑꢒꢓ ꢂꢂꢔꢰ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎꢰ ꢓꢎ ꢂꢋ ꢌ ꢒꢌ ꢕ ꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁꢰꢇꢘꢓ ꢁꢌ ꢙ ꢌꢂ ꢎꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
•
15
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃ ꢄ ꢃꢅ ꢆ ꢰ ꢀ ꢁ ꢂꢃꢄ ꢃ ꢅꢇ ꢆꢰ ꢀ ꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢰꢀ ꢁ ꢂ ꢃ ꢄ ꢃ ꢅ ꢉ
ꢂ ꢊꢋ ꢇ ꢁꢌ ꢈ ꢍ ꢎ ꢰ ꢏ ꢌ ꢐꢏ ꢑꢒꢓ ꢂ ꢂꢔ ꢰꢁ ꢕ ꢖꢑꢓ ꢕꢖ ꢂ ꢎꢰ ꢓꢎꢂ ꢋꢌ ꢒꢌꢕ ꢗ
ꢕꢓ ꢂꢎ ꢇꢀ ꢌ ꢕꢗ ꢇ ꢁꢰꢇꢘ ꢓꢁ ꢌ ꢙꢌ ꢂ ꢎꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
16
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆꢰ ꢀꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢇꢆꢰ ꢀꢁ ꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢰꢀ ꢁꢂ ꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎꢰꢏ ꢌꢐ ꢏꢑꢒꢓ ꢂꢂꢔꢰ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎꢰ ꢓꢎ ꢂꢋ ꢌ ꢒꢌ ꢕ ꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁꢰꢇꢘꢓ ꢁꢌ ꢙ ꢌꢂ ꢎꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
•
17
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃ ꢄ ꢃꢅ ꢆ ꢰ ꢀ ꢁ ꢂꢃꢄ ꢃ ꢅꢇ ꢆꢰ ꢀ ꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢰꢀ ꢁ ꢂ ꢃ ꢄ ꢃ ꢅ ꢉ
ꢂ ꢊꢋ ꢇ ꢁꢌ ꢈ ꢍ ꢎ ꢰ ꢏ ꢌ ꢐꢏ ꢑꢒꢓ ꢂ ꢂꢔ ꢰꢁ ꢕ ꢖꢑꢓ ꢕꢖ ꢂ ꢎꢰ ꢓꢎꢂ ꢋꢌ ꢒꢌꢕ ꢗ
ꢕꢓ ꢂꢎ ꢇꢀ ꢌ ꢕꢗ ꢇ ꢁꢰꢇꢘ ꢓꢁ ꢌ ꢙꢌ ꢂ ꢎꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
18
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆꢰ ꢀꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢇꢆꢰ ꢀꢁ ꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢰꢀ ꢁꢂ ꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎꢰꢏ ꢌꢐ ꢏꢑꢒꢓ ꢂꢂꢔꢰ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎꢰ ꢓꢎ ꢂꢋ ꢌ ꢒꢌ ꢕ ꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁꢰꢇꢘꢓ ꢁꢌ ꢙ ꢌꢂ ꢎꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
•
19
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃ ꢄ ꢃꢅ ꢆ ꢰ ꢀ ꢁ ꢂꢃꢄ ꢃ ꢅꢇ ꢆꢰ ꢀ ꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢰꢀ ꢁ ꢂ ꢃ ꢄ ꢃ ꢅ ꢉ
ꢂ ꢊꢋ ꢇ ꢁꢌ ꢈ ꢍ ꢎ ꢰ ꢏ ꢌ ꢐꢏ ꢑꢒꢓ ꢂ ꢂꢔ ꢰꢁ ꢕ ꢖꢑꢓ ꢕꢖ ꢂ ꢎꢰ ꢓꢎꢂ ꢋꢌ ꢒꢌꢕ ꢗ
ꢕꢓ ꢂꢎ ꢇꢀ ꢌ ꢕꢗ ꢇ ꢁꢰꢇꢘ ꢓꢁ ꢌ ꢙꢌ ꢂ ꢎꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
20
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆꢰ ꢀꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢇꢆꢰ ꢀꢁ ꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢰꢀ ꢁꢂ ꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎꢰꢏ ꢌꢐ ꢏꢑꢒꢓ ꢂꢂꢔꢰ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎꢰ ꢓꢎ ꢂꢋ ꢌ ꢒꢌ ꢕ ꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁꢰꢇꢘꢓ ꢁꢌ ꢙ ꢌꢂ ꢎꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
•
21
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃ ꢄ ꢃꢅ ꢆ ꢰ ꢀ ꢁ ꢂꢃꢄ ꢃ ꢅꢇ ꢆꢰ ꢀ ꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢰꢀ ꢁ ꢂ ꢃ ꢄ ꢃ ꢅ ꢉ
ꢂ ꢊꢋ ꢇ ꢁꢌ ꢈ ꢍ ꢎ ꢰ ꢏ ꢌ ꢐꢏ ꢑꢒꢓ ꢂ ꢂꢔ ꢰꢁ ꢕ ꢖꢑꢓ ꢕꢖ ꢂ ꢎꢰ ꢓꢎꢂ ꢋꢌ ꢒꢌꢕ ꢗ
ꢕꢓ ꢂꢎ ꢇꢀ ꢌ ꢕꢗ ꢇ ꢁꢰꢇꢘ ꢓꢁ ꢌ ꢙꢌ ꢂ ꢎꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
22
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆꢰ ꢀꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢇꢆꢰ ꢀꢁ ꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢰꢀ ꢁꢂ ꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎꢰꢏ ꢌꢐ ꢏꢑꢒꢓ ꢂꢂꢔꢰ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎꢰ ꢓꢎ ꢂꢋ ꢌ ꢒꢌ ꢕ ꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁꢰꢇꢘꢓ ꢁꢌ ꢙ ꢌꢂ ꢎꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
•
23
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃ ꢄ ꢃꢅ ꢆ ꢰ ꢀ ꢁ ꢂꢃꢄ ꢃ ꢅꢇ ꢆꢰ ꢀ ꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢰꢀ ꢁ ꢂ ꢃ ꢄ ꢃ ꢅ ꢉ
ꢂ ꢊꢋ ꢇ ꢁꢌ ꢈ ꢍ ꢎ ꢰ ꢏ ꢌ ꢐꢏ ꢑꢒꢓ ꢂ ꢂꢔ ꢰꢁ ꢕ ꢖꢑꢓ ꢕꢖ ꢂ ꢎꢰ ꢓꢎꢂ ꢋꢌ ꢒꢌꢕ ꢗ
ꢕꢓ ꢂꢎ ꢇꢀ ꢌ ꢕꢗ ꢇ ꢁꢰꢇꢘ ꢓꢁ ꢌ ꢙꢌ ꢂ ꢎꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
24
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆꢰ ꢀꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢇꢆꢰ ꢀꢁ ꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢰꢀ ꢁꢂ ꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎꢰꢏ ꢌꢐ ꢏꢑꢒꢓ ꢂꢂꢔꢰ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎꢰ ꢓꢎ ꢂꢋ ꢌ ꢒꢌ ꢕ ꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁꢰꢇꢘꢓ ꢁꢌ ꢙ ꢌꢂ ꢎꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
•
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃ ꢄ ꢃꢅ ꢆ ꢰ ꢀ ꢁ ꢂꢃꢄ ꢃ ꢅꢇ ꢆꢰ ꢀ ꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢰꢀ ꢁ ꢂ ꢃ ꢄ ꢃ ꢅ ꢉ
ꢂ ꢊꢋ ꢇ ꢁꢌ ꢈ ꢍ ꢎ ꢰ ꢏ ꢌ ꢐꢏ ꢑꢒꢓ ꢂ ꢂꢔ ꢰꢁ ꢕ ꢖꢑꢓ ꢕꢖ ꢂ ꢎꢰ ꢓꢎꢂ ꢋꢌ ꢒꢌꢕ ꢗ
ꢕꢓ ꢂꢎ ꢇꢀ ꢌ ꢕꢗ ꢇ ꢁꢰꢇꢘ ꢓꢁ ꢌ ꢙꢌ ꢂ ꢎꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
26
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆꢰ ꢀꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢇꢆꢰ ꢀꢁ ꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢰꢀ ꢁꢂ ꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎꢰꢏ ꢌꢐ ꢏꢑꢒꢓ ꢂꢂꢔꢰ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎꢰ ꢓꢎ ꢂꢋ ꢌ ꢒꢌ ꢕ ꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁꢰꢇꢘꢓ ꢁꢌ ꢙ ꢌꢂ ꢎꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
•
27
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃ ꢄ ꢃꢅ ꢆ ꢰ ꢀ ꢁ ꢂꢃꢄ ꢃ ꢅꢇ ꢆꢰ ꢀ ꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢰꢀ ꢁ ꢂ ꢃ ꢄ ꢃ ꢅ ꢉ
ꢂ ꢊꢋ ꢇ ꢁꢌ ꢈ ꢍ ꢎ ꢰ ꢏ ꢌ ꢐꢏ ꢑꢒꢓ ꢂ ꢂꢔ ꢰꢁ ꢕ ꢖꢑꢓ ꢕꢖ ꢂ ꢎꢰ ꢓꢎꢂ ꢋꢌ ꢒꢌꢕ ꢗ
ꢕꢓ ꢂꢎ ꢇꢀ ꢌ ꢕꢗ ꢇ ꢁꢰꢇꢘ ꢓꢁ ꢌ ꢙꢌ ꢂ ꢎꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
28
•
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆꢰ ꢀꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢇꢆꢰ ꢀꢁ ꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢰꢀ ꢁꢂ ꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎꢰꢏ ꢌꢐ ꢏꢑꢒꢓ ꢂꢂꢔꢰ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎꢰ ꢓꢎ ꢂꢋ ꢌ ꢒꢌ ꢕ ꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁꢰꢇꢘꢓ ꢁꢌ ꢙ ꢌꢂ ꢎꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
•
29
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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ꢇ
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ꢌ
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ꢎ
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ꢂ
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SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TLE2021Y electrical characteristics at V
= 5 V, T = 25°C (unless otherwise noted)
CC
A
TLE2021Y
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
150
0.005
0.5
MAX
V
IO
Input offset voltage
µV
µV/mo
nA
Input offset voltage long-term drift (see Note 4)
Input offset current
V
IC
= 0,
R
= 50 Ω
S
I
I
IO
Input bias current
35
nA
IB
− 0.3
to
V
Common-mode input voltage range
R
R
= 50 Ω
V
ICR
S
L
4
V
V
Maximum high-level output voltage
Maximum low-level output voltage
4.3
0.7
V
V
OH
= 10 kΩ
OL
A
Large-signal differential voltage amplification
V
V
V
V
= 1.4 to 4 V,
R
R
= 10 kΩ
= 50 Ω
1.5
V/µV
dB
dB
µA
VD
O
L
CMRR Common-mode rejection ratio
= V
min,
= 5 V to 30 V
100
115
400
IC
CC
ICR
S
k
Supply-voltage rejection ratio (∆V
/∆V )
IO
SVR
CC
I
Supply current
= 2.5 V,
No load
CC
O
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated
A
to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
TLE2021Y operating characteristics at V
= 5 V, T = 25°C
A
CC
TLE2021Y
TYP
0.5
PARAMETER
TEST CONDITIONS
= 1 V to 3 V
UNIT
MIN
MAX
SR
Slew rate at unity gain
V
V/µs
O
f = 10 Hz
21
nV/√Hz
µV
V
Equivalent input noise voltage
n
f = 1 kHz
17
f = 0.1 to 1 Hz
f = 0.1 to 10 Hz
0.16
0.47
0.1
V
I
Peak-to-peak equivalent input noise voltage
N(PP)
Equivalent input noise current
Unity-gain bandwidth
pA/√Hz
n
B
1
1.7
MHz
φ
m
Phase margin at unity gain
47°
30
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢇꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢀꢁ ꢂꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎ ꢏꢌ ꢐꢏ ꢑꢒꢓꢂ ꢂꢔ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎ ꢓ ꢎꢂ ꢋ ꢌꢒ ꢌ ꢕꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁ ꢇꢘ ꢓ ꢁꢌ ꢙꢌ ꢂꢎ ꢒ
ꢚ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TLE2022Y electrical characteristics, V
= 5 V, T = 25°C (unless otherwise noted)
CC
A
TLE2022Y
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
150
0.005
0.5
MAX
V
IO
Input offset voltage
600
µV
µV/mo
nA
Input offset voltage long-term drift (see Note 4)
Input offset current
V
IC
= 0,
R = 50 Ω
S
I
I
IO
Input bias current
35
nA
IB
− 0.3
to
V
Common-mode input voltage range
R
R
= 50 Ω
V
ICR
S
L
4
V
V
Maximum high-level output voltage
Maximum low-level output voltage
4.3
0.7
V
V
OH
= 10 kΩ
OL
A
Large-signal differential voltage amplification
V
V
V
V
= 1.4 to 4 V,
R = 10 kΩ
1.5
V/µV
dB
dB
µA
VD
O
L
CMRR Common-mode rejection ratio
= V
min,
= 5 V to 30 V
R
= 50 Ω
S
100
115
450
IC
CC
ICR
k
Supply-voltage rejection ratio (∆V
/∆V )
IO
SVR
CC
I
Supply current
= 2.5 V,
No load
CC
O
NOTE 4: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated
A
to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
TLE2022Y operating characteristics, V
= 5 V, T = 25°C
A
CC
TLE2022Y
TYP
0.5
PARAMETER
TEST CONDITIONS
UNIT
MIN
MAX
SR
Slew rate at unity gain
V
O
= 1 V to 3 V, See Figure 1
V/µs
f = 10 Hz
21
V
Equivalent input noise voltage (see Figure 2)
nV/√Hz
µV
n
f = 1 kHz
17
f = 0.1 to 1 Hz
f = 0.1 to 10 Hz
0.16
0.47
0.1
V
I
Peak-to-peak equivalent input noise voltage
N(PP)
Equivalent input noise current
Unity-gain bandwidth
pA/√Hz
n
B
1
See Figure 3
See Figure 3
1.7
MHz
φ
m
Phase margin at unity gain
47°
31
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢆ
ꢀ
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ꢂ
ꢃ
ꢄ
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ꢈ
ꢆ
ꢀꢁ
ꢂ
ꢃ
ꢄ
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ꢅ
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ꢚ
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ꢊꢋ
ꢇ
ꢁ
ꢌ
ꢈꢍ
ꢎ
ꢏ
ꢌ
ꢐ
ꢏ
ꢑ
ꢒ
ꢓꢂ
ꢂ
ꢔ
ꢁ
ꢕ
ꢖꢑ
ꢓ
ꢕꢖ
ꢂ
ꢎ
ꢓ
ꢎ
ꢂ
ꢋ
ꢌ
ꢒ
ꢌ
ꢕ
ꢗ
ꢕ
ꢓ
ꢂ
ꢎ
ꢇ
ꢀ
ꢌ
ꢕ
ꢗ
ꢇ
ꢁ
ꢇ
ꢘ
ꢓ
ꢁ
ꢌ
ꢙꢌ
ꢂ
ꢎ
ꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TLE2024Y electrical characteristics, V
= 5 V, T = 25°C (unless otherwise noted)
A
CC
TLE2024Y
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
0.005
0.6
MAX
Input offset voltage long-term drift (see Note 4)
Input offset current
µV/mo
nA
I
I
V
IC
= 0,
R
= 50 Ω
IO
S
Input bias current
45
nA
IB
−0.3
to
V
Common-mode input voltage range
R
R
= 50 Ω
V
ICR
S
L
4
V
V
High-level output voltage
Low-level output voltage
4.2
0.7
V
V
OH
= 10 kΩ
OL
Large-signal differential
voltage amplification
A
V
V
V
V
= 1.4 V to 4 V,
R
R
= 10 kΩ
= 50 Ω
1.5
90
V/µV
dB
VD
O
L
CMRR Common-mode rejection ratio
Supply-voltage rejection ratio
= V min,
ICR
IC
S
k
= 5 V to 30 V
112
800
dB
SVR
CC
(∆V
CC
/∆V )
IO
I
Supply current
= 2.5 V,
O
No load
µA
CC
NOTE 4. Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated
A
to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
TLE2024Y operating characteristics, V
= 5 V, T = 25°C
A
CC
TLE2024Y
TYP
0.5
PARAMETER
TEST CONDITIONS
UNIT
MIN
MAX
SR
Slew rate at unity gain
V
O
= 1 V to 3 V, See Figure 1
V/µs
f = 10 Hz
21
nV/√Hz
µV
V
Equivalent input noise voltage (see Figure 2)
n
f = 1 kHz
17
f = 0.1 to 1 Hz
f = 0.1 to 10 Hz
0.16
0.47
0.1
V
Peak-to-peak equivalent input noise voltage
N(PP)
I
n
Equivalent input noise current
Unity-gain bandwidth
pA/√Hz
B
1
See Figure 3
See Figure 3
1.7
MHz
φ
m
Phase margin at unity gain
47°
32
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢇꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢀꢁ ꢂꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎ ꢏꢌ ꢐꢏ ꢑꢒꢓꢂ ꢂꢔ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎ ꢓ ꢎꢂ ꢋ ꢌꢒ ꢌ ꢕꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁ ꢇꢘ ꢓ ꢁꢌ ꢙꢌ ꢂꢎ ꢒ
ꢚ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
PARAMETER MEASUREMENT INFORMATION
20 kΩ
20 kΩ
5 V
−
15 V
−
V
O
V
O
+
+
V
I
V
I
−15 V
30 pF
(see Note A)
20 kΩ
30 pF
(see Note A)
20 kΩ
(a) SINGLE SUPPLY
NOTE A: C includes fixture capacitance.
(b) SPLIT SUPPLY
L
Figure 1. Slew-Rate Test Circuit
2 kΩ
2 kΩ
15 V
−
5 V
20 Ω
20 Ω
−
V
O
+
V
O
2.5 V
+
−15 V
20Ω
20 Ω
(a) SINGLE SUPPLY
(b) SPLIT SUPPLY
Figure 2. Noise-Voltage Test Circuit
10 kΩ
10 kΩ
15 V
−
5 V
100 Ω
−
+
V
I
V
I
V
O
100Ω
V
O
+
2.5 V
−15 V
30 pF
(see Note A)
10 kΩ
30 pF
(see Note A)
10 kΩ
(a) SINGLE SUPPLY
(b) SPLIT SUPPLY
NOTE A: C includes fixture capacitance.
L
Figure 3. Unity-Gain Bandwidth and Phase-Margin Test Circuit
33
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢄ
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ꢂ
ꢊꢋ
ꢇ
ꢁ
ꢌ
ꢈꢍ
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ꢏ
ꢌ
ꢐ
ꢏ
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ꢒ
ꢓꢂ
ꢂ
ꢔ
ꢁ
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ꢓ
ꢕꢖ
ꢂ
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ꢋ
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ꢇ
ꢀ
ꢌ
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ꢇ
ꢁ
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ꢓ
ꢁ
ꢌ
ꢙꢌ
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ꢎ
ꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
PARAMETER MEASUREMENT INFORMATION
5 V
15 V
−
−
+
0.1 µF
10 kΩ
V
O
V
O
+
V
I
V
I
10 kΩ
− 15 V
30 pF
10 kΩ
10 kΩ
30 pF
(see Note A)
(see Note A)
(a) SINGLE SUPPLY
NOTE A: C includes fixture capacitance.
(b) SPLIT SUPPLY
L
Figure 4. Small-Signal Pulse-Response Test Circuit
typical values
Typical values presented in this data sheet represent the median (50% point) of device parametric performance.
34
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢇꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢀꢁ ꢂꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎ ꢏꢌ ꢐꢏ ꢑꢒꢓꢂ ꢂꢔ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎ ꢓ ꢎꢂ ꢋ ꢌꢒ ꢌ ꢕꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁ ꢇꢘ ꢓ ꢁꢌ ꢙꢌ ꢂꢎ ꢒ
ꢚ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
V
Input offset voltage
Input bias current
Input current
Distribution
5, 6, 7
IO
vs Common-mode input voltage
8, 9, 10
11, 12, 13
I
I
IB
vs Free-air temperature
vs Differential input voltage
vs Output current
14
I
15, 16, 17
18
V
V
Maximum peak output voltage
High-level output voltage
OM
vs Free-air temperature
vs High-level output current
vs Free-air temperature
19, 20
21
OH
vs Low-level output current
vs Free-air temperature
22
23
V
V
Low-level output voltage
OL
Maximum peak-to-peak output voltage
Large-signal differential voltage amplification
vs Frequency
24, 25
O(PP)
vs Frequency
vs Free-air temperature
26
27, 28, 29
A
VD
OS
CC
vs Supply voltage
vs Free-air temperature
30 − 33
34 − 37
I
I
Short-circuit output current
Supply current
vs Supply voltage
vs Free-air temperature
38, 39, 40
41, 42, 43
CMRR Common-mode rejection ratio
vs Frequency
44, 45, 46
47, 48, 49
50, 51
SR
Slew rate
vs Free-air temperature
Voltage-follower small-signal pulse response
Voltage-follower large-signal pulse response
52 − 57
0.1 to 1 Hz
0.1 to 10 Hz
58
59
V
V
B
Peak-to-peak equivalent input noise voltage
Equivalent input noise voltage
Unity-gain bandwidth
N(PP)
vs Frequency
60
n
1
vs Supply voltage
vs Free-air temperature
61, 62
63, 64
vs Supply voltage
vs Load capacitance
vs Free-air temperature
65, 66
67, 68
69, 70
φ
m
Phase margin
Phase shift
vs Frequency
26
35
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢇ
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ꢀ
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ꢂ
ꢃ
ꢄ
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ꢈ
ꢆ
ꢀꢁ
ꢂ
ꢃ
ꢄ
ꢃ
ꢅ
ꢉ
ꢚ
ꢂ
ꢊꢋ
ꢇ
ꢁ
ꢌ
ꢈꢍ
ꢎ
ꢏ
ꢌ
ꢐ
ꢏ
ꢑ
ꢒ
ꢓꢂ
ꢂ
ꢔ
ꢁ
ꢕ
ꢖꢑ
ꢓ
ꢕꢖ
ꢂ
ꢎ
ꢓ
ꢎ
ꢂ
ꢋ
ꢌ
ꢒ
ꢌ
ꢕ
ꢗ
ꢕ
ꢓ
ꢂ
ꢎ
ꢇ
ꢀ
ꢌ
ꢕ
ꢗ
ꢇ
ꢁ
ꢇ
ꢘ
ꢓ
ꢁ
ꢌ
ꢙꢌ
ꢂ
ꢎ
ꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLE2022
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLE2021
INPUT OFFSET VOLTAGE
20
16
12
8
20
16
12
8
231 Units Tested From 1 Wafer Lot
398 Amplifiers Tested From 1 Wafer Lot
V
=
15 V
V
=
15 V
CC
= 25°C
CC
= 25°C
T
A
T
A
P Package
P Package
4
4
0
0
−600 −450 −300 −150
0
150 300
450 600
−600 −400
−200
0
200
400
600
V
IO
− Input Offset Voltage − µV
V
IO
− Input Offset Voltage − µV
Figure 5
Figure 6
TLE2021
INPUT BIAS CURRENT
vs
DISTRIBUTION OF TLE2024
INPUT OFFSET VOLTAGE
COMMON-MODE INPUT VOLTAGE
16
12
8
−40
−35
−30
−25
−20
−15
−10
−5
V
T
=
15 V
CC
796 Amplifiers Tested From 1 Wafer Lot
15 V
= 25°C
V
=
A
CC
= 25°C
T
A
N Package
4
0
0
−15
−1
−0.5
0
0.5
1
−10
−5
0
5
10
15
V
IO
− Input Offset Voltage − mV
V
IC
− Common-Mode Input Voltage − V
Figure 7
Figure 8
36
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢇꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢀꢁ ꢂꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎ ꢏꢌ ꢐꢏ ꢑꢒꢓꢂ ꢂꢔ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎ ꢓ ꢎꢂ ꢋ ꢌꢒ ꢌ ꢕꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁ ꢇꢘ ꢓ ꢁꢌ ꢙꢌ ꢂꢎ ꢒ
ꢚ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
TLE2022
INPUT BIAS CURRENT
vs
TLE2024
INPUT BIAS CURRENT
vs
COMMON-MODE INPUT VOLTAGE
COMMON-MODE INPUT VOLTAGE
−50
−45
−60
−50
V
=
15 V
CC
= 25°C
V
=
15 V
CC
T
A
T
A
= 25°C
−40
−40
−30
−20
−35
−30
−25
−20
−15
−10
−5
0
5
10
15
−15
−10
−5
0
5
10
15
V
IC
− Common-Mode Input Voltage − V
V
IC
− Common-Mode Input Voltage − V
Figure 9
Figure 10
TLE2022
INPUT BIAS CURRENT
TLE2021
INPUT BIAS CURRENT
†
†
vs
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
−50
−45
−40
−35
−30
−25
−20
−15
−10
−5
V
V
V
=
15 V
V
V
V
=
= 0
= 0
15 V
CC
= 0
CC
O
IC
O
IC
= 0
−35
−30
−25
−20
0
−75 −50 −25
0
25
50
75
100 125
−75 −50 −25
0
25
50
75 100 125
T
A
− Free-Air Temperature − °C
T
A
− Free-Air Temperature − °C
Figure 11
Figure 12
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
37
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃ
ꢅ
ꢆ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃꢅ
ꢇ
ꢆ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃꢅ
ꢈ
ꢆ
ꢀꢁ
ꢂ
ꢃ
ꢄ
ꢃ
ꢅ
ꢉ
ꢚ
ꢂ
ꢊꢋ
ꢇ
ꢁ
ꢌ
ꢈꢍ
ꢎ
ꢏ
ꢌ
ꢐ
ꢏ
ꢑ
ꢒ
ꢓꢂ
ꢂ
ꢔ
ꢁ
ꢕ
ꢖꢑ
ꢓ
ꢕꢖ
ꢂ
ꢎ
ꢓ
ꢎ
ꢂ
ꢋ
ꢌ
ꢒ
ꢌ
ꢕ
ꢗ
ꢕ
ꢓ
ꢂ
ꢎ
ꢇ
ꢀ
ꢌ
ꢕ
ꢗ
ꢇ
ꢁ
ꢇ
ꢘ
ꢓ
ꢁ
ꢌ
ꢙꢌ
ꢂ
ꢎ
ꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
TLE2024
INPUT BIAS CURRENT
vs
INPUT CURRENT
vs
DIFFERENTIAL INPUT VOLTAGE
†
FREE-AIR TEMPERATURE
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
V
V
T
A
=
15 V
−60
−50
−40
CC
= 0
V
V
V
= 15 V
CC
O
IC
IC
= 25°C
= 0
= 0
−30
−20
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
125
−75 −50 −25
0
25
50
75 100
|V | − Differential Input Voltage − V
ID
T
A
− Free-Air Temperature − °C
Figure 13
Figure 14
TLE2022
MAXIMUM PEAK OUTPUT VOLTAGE
vs
TLE2021
MAXIMUM PEAK OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT CURRENT
16
16
14
12
10
8
V
T
=
15 V
V
T
=
15 V
CC
= 25°C
CC
A
= 25°C
14
12
10
8
A
V
V
OM+
OM+
V
OM−
V
OM−
6
6
4
4
2
2
0
0
0
2
4
6
8
10
0
2
4
6
8
10
12
14
I
O
− Output Current − mA
|I | − Output Current − mA
O
Figure 15
Figure 16
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
38
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢇꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢀꢁ ꢂꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎ ꢏꢌ ꢐꢏ ꢑꢒꢓꢂ ꢂꢔ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎ ꢓ ꢎꢂ ꢋ ꢌꢒ ꢌ ꢕꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁ ꢇꢘ ꢓ ꢁꢌ ꢙꢌ ꢂꢎ ꢒ
ꢚ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
TLE2024
MAXIMUM PEAK OUTPUT VOLTAGE
vs
†
MAXIMUM PEAK OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
OUTPUT CURRENT
15
14.5
14
16
14
12
10
8
V
CC
= 15 V
T
A
= 25°C
V
OM+
V
OM+
V
OM−
V
OM−
13.5
13
6
4
V
R
=
15 V
CC
12.5
= 10 kΩ
= 25°C
L
2
T
A
0
12
14
0
2
4
6
8
10
12
−75 −50 −25
0
25
50
75
100 125
I
O
− Output Current − mA
T
A
− Free-Air Temperature − °C
Figure 17
Figure 18
TLE2021
HIGH-LEVEL OUTPUT VOLTAGE
vs
TLE2022 AND TLE2024
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT CURRENT
5
4
3
2
5
V
T
A
= 5 V
= 25°C
CC
V
T
A
= 5 V
= 25°C
CC
4
3
2
1
0
1
0
0
−2
−4
−6
−8
−10
0
−1
−2
−3
−4
−5
−6
−7
I
− High-Level Output Current − mA
I
− High-Level Output Current − mA
OH
OH
Figure 19
Figure 20
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
39
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃ
ꢅ
ꢆ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃꢅ
ꢇ
ꢆ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃꢅ
ꢈ
ꢆ
ꢀꢁ
ꢂ
ꢃ
ꢄ
ꢃ
ꢅ
ꢉ
ꢚ
ꢂ
ꢊꢋ
ꢇ
ꢁ
ꢌ
ꢈꢍ
ꢎ
ꢏ
ꢌ
ꢐ
ꢏ
ꢑ
ꢒ
ꢓꢂ
ꢂ
ꢔ
ꢁ
ꢕ
ꢖꢑ
ꢓ
ꢕꢖ
ꢂ
ꢎ
ꢓ
ꢎ
ꢂ
ꢋ
ꢌ
ꢒ
ꢌ
ꢕ
ꢗ
ꢕ
ꢓ
ꢂ
ꢎ
ꢇ
ꢀ
ꢌ
ꢕ
ꢗ
ꢇ
ꢁ
ꢇ
ꢘ
ꢓ
ꢁ
ꢌ
ꢙꢌ
ꢂ
ꢎ
ꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
†
HIGH-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
LOW-LEVEL OUTPUT CURRENT
5
4.8
4.6
4.4
5
4
3
2
1
0
V
T
A
= 5 V
= 25°C
V
CC
= 5 V
CC
No Load
R
= 10 kΩ
L
4.2
4
−75 −50 −25
0
25
50
75
100 125
0
0.5
1
1.5
2
2.5
3
T
A
− Free-Air Temperature − °C
I
− Low-Level Output Current − mA
OL
Figure 21
Figure 22
†
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
LOW-LEVEL OUTPUT VOLTAGE
vs
vs
FREQUENCY
FREE-AIR TEMPERATURE
5
1
0.75
0.5
I
= 1 mA
OL
4
3
2
1
0
I
= 0
OL
0.25
0
V
= 5 V
= 10 kΩ
= 25°C
CC
R
T
A
L
V
CC
= 5 V
1 M
−75 −50 −25
0
25
50
75 100 125
100
1 k
10 k
100 k
T
A
− Free-Air Temperature − °C
f − Frequency − Hz
Figure 23
Figure 24
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
40
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢇꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢀꢁ ꢂꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎ ꢏꢌ ꢐꢏ ꢑꢒꢓꢂ ꢂꢔ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎ ꢓ ꢎꢂ ꢋ ꢌꢒ ꢌ ꢕꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁ ꢇꢘ ꢓ ꢁꢌ ꢙꢌ ꢂꢎ ꢒ
ꢚ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
30
25
20
15
10
5
V
CC
=
15 V
R
T
A
= 10 kΩ
= 25°C
L
0
100
1 k
10 k
100 k
1 M
f − Frequency − Hz
Figure 25
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
120
100
80
60°
80°
Phase Shift
100°
120°
140°
160°
180°
200°
V
CC
=
15 V
A
VD
60
V
CC
= 5 V
40
20
R
C
T
A
= 10 kΩ
= 30 pF
= 25°C
L
L
0
−20
10
100
1 k
10 k
100 k
1 M
10 M
f − Frequency − Hz
Figure 26
41
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃ
ꢅ
ꢆ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃꢅ
ꢇ
ꢆ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃꢅ
ꢈ
ꢆ
ꢀꢁ
ꢂ
ꢃ
ꢄ
ꢃ
ꢅ
ꢉ
ꢚ
ꢂ
ꢊꢋ
ꢇ
ꢁ
ꢌ
ꢈꢍ
ꢎ
ꢏ
ꢌ
ꢐ
ꢏ
ꢑ
ꢒ
ꢓꢂ
ꢂ
ꢔ
ꢁ
ꢕ
ꢖꢑ
ꢓ
ꢕꢖ
ꢂ
ꢎ
ꢓ
ꢎ
ꢂ
ꢋ
ꢌ
ꢒ
ꢌ
ꢕ
ꢗ
ꢕ
ꢓ
ꢂ
ꢎ
ꢇ
ꢀ
ꢌ
ꢕ
ꢗ
ꢇ
ꢁ
ꢇ
ꢘ
ꢓ
ꢁ
ꢌ
ꢙꢌ
ꢂ
ꢎ
ꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
TLE2021
TLE2022
LARGE-SCALE DIFFERENTIAL VOLTAGE
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
†
AMPLIFICATION
vs
FREE-AIR TEMPERATURE
†
AMPLIFICATION
vs
FREE-AIR TEMPERATURE
10
8
6
5
R
= 10 kΩ
L
R
= 10 kΩ
L
V
CC
=
15 V
V
CC
= 15 V
4
6
3
2
4
2
1
0
V
= 5 V
V
= 5 V
75
CC
CC
0
−75 −50 −25
0
25
50
75 100 125
−75 −50 −25
0
25
50
100 125
T
A
− Free-Air Temperature − °C
T
A
− Free-Air Temperature − °C
Figure 27
Figure 28
TLE2024
LARGE-SCALE DIFFERENTIAL VOLTAGE
TLE2021
†
AMPLIFICATION
SHORT-CIRCUIT OUTPUT CURRENT
vs
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
10
8
10
8
R
= 10 kΩ
L
V
T
A
= 0
= 25°C
O
6
V
CC
=
15 V
V
ID
= −100 mV
4
6
2
0
4
−2
−4
−6
−8
−10
2
V
= 100 mV
12
ID
V
0
=
5 V
50
CC
0
−75 −50 −25
25
75 100 125
0
2
4
6
8
10
14
16
T
A
− Free-Air Temperature − °C
|V | − Supply Voltage − V
CC
Figure 29
Figure 30
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
42
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢇꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢀꢁ ꢂꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎ ꢏꢌ ꢐꢏ ꢑꢒꢓꢂ ꢂꢔ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎ ꢓ ꢎꢂ ꢋ ꢌꢒ ꢌ ꢕꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁ ꢇꢘ ꢓ ꢁꢌ ꢙꢌ ꢂꢎ ꢒ
ꢚ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
TLE2022 AND TLE2024
SHORT-CIRCUIT OUTPUT CURRENT
TLE2021
SHORT-CIRCUIT OUTPUT CURRENT
vs
vs
SUPPLY VOLTAGE
SUPPLY VOLTAGE
15
12
8
V
T
A
= 0
= 25°C
O
T
A
= 25°C
10
5
V
ID
V
O
= −100 mV
= V
CC
V
ID
= −100 mV
4
0
−5
0
−4
−8
− 12
V
= 100 mV
= 0
ID
O
V
= 100 mV
ID
V
−10
−15
0
2
4
6
8
10
12
14
16
0
5
10
15
20
25
30
|V
CC
| − Supply Voltage − V
V
− Supply Voltage − V
CC
Figure 31
Figure 32
TLE2022 AND TLE2024
SHORT-CIRCUIT OUTPUT CURRENT
TLE2021
†
SHORT-CIRCUIT OUTPUT CURRENT
vs
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
15
10
8
6
V
CC
= 5 V
T
A
= 25°C
V
ID
V
O
= −100 mV
V
V
= −100 mV
= 5 V
ID
O
= V
CC
4
5
2
0
0
− 2
− 4
− 6
− 8
−5
−10
−15
V
V
= 100 mV
= 0
ID
O
V
ID
V
O
= 100 mV
= 0
0
5
10
15
20
25
30
− 75 − 50 − 25
0
25
50
75 100 125
V
CC
− Supply Voltage − V
T
A
− Free-Air Temperature − °C
Figure 33
Figure 34
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
43
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃ
ꢅ
ꢆ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃꢅ
ꢇ
ꢆ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃꢅ
ꢈ
ꢆ
ꢀꢁ
ꢂ
ꢃ
ꢄ
ꢃ
ꢅ
ꢉ
ꢚ
ꢂ
ꢊꢋ
ꢇ
ꢁ
ꢌ
ꢈꢍ
ꢎ
ꢏ
ꢌ
ꢐ
ꢏ
ꢑ
ꢒ
ꢓꢂ
ꢂ
ꢔ
ꢁ
ꢕ
ꢖꢑ
ꢓ
ꢕꢖ
ꢂ
ꢎ
ꢓ
ꢎ
ꢂ
ꢋ
ꢌ
ꢒ
ꢌ
ꢕ
ꢗ
ꢕ
ꢓ
ꢂ
ꢎ
ꢇ
ꢀ
ꢌ
ꢕ
ꢗ
ꢇ
ꢁ
ꢇ
ꢘ
ꢓ
ꢁ
ꢌ
ꢙꢌ
ꢂ
ꢎ
ꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
TLE2022 AND TLE2024
SHORT-CIRCUIT OUTPUT CURRENT
vs
TLE2021
SHORT-CIRCUIT OUTPUT CURRENT
vs
†
†
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
6
4
12
8
V
CC
= 5 V
V
= −100 mV
= 5 V
V
V
= 15 V
ID
CC
= 0
V
O
O
2
V
ID
= −100 mV
4
0
−2
−4
−6
−8
−10
0
−4
−8
−12
V
ID
V
O
= 100 mV
= 0
V
ID
= 100 mV
−75 −50 −25
0
25
50
75 100 125
−75 −50 −25
0
25
50
75 100 125
T
A
− Free-Air Temperature −°C
T
A
− Free-Air Temperature − °C
Figure 35
Figure 36
TLE2022 AND TLE2024
SHORT-CIRCUIT OUTPUT CURRENT
TLE2021
SUPPLY CURRENT
vs
†
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
250
200
150
100
50
15
10
5
V
= 0
O
V
V
= 15 V
CC
= 0
No Load
O
V
= −100 mV
ID
T
A
= 125°C
0
T
A
= 25°C
−5
−10
−15
T
= −55°C
A
V
ID
= 100 mV
0
−75 −50 −25
0
25
50
75
100 125
0
2
4
6
8
10
12
14
16
T
A
− Free-Air Temperature − °C
|V | − Supply Voltage − V
CC
Figure 37
Figure 38
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
44
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢇꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢀꢁ ꢂꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎ ꢏꢌ ꢐꢏ ꢑꢒꢓꢂ ꢂꢔ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎ ꢓ ꢎꢂ ꢋ ꢌꢒ ꢌ ꢕꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁ ꢇꢘ ꢓ ꢁꢌ ꢙꢌ ꢂꢎ ꢒ
ꢚ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
TLE2022
SUPPLY CURRENT
vs
TLE2024
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
SUPPLY VOLTAGE
500
400
1000
V
= 0
O
V
= 0
O
No Load
T
A
= 125°C
No Load
800
600
T
= 25°C
T
A
= 25°C
A
300
T
A
= −55°C
T
A
= 125°C
T
A
= −55°C
200
100
400
200
0
0
0
2
4
6
8
10
12
14
16
0
2
4
6
8
10
12
14
16
|V
CC
| − Supply Voltage − V
|V
CC
| − Supply Voltage − V
Figure 39
Figure 40
TLE2022
SUPPLY CURRENT
vs
TLE2021
†
†
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
225
200
175
150
125
100
75
500
400
V
= 15 V
CC
V
= 15 V
CC
V
CC
= 2.5 V
V
CC
=
2.5 V
300
200
100
50
V
= 0
V
= 0
O
O
25
No Load
No Load
0
0
−75 −50 −25
0
25
50
75
100 125
−75 −50 −25
0
25
50
75
100 125
T
A
− Free-Air Temperature − °C
T
A
− Free-Air Temperature − °C
Figure 41
Figure 42
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
45
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃ
ꢅ
ꢆ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃꢅ
ꢇ
ꢆ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃꢅ
ꢈ
ꢆ
ꢀꢁ
ꢂ
ꢃ
ꢄ
ꢃ
ꢅ
ꢉ
ꢚ
ꢂ
ꢊꢋ
ꢇ
ꢁ
ꢌ
ꢈꢍ
ꢎ
ꢏ
ꢌ
ꢐ
ꢏ
ꢑ
ꢒ
ꢓꢂ
ꢂ
ꢔ
ꢁ
ꢕ
ꢖꢑ
ꢓ
ꢕꢖ
ꢂ
ꢎ
ꢓ
ꢎ
ꢂ
ꢋ
ꢌ
ꢒ
ꢌ
ꢕ
ꢗ
ꢕ
ꢓ
ꢂ
ꢎ
ꢇ
ꢀ
ꢌ
ꢕ
ꢗ
ꢇ
ꢁ
ꢇ
ꢘ
ꢓ
ꢁ
ꢌ
ꢙꢌ
ꢂ
ꢎ
ꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
TLE2021
TLE2024
SUPPLY CURRENT
vs
†
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
FREE-AIR TEMPERATURE
1000
120
100
80
60
40
20
0
V
=
15 V
CC
800
600
V
=
15 V
CC
V
= 2.5 V
CC
V
CC
= 5 V
400
200
V
= 0
O
No Load
T
A
= 25°C
0
−75 −50 −25
0
25
50
75 100 125
10
100
1 k
10 k
100 k
1 M
10 M
T
A
− Free-Air Temperature − °C
f − Frequency − Hz
Figure 43
Figure 44
TLE2024
TLE2022
COMMON-MODE REJECTION RATIO
COMMON-MODE REJECTION RATIO
vs
vs
FREQUENCY
FREQUENCY
120
100
80
60
40
20
0
120
100
80
60
40
20
0
V
= 15 V
CC
T
A
= 25°C
V
= 15 V
CC
V
= 5 V
CC
V
CC
= 5 V
T
A
= 25°C
10
100
1 k
10 k
100 k
1 M
10 M
10
100
1 k
10 k
100 k
1 M
10 M
f − Frequency − Hz
f − Frequency − Hz
Figure 45
Figure 46
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
46
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢇꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢀꢁ ꢂꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎ ꢏꢌ ꢐꢏ ꢑꢒꢓꢂ ꢂꢔ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎ ꢓ ꢎꢂ ꢋ ꢌꢒ ꢌ ꢕꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁ ꢇꢘ ꢓ ꢁꢌ ꢙꢌ ꢂꢎ ꢒ
ꢚ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
TLE2022
SLEW RATE
TLE2021
SLEW RATE
vs
†
†
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
1
0.8
0.6
0.4
0.2
0
1
0.8
0.6
0.4
0.2
0
V
=
15 V
CC
V
=
15 V
CC
V
CC
= 5 V
V
= 5 V
CC
R
C
= 20 kΩ
= 30 pF
R
C
= 20 kΩ
= 30 pF
L
L
L
L
See Figure 1
See Figure 1
−75 −50 −25
0
25
50
75 100 125
−75 −50 −25
0
25
50
75
100 125
T
A
− Free-Air Temperature − °C
T
A
− Free-Air Temperature − °C
Figure 47
Figure 48
TLE2024
SLEW RATE
†
VOLTAGE-FOLLOWER
SMALL-SIGNAL
PULSE RESPONSE
vs
FREE-AIR TEMPERATURE
1
0.8
0.6
0.4
0.2
0
100
50
V
R
C
=
15 V
CC
L
L
= 10 kΩ
= 30 pF
= 25°C
T
A
V
= 15 V
CC
See Figure 4
0
V
= 5 V
CC
−50
−100
R
C
= 20 kΩ
L
L
= 30 pF
See Figure 1
−75 −50 −25
0
25
50
75
100 125
0
20
40
60
80
T
A
− Free-Air Temperature − °C
t − Time − µs
Figure 49
Figure 50
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
47
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃ
ꢅ
ꢆ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃꢅ
ꢇ
ꢆ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃꢅ
ꢈ
ꢆ
ꢀꢁ
ꢂ
ꢃ
ꢄ
ꢃ
ꢅ
ꢉ
ꢚ
ꢂ
ꢊꢋ
ꢇ
ꢁ
ꢌ
ꢈꢍ
ꢎ
ꢏ
ꢌ
ꢐ
ꢏ
ꢑ
ꢒ
ꢓꢂ
ꢂ
ꢔ
ꢁ
ꢕ
ꢖꢑ
ꢓ
ꢕꢖ
ꢂ
ꢎ
ꢓ
ꢎ
ꢂ
ꢋ
ꢌ
ꢒ
ꢌ
ꢕ
ꢗ
ꢕ
ꢓ
ꢂ
ꢎ
ꢇ
ꢀ
ꢌ
ꢕ
ꢗ
ꢇ
ꢁ
ꢇ
ꢘ
ꢓ
ꢁ
ꢌ
ꢙꢌ
ꢂ
ꢎ
ꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
VOLTAGE-FOLLOWER
SMALL-SIGNAL
PULSE RESPONSE
TLE2021
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
2.6
2.55
2.5
4
3
2
1
0
V
= 5 V
= 10 kΩ
= 30 pF
= 25°C
CC
V
= 5 V
= 10 kΩ
= 30 pF
= 25°C
CC
R
C
L
L
R
C
L
L
T
A
T
A
See Figure 4
See Figure 1
2.45
2.4
0
20
40
60
80
0
20
40
60
80
t − Time − µs
t − Time − µs
Figure 51
Figure 52
TLE2024
TLE2022
VOLTAGE-FOLLOWER LARGE-SCALE
PULSE RESPONSE
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
4
3
2
1
0
4
3
2
1
0
V
R
C
= 5 V
= 10 kΩ
= 30 pF
= 25°C
CC
L
L
V
R
C
= 5 V
= 10 kΩ
= 30 pF
= 25°C
CC
L
L
T
A
T
A
See Figure 1
See Figure 1
0
20
40
60
80
0
20
40
60
80
t − Time − µs
t − Time − µs
Figure 53
Figure 54
48
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢇꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢀꢁ ꢂꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎ ꢏꢌ ꢐꢏ ꢑꢒꢓꢂ ꢂꢔ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎ ꢓ ꢎꢂ ꢋ ꢌꢒ ꢌ ꢕꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁ ꢇꢘ ꢓ ꢁꢌ ꢙꢌ ꢂꢎ ꢒ
ꢚ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
TLE2021
TLE2022
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
15
10
15
10
V
R
C
=
15 V
CC
L
L
V
=
15 V
CC
= 10 kΩ
= 30 pF
= 25°C
R
C
= 10 kΩ
= 30 pF
= 25°C
L
L
T
A
T
A
See Figure 1
See Figure 1
5
5
0
0
− 5
−10
−15
−5
−10
−15
0
20
40
60
80
0
20
40
60
80
t − Time − µs
t − Time − µs
Figure 55
Figure 56
TLE2024
PEAK-TO-PEAK EQUIVALENT
INPUT NOISE VOLTAGE
0.1 TO 1 Hz
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
15
10
5
0.5
0.4
V
R
C
= 15 V
CC
L
L
V
=
15 V
CC
= 25°C
= 10 kΩ
= 30 pF
= 25°C
T
A
T
A
0.3
See Figure 1
0.2
0.1
0
0
− 0.1
− 0.2
− 0.3
− 0.4
− 0.5
−5
−10
−15
0
20
40
60
80
0
1
2
3
4
5
6
7
8
9
10
t − Time − µs
t − Time − s
Figure 57
Figure 58
49
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃ
ꢅ
ꢆ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃꢅ
ꢇ
ꢆ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃꢅ
ꢈ
ꢆ
ꢀꢁ
ꢂ
ꢃ
ꢄ
ꢃ
ꢅ
ꢉ
ꢚ
ꢂ
ꢊꢋ
ꢇ
ꢁ
ꢌ
ꢈꢍ
ꢎ
ꢏ
ꢌ
ꢐ
ꢏ
ꢑ
ꢒ
ꢓꢂ
ꢂ
ꢔ
ꢁ
ꢕ
ꢖꢑ
ꢓ
ꢕꢖ
ꢂ
ꢎ
ꢓ
ꢎ
ꢂ
ꢋ
ꢌ
ꢒ
ꢌ
ꢕ
ꢗ
ꢕ
ꢓ
ꢂ
ꢎ
ꢇ
ꢀ
ꢌ
ꢕ
ꢗ
ꢇ
ꢁ
ꢇ
ꢘ
ꢓ
ꢁ
ꢌ
ꢙꢌ
ꢂ
ꢎ
ꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
PEAK-TO-PEAK EQUIVALENT
EQUIVALENT INPUT NOISE VOLTAGE
INPUT NOISE VOLTAGE
0.1 TO 10 Hz
vs
FREQUENCY
0.5
0.4
200
160
120
80
V
T
=
15 V
CC
V
R
=
15 V
CC
S
= 25°C
= 20 Ω
= 25°C
A
T
A
0.3
See Figure 2
0.2
0.1
0
− 0.1
− 0.2
− 0.3
− 0.4
− 0.5
40
0
0
1
2
3
4
5
6
7
8
9
10
1
10
100
1 k
10 k
t − Time − s
f − Frequency − Hz
Figure 59
Figure 60
TLE2022 AND TLE2024
UNITY-GAIN BANDWIDTH
vs
TLE2021
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
SUPPLY VOLTAGE
4
3
2
1
0
4
3
2
1
0
R
C
= 10 kΩ
= 30 pF
L
L
R
C
= 10 kΩ
L
L
= 30 pF
T
= 25°C
A
T
= 25°C
A
See Figure 3
See Figure 3
0
2
4
6
8
10
12
14
16
0
2
4
6
8
10
12
14
16
|V
CC
| − Supply Voltage − V
|V
CC
| − Supply Voltage − V
Figure 61
Figure 62
50
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢇꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢀꢁ ꢂꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎ ꢏꢌ ꢐꢏ ꢑꢒꢓꢂ ꢂꢔ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎ ꢓ ꢎꢂ ꢋ ꢌꢒ ꢌ ꢕꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁ ꢇꢘ ꢓ ꢁꢌ ꢙꢌ ꢂꢎ ꢒ
ꢚ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
TLE2021
UNITY-GAIN BANDWIDTH
vs
TLE2022 AND TLE2024
UNITY-GAIN BANDWIDTH
†
†
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
4
3
2
1
0
4
3
2
1
0
R
C
= 10 kΩ
L
L
R
C
= 10 kΩ
L
L
= 30 pF
= 30 pF
See Figure 3
See Figure 3
V
= 15 V
CC
V
=
15 V
CC
V
= 5 V
CC
V
CC
= 5 V
−75 −50 −25
0
25
50
75 100 125
−75 −50 −25
0
25
50
75
100 125
T
A
− Free-Air Temperature − °C
T
A
− Free-Air Temperature − °C
Figure 63
Figure 64
TLE2022 AND TLE2024
PHASE MARGIN
vs
TLE2021
PHASE MARGIN
vs
SUPPLY VOLTAGE
SUPPLY VOLTAGE
55°
53°
51°
49°
47°
45°
50°
48°
46°
44°
42°
40°
R
C
= 10 kΩ
= 30 pF
= 25°C
L
L
R
C
T
A
= 10 kΩ
= 30 pF
= 25°C
L
L
T
A
See Figure 3
See Figure 3
0
2
4
6
8
10
12
14
16
0
2
4
6
8
10
12
14
16
|V
CC
| − Supply Voltage − V
|V
CC
| − Supply Voltage − V
Figure 65
Figure 66
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
51
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃ
ꢅ
ꢆ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃꢅ
ꢇ
ꢆ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃꢅ
ꢈ
ꢆ
ꢀꢁ
ꢂ
ꢃ
ꢄ
ꢃ
ꢅ
ꢉ
ꢚ
ꢂ
ꢊꢋ
ꢇ
ꢁ
ꢌ
ꢈꢍ
ꢎ
ꢏ
ꢌ
ꢐ
ꢏ
ꢑ
ꢒ
ꢓꢂ
ꢂ
ꢔ
ꢁ
ꢕ
ꢖꢑ
ꢓ
ꢕꢖ
ꢂ
ꢎ
ꢓ
ꢎ
ꢂ
ꢋ
ꢌ
ꢒ
ꢌ
ꢕ
ꢗ
ꢕ
ꢓ
ꢂ
ꢎ
ꢇ
ꢀ
ꢌ
ꢕ
ꢗ
ꢇ
ꢁ
ꢇ
ꢘ
ꢓ
ꢁ
ꢌ
ꢙꢌ
ꢂ
ꢎ
ꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
TYPICAL CHARACTERISTICS
TLE2022 AND TLE2024
PHASE MARGIN
vs
TLE2021
PHASE MARGIN
vs
LOAD CAPACITANCE
LOAD CAPACITANCE
70°
60°
50°
40°
30°
20°
10°
0°
60°
50°
40°
30°
20°
10°
0
R
= 10 kΩ
= 30 pF
L
R
= 10 kΩ
= 25°C
L
T
A
T
A
See Figure 3
See Figure 3
V
=
15 V
CC
V
=
15 V
CC
V
= 5 V
CC
V
CC
= 5 V
0
20
40
60
80
100
0
20
40
60
80
100
C
− Load Capacitance − pF
C
− Load Capacitance − pF
L
L
Figure 67
Figure 68
TLE2021
PHASE MARGIN
TLE2022 AND TLE2024
†
†
PHASE MARGIN
vs
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
50°
48°
46°
44°
42°
40°
38°
36°
54°
52°
R
C
= 10 kΩ
= 30 pF
L
L
See Figure 3
V
=
15 V
CC
V
=
15 V
CC
50°
48°
V
CC
= 5 V
46°
44°
V
= 5 V
CC
R
C
= 10 kΩ
= 30 pF
L
L
42°
40°
See Figure 3
−75 −50 −25
0
25
50
75 100 125
−75 −50 −25
0
25
50
75 100 125
T
A
− Free-Air Temperature − °C
T
A
− Free-Air Temperature − °C
Figure 69
Figure 70
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
52
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢇꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢀꢁ ꢂꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎ ꢏꢌ ꢐꢏ ꢑꢒꢓꢂ ꢂꢔ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎ ꢓ ꢎꢂ ꢋ ꢌꢒ ꢌ ꢕꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁ ꢇꢘ ꢓ ꢁꢌ ꢙꢌ ꢂꢎ ꢒ
ꢚ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
APPLICATION INFORMATION
voltage-follower applications
The TLE202x circuitry includes input-protection diodes to limit the voltage across the input transistors; however,
no provision is made in the circuit to limit the current if these diodes are forward biased. This condition can occur
when the device is operated in the voltage-follower configuration and driven with a fast, large-signal pulse. It
is recommended that a feedback resistor be used to limit the current to a maximum of 1 mA to prevent
degradation of the device. This feedback resistor forms a pole with the input capacitance of the device. For
feedback resistor values greater than 10 kΩ, this pole degrades the amplifier phase margin. This problem can
be alleviated by adding a capacitor (20 pF to 50 pF) in parallel with the feedback resistor (see Figure 71).
C
= 20 pF to 50 pF
F
I
F
≤ 1 mA
R
F
V
CC+
CC−
−
+
V
O
V
I
V
Figure 71. Voltage Follower
Input offset voltage nulling
The TLE202x series offers external null pins that further reduce the input offset voltage. The circuit in
Figure 72 can be connected as shown if this feature is desired. When external nulling is not needed, the null
pins may be left disconnected.
−
IN −
OFFSET N2
+
IN +
5 kΩ
OFFSET N1
V
− (split supply)
CC
1 kΩ GND (single supply)
Figure 72. Input Offset Voltage Null Circuit
53
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃ
ꢅ
ꢆ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃꢅ
ꢇ
ꢆ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃꢅ
ꢈ
ꢆ
ꢀꢁ
ꢂ
ꢃ
ꢄ
ꢃ
ꢅ
ꢉ
ꢚ
ꢂ
ꢊꢋ
ꢇ
ꢁ
ꢌ
ꢈꢍ
ꢎ
ꢏ
ꢌ
ꢐ
ꢏ
ꢑ
ꢒ
ꢓꢂ
ꢂ
ꢔ
ꢁ
ꢕ
ꢖꢑ
ꢓ
ꢕꢖ
ꢂ
ꢎ
ꢓ
ꢎ
ꢂ
ꢋ
ꢌ
ꢒ
ꢌ
ꢕ
ꢗ
ꢕ
ꢓ
ꢂ
ꢎ
ꢇ
ꢀ
ꢌ
ꢕ
ꢗ
ꢇ
ꢁ
ꢇ
ꢘ
ꢓ
ꢁ
ꢌ
ꢙꢌ
ꢂ
ꢎ
ꢒ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using Microsim Parts, the model generation software used
with Microsim PSpice. The Boyle macromodel (see Note 5) and subcircuit in Figure 73, Figure 74, and Figure
75 were generated using the TLE202x typical electrical and operating characteristics at 25°C. Using this
information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most
cases):
D
D
D
D
D
D
Maximum positive output voltage swing
Maximum negative output voltage swing
Slew rate
D
D
D
D
D
D
Unity-gain frequency
Common-mode rejection ratio
Phase margin
Quiescent power dissipation
Input bias current
DC output resistance
AC output resistance
Short-circuit output current limit
Open-loop voltage amplification
NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journal
of Solid-State Circuits, SC-9, 353 (1974).
99
3
V
CC+
egnd
+
−
din
91
ree
cee
Iee
92
9
fb
+
rp
1
90
ro2
hlim
−
+
−
+
vb
dip
vip
vin
re1
−
re2
+
−
+
−
vc
IN−
IN+
r2
13
Q1
14
Q2
C2
7
6
53
+
−
2
vlim
dc
de
ga
gcm
dp
C1
8
11
12
ro1
rc1
rc2
54
5
V
CC−
4
−
+
ve
OUT
Figure 73. Boyle Subcircuit
PSpice and Parts are trademarks of MicroSim Corporation.
54
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢇꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢃ ꢅ ꢈꢆ ꢀꢁ ꢂꢃ ꢄꢃ ꢅꢉ
ꢂꢊ ꢋꢇꢁ ꢌꢈꢍ ꢎ ꢏꢌ ꢐꢏ ꢑꢒꢓꢂ ꢂꢔ ꢁ ꢕ ꢖꢑꢓꢕ ꢖ ꢂꢎ ꢓ ꢎꢂ ꢋ ꢌꢒ ꢌ ꢕꢗ
ꢕ ꢓꢂꢎ ꢇꢀ ꢌꢕ ꢗꢇꢁ ꢇꢘ ꢓ ꢁꢌ ꢙꢌ ꢂꢎ ꢒ
ꢚ
SLOS191C − FEBRUARY 1997 − REVISED APRIL 2007
.SUBCKT TLE2021 1 2 3 4 5
*
hcmr 80
1
4
poly(2) vcm+ vcm− 0 1E2 1E2
185E−6
irp
iee
iio
3
3
2
88
c1
c2
c3
11 12 6.244E−12
10 dc 15.67E−6
0
0
6
7
0
13.4E−12
10.64E−9
2E−9
1E−21
87
i1
cpsr 85 86 15.9E−9
dcm+ 81 82 dx
dcm− 83 81 dx
q1
q2
R2
11 89 13 qx
12 80 14 qx
6
9
100.0E3
dc
5
54
53 dx
5 dx
rcm 84 81 1K
ree 10 99 14.76E6
rn1 87
rn2 87 88 11.67E3
de
dlp
dln
dp
90 91 dx
92 90 dx
4
0
2.55E8
3 dx
ro1
ro2
8
7
5
62
ecmr 84 99 (2 99) 1
99 63
egnd 99
epsr 85
ense 89
0
0
2
poly(2) (3,0) (4,0) 0 .5 .5
poly(1) (3,4) −60E−6 2.0E−6
poly(1) (88,0) 120E−6 1
vcm+ 82 99 13.3
vcm− 83 99 −14.6
vb
vc
9
3
0
dc 0
fb
7
99 poly(6) vb vc ve vlp vln vpsr 0 547.3E6
53 dc 1.300
+ −50E7 50E7 50E7 −50E7 547E6
ve
54
7
91
0
0
4
8
0
dc 1.500
dc 0
dc 3.600
ga
gcm
6
0
0
6
11 12 188.5E−6
10 99 335.2E−12
vlim
vlp
vln
vpsr
gpsr 85 86 (85,86) 100E−6
92 dc 3.600
86 dc 0
grc1
grc2
4
4
11 (4,11) 1.885E−4
12 (4,12) 1.885E−4
.model dx d(is=800.0E−18)
.model qx pnp(is=800.0E−18 bf=270)
.ends
gre1 13 10 (13,10) 6.82E−4
gre2 14 10 (14,10) 6.82E−4
hlim
90
0 vlim 1k
Figure 74. Boyle Macromodel for the TLE2021
.SUBCKT TLE2022 1 2 3 4 5
*
rc1
rc2
4
4
11 2.842E3
12 2.842E3
c1
11 12 6.814E−12
ge1 13 10 (10,13) 31.299E−3
ge2 14 10 (10,14) 31.299E−3
ree 10 99 11.07E6
ro1
ro2
rp
c2
6
7
20.00E−12
dc
de
dlp
dln
dp
5
53 dx
54 5 dx
90 91 dx
92 90 dx
8
7
3
9
3
5 250
99 250
4 137.2E3
0 dc 0
53 dc 1.300
4
3 dx
vb
vc
egnd 99
0
poly(2) (3,0) (4,0) 0 .5 .5
fb
7
99poly(5) vb vc ve vlp vln 0
ve
54 4 dc 1.500
8 dc 0
vlp 91 0 dc 3
vln 92 dc 3
+ 45.47E6 −50E6 50E6 50E6 −50E6
vlim 7
ga 6
gcm 06
iee
0
11 12 377.9E−6
10 99 7.84E−10
10 DC 18.07E−6
0
3
.model dx d(is=800.0E−18)
.model qx pnp(is=800.0E−18 bf=257.1)
.ends
hlim 90 0 vlim 1k
q1
q2
r2
11 2 13 qx
12 1 14 qx
6
9 100.0E3
Figure 75. Boyle Macromodel for the TLE2022
55
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
12-Oct-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
CDIP
LCCC
CDIP
LCCC
CDIP
LCCC
CDIP
LCCC
CDIP
LCCC
CDIP
LCCC
CDIP
SOIC
Drawing
FK
JG
FK
JG
FK
JG
FK
JG
FK
J
5962-9088101M2A
5962-9088101MPA
5962-9088102M2A
5962-9088102MPA
5962-9088104Q2A
5962-9088104QPA
5962-9088105Q2A
5962-9088105QPA
5962-9088106Q2A
5962-9088106QCA
5962-9088107Q2A
5962-9088107QPA
5962-9088108Q2A
5962-9088108QPA
TLE2021ACD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
20
8
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Call TI
Call TI
1
1
1
1
1
1
1
1
1
1
1
1
1
A42 SNPB
N / A for Pkg Type
20
8
POST-PLATE N / A for Pkg Type
A42 SNPB N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42 SNPB N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42 SNPB N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42 SNPB N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42 SNPB N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42 SNPB N / A for Pkg Type
20
8
20
8
20
14
20
8
FK
JG
FK
JG
D
20
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2021ACDG4
TLE2021ACDR
TLE2021ACDRG4
TLE2021ACP
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
PDIP
PDIP
SOIC
SOIC
PDIP
PDIP
D
D
D
P
P
D
D
P
P
8
8
8
8
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TLE2021ACPE4
TLE2021AID
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2021AIDG4
TLE2021AIP
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CU NIPDAU N / A for Pkg Type
POST-PLATE N / A for Pkg Type
TLE2021AIPE4
50
Pb-Free
(RoHS)
TLE2021AMFKB
TLE2021AMJGB
TLE2021BMFKB
TLE2021BMJG
TLE2021BMJGB
TLE2021CD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
LCCC
CDIP
LCCC
CDIP
CDIP
SOIC
FK
JG
FK
JG
JG
D
20
8
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
A42 SNPB
N / A for Pkg Type
20
8
POST-PLATE N / A for Pkg Type
A42 SNPB
A42 SNPB
N / A for Pkg Type
N / A for Pkg Type
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2021CDG4
TLE2021CDR
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
D
D
D
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2021CDRG4
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
12-Oct-2007
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
no Sb/Br)
TLE2021CP
ACTIVE
ACTIVE
PDIP
PDIP
P
P
8
8
50
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CU NIPDAU N / A for Pkg Type
TLE2021CPE4
Pb-Free
(RoHS)
TLE2021CPWLE
TLE2021CPWR
OBSOLETE TSSOP
PW
PW
8
8
TBD
Call TI
Call TI
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
TSSOP
TSSOP
SOIC
SOIC
SOIC
SOIC
PDIP
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2021CPWRG4
TLE2021ID
PW
D
8
8
8
8
8
8
8
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2021IDG4
TLE2021IDR
TLE2021IDRG4
TLE2021IP
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
P
50
50
75
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CU NIPDAU N / A for Pkg Type
CU NIPDAU Level-1-220C-UNLIM
TLE2021IPE4
PDIP
P
Pb-Free
(RoHS)
TLE2021MD
ACTIVE
ACTIVE
SOIC
SOIC
D
D
8
8
TBD
TLE2021MDG4
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2021MFKB
TLE2021MJG
TLE2021MJGB
TLE2022ACD
OBSOLETE
ACTIVE
LCCC
CDIP
CDIP
SOIC
FK
JG
JG
D
20
8
TBD
TBD
TBD
Call TI
Call TI
1
1
A42 SNPB
A42 SNPB
N / A for Pkg Type
N / A for Pkg Type
ACTIVE
8
ACTIVE
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2022ACDG4
TLE2022ACDR
TLE2022ACDRG4
TLE2022ACP
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
PDIP
PDIP
SOIC
SOIC
SOIC
SOIC
PDIP
D
D
D
P
P
D
D
D
D
P
8
8
8
8
8
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TLE2022ACPE4
TLE2022AID
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2022AIDG4
TLE2022AIDR
TLE2022AIDRG4
TLE2022AIP
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
12-Oct-2007
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TLE2022AIPE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TLE2022AMD
ACTIVE
ACTIVE
SOIC
SOIC
D
D
8
8
75
TBD
CU NIPDAU Level-1-220C-UNLIM
TLE2022AMDG4
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2022AMDR
ACTIVE
ACTIVE
SOIC
SOIC
D
D
8
8
2500
TBD
CU NIPDAU Level-1-220C-UNLIM
TLE2022AMDRG4
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2022AMFKB
TLE2022AMJG
TLE2022AMJGB
TLE2022BCDR
TLE2022BMFKB
TLE2022BMJG
TLE2022BMJGB
TLE2022CD
ACTIVE
OBSOLETE
ACTIVE
LCCC
CDIP
CDIP
SOIC
LCCC
CDIP
CDIP
SOIC
FK
JG
JG
D
20
8
1
1
1
1
TBD
TBD
TBD
TBD
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
Call TI
A42 SNPB
Call TI
Call TI
8
N / A for Pkg Type
Call TI
OBSOLETE
ACTIVE
8
FK
JG
JG
D
20
8
POST-PLATE N / A for Pkg Type
OBSOLETE
ACTIVE
Call TI
Call TI
8
A42 SNPB
N / A for Pkg Type
ACTIVE
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2022CDG4
TLE2022CDR
TLE2022CDRG4
TLE2022CP
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
PDIP
PDIP
D
D
D
P
P
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TLE2022CPE4
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TLE2022CPSR
TLE2022ID
OBSOLETE
ACTIVE
SO
PS
D
8
8
TBD
Call TI
Call TI
SOIC
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2022IDG4
TLE2022IDR
TLE2022IDRG4
TLE2022IP
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
PDIP
PDIP
D
D
D
P
P
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50
50
75
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CU NIPDAU N / A for Pkg Type
CU NIPDAU Level-1-220C-UNLIM
TLE2022IPE4
Pb-Free
(RoHS)
TLE2022MD
ACTIVE
ACTIVE
SOIC
SOIC
D
D
8
8
TBD
TLE2022MDG4
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2022MDR
ACTIVE
ACTIVE
SOIC
SOIC
D
D
8
8
2500
TBD
CU NIPDAU Level-1-220C-UNLIM
TLE2022MDRG4
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2022MFKB
TLE2022MJG
TLE2022MJGB
ACTIVE
ACTIVE
ACTIVE
LCCC
CDIP
CDIP
FK
JG
JG
20
8
1
1
1
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
A42 SNPB
A42 SNPB
N / A for Pkg Type
N / A for Pkg Type
8
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
12-Oct-2007
Orderable Device
TLE2024ACDW
TLE2024ACDWG4
TLE2024ACDWR
TLE2024ACDWRG4
TLE2024ACN
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
DW
16
16
16
16
14
14
16
16
14
14
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
SOIC
PDIP
PDIP
SOIC
SOIC
PDIP
PDIP
DW
DW
DW
N
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TLE2024ACNE4
TLE2024AIDW
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
DW
DW
N
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2024AIDWG4
TLE2024AIN
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TLE2024AINE4
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TLE2024AMFK
TLE2024AMFKB
TLE2024AMJ
TLE2024AMJB
TLE2024BCDW
TLE2024BCN
TLE2024BIDW
TLE2024BIN
ACTIVE
ACTIVE
LCCC
LCCC
CDIP
CDIP
SOIC
PDIP
SOIC
PDIP
SOIC
FK
FK
J
20
20
14
14
16
14
16
14
16
1
1
1
1
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
POST-PLATE N / A for Pkg Type
ACTIVE
A42 SNPB
A42 SNPB
Call TI
N / A for Pkg Type
N / A for Pkg Type
Call TI
ACTIVE
J
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
ACTIVE
DW
N
Call TI
Call TI
DW
N
Call TI
Call TI
Call TI
Call TI
TLE2024CDW
DW
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2024CDWG4
TLE2024CDWR
TLE2024CDWRG4
TLE2024CN
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
PDIP
PDIP
SOIC
SOIC
PDIP
PDIP
SOIC
DW
DW
DW
N
16
16
16
14
14
16
16
14
14
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TLE2024CNE4
TLE2024IDW
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
DW
DW
N
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLE2024IDWG4
TLE2024IN
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25
25
40
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CU NIPDAU N / A for Pkg Type
CU NIPDAU Level-1-220C-UNLIM
TLE2024INE4
TLE2024MDW
N
Pb-Free
(RoHS)
DW
TBD
Addendum-Page 4
PACKAGE OPTION ADDENDUM
www.ti.com
12-Oct-2007
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 5
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Nov-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
330
330
330
330
330
330
330
330
330
330
330
330
330
330
(mm)
12
12
12
12
12
12
12
12
12
12
12
12
16
16
TLE2021ACDR
TLE2021CDR
TLE2021CPWR
TLE2021IDR
D
D
8
8
SITE 60
SITE 60
SITE 41
SITE 60
SITE 27
SITE 60
SITE 27
SITE 60
SITE 27
SITE 60
SITE 27
SITE 60
SITE 60
SITE 60
6.4
6.4
5.2
5.2
3.6
5.2
5.2
5.2
5.2
5.2
5.2
5.2
5.2
5.2
10.7
10.7
2.1
2.1
1.6
2.1
2.1
2.1
2.1
2.1
2.1
2.1
2.1
2.1
2.7
2.7
8
8
12
12
12
12
12
12
12
12
12
12
12
12
16
16
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
PW
D
8
7.0
8
8
6.4
8
TLE2022ACDR
TLE2022ACDR
TLE2022AIDR
TLE2022AIDR
TLE2022CDR
TLE2022CDR
TLE2022IDR
D
8
6.4
8
D
8
6.4
8
D
8
6.4
8
D
8
6.4
8
D
8
6.4
8
D
8
6.4
8
D
8
6.4
8
TLE2022IDR
D
8
6.4
8
TLE2024ACDWR
TLE2024CDWR
DW
DW
16
16
10.75
10.75
12
12
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Nov-2007
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
TLE2021ACDR
TLE2021CDR
TLE2021CPWR
TLE2021IDR
D
D
8
8
SITE 60
SITE 60
SITE 41
SITE 60
SITE 27
SITE 60
SITE 27
SITE 60
SITE 27
SITE 60
SITE 27
SITE 60
SITE 60
SITE 60
346.0
346.0
346.0
346.0
342.9
346.0
342.9
346.0
342.9
346.0
342.9
346.0
346.0
346.0
346.0
346.0
346.0
346.0
336.6
346.0
336.6
346.0
336.6
346.0
336.6
346.0
346.0
346.0
29.0
29.0
29.0
29.0
20.64
29.0
20.64
29.0
20.64
29.0
20.64
29.0
33.0
33.0
PW
D
8
8
TLE2022ACDR
TLE2022ACDR
TLE2022AIDR
TLE2022AIDR
TLE2022CDR
TLE2022CDR
TLE2022IDR
D
8
D
8
D
8
D
8
D
8
D
8
D
8
TLE2022IDR
D
8
TLE2024ACDWR
TLE2024CDWR
DW
DW
16
16
Pack Materials-Page 2
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.063 (1,60)
0.015 (0,38)
0.020 (0,51) MIN
0.200 (5,08) MAX
0.130 (3,30) MIN
Seating Plane
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.430 (10,92)
MAX
0.010 (0,25)
M
0.015 (0,38)
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,
improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.
Customers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s
standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this
warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily
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TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should
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TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask
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Products
Amplifiers
Data Converters
DSP
Applications
Audio
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/audio
Automotive
Broadband
Digital Control
Military
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/military
Interface
interface.ti.com
logic.ti.com
Logic
Power Mgmt
Microcontrollers
RFID
power.ti.com
Optical Networking
Security
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/lpw
Telephony
Low Power
Wireless
Video & Imaging
Wireless
www.ti.com/wireless
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2007, Texas Instruments Incorporated
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