TLE2142QDRQ1 [TI]
Excalibur⢠LOW-NOISE HIGH-SPEED PRECISION OPERATIONAL AMPLIFIER;型号: | TLE2142QDRQ1 |
厂家: | TEXAS INSTRUMENTS |
描述: | Excalibur⢠LOW-NOISE HIGH-SPEED PRECISION OPERATIONAL AMPLIFIER 放大器 光电二极管 |
文件: | 总23页 (文件大小:473K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TLE2142-Q1
www.ti.com....................................................................................................................................................................................................... SLOS628–JULY 2009
Excalibur™ LOW-NOISE HIGH-SPEED PRECISION OPERATIONAL AMPLIFIER
1
FEATURES
D PACKAGE
(TOP VIEW)
2
•
Qualified for Automotive Applications
•
Low Noise
1OUT
1IN-
V
CC+
1
2
3
4
8
7
6
5
–
–
10 Hz: 15 nV/√Hz
2OUT
2IN-
1 kHz: 10.5 nV/√Hz
1IN+
•
•
•
•
•
•
10000-pF Load Capability
V
CC-
2IN+
20-mA Short-Circuit Output Current (Min)
27-V/µs Slew Rate (Min)
High Gain-Bandwidth Product: 5.9 MHz
Single or Split Supply: 4 V to 44 V
Fast Settling Time
–
–
340 ns to 0.1%
400 ns to 0.01%
•
Large Output Swing:
VCC– + 0.1 V to VCC+ – 1 V
DESCRIPTION/ORDERING INFORMATION
The TLE2142 device is a high-performance, internally compensated operational amplifier built using the Texas
Instruments complementary bipolar Excalibur™ process. It is a pin-compatible upgrade to standard industry
products.
The design incorporates an input stage that simultaneously achieves low audio-band noise of 10.5 nV/√Hz with a
10-Hz 1/f corner and symmetrical 40-V/µs slew rate typically with loads up to 800 pF. The resulting low distortion
and high power bandwidth are important in high-fidelity audio applications. A fast settling time of 340 ns to 0.1%
of a 10-V step with a 2-kΩ/100-pF load is useful in fast actuator/positioning drivers. Under similar test conditions,
settling time to 0.01% is 400 ns.
The device is stable with capacitive loads up to 10 nF, although the 6-MHz bandwidth decreases to 1.8 MHz at
this high loading level. As such, the TLE2142 is useful for low-droop sample-and-holds and direct buffering of
long cables, including 4-mA to 20-mA current loops.
The special design also exhibits an improved insensitivity to inherent integrated circuit component mismatches as
is evidenced by a 500-µV maximum offset voltage and 1.7-µV/°C typical drift. Minimum common-mode rejection
ratio and supply-voltage rejection ratio are 85 dB and 90 dB, respectively.
Device performance is relatively independent of supply voltage over the ±2-V to ±22-V range. Inputs can operate
between VCC– – 0.3 V to VCC+ – 1.8 V without inducing phase reversal, although excessive input current may flow
out of each input exceeding the lower common-mode input range. The all-npn output stage provides a nearly
rail-to-rail output swing of VCC– + 0.1 V to VCC+ – 1 V under light current-loading conditions. The device can
sustain shorts to either supply, because output current is internally limited, but care must be taken to ensure that
maximum package power dissipation is not exceeded.
The TLE2142 can also be used as a comparator. Differential inputs of VCC± can be maintained without damage
to the device. Open-loop propagation delay with TTL supply levels is typically 200 ns. This gives a good
indication as to output stage saturation recovery when the device is driven beyond the limits of recommended
output swing.
The TLE2142 device is available in industry-standard 8-pin small-outline (D) packages. The device is
characterized for operation from –40°C to 125°C.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
Excalibur is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009, Texas Instruments Incorporated
TLE2142-Q1
SLOS628–JULY 2009....................................................................................................................................................................................................... www.ti.com
SYMBOL (EACH AMPLIFIER)
+
IN+
OUT
-
IN-
ORDERING INFORMATION(1)
TA
PACKAGE(2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
2142Q
–40°C to 125°C
SOIC – D
Reel of 2500
TLE2142QDRQ1
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
2
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EQUIVALENT SCHEMATIC
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ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
VCC+
VCC–
VID
VI
Supply voltage(2)
22 V
–22 V
Supply voltage
Differential input voltage(3)
±44 V
Input voltage range (any input)
Input current (each input)
VCC+ to (VCC– – 0.3) V
±1 mA
II
IO
Output current
±80 mA
Total current into VCC+
80 mA
Total current out of VCC–
80 mA
Duration of short-circuit current at (or below) 25°C(4)
Package thermal impedance(5)(6)
Operating free-air temperature range
Storage temperature range
Unlimited
97.1°C/W
–40°C to 125°C
–65°C to 150°C
260°C
θJA
TA
Tstg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
Electrostatic discharge rating, Human-body model
ESD
500 V
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC–
.
(3) Differential voltages are at IN+ with respect to IN–. Excessive current flows, if input, are brought below VCC– – 0.3 V.
(4) The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation
rating is not exceeded.
(5) Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
(6) The package thermal impedance is calculated in accordance with JESD 51-7.
RECOMMENDED OPERATING CONDITIONS
MIN
±2
MAX
±22
2.7
UNIT
VCC±
VIC
Supply voltage
V
VCC = 5 V
0
Common-mode input voltage
Operating free-air temperature
V
VCC± = ±15 V
–15
–40
12.7
125
TA
°C
4
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ELECTRICAL CHARACTERISTICS
VCC = 5 V, at specified free-air temperature (unless otherwise noted)
(1)
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX UNIT
25°C
220
1900
µV
VIO
αVIO
IIO
Input offset voltage
VO = 2.5 V, RS = 50 Ω, VIC = 2.5 V
Full range
2600
Temperature coefficient of
input offset voltage
VO = 2.5 V, RS = 50 Ω, VIC = 2.5 V
VO = 2.5 V, RS = 50 Ω, VIC = 2.5 V
Full range
1.7
8
µV/°C
25°C
Full range
25°C
100
nA
Input offset current
Input bias current
200
–0.8
–2
µA
IIB
VO = 2.5 V, RS = 50 Ω, VIC = 2.5 V
Full range
–2.3
–0.3 to
3.2
25°C
0 to 3
Common-mode input
voltage range
VICR
RS = 50 Ω
V
V
–0.3 to
2.9
Full range
0 to 2.7
IOH = –150 µA
IOH = –1.5 mA
IOH = –15 mA
IOH = –100 µA
IOH = –1 mA
IOH = –10 mA
IOL = 150 µA
IOL = 1.5 mA
IOL = 15 mA
IOL = 100 µA
IOL = 1 mA
3.9
3.8
4.1
4
25°C
Full range
25°C
3.4
3.7
VOH
High-level output voltage
3.75
3.65
3.45
75
150
1.2
125
mV
225
1.4
200
250
1.25
V
mV
V
VOL
Low-level output voltage
Full range
IOL = 10 mA
25°C
Full range
25°C
50
5
220
Large-signal differential
voltage amplification
VIC = ±2.5 V, RL = 2 kΩ,
VO = 1 V to -1.5 V
AVD
V/mV
ri
Input resistance
70
2.5
30
MΩ
pF
Ω
ci
zo
Input capacitance
25°C
Open-loop output impedance
f = 1 MHz
25°C
25°C
85
80
90
85
118
CMRR Common-mode rejection ratio
VIC = VICR(min), RS = 50 Ω
dB
dB
Full range
25°C
106
6.6
Supply-voltage rejection ratio
kSVR
VCC± = ±2.5 V to ±15 V, RS = 50 Ω
(ΔVCC±/ΔVIO
)
Full range
25°C
8.8
9.2
ICC
Supply current
VO = 2.5 V, No load, VIC = 2.5 V
mA
Full range
(1) Full range is –40°C to 125°C.
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OPERATING CHARACTERISTICS
VCC = 5 V, TA = 25°C (unless otherwise noted)
PARAMETER
Positive slew rate
TEST CONDITIONS
AVD = –1, RL = 2 kΩ(1), CL = 500 pF
AVD = –1, RL = 2 kΩ(1), CL = 500 pF
MIN
TYP
45
MAX UNIT
V/µs
SR+
SR–
Negative slew rate
42
V/µs
To 0.1%
0.16
0.22
15
ts
Settling time
AVD = –1, 2.5-V step
µs
nV/√Hz
µV
To 0.01%
f = 10 Hz
f = 1 kHz
Vn
Equivalent input noise voltage
RS = 20 Ω
10.5
0.48
0.51
1.92
0.5
f = 0.1 Hz to 1 Hz
f = 0.1 Hz to 10 Hz
f = 10 Hz
Peak-to-peak equivalent input
noise voltage
Vn(PP)
In
Equivalent input noise current
pA/√Hz
f = 1 kHz
VO = 1 V to 3 V, RL = 2 kΩ(1), AVD = 2,
f = 10 kHz
THD+N Total harmonic distortion plus noise
0.0052
%
B1
Unity-gain bandwidth
RL = 2 kΩ(1), CL = 100 pF
5.9
5.8
660
57
MHz
MHz
kHz
°
Gain-bandwidth product
RL = 2 kΩ(1), CL = 100 pF, f = 100 kHz
VO(PP) = 2 V, RL = 2 kΩ(1), AVD = 1, CL = 100 pF
RL = 2 kΩ(1), CL = 100 pF
BOM
Maximum output-swing bandwidth
Phase margin at unity gain
φm
(1) RL terminated at 2.5 V.
6
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ELECTRICAL CHARACTERISTICS
VCC = ±15 V, at specified free-air temperature (unless otherwise noted)
(1)
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX UNIT
25°C
290
1200
µV
VIO
αVIO
IIO
Input offset voltage
VIC = 0, RS = 50 Ω
Full range
2000
Temperature coefficient of
input offset voltage
VIC = 0, RS = 50 Ω
VIC = 0, RS = 50 Ω
Full range
1.7
7
µV/°C
25°C
Full range
25°C
100
nA
Input offset current
Input bias current
250
–0.7
–1.5
µA
IIB
VIC = 0, RS = 50 Ω
RS = 50 Ω
Full range
–1.8
–15 to –15.3 to
13 13.2
25°C
Common-mode input
voltage range
VICR
V
V
–15 to –15.3 to
Full range
12.7
13.8
13.7
13.3
13.7
13.6
13.3
–14.7
–14.5
–13.4
–14.6
–14.5
–13.4
100
12.9
14.1
14
IO = –150 µA
IO = –1.5 mA
IO = –15 mA
IO = –100 µA
IO = –1 mA
IO = –10 mA
IO = 150 µA
IO = 1.5 mA
IO = 15 mA
IO = 100 µA
IO = 1 mA
25°C
Full range
25°C
13.7
Maximum positive peak
output voltage swing
VOM+
–14.9
–14.8
–13.8
Maximum negative peak
output voltage swing
VOM–
V
Full range
IO = 10 mA
25°C
Full range
25°C
450
Large-signal differential
voltage amplification
AVD
VO = ±10 V, RL = 2 kΩ
V/mV
20
ri
Input resistance
65
2.5
30
MΩ
pF
Ω
ci
zo
Input capacitance
25°C
Open-loop output impedance
f = 1 MHz
25°C
25°C
85
80
108
CMRR Common-mode rejection ratio
VIC = VICR(min), RS = 50 Ω
dB
dB
Full range
25°C
90
106
Supply-voltage rejection ratio
kSVR
VCC± = ±2.5 V to ±15 V, RS = 50 Ω
(ΔVCC±/ΔVIO
)
Full range
85
VID = 1 V
–25
20
–50
31
IOS
Short-circuit output current
Supply current
VO = 0
25°C
mA
VID = –1 V
25°C
6.9
9
mA
9.4
ICC
VO = 0, No load, VIC = 2.5 V
Full range
(1) Full range is –40°C to 125°C.
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OPERATING CHARACTERISTICS
VCC = ±15 V, TA = 25°C (unless otherwise noted)
PARAMETER
Positive slew rate
TEST CONDITIONS
AVD = –1, RL = 2 kΩ, CL = 100 pF
AVD = –1, RL = 2 kΩ, CL = 100 pF
MIN
27
TYP
45
MAX UNIT
V/µs
SR+
SR–
Negative slew rate
27
42
V/µs
To 0.1%
0.34
0.4
ts
Settling time
AVD = –1, 10-V step
µs
To 0.01%
f = 10 Hz
f = 1 kHz
15
Vn
Equivalent input noise voltage
RS = 20 Ω
nV/√Hz
µV
10.5
0.48
0.51
1.89
0.47
0.01
6
f = 0.1 Hz to 1 Hz
f = 0.1 Hz to 10 Hz
f = 10 Hz
Peak-to-peak equivalent input
noise voltage
Vn(PP)
In
Equivalent input noise current
pA/√Hz
f = 1 kHz
THD+N Total harmonic distortion plus noise
VO(PP) = 20 V, RL = 2 kΩ, AVD = 10, f = 10 kHz
RL = 2 kΩ, CL = 100 pF
%
MHz
MHz
kHz
°
B1
Unity-gain bandwidth
Gain-bandwidth product
RL = 2 kΩ, CL = 100 pF, f = 100 kHz
VO(PP) = 20 V, AVD = 1, RL = 2 kΩ, CL = 100 pF
RL = 2 kΩ, CL = 100 pF
5.9
BOM
Maximum output-swing bandwidth
Phase margin at unity gain
668
58
φm
8
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TYPICAL CHARACTERISTICS
Table of Graphs
VIO
IIO
Input offset voltage
Input offset current
Distribution
Figure 1
Figure 2
vs Free-air temperature
vs Common-mode input voltage
vs Free-air temperature
vs Supply voltage
vs Free-air temperature
vs Output current
vs Settling time
Figure 3
IIB
Input bias current
Figure 4
Figure 5
Figure 6
VOM+
Maximum positive peak output voltage
Figure 7
Figure 9
vs Supply voltage
vs Free-air temperature
vs Output current
vs Settling time
Figure 5
Figure 6
VOM–
Maximum negative peak output voltage
Figure 8
Figure 9
VO(PP)
VOH
Maximum peak-to-peak output voltage
High-level output voltage
Low-level output voltage
Phase shift
vs Frequency
Figure 10
Figure 11
Figure 12
Figure 13
Figure 13
Figure 14
Figure 15
Figure 16
Figure 17
Figure 18
Figure 19
Figure 20
Figure 21
Figure 22
Figure 23
Figure 24
Figure 25
Figure 26
Figure 27
Figure 28
Figure 29
Figure 30
Figure 31
Figure 32
Figure 33
Figure 34
vs Output current
vs Output current
vs Frequency
VOL
vs Frequency
AVD
Large-signal differential voltage amplification
vs Free-air temperature
vs Frequency
zo
Closed-loop output impedance
Short-circuit output current
IOS
vs Free-air temperature
vs Frequency
CMRR
kSVR
ICC
Common-mode rejection ratio
Supply-voltage rejection ratio
Supply current
vs Free-air temperature
vs Frequency
vs Free-air temperature
vs Supply voltage
vs Free-air temperature
vs Frequency
Vn
Equivalent input noise voltage
Input noise voltage
Vn
Over a 10-second period
vs Frequency
In
Noise current
THD+N
Total harmonic distortion plus noise
vs Frequency
vs Free-air temperature
vs Load capacitance
vs Time
SR
Slew rate
Noninverting large signal
Pulse response
Inverting large signal
Small signal
vs Time
vs Time
B1
Unity-gain bandwidth
Gain margin
vs Load capacitance
vs Load capacitance
vs Load capacitance
φm
Phase margin
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INPUT OFFSET CURRENT
vs
TLE2142
DISTRIBUTION OF
FREE-AIR TEMPERATURE
INPUT OFFSET VOLTAGE
20
18
16
14
12
10
8
24
20
16
12
8
236 Units Tested From 1 Wafer Lot
V
V
= 0
= 0
O
V
CC
= ±15 V
±
IC
T
A
= 25°C
P Package
V
CC
= ±2.5 V
±
6
V
CC
= ±15 V
±
4
2
0
4
0
0
200 400 600 800
−800 −600 −400 −200
−75 −50 −25
0
25
50
75 100 125 150
V
IO
− Input Offset Voltage − µV
T
A
− Free-Air Temperature − °C
Figure 1.
Figure 2.
INPUT BIAS CURRENT
vs
INPUT BIAS CURRENT
vs
FREE-AIR TEMPERATURE
COMMON-MODE INPUT VOLTAGE
−1000
−900
−800
−700
0
−0.2
−0.4
V
CC
= ±2.5 V
V
V
= 0
= 0
±
O
IC
V
= ±2.5 V
±
CC
−0.6
T
= 125°C
A
−0.8
−1
T
A
= 25°C
V
CC
= ±15 V
±
−600
−500
T
A
= −55°C
−1.2
−1.4
−3 −2.5 −2
−1.5 −1 −0.5
0
0.5
1
−75 −50 −25
0
25
50 75 100 125 150
V
IC
− Common-Mode Input Voltage − V
T
A
− Free-Air Temperature − °C
Figure 3.
Figure 4.
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MAXIMUM PEAK OUTPUT VOLTAGE
MAXIMUM PEAK OUTPUT VOLTAGE
vs
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
24
18
12
6
15
14.6
14.2
R
T
A
= 2 kΩ
= 25°C
L
V
CC
= ±15 V
±
R
= ∞
L
V
OM+
V
OM+
13.8
R
L
= 2 kΩ
0
−13.8
− 6
V
OM−
−14.2
−14.6
−15
R
= 2 kΩ
L
−12
−18
− 24
V
OM−
R
L
= ∞
0
3
6
9
12
15
18
21
24
−75 −50 −25
0
25
50 75 100 125 150
T − Free-Air Temperature − °C
A
V
CC
− Supply Voltage − V
±
Figure 5.
Figure 6.
MAXIMUM POSITIVE PEAK
OUTPUT VOLTAGE
vs
MAXIMUM NEGATIVE PEAK
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT CURRENT
14.6
14.4
−13.4
−13.6
V
CC
= ±15 V
V
CC
= ±15 V
±
±
−13.8
−14
T
A
= 125°C
14.2
14
T
A
= 125°C
−14.2
−14.4
−14.6
−14.8
− 15
T
A
= −55°C
T
A
= 25°C
T
A
= 25°C
T
A
= −55°C
13.8
13.6
−0.1
−0.4
−1
−4
−10
− 40
−100
0.1
0.4
1
4
10
40
100
I
O
− Output Current − mA
I
O
− Output Current − mA
Figure 7.
Figure 8.
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MAXIMUM PEAK OUTPUT VOLTAGE
MAXIMUM PEAK-TO-PEAK
OUTPUT VOLTAGE
vs
vs
SETTLING TIME
FREQUENCY
12.5
10
A
= −1
VD
30
25
20
15
10
5
V
CC
= ±15 V
±
V
R
= ±15 V
= 2 kΩ
±
CC
T
A
= 25°C
L
7.5
5
0.1%
0.01%
T
A
= 25°C
2.5
0
Rising
Falling
T
A
= 125°C
−2.5
0.01%
−5
0.1%
T
A
= −55°C
−7.5
−10
−12.5
0
100
200
300
400
500
0
100 k
400 k
1 M
4 M
10 M
t − Settling Time − ns
s
f − Frequency − Hz
Figure 9.
Figure 10.
HIGH-LEVEL OUTPUT VOLTAGE
LOW-LEVEL OUTPUT VOLTAGE
vs
vs
OUTPUT CURRENT
OUTPUT CURRENT
4.6
4.4
4.2
1400
V
CC
= 5 V
V
CC
= 5 V
1200
1000
800
600
400
200
0
T
A
= 125°C
T
A
= 125°C
T
= 25°C
A
T
A
= −55°C
4
3.8
3.6
T
A
= 25°C
T
= −55°C
A
3.4
−0.1
−1
−10
−100
0.1
1
10
100
I
O
− Output Current − mA
I
O
− Output Current − mA
Figure 11.
Figure 12.
12
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TLE2142-Q1
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LARGE-SIGNAL DIFFERENTIAL VOLTAGE
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
FREE-AIR TEMPERATURE
120
110
100
90
0°
140
120
100
80
V
V
= ±15 V
= ±10 V
20°
±
CC
O
40°
60°
R = 10 kΩ
L
80
80°
Phase Shift
70
100°
120°
140°
160°
180°
200°
220°
240°
260°
60
A
VD
50
40
R
L
= 2 kΩ
30
V
CC
= ±15 V
±
20
R
C
T
A
= 2 kΩ
= 100 pF
= 25°C
L
L
10
0
− 10
1
10
100
1 k
10 k 100 k 1 M 10 M
f − Frequency − Hz
−75 −50 −25
0
25
50
75 100 125 150
T
A
− Free-Air Temperature − °C
Figure 13.
Figure 14.
SHORT-CIRCUIT OUTPUT CURRENT
CLOSED-LOOP OUTPUT IMPEDANCE
vs
vs
FREE-AIR TEMPERATURE
FREQUENCY
60
50
40
30
100
V
V
= ±15 V
= 0
30 Ω
±
CC
O
10
1
V
ID
= 1
A
= 100
VD
0.1
A
VD
= 10
= 1
A
VD
0.01
V
= −1
25
ID
0.001
20
1 k
10 k
100 k
1 M
10 M
−75 −50 −25
T
0
50
75 100 125 150
− Free-Air Temperature − °C
f − Frequency − Hz
Figure 15.
A
Figure 16.
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COMMON-MODE REJECTION RATIO
COMMON-MODE REJECTION RATIO
vs
vs
FREQUENCY
FREE-AIR TEMPERATURE
140
120
100
80
120
116
112
108
V
T
= ±15 V
= 25°C
±
V
IC
= V min
ICR
CC
V
CC
= 5 V
A
60
40
V
CC
= ±15 V
±
104
100
20
0
100
1 k
10 k
100 k
1 M
−75 −50 −25
0
25
50
75 100 125 150
f − Frequency − Hz
T
A
− Free-Air Temperature − °C
Figure 17.
Figure 18.
SUPPLY-VOLTAGE REJECTION RATIO
SUPPLY-VOLTAGE REJECTION RATIO
vs
vs
FREQUENCY
FREE-AIR TEMPERATURE
160
110
108
106
V
CC
= ±2.5 V to ±15 V
±
140
120
100
k
SVR+
k
SVR−
80
60
104
102
100
40
20
0
V
T
A
= ±2.5 V to ±15 V
= 25°C
±
CC
10
100
1 k
10 k
100 k
1 M
10 M
−75 −50 −25
0
25
50
75 100 125 150
f − Frequency − Hz
T
A
− Free-Air Temperature − °C
Figure 19.
Figure 20.
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TLE2142-Q1
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SUPPLY CURRENT
vs
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
4
3.5
3
3.8
3.6
V
= 0
O
T
= 125°C
= 25°C
A
No Load
V
= ±15 V
±
CC
T
A
3.4
3.2
V
CC
= ±2.5 V
±
T
= −55°C
A
2.5
2
3
V
= 0
O
No Load
2.8
0
4
8
12
16
20
24
−75 −50 −25
T
0
25
50
75 100 125 150
|V
CC
| − Supply Voltage − V
− Free-Air Temperature − °C
±
A
Figure 21.
Figure 22.
INPUT NOISE VOLTAGE
EQUIVALENT INPUT NOISE VOLTAGE
OVER A 10-SECOND PERIOD
vs
FREQUENCY
750
250
200
150
100
50
V
= ±15 V
±
CC
V
R
= ±15 V
= 20Ω
±
CC
f = 0.1 to 10 Hz
T
A
S
= 25°C
500
250
T
A
= −55°C
0
T
A
= 125°C
−250
−500
−750
T
= 25°C
A
0
0
2
4
6
8
10
1
100
1 k
10 k
10
t − Time − s
f − Frequency − Hz
Figure 23.
Figure 24.
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NOISE CURRENT
vs
FREQUENCY
TOTAL HARMONIC DISTORTION
PLUS NOISE
vs
8
FREQUENCY
1%
V
V
T
= 20 V
= ±15 V
= 25°C
O(PP)
A = 100
V
±
CC
R = 600 Ω
L
A
6
4
0.1%
T
A
= −55°C
A = 100
V
A = 10
V
R
L
= 2 kΩ
R = 600 Ω
L
T
A
= 25°C
0.01%
2
0
A = 10
V
R = 2 kΩ
L
T
A
= 125°C
1
10
100
1 k
10 k
0.001%
10
100
1 k
10 k
100 k
f − Frequency − Hz
f − Frequency − Hz
Figure 25.
Figure 26.
SLEW RATE
vs
SLEW RATE
vs
LOAD CAPACITANCE
FREE-AIR TEMPERATURE
60
50
40
30
50
40
30
20
SR +
SR+
SR −
20
10
0
SR−
V
= ±15 V
= − 1
= 2 kΩ
= 500 pF
V
= ±15 V
±
= − 1
= 25°C
±
CC
CC
10
A
A
VD
VD
R
C
T
A
L
L
0
0.01
0.1
1
10
−75 −50 −25
T
0
25
50
75 100 125 150
C − Load Capacitance − nF
L
− Free-Air Temperature − °C
A
Figure 27.
Figure 28.
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TLE2142-Q1
www.ti.com....................................................................................................................................................................................................... SLOS628–JULY 2009
NONINVERTING
LARGE-SIGNAL
PULSE RESPONSE
INVERTING
LARGE-SIGNAL
PULSE RESPONSE
15
10
5
15
10
5
T
A
= 125°C
T
A
= 25°C
T
= 25°C
T
= −55°C
A
A
T
= 125°C
A
T
= −55°C
= 25°C
A
T
= −55°C
A
0
0
T
= −55°C
A
T
A
= 125°C
T
−5
−10
−15
−5
−10
−15
A
T
A
= 25°C
V
= ±15 V
V
A
= ±15 V
= −1
±
= 1
= 2 kΩ
= 300 pF
CC
±
CC
A
R
C
VD
VD
R
L
C
L
= 2 kΩ
= 300 pF
L
L
T
= 125°C
A
0
1
2
3
4
5
0
1
2
3
4
5
t − Time − µs
t − Time − µs
Figure 29.
Figure 30.
SMALL-SIGNAL
PULSE RESPONSE
UNITY-GAIN BANDWIDTH
vs
LOAD CAPACITANCE
100
50
0
7
6
5
4
3
2
1
V = ±15 V
±
CC
T
A
= −55°C
R
L
= 2 kΩ
T
A
= 25°C
T
A
= 125°C
V
= ±15 V
= −1
= 2 kΩ
= 300 pF
= 25°C
±
CC
−50
A
VD
R
C
T
A
L
L
−100
0
400
800
1200
1600
10
100
1000
10000
t − Time − ns
C − Load Capacitance − pF
L
Figure 31.
Figure 32.
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PHASE MARGIN
vs
GAIN MARGIN
vs
LOAD CAPACITANCE
LOAD CAPACITANCE
14
12
10
8
70°
T
= −55°C
A
V
= ±15 V
= 1
= 2 kΩ to ∞
= −10 V to 10 V
±
CC
A
R
VD
60°
50°
L
T
A
= 25°C
V
O
T
= −55°C
A
T
= 125°C
A
40°
30°
20°
10°
0°
6
T
A
= 125°C
4
2
V
R
= ±15 V
±
CC
T
A
= 25°C
= 2 kΩ
L
0
10
10
100
1000
10000
100
1000
10000
C − Load Capacitance − pF
L
C − Load Capacitance − pF
L
Figure 33.
Figure 34.
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PACKAGE OPTION ADDENDUM
www.ti.com
1-Aug-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TLE2142QDRQ1
ACTIVE
SOIC
D
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLE2142-Q1 :
Catalog: TLE2142
Military: TLE2142M
•
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
Military - QML certified for Military and Defense Applications
•
•
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Dec-2010
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TLE2142QDRQ1
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Dec-2010
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC
SPQ
Length (mm) Width (mm) Height (mm)
340.5 338.1 20.6
TLE2142QDRQ1
D
8
2500
Pack Materials-Page 2
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