TLE2682IDW [TI]
High-Speed JFET-Input Dual Operational Amplifier w/Switched-Capacitor Voltage Converter 16-SOIC;
| 型号： | TLE2682IDW |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | High-Speed JFET-Input Dual Operational Amplifier w/Switched-Capacitor Voltage Converter 16-SOIC 转换器 开关 运算放大器 输入元件 |
| 文件： | 总49页 (文件大小：712K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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SLOS127 − JUNE 1993
DW PACKAGE
(TOP VIEW)
D
Single-Supply Operation With Rail-to-Rail
Inputs
D
D
D
D
D
D
D
30-mA Min Short-Circuit Output Current
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1 OUT
1 IN−
1 IN+
V
CC+
Wide V
Range . . . 3.5 V to 15 V
CC
2 OUT
2 IN−
2 IN+
CAP−
GND
V
Supplies up to 100 mA for External
OUT
Loads
V
V
CC−
OUT
Shutdown Mode
V
External 2.5-V Voltage Reference Available
40-V/µs Slew Rate Typ
REF
OSC
CAP+
FB/SD
V
IN
High Gain-Bandwidth Product . . . 10 MHz
description
The TLE2682 offers the advantages of JFET-input operational amplifiers and rail-to-rail common-mode input
voltage range with the convenience of single-supply operation. By combining a switched-capacitor voltage
converter with a dual operational amplifier in a single package, Texas Instruments now gives circuit designers
new options for conditioning low-level signals in single-supply systems.
The TLE2682 features two high-speed, high-output drive JFET-input operational amplifiers with a switched-
capacitor building block. Using two external capacitors, the switched-capacitor network can be configured as
a voltage inverter generating a negative supply voltage capable of sourcing up to 100 mA. This supply functions
not only as the amplifier’s negative rail but is also available to drive external circuitry. In this configuration, the
amplifier common-mode input voltage range extends from the positive rail to below ground, thus providing true
rail-to-rail inputs from a single supply. Furthermore, the outputs can swing to and below ground while sinking
over 25 mA. This feature was previously unavailable in operational amplifier circuits. The TLE2682 operational
amplifier section has output stages that can drive 20-mA loads to 2.3 V with a 5-V rail. With a 2-mA load, the
output swing extends to 3.9 V.
This amplifier design features a 25-V/µs minimum slew rate, which results in a high-power bandwidth. Settling
time to 0.1% of a 10-V step (1-kΩ/100-pF load) is approximately 400 ns. Gain-bandwidth product is typically
10 MHz with an 8-MHz minimum. The TLE2682 offers significant speed and noise advantages at a low 1.5-mA
typical supply current per channel.
The TLE2682 features a shutdown pin (FB/SD), which can be used to disable the switched-capacitor section.
When disabled, the switched-capacitor voltage converter block draws less then 150 µA from the power supply,
V .
IN
The switched-capacitor voltage converter block also provides an on-board regulator; with the addition of an
external divider, a well-regulated output voltage is easily obtained. The internal oscillator runs at a nominal
frequency of 25 kHz. This can be synchronized to an external clock signal or can be varied using an external
capacitor. A 2.5-V reference is brought out to V
Additional filtering can be added to minimize switching noise.
for use with the on-board regulator or external circuitry.
REF
The TLE2682 is characterized for operation over the industrial temperature range of −40°C to 85°C. This device
is available in a 16-pin wide-body surface-mount package.
AVAILABLE OPTION
PACKAGE
T
A
SMALL OUTLINE
(DW)
−40°C to 85°C
TLE2682IDW
The DW package is available taped and reeled. Add
the suffix R to the device type, (i.e., TLE2682IDWR).
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Copyright 1993, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢃ
ꢆ ꢇꢈ ꢆꢉꢊ ꢋꢂꢂ ꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋ ꢐꢀ ꢌꢐ ꢑꢁ ꢒ ꢋꢂ ꢓꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋꢁ ꢇꢎ ꢇꢂ ꢓ
ꢕꢇ ꢀ ꢆ ꢊꢕ ꢇ ꢀ ꢖꢆ ꢂ ꢌꢉꢖꢑ ꢋꢑꢖ ꢇ ꢀꢒ ꢓ ꢗ ꢒꢁꢀꢑꢈꢂ ꢖꢒ ꢏꢗꢂ ꢓꢀ ꢂꢓ
SLOS127 − JUNE 1993
functional block diagram
Amplifier Block
1
16
15
14
13
12
11
10
9
1 OUT
V
CC
+
2
_
+
1 IN−
2 OUT
2 IN−
2 IN+
CAP−
GND
_
+
3
1 IN+
4
V
CC−
5
6
7
8
V
OUT
V
REF
Switched-
Capacitor
Block
OSC
CAP+
FB/SD
V
IN
ACTUAL DEVICE
COMPONENT COUNT
AMPLIFIER
BLOCK
SWITCHED-
CAPACITOR BLOCK
Transistors
Resistors
Diodes
57
37
5
Transistors
Resistors
Diodes
71
44
2
Capacitors
11
Capacitors
5
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂꢃ ꢄꢅ ꢃ
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ꢕ ꢇꢀ ꢆ ꢊꢕ ꢇ ꢀꢖ ꢆꢂꢌꢉꢖꢑ ꢋꢑꢖꢇ ꢀꢒ ꢓ ꢗꢒ ꢁꢀꢑꢈ ꢂ ꢖꢒꢏ ꢗ ꢂꢓ ꢀꢂ ꢓ
SLOS127 − JUNE 1993
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 V
IN
Supply voltage, V
Supply voltage, V
(see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 V
(see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −16 V
CC+
CC−
Differential input voltage, V (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 V
Input voltage, V (any input of amplifier) (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
Input voltage range, V (FB/SD) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to V
Input voltage range, V (OSC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to V
ID
I
CC
I
IN
I
REF
Input current, I (each input of amplifier) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 mA
I
Output current, I (each output of amplifier) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80 mA
O
Total current into V
Total current out of V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 mA
CC+
CC−
Duration of short-circuit current at (or below) T = 25°C (see Note 4) (each amplifier) . . . . . . . . . . . unlimited
A
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Junction temperature (see Note 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Operating free-air temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C
A
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. Voltage values are with respect to the switched-capacitor block GND pin.
2. Voltage values, except differential voltages, are with respect to the midpoint between V
3. Differential voltages are at IN+ with respect to IN−.
and V
CC−
.
CC+
4. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
5. The devices are functional up to the absolute maximum junction temperature.
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING FACTOR
T
= 70°C
T = 85°C
A
POWER RATING
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING
A
DW
1025 mW
8.2 mW/°C
656 mW
533 mW
recommended operating conditions
MIN
3.5
−1
MAX
15
UNIT
Supply voltage, V
/V
V
CC+ IN
V
V
=
5 V
5
CC
Common-mode input voltage, V
IC
V
=
15 V
−11
0
15
CC
Output current at V
, I
Operating free-air temperature, T
100
85
mA
OUT O
−40
°C
A
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
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SLOS127 − JUNE 1993
OPERATIONAL AMPLIFIER SECTION
electrical characteristics at specified free-air temperature, V = 5 V (unless otherwise noted)
CC
†
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
7.5
9
UNIT
T
A
25°C
Full range
Full range
25°C
0.9
V
IO
Input offset voltage
mV
V
R
= 0,
V
= 0,
IC
S
O
O
= 50 Ω
α
VIO
Temperature coefficient of input offset voltage
Input offset current
2.4
5
25 µV/°C
100
I
IO
pA
Full range
25°C
950
175
2
V
IC
= 0,
V
= 0,
See Figure 4
pA
nA
15
I
IB
Input bias current
Full range
5
to
5
to
25°C
−1.9
−1
R
= 50 Ω
V
Common-mode input voltage range
V
V
S
ICR
5
to
−0.8
Full range
25°C
Full range
25°C
3.8
3.7
4.1
3.9
I
O
I
O
I
O
I
O
I
O
I
O
= −200 µA
= −2 mA
= −20 mA
= 200 µA
= 2 mA
3.5
V
OM+
Maximum positive peak output voltage swing
Maximum negative peak output voltage swing
Large-signal differential voltage amplification
Full range
25°C
3.4
1.5
2.3
Full range
25°C
1.5
−3.8
−3.7
−3.5
−3.4
−1.5
−1.5
75
−4.2
−4.1
−2.4
91
Full range
25°C
V
OM−
V
Full range
25°C
= 20 mA
Full range
25°C
R
R
R
= 600 Ω
= 2 kΩ
L
L
L
Full range
25°C
74
85
100
106
A
VD
V
O
=
2.3 V
dB
Full range
25°C
84
90
= 10 kΩ
Full range
25°C
89
12
10
Ω
r
Input resistance
V
V
= 0
i
IC
Common mode
Differential
25°C
11
2.5
80
= 0,
IC
c
z
Input capacitance
pF
i
See Figure 5
25°C
Ω
Open-loop output impedance
f = 1 MHz
25°C
o
25°C
70
89
V
= 0,
V
R
= V min,
ICR
O
IC
S
CMRR Common-mode rejection ratio
dB
dB
= 50 Ω
Full range
68
82
25°C
99
V
V
=
= 0
5 V to 15 V,
= 50 Ω
CC
k
Supply-voltage rejection ratio (∆V
/∆V )
IO
SVR
CC
R
S
Full range
25°C
80
O
O
IC
2.7
2.9
3.6
3.6
I
Supply current (both channels)
Crosstalk attenuation
V
V
= 0,
No load
mA
dB
CC
Full range
= 0,
= 0
a
25°C
120
−35
45
R
= 2 kΩ
x
L
V
ID
V
ID
= 1 V
I
Short-circuit output current
V
O
25°C
mA
OS
= −1 V
†
Full range is −40°C to 85°C.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂꢃ ꢄꢅ ꢃ
ꢆꢇ ꢈꢆ ꢉꢊꢋꢂ ꢂꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋꢐꢀ ꢌꢐꢑ ꢁ ꢒ ꢋꢂꢓ ꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋ ꢁꢇ ꢎꢇ ꢂꢓ
ꢕ ꢇꢀ ꢆ ꢊꢕ ꢇ ꢀꢖ ꢆꢂꢌꢉꢖꢑ ꢋꢑꢖꢇ ꢀꢒ ꢓ ꢗꢒ ꢁꢀꢑꢈ ꢂ ꢖꢒꢏ ꢗ ꢂꢓ ꢀꢂ ꢓ
SLOS127 − JUNE 1993
operating characteristics at specified free-air temperature, V
= 5 V
CC
†
PARAMETER
TEST CONDITIONS
MIN
20
TYP
MAX
UNIT
T
A
25°C
Full range
25°C
35
SR+
SR−
Positive slew rate
V/µs
V
A
C
= 2.3 V,
O(PP)
= −1,
R = 2 kΩ,
L
See Figure 1
VD
= 100 pF,
38
L
Negative slew rate
Settling time
V/µs
µs
Full range
20
A
= −1,
VD
2-V step,
To 10 mV
To 1 mV
0.25
0.4
25°C
25°C
R
C
= 1 kΩ,
= 100 pF
L
L
f = 10 Hz
28
nV/√Hz
V
n
Equivalent input noise voltage
f = 10 kHz
11.6
R
= 20 Ω,
f = 10 Hz to
10 kHz
S
6
See Figure 3
V
I
Peak-to-peak equivalent input noise voltage
Equivalent input noise current
25°C
µV
N(PP)
f = 0.1 Hz to
10 Hz
0.6
2.8
V
V
= 0,
f = 10 kHz
25°C
25°C
fA/√Hz
n
IC
A
R
= 10,
= 2 kΩ,
= 5 V,
VD
L
O(PP)
f = 1 k Hz,
= 25Ω
THD + N Total harmonic distortion plus noise
0.013%
R
S
V = 10 mV,
R
= 2 kΩ,
I
L
B
B
Unity-gain bandwidth
25°C
25°C
25°C
9.4
2.8
56°
MHz
MHz
1
C
= 25 pF,
See Figure 2
L
V
R
= 4 V,
A
= −1,
= 25 pF
O(PP)
= 2 kΩ,
VD
Maximum output-swing bandwidth
Phase margin at unity gain
OM
C
L
L
L
V = 10 mV,
R
= 2 kΩ,
I
L
φ
m
C
= 25 pF,
See Figure 2
†
Full range is 40°C to 85°C.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢃ
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ꢕꢇ ꢀ ꢆ ꢊꢕ ꢇ ꢀ ꢖꢆ ꢂ ꢌꢉꢖꢑ ꢋꢑꢖ ꢇ ꢀꢒ ꢓ ꢗ ꢒꢁꢀꢑꢈꢂ ꢖꢒ ꢏꢗꢂ ꢓꢀ ꢂꢓ
SLOS127 − JUNE 1993
electrical characteristics at specified free-air temperature, V
= 15 V (unless otherwise noted)
CC
†
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
7.5
9
UNIT
T
A
25°C
Full range
Full range
25°C
1.1
V
IO
Input offset voltage
mV
V
R
= 0,
V
= 0,
IC
S
O
O
= 50 Ω
α
VIO
Temperature coefficient of input offset voltage
Input offset current
2.4
6
25 µV/°C
100
I
IO
pA
Full range
25°C
950
175
2.5
V
IC
= 0,
V
= 0,
See Figure 4
20
pA
nA
I
IB
Input bias current
Full range
15 to
−11 −11.9
15 to
25°C
V
Common-mode input voltage range
R
= 50 Ω
V
V
ICR
S
15 to
Full range
−10.8
13.8
13.7
13.5
13.4
11.5
11.5
25°C
Full range
25°C
14.1
13.9
12.3
I
O
I
O
I
O
I
O
I
O
I
O
= −200 µA
= −2 mA
= −20 mA
= 200 µA
= 2 mA
V
OM+
Maximum positive peak output voltage swing
Full range
25°C
Full range
25°C
−13.8 −14.2
Full range −13.7
25°C −13.5
Full range −13.4
25°C −11.5 −12.4
Full range −11.5
−14
V
OM−
Maximum negative peak output voltage swing
V
= 20 mA
25°C
Full range
25°C
75
74
90
89
90
89
96
R
R
R
= 600 Ω
= 2 kΩ
L
L
L
109
A
VD
Large-signal differential voltage amplification
Input resistance
V
=
10 V
dB
O
Full range
25°C
118
12
= 10 kΩ
Full range
25°C
Ω
r
V
V
= 0
10
i
IC
Common mode
Differential
25°C
7.5
2.5
80
= 0,
IC
c
z
Input capacitance
pF
i
See Figure 5
25°C
Ω
Open-loop output impedance
f = 1 MHz
25°C
o
25°C
80
98
V
= 0,
V
R
= V min,
ICR
O
IC
S
CMRR Common-mode rejection ratio
dB
dB
= 50 Ω
Full range
25°C
79
82
99
V
V
=
= 0,
5 V to 15 V,
= 50 Ω
CC
O
k
Supply-voltage rejection ratio (∆V
/∆V )
IO
SVR
CC
R
S
Full range
25°C
80
2.7
3.1
3.6
3.6
I
Supply current (both channels)
Crosstalk attenuation
V
V
= 0,
No load
mA
dB
CC
O
Full range
= 0,
= 0
a
25°C
120
−45
48
R
= 2 kΩ
IC
x
L
V
V
= 1 V
−30
30
ID
I
Short-circuit output current
V
O
25°C
mA
OS
= −1 V
ID
†
Full range is −40°C to 85°C.
6
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SLOS127 − JUNE 1993
operating characteristics at specified free-air temperature, V
= 15 V
CC
†
PARAMETER
TEST CONDITIONS
MIN
25
TYP MAX
UNIT
T
A
25°C
Full range
25°C
40
SR+
SR−
Positive slew rate
V/µs
V
A
C
= 10 V,
O(PP)
= −1,
20
R = 2 kΩ,
L
See Figure 1
VD
= 100 pF,
25
45
L
Negative slew rate
Settling time
V/µs
µs
Full range
20
A
= −1,
VD
10-V step,
To 10 mV
To 1 mV
0.4
1.5
25°C
25°C
R
C
= 1kΩ,
= 100 pF
L
L
f = 10 Hz
28
nV/√Hz
V
n
Equivalent input noise voltage
f = 10 kHz
11.6
R
= 20 Ω,
f = 10 Hz to
10 kHz
S
6
See Figure 3
V
I
Peak-to-peak equivalent input noise voltage
Equivalent input noise current
25°C
µV
N(PP)
f = 0.1 Hz to
10 Hz
0.6
2.8
V
V
= 0,
f = 10 kHz
25°C
25°C
fA/√Hz
n
IC
A
R
= 10,
= 2 kΩ,
= 20 V,
VD
L
O(PP)
f = 1 kHz,
= 25Ω
THD + N Total harmonic distortion plus noise
0.008%
R
S
V = 10 mV,
R
= 2 kΩ,
I
L
B
B
Unity-gain bandwidth
25°C
25°C
25°C
8
10
637
57°
MHz
kHz
1
C
= 25 pF,
See Figure 2
L
V
R
= 20 V,
A
= −1,
= 25 pF
O(PP)
= 2 kΩ,
VD
Maximum output-swing bandwidth
Phase margin at unity gain
478
OM
C
L
L
L
V = 10 mV,
R
= 2 kΩ,
I
L
φ
m
C
= 25 pF,
See Figure 2
†
Full range is −40°C to 85°C.
7
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SLOS127 − JUNE 1993
SWITCHED-CAPACITOR SECTION
electrical characteristics over recommended supply voltage range (unless otherwise noted)
†
‡
PARAMETER
TEST CONDITIONS
T
A
MIN
−3.75
−4.7
TYP
MAX
UNIT
V
V
V
V
V
V
= 5 V, T =25°C, R (V
) = 500 Ω, See Note 6
) = 500 Ω, See Note 7
) = 500 Ω, See Note 6
) = 500 Ω, See Note 7
) = 100 Ω to 500 Ω
25°C
−4 −4.25
Regulated output voltage,
CC
CC
CC
CC
CC
CC
J
L
OUT
OUT
OUT
OUT
OUT
OUT
V
V
OUT
= 7 V, T =25°C, R (V
25°C
−5
7
−5.2
27
J
L
= 5 V to 15 V,
R (V
L
Full range
Full range
Full range
Full range
Full range
Input regulation
mV
mV
V
= 7 V to 12 V,
= 5 V,
R (V
L
5
25
R (V
L
20
140
70
Output regulation
= 7 V,
R (V
L
) = 100 Ω to 500 Ω
20
I
= 10 mA
0.35
1.1
10
0.55
1.8
Voltage loss, V
(see Note 8)
− V
OUT
V
C
= 7 V,
O
O
CC
CC
= C = 100-µF tantalum
IN OUT
∆I = 10 mA to 100 mA,
I
= 100 mA Full range
Output resistance
See Note 9
Full range
Full range
25°C
15
Ω
O
Oscillator frequency
15
2.35
2.25
2.35
2.25
25
35
kHz
2.5
2.65
2.75
2.65
2.75
V
V
= 5 V,
= 7 V,
I
I
= 50 µA
= 60 µA
CC
ref
Full range
25°C
Reference voltage, V
V
ref
2.5
CC
ref
Full range
25°C
Maximum switch current
300
mA
†
‡
Data applies for the switched-capacitor block only. Amplifier block is not connected.
Full range is −40°C to 85°C.
NOTES: 6. Regulation specifications are for the switched-capacitor section connected as a positive to negative converter/regulator
(see Figure 105) with R1 = 23.7 kΩ, R2 = 102.2 kΩ, C = 10 µF (tantalum), C = 100 µF (tantalum), and C1 = 0.002 µF.
IN OUT
7. Regulation specifications are for the switched-capacitor section connected as a positive to negative converter/regulator
(see Figure 105) with R1 = 20 kΩ, R2 = 102.5 kΩ, C = 10 µF (tantalum), C = 100 µF (tantalum) and C1 = 0.002 µF.
IN OUT
8. For voltage-loss tests, the switched-capacitor section is connected as a voltage inverter, with V
and 9) unconnected. The voltage losses may be higher in other configurations.
, OSC, and FB/SD (pins 6, 7,
REF
9. Output resistance is defined as the slope of the curve (∆V vs ∆I ) for output currents of 10 mA to 100 mA. This represents the linear
O
O
portion of the curve. The incremental slope of the curve are higher at currents less than 10 mA due to the characteristics of the switch
transistors.
AMPLIFIER AND SWITCHED-CAPACITOR SECTIONS CONNECTED
electrical characteristics, V = V
IN
= 5 V, T = 25°C (see Figure 6)
CC+
A
PARAMETER
TEST CONDITIONS
MIN
TYP
4.1
MAX
UNIT
R
R
R
R
R
R
= 10 kΩ
= 600 Ω
= 100 Ω
= 10 kΩ
= 600 Ω
= 100 Ω
L
L
L
L
L
L
3.6
V
Maximum positive peak output voltage swing
V
OM+
OM−
2.3
−3.9
−3.3
−1.9
0.55
0.65
0.9
V
Maximum negative peak output voltage swing
V
V
R
R
R
= 10 kΩ
= 600 Ω
= 100 Ω
L
L
L
V
ID
= −100 mV,
= C = 100-µF tantalum
Voltage loss, V − |V
IN OUT
| (see Note 8)
C
IN
OUT
NOTE 8: For voltage-loss tests, the switched-capacitor section is connected as a voltage inverter, with V
and 9) unconnected. The voltage losses may be higher in other configurations.
, OSC, and FB/SD (pins 6, 7,
REF
8
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SLOS127 − JUNE 1993
supply current (no load), T = 25°C
A
PARAMETER
TEST CONDITIONS
MIN
TYP
8.9
MAX
UNIT
mA
Supply current
V
V
= 5 V,
= 5 V,
V
V
= 5 V,
= 5 V,
V
V
= 2.5 V,
= 0 V
V
O
= 0
CC+
IN
FB/SD
Supply current in shutdown
2.5
mA
CC+
IN
FB/SD
PARAMETER MEASUREMENT INFORMATION
10 kΩ
2 kΩ
V
CC+
V
CC+
V
O
2 kΩ
100Ω
V
I
V
I
−
+
−
+
V
O
†
C
L
V
CC−
V
CC−
R
†
C
L
L
R
L
†
†
Includes fixture capacitance
Includes fixture capacitance
Figure 2. Unity-Gain Bandwidth
and Phase-Margin Test Circuit
Figure 1. Slew-Rate Test Circuit
2 kΩ
V
CC+
Ground Shield
V
CC+
−
V
O
−
+
V
O
+
V
CC−
Picoammeters
R
R
S
V
CC−
S
Figure 4. Input-Bias and
Offset-Current Test Circuit
Figure 3. Noise-Voltage Test Circuit
V
CC+
IN−
IN+
−
C
V
O
id
+
C
C
V
CC−
ic
ic
Figure 5. Internal Input Capacitance
9
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SLOS127 − JUNE 1993
PARAMETER MEASUREMENT INFORMATION
typical values
Typical values presented in this data sheet represent the median (50% point) of device parametric performance.
input bias and offset current
At the picoampere bias-current level typical of the TLE2682, accurate measurement of the bias currents
becomes difficult. Not only does this measurement require a picoammeter, but test socket leakages can easily
exceed the actual device bias currents. To accurately measure these small currents, Texas Instruments uses
a two-step process. The socket leakage is measured using picoammeters with bias voltages applied, but with
no device in the socket. The device is then inserted in the socket, and a second test is performed that measures
both the socket leakage and the device input bias current (see Figure 6). The two measurements are then
subtracted algebraically to determine the bias current of the device.
R
L
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1 OUT
1 IN−
1 IN+
V
+
5 V
2 µF
CC
+
0.1 µF
2 OUT
2 IN−
2 IN+
CAP−
GND
R
L
V
CC−
V
OUT
V
REF
TLE2682
C
OUT
0.1 µF
+
C
IN
1N4933
+
OSC
CAP+
FB/SD
V
IN
Figure 6. Bias-Current Test Circuit
10
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SLOS127 − JUNE 1993
TYPICAL CHARACTERISTICS
Table of Graphs for Operational Amplifier Section
FIGURE
V
Input offset voltage
Distribution
7
8
IO
α
VIO
Temperature coefficient of input offset voltage
Input offset current
Distribution
I
IO
vs Free-air temperature
9, 10
vs Free-air temperature
vs Supply voltage
9, 10
11
I
IB
Input bias current
V
V
Common-mode input voltage range
Differential input voltage
vs Free-air temperature
vs Output voltage
12
IC
13, 14
ID
vs Output current
vs Free-air temperature
vs Supply voltage
15
17, 18
19
V
Maximum positive peak output voltage
Maximum negative peak output voltage
OM+
OM−
vs Output current
vs Free-air temperature
vs Supply voltage
16
17, 18
19
V
V
V
Maximum peak-to-peak output voltage
Output voltage
vs Frequency
20
21
O(PP)
vs Settling time
O
vs Load resistance
vs Free-air temperature
vs Frequency
22
23, 24
25, 26
A
VD
Large-signal differential voltage amplification
vs Frequency
vs Free-air temperature
27
28
CMRR
Common-mode rejection ratio
Supply voltage rejection ratio
vs Frequency
vs Free-air temperature
29
30
k
SVR
vs Supply voltage
vs Free-air temperature
vs Differential input voltage
31
32
33, 34
I
Supply current
CC
vs Supply voltage
vs Time
vs Free-air temperature
35
36
37
I
Short-circuit output current
OS
vs Free-air temperature
vs Load resistance
vs Differential input voltage
38, 39
40
41
SR
Slew rate
V
V
Equivalent input noise voltage
vs Frequency
42
n
vs Noise bandwidth
Over a 10-second time interval
43
44
Input-referred noise voltage
n
Third-octave spectral noise density
vs Frequency
45
46, 47
48
THD +N Total harmonic distortion plus noise
vs Frequency
B
1
Unity-gain bandwidth
vs Load capacitance
vs Free-air temperature
vs Supply voltage
49
50
Gain-bandwidth product
Gain margin
A
vs Load capacitance
51
m
m
vs Free-air temperature
vs Supply voltage
vs Load capacitance
52
53
54
φ
Phase margin
Phase shift
vs Frequency
25, 26
11
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SLOS127 − JUNE 1993
TYPICAL CHARACTERISTICS
Table of Graphs for Operational Amplifier Section (Continued)
FIGURE
Large-signal pulse response, noninverting
Small-signal pulse response
Output impedance
vs Time
55
56
57
58
vs Time
z
vs Frequency
vs Frequency
o
a
Crosstalk attenuation
x
Table of Graphs for Switched-Capacitor Section
FIGURE
59
Shutdown threshold voltage
vs Free-air temperature
vs Input voltage
I
f
Supply current
60
CC
Oscillator frequency
Supply current in shutdown
Average supply current
Output voltage loss
Output voltage loss
Regulated output voltage
Reference voltage change
Voltage loss
vs Free-air temperature
vs Input voltage
61
osc
62
I
vs Output current
63
avg
vs Input capacitance
vs Oscillator frequency
vs Free-air temperature
vs Free-air temperature
vs Output current
64
65, 66
67
V
O
∆V
REF
68
69
12
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SLOS127 − JUNE 1993
†
TYPICAL CHARACTERISTICS
OPERATIONAL AMPLIFIER SECTION
DISTRIBUTION OF TLE2682 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT
DISTRIBUTION OF TLE2682
INPUT OFFSET VOLTAGE
30
27
24
21
18
15
12
9
20
18
16
14
12
10
8
310 Amplifiers
600 Units Tested From One Wafer Lot
V
T
=
15 V
CC
V
CC
= 15 V
= − 40 to 85°C
A
T
A
= 25°C
6
6
3
0
4
2
0
− 24 −18 −12 − 6
0
6
12 18
24 30
− 4
− 2.4
− 0.8
0.8
2.4
4
− Input Offset Voltage − mV
α
VIO
− Temperature Coefficient − µV/°C
V
IO
Figure 7
Figure 8
INPUT BIAS CURRENT AND
INPUT OFFSET CURRENT
vs
INPUT BIAS CURRENT AND
INPUT OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
100
100
10
V
V
V
= 15 V
= 0
= 0
V
= 5 V
CC
IC
O
CC
V
IC
V
O
= 0
= 0
10
1
1
I
IB
0.1
0.01
0.1
I
IB
I
IO
I
IO
0.01
0.001
0.001
25
45
65
85
−55 −35 −15
5
25
45
65
85
−55 −35
−15
A
5
T
− Free-Air Temperature − °C
T
A
− Free-Air Temperature − °C
Figure 9
Figure 10
†
Data applies to the operational amplifier block only. Switched-capacitor block is not supplying V
supply.
CC−
13
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ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢃ
ꢆ ꢇꢈ ꢆꢉꢊ ꢋꢂꢂ ꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋ ꢐꢀ ꢌꢐ ꢑꢁ ꢒ ꢋꢂ ꢓꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋꢁ ꢇꢎ ꢇꢂ ꢓ
ꢕꢇ ꢀ ꢆ ꢊꢕ ꢇ ꢀ ꢖꢆ ꢂ ꢌꢉꢖꢑ ꢋꢑꢖ ꢇ ꢀꢒ ꢓ ꢗ ꢒꢁꢀꢑꢈꢂ ꢖꢒ ꢏꢗꢂ ꢓꢀ ꢂꢓ
SLOS127 − JUNE 1993
†
TYPICAL CHARACTERISTICS
OPERATIONAL AMPLIFIER SECTION
INPUT BIAS CURRENT
vs
COMMON-MODE INPUT VOLTAGE RANGE
vs
SUPPLY VOLTAGE
TEMPERATURE
6
10
V
+0.5
CC+
−0.5
CC+
V
IC
max = V
CC+
R
= 50 Ω
S
T
A
= 85°C
V
5
4
10
10
V min
IC
V
IC
max
V
V
CC+
3
2
10
10
+3.5
+3
CC−
V
IC
min
V
CC−
T
A
= 25°C
10
1
V
+2.5
CC−
T
= −40°C
A
V
+2
CC−
25
45
65
85
−55
−35
T
−15
5
0
5
10
15
20
25
30
35
− Free-Air Temperature − °C
V
− Total Supply Voltage (Referred to V
) − V
A
CC
CC−
Figure 11
Figure 12
DIFFERENTIAL INPUT VOLTAGE
DIFFERENTIAL INPUT VOLTAGE
vs
vs
OUTPUT VOLTAGE
OUTPUT VOLTAGE
400
300
400
300
V
= 5 V
V
=
= 0
= 50 Ω
= 25°C
15 V
CC
= 0
CC
V
R
T
V
R
T
IC
IC
= 50 Ω
= 25°C
S
S
A
A
R
= 600 Ω
R = 600 Ω
L
L
200
200
100
0
100
0
R = 2 kΩ
L
R
= 2 kΩ
L
R
L
= 10 kΩ
R
= 10 kΩ
L
R
= 10 kΩ
L
R
= 10 kΩ
L
− 100
− 200
− 300
− 400
− 100
− 200
− 300
− 400
R
= 2 kΩ
L
R
= 2 kΩ
L
R
= 600 Ω
L
R
= 600 Ω
L
− 5 − 4 − 3 − 2 − 1
0
1
2
3
4
5
− 15
− 10
− 5
0
5
10
15
V
O
− Output Voltage − V
V
O
− Output Voltage − V
Figure 13
Figure 14
†
Data applies to the operational amplifier block only. Switched-capacitor block is not supplying V
supply.
CC−
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂꢃ ꢄꢅ ꢃ
ꢆꢇ ꢈꢆ ꢉꢊꢋꢂ ꢂꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋꢐꢀ ꢌꢐꢑ ꢁ ꢒ ꢋꢂꢓ ꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋ ꢁꢇ ꢎꢇ ꢂꢓ
ꢕ ꢇꢀ ꢆ ꢊꢕ ꢇ ꢀꢖ ꢆꢂꢌꢉꢖꢑ ꢋꢑꢖꢇ ꢀꢒ ꢓ ꢗꢒ ꢁꢀꢑꢈ ꢂ ꢖꢒꢏ ꢗ ꢂꢓ ꢀꢂ ꢓ
SLOS127 − JUNE 1993
†
TYPICAL CHARACTERISTICS
OPERATIONAL AMPLIFIER SECTION
MAXIMUM NEGATIVE PEAK OUTPUT VOLTAGE
MAXIMUM POSITIVE PEAK OUTPUT VOLTAGE
vs
vs
OUTPUT CURRENT
OUTPUT CURRENT
− 15
15
− 13.5
− 12
− 10.5
− 9
13.5
12
T
= −40°C
= 25°C
A
T
A
= −40°C
10.5
9
T
A
− 7.5
− 6
7.5
6
T
= 25°C
= 85°C
A
T
A
= 85°C
− 4.5
4.5
T
A
− 3
− 1.5
0
3
1.5
0
V =
15 V
10 15 20 25 30 35 40 45 50
V
CC
=
15 V
CC
0
5
0
− 5 −10 −15 − 20 − 25 − 30 − 35 − 40 − 45 − 50
I − Output Current − mA
O
I
O
− Output Current − mA
Figure 15
Figure 16
MAXIMUM PEAK OUTPUT VOLTAGE
MAXIMUM PEAK OUTPUT VOLTAGE
vs
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
5
4
15
14.5
14
I
= −200 µA
O
I
O
= 200 µA
I
O
= −200 µA
I
= −2 mA
O
3
I
= 2 mA
2
O
13.5
13
I
O
= −20 mA
I
= −2 mA
O
1
I
= 20 mA
O
V
CC
= 5 V
0
12.5
12
I
O
= −20 mA
− 1
− 2
I
= 20 mA
O
11.5
− 3
− 4
− 5
11
10.5
10
I
O
= 2 mA
25
V
CC
=
15 V
I
= 200 µA
O
45
65
85
−55
−35
−15
5
25
45
65
85
− 55 − 35 − 15
5
T
A
− Free-Air Temperature − °C
T
A
− Free-Air Temperature − °C
Figure 17
Figure 18
†
Data applies to the operational amplifier block only. Switched-capacitor block is not supplying V
supply.
CC−
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢃ
ꢆ ꢇꢈ ꢆꢉꢊ ꢋꢂꢂ ꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋ ꢐꢀ ꢌꢐ ꢑꢁ ꢒ ꢋꢂ ꢓꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋꢁ ꢇꢎ ꢇꢂ ꢓ
ꢕꢇ ꢀ ꢆ ꢊꢕ ꢇ ꢀ ꢖꢆ ꢂ ꢌꢉꢖꢑ ꢋꢑꢖ ꢇ ꢀꢒ ꢓ ꢗ ꢒꢁꢀꢑꢈꢂ ꢖꢒ ꢏꢗꢂ ꢓꢀ ꢂꢓ
SLOS127 − JUNE 1993
†
TYPICAL CHARACTERISTICS
OPERATIONAL AMPLIFIER SECTION
MAXIMUM PEAK OUTPUT VOLTAGE
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
vs
SUPPLY VOLTAGE
FREQUENCY
30
25
20
15
10
5
V
= 15 V
CC
T
= 25°C
R
= 2 kΩ
A
L
T
A
= 25°C,
85°C
I
O
= −200 µA
25
20
15
10
I
O
= −2 mA
T
A
= −40°C
I
O
= −20 mA
0
I
O
= 20 mA
− 5
−10
T
= 25°C,
85°C
5 V
A
I
= 200 µA
O
V
CC
=
I
O
= 2 mA
−15
− 20
− 25
5
0
T
A
= −40°C
0
2.5
5
7.5
10
12.5
15
17.5
100 k 200 k 400 k
1 M
2 M
4 M
10 M
|V
CC
| − Supply Voltage − V
f − Frequency − Hz
Figure 19
Figure 20
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
OUTPUT VOLTAGE
vs
SETTLING TIME
LOAD RESISTANCE
125
12.5
10
V
= 0
IC
S
R = 50 Ω
T = 25°C
A
10 mV
120
115
7.5
5
1mV
V
=
15 V
V
CC
= 15 V
CC
2.5
0
Rising
Falling
R
C
= 1 kΩ
= 100 pF
= −1
110
L
L
A
V
A
105
100
T
= 25°C
− 2.5
V
CC
= 5 V
− 5
− 7.5
− 10
1mV
10 mV
95
90
− 12.5
0.1
1
10
100
0
0.5
1
1.5
2
Settling Time − µs
R
− Load Resistance − kΩ
L
Figure 21
Figure 22
†
Data applies to the operational amplifier block only. Switched-capacitor block is not supplying V
supply.
CC−
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂꢃ ꢄꢅ ꢃ
ꢆꢇ ꢈꢆ ꢉꢊꢋꢂ ꢂꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋꢐꢀ ꢌꢐꢑ ꢁ ꢒ ꢋꢂꢓ ꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋ ꢁꢇ ꢎꢇ ꢂꢓ
ꢕ ꢇꢀ ꢆ ꢊꢕ ꢇ ꢀꢖ ꢆꢂꢌꢉꢖꢑ ꢋꢑꢖꢇ ꢀꢒ ꢓ ꢗꢒ ꢁꢀꢑꢈ ꢂ ꢖꢒꢏ ꢗ ꢂꢓ ꢀꢂ ꢓ
SLOS127 − JUNE 1993
†
TYPICAL CHARACTERISTICS
OPERATIONAL AMPLIFIER SECTION
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
110
107
104
101
98
125
121
117
113
109
105
101
97
V
V
=
10 V
15 V
CC
O
=
R
= 10 kΩ
L
R
= 10 kΩ
L
R
= 2 kΩ
L
R
= 2 kΩ
L
95
92
R
= 600 Ω
R
= 600 Ω
L
L
89
86
83
80
93
89
85
V
V
=
2.3 V
5 V
CC
O
=
− 55 − 35
−15
5
25
45
65
− 55 − 35
−15
5
25
45
65
85
T
A
− Free-Air Temperature − °C
T
A
− Free-Air Temperature − °C
Figure 23
Figure 24
SMALL-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
140
120
0°
V
=
15 V
CC
20°
40°
60°
R
C
= 2 kΩ
L
L
Gain
= 100 pF
= 25°C
100
80
60
40
20
0
T
A
Phase Shift
80°
100°
120°
140°
− 20
− 40
160°
180°
1
10 100 1 k 10 k 100 k 1 M 10 M 100 M
f − Frequency − Hz
Figure 25
†
Data applies to the operational amplifier block only. Switched-capacitor block is not supplying V
supply.
CC−
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢃ
ꢆ ꢇꢈ ꢆꢉꢊ ꢋꢂꢂ ꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋ ꢐꢀ ꢌꢐ ꢑꢁ ꢒ ꢋꢂ ꢓꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋꢁ ꢇꢎ ꢇꢂ ꢓ
ꢕꢇ ꢀ ꢆ ꢊꢕ ꢇ ꢀ ꢖꢆ ꢂ ꢌꢉꢖꢑ ꢋꢑꢖ ꢇ ꢀꢒ ꢓ ꢗ ꢒꢁꢀꢑꢈꢂ ꢖꢒ ꢏꢗꢂ ꢓꢀ ꢂꢓ
SLOS127 − JUNE 1993
†
TYPICAL CHARACTERISTICS
OPERATIONAL AMPLIFIER SECTION
SMALL-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
30
20
10
0
80°
100°
120°
140°
C
= 100 pF
L
Phase Shift
= 25 pF
C
L
Gain
= 100 pF
C
L
V
V
R
= 15 V
CC
= 0
C
= 25 pF
L
− 10
− 20
160°
180°
IC
= 2 kΩ
= 25°C
C
T
A
1
2
4
10
20
40
100
f − Frequency − MHz
Figure 26
COMMON-MODE REJECTION RATIO
COMMON-MODE REJECTION RATIO
vs
vs
FREQUENCY
FREE-AIR TEMPERATURE
100
90
80
70
60
50
40
30
100
V
CC
= 15 V
97
94
91
88
85
82
79
V
=
15 V
5 V
CC
V
CC
= 5 V
V
CC
=
V
V
= 0
= 0
= 50 Ω
= 25°C
IC
O
S
20
10
0
76
73
70
V
V
R
= V
= 0
= 50 Ω
min
−15
IC
O
S
ICR
R
T
A
10
100
1 k
10 k
100 k
1 M
10 M
− 55 − 35
5
25
45
65
85
f − Frequency − Hz
T
A
− Free-Air Temperature − °C
Figure 27
Figure 28
†
Data applies to the operational amplifier block only. Switched-capacitor block is not supplying V
supply.
CC−
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂꢃ ꢄꢅ ꢃ
ꢆꢇ ꢈꢆ ꢉꢊꢋꢂ ꢂꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋꢐꢀ ꢌꢐꢑ ꢁ ꢒ ꢋꢂꢓ ꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋ ꢁꢇ ꢎꢇ ꢂꢓ
ꢕ ꢇꢀ ꢆ ꢊꢕ ꢇ ꢀꢖ ꢆꢂꢌꢉꢖꢑ ꢋꢑꢖꢇ ꢀꢒ ꢓ ꢗꢒ ꢁꢀꢑꢈ ꢂ ꢖꢒꢏ ꢗ ꢂꢓ ꢀꢂ ꢓ
SLOS127 − JUNE 1993
†
TYPICAL CHARACTERISTICS
OPERATIONAL AMPLIFIER SECTION
SUPPLY-VOLTAGE REJECTION RATIO
SUPPLY-VOLTAGE REJECTION RATIO
vs
vs
FREQUENCY
FREE-AIR TEMPERATURE
120
100
80
120
114
108
102
96
k
SVR+
k
SVR+
60
40
k
SVR−
90
k
SVR−
84
78
20
0
∆V
CC
=
5 V to 15 V
V
= 0
= 0
= 50 Ω
= 25°C
IC
72
66
60
V
R
O
V
V
R
= 0
= 0
= 50 Ω
IC
O
S
S
T
A
− 20
10
100
1 k
10 k
100 k
1 M
10 M
− 55 − 35
−15
5
25
45
65
85
f − Frequency − Hz
T
A
− Free-Air Temperature − °C
Figure 29
Figure 30
SUPPLY CURRENT
vs
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
4
3.8
3.6
3.4
3.2
3
3.5
3.4
3.3
3.2
3.1
V
V
= 0
= 0
V
V
= 0
= 0
IC
O
IC
O
No Load
No Load
T
A
= 85°C
V
=
15 V
5 V
CC
3
2.9
2.8
T
A
= 25°C
V
=
CC
2.8
2.6
T
= −40°C
A
2.4
2.2
2
2.7
2.6
2.5
0
2.5
5
7.5
10
12.5
15
17.5
− 55 − 35 − 15
5
25
45
65
85
|V
CC
| − Supply Voltage − V
T
A
− Free-Air Temperature − °C
Figure 31
Figure 32
†
Data applies to the operational amplifier block only. Switched-capacitor block is not supplying V
supply.
CC−
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢃ
ꢆ ꢇꢈ ꢆꢉꢊ ꢋꢂꢂ ꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋ ꢐꢀ ꢌꢐ ꢑꢁ ꢒ ꢋꢂ ꢓꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋꢁ ꢇꢎ ꢇꢂ ꢓ
ꢕꢇ ꢀ ꢆ ꢊꢕ ꢇ ꢀ ꢖꢆ ꢂ ꢌꢉꢖꢑ ꢋꢑꢖ ꢇ ꢀꢒ ꢓ ꢗ ꢒꢁꢀꢑꢈꢂ ꢖꢒ ꢏꢗꢂ ꢓꢀ ꢂꢓ
SLOS127 − JUNE 1993
†
TYPICAL CHARACTERISTICS
OPERATIONAL AMPLIFIER SECTION
SUPPLY CURRENT
vs
SUPPLY CURRENT
vs
DIFFERENTIAL INPUT VOLTAGE
DIFFERENTIAL INPUT VOLTAGE
14
12
25
20
15
10
V
V
V
T
= 5 V
= 0
= +4.5 V
IC
= 25°C
V
= 15 V
CC+
CC−
CC
= 0
V
T
IC
= 25°C
A
Open Loop
No Load
A
Open Loop
No Load
10
8
6
4
2
5
0
0
− 1.5
− 1
V
− 0.5
0
0.5
1
1.5
− 0.5
− 0.25
0
0.25
0.5
− Differential Input Voltage − V
V
− Differential Input Voltage − V
ID
ID
Figure 33
Figure 34
SHORT-CIRCUIT OUTPUT CURRENT
SHORT-CIRCUIT OUTPUT CURRENT
vs
vs
TIME
SUPPLY VOLTAGE
60
50
V
ID
= −1 V
48
36
40
30
20
V
ID
= −1 V
24
12
10
V
V
T
A
=
= 0
= 25°C
15 V
CC
O
V
T
A
= 0
= 25°C
O
0
0
−12
− 24
−10
− 20
− 30
V
ID
= 1 V
12.5
− 36
− 48
− 60
V
ID
= 1 V
− 40
− 50
0
2.5
5
7.5
10
15
17.5
0
60
120
180
|V
CC
| − Supply Voltage − V
t − Elapsed Time − s
Figure 35
Figure 36
†
Data applies to the operational amplifier block only. Switched-capacitor block is not supplying V
supply.
CC−
20
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂꢃ ꢄꢅ ꢃ
ꢆꢇ ꢈꢆ ꢉꢊꢋꢂ ꢂꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋꢐꢀ ꢌꢐꢑ ꢁ ꢒ ꢋꢂꢓ ꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋ ꢁꢇ ꢎꢇ ꢂꢓ
ꢕ ꢇꢀ ꢆ ꢊꢕ ꢇ ꢀꢖ ꢆꢂꢌꢉꢖꢑ ꢋꢑꢖꢇ ꢀꢒ ꢓ ꢗꢒ ꢁꢀꢑꢈ ꢂ ꢖꢒꢏ ꢗ ꢂꢓ ꢀꢂ ꢓ
SLOS127 − JUNE 1993
†
TYPICAL CHARACTERISTICS
OPERATIONAL AMPLIFIER SECTION
SHORT-CIRCUIT OUTPUT CURRENT
SLEW RATE
vs
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
45
43
41
39
37
35
33
31
80
64
48
32
16
V
R
C
= 5 V
= 2 kΩ
= 100 pF
CC
L
L
V
= −1 V
ID
V
=
15 V
5 V
CC
SR−
SR+
V
=
CC
− 16
− 32
V
V
=
=
5 V
CC
V
= 1 V
ID
29
27
25
− 48
− 64
− 80
15 V
CC
V
O
= 0
− 55 − 35
−15
5
25
45
65
85
− 55 − 35
−15
5
25
45
65
85
T
A
− Free-Air Temperature − °C
T
A
− Free-Air Temperature − °C
Figure 37
Figure 38
SLEW RATE
vs
SLEW RATE
vs
LOAD RESISTANCE
FREE-AIR TEMPERATURE
50
40
70
Rising Edge
V
R
C
=
15 V
CC
L
L
66
62
= 2 kΩ
= 100 pF
30
20
10
0
58
54
50
46
42
38
34
30
V
CC
V
O
=
15 V
10 V
V
CC
=
5 V
2.5 V
=
V
O
=
SR−
−10
A
C
T
A
= −1
= 100 pF
= 25°C
V
L
− 20
− 30
SR+
− 40
− 50
Falling Edge
100
1 k
10 k
100 k
− 55 − 35
−15
5
25
45
65
85
T
A
− Free-Air Temperature − °C
R
− Load Resistance − Ω
L
Figure 39
Figure 40
†
Data applies to the operational amplifier block only. Switched-capacitor block is not supplying V
supply.
CC−
21
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢃ
ꢆ ꢇꢈ ꢆꢉꢊ ꢋꢂꢂ ꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋ ꢐꢀ ꢌꢐ ꢑꢁ ꢒ ꢋꢂ ꢓꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋꢁ ꢇꢎ ꢇꢂ ꢓ
ꢕꢇ ꢀ ꢆ ꢊꢕ ꢇ ꢀ ꢖꢆ ꢂ ꢌꢉꢖꢑ ꢋꢑꢖ ꢇ ꢀꢒ ꢓ ꢗ ꢒꢁꢀꢑꢈꢂ ꢖꢒ ꢏꢗꢂ ꢓꢀ ꢂꢓ
SLOS127 − JUNE 1993
†
TYPICAL CHARACTERISTICS
OPERATIONAL AMPLIFIER SECTION
SLEW RATE
vs
EQUIVALENT INPUT NOISE VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
FREQUENCY
50
45
40
35
30
25
50
40
A
= −1
V
V
V
=
= 0
= 20 Ω
= 25°C
15 V
CC
IC
S
R
T
30
A
V
= 1
A
Rising Edge
20
V
V
C
=
15 V
10 V (10% − 90%)
10
CC
O
L
=
0
= 100 pF
= 25°C
T
A
20
15
10
5
−10
− 20
− 30
− 40
− 50
Falling Edge
A
V
= −1
A
V
= 1
0
10
100
1 k
10 k
0.1
0.4
1
4
10
f − Frequency − Hz
V
ID
− Differential Input Voltage − V
Figure 41
Figure 42
INPUT-REFERRED NOISE VOLTAGE
INPUT-REFERRED NOISE VOLTAGE
OVER A 10-SECOND TIME INTERVAL
vs
NOISE BANDWIDTH
1.2
100
10
V
V
R
=
= 0
= 20 Ω
= 25°C
15 V
CC
IC
S
V
=
15 V
CC
f = 0.1 to 10 Hz
0.9
0.6
T
A
= 25°C
T
A
Peak-to-Peak
0.3
1
0.1
RMS
0
− 0.3
− 0.6
0.01
0
1
2
3
4
5
6
7
8
9
10
100 k
1
10
100
1 k
10 k
t − Time − s
f − Frequency − Hz
Figure 43
Figure 44
†
Data applies to the operational amplifier block only. Switched-capacitor block is not supplying V
supply.
CC−
22
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂꢃ ꢄꢅ ꢃ
ꢆꢇ ꢈꢆ ꢉꢊꢋꢂ ꢂꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋꢐꢀ ꢌꢐꢑ ꢁ ꢒ ꢋꢂꢓ ꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋ ꢁꢇ ꢎꢇ ꢂꢓ
ꢕ ꢇꢀ ꢆ ꢊꢕ ꢇ ꢀꢖ ꢆꢂꢌꢉꢖꢑ ꢋꢑꢖꢇ ꢀꢒ ꢓ ꢗꢒ ꢁꢀꢑꢈ ꢂ ꢖꢒꢏ ꢗ ꢂꢓ ꢀꢂ ꢓ
SLOS127 − JUNE 1993
†
TYPICAL CHARACTERISTICS
OPERATIONAL AMPLIFIER SECTION
TOTAL HARMONIC DISTORTION PLUS
THIRD-OCTAVE SPECTRAL NOISE DENSITY
NOISE
vs
vs
FREQUENCY
FREQUENCY
− 75
− 80
− 85
1
Start Frequency: 12.5 Hz
Stop Frequency: 20 kHz
V
V
T
= 15 V
CC
= 0
IC
= 25°C
A
V
= 100, R = 600 Ω
L
A
0.1
− 90
− 95
A
V
= 100, R = 2 kΩ
L
A
V
= 10, R = 600 Ω
L
− 100
− 105
A
= 10, R = 2 kΩ
L
V
0.01
0.001
V
V
T
= 5 V
CC
= 5 V
PP
= 25°C
O
A
− 110
− 115
Filter: 10 Hz to 500-kHz Band Pass
10
100
1 k
10 k
100 k
10
15
20
25
30
35
40
45
f − Frequency − Hz
Frequency Bands
Figure 45
Figure 46
UNITY GAIN BANDWIDTH
vs
LOAD CAPACITANCE
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
FREQUENCY
13
1
Filter: 10 Hz to 500-kHz Band Pass
V
V
=
= 0
= 0
= 2 kΩ
= 25°C
15 V
CC
IC
V
V
T
A
=
15 V
CC
O
= 20 V
= 25°C
V
R
12
11
10
9
O
PP
L
T
A
0.1
0.01
A
V
= 100, R = 600 Ω
L
A
V
= 100, R = 2 kΩ
L
A
V
= 10, R = 600 Ω
L
A
V
= 10, R = 2 kΩ
L
8
7
0.001
0
20
C
40
60
80
100
10
100
1 k
10 k
100 k
− Load Capacitance − pF
f − Frequency − Hz
L
Figure 47
Figure 48
†
Data applies to the operational amplifier block only. Switched-capacitor block is not supplying V
supply.
CC−
23
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢃ
ꢆ ꢇꢈ ꢆꢉꢊ ꢋꢂꢂ ꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋ ꢐꢀ ꢌꢐ ꢑꢁ ꢒ ꢋꢂ ꢓꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋꢁ ꢇꢎ ꢇꢂ ꢓ
ꢕꢇ ꢀ ꢆ ꢊꢕ ꢇ ꢀ ꢖꢆ ꢂ ꢌꢉꢖꢑ ꢋꢑꢖ ꢇ ꢀꢒ ꢓ ꢗ ꢒꢁꢀꢑꢈꢂ ꢖꢒ ꢏꢗꢂ ꢓꢀ ꢂꢓ
SLOS127 − JUNE 1993
†
TYPICAL CHARACTERISTICS
OPERATIONAL AMPLIFIER SECTION
GAIN-BANDWIDTH PRODUCT
GAIN-BANDWIDTH PRODUCT
vs
FREE-AIR TEMPERATURE
vs
SUPPLY VOLTAGE
13
12
11
10
9
13
12
11
10
9
f = 100 kHz
f = 100 kHz
V
IC
V
O
= 0
= 0
V
IC
V
O
= 0
= 0
R
C
= 2 kΩ
= 100 pF
L
L
R
C
T
= 2 kΩ
= 100 pF
= 25°C
L
L
A
V
CC
=
15 V
V
CC
=
5 V
8
8
7
7
0
5
10
15
20
− 55 − 35
−15
5
25
45
65
85
|V| − Supply Voltage − V
CC
T
A
− Free-Air Temperature − °C
Figure 49
Figure 50
PHASE MARGIN
vs
TEMPERATURE
GAIN MARGIN
vs
LOAD CAPACITANCE
90°
10
V
V
R
= 0
= 0
= 2 kΩ
V
V
V
R
= 15 V
IC
O
L
CC
IC
O
= 0
80°
70°
60°
50°
= 0
= 2 kΩ
= 25°C
8
6
4
2
0
L
V
=
15 V
CC
T
A
C
= 25 pF
L
V
CC
= 5 V
V
= 15 V
CC
40°
30°
C
= 100 pF
L
V
= 5 V
CC
20°
10°
0°
− 55 − 35
−15
5
25
45
65
85
0
20
40
60
80
100
T
A
− Free-Air Temperature − °C
C
− Load Capacitance − pF
L
Figure 51
Figure 52
†
Data applies to the operational amplifier block only. Switched-capacitor block is not supplying V
supply.
CC−
24
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂꢃ ꢄꢅ ꢃ
ꢆꢇ ꢈꢆ ꢉꢊꢋꢂ ꢂꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋꢐꢀ ꢌꢐꢑ ꢁ ꢒ ꢋꢂꢓ ꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋ ꢁꢇ ꢎꢇ ꢂꢓ
ꢕ ꢇꢀ ꢆ ꢊꢕ ꢇ ꢀꢖ ꢆꢂꢌꢉꢖꢑ ꢋꢑꢖꢇ ꢀꢒ ꢓ ꢗꢒ ꢁꢀꢑꢈ ꢂ ꢖꢒꢏ ꢗ ꢂꢓ ꢀꢂ ꢓ
SLOS127 − JUNE 1993
†
TYPICAL CHARACTERISTICS
OPERATIONAL AMPLIFIER SECTION
PHASE MARGIN
vs
LOAD CAPACITANCE
PHASE MARGIN
vs
SUPPLY VOLTAGE
90°
80°
70°
60°
50°
90°
80°
70°
60°
50°
C
= 25 pF
L
V
CC
=
15 V
V
CC
= 5 V
C
= 100 pF
L
40°
30°
20°
10°
0°
40°
30°
20°
10°
0°
V
V
= 0
= 0
= 2 kΩ
= 25°C
V
V
R
= 0
= 0
= 2 kΩ
= 25°C
IC
O
IC
O
L
R
L
T
T
A
A
0
20
40
60
80
100
0
4
8
12
16
C
− Load Capacitance − pF
L
|V
CC
| − Supply Voltage − V
Figure 53
Figure 54
NONINVERTING LARGE-SIGNAL
PULSE RESPONSE
SMALL-SIGNAL PULSE RESPONSE
15
10
100
50
0
T
A
= 25°C,
85°C
T
= −40°C
A
5
T
A
= −40°C
0
T
= 25°C,
85°C
A
− 5
− 10
− 15
V
=
= −1
= 2 kΩ
= 100 pF
15 V
CC
V
A
R
C
= 15 V
CC
− 50
A
V
= 1
V
R
C
L
L
= 2 kΩ
= 100 pF
L
L
T
A
= 25°C
− 100
0
1
2
3
4
5
0
0.4
0.8
1.2
1.6
t − Time − µs
t − Time − µs
Figure 55
Figure 56
†
Data applies to the operational amplifier block only. Switched-capacitor block is not supplying V
supply.
CC−
25
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢃ
ꢆ ꢇꢈ ꢆꢉꢊ ꢋꢂꢂ ꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋ ꢐꢀ ꢌꢐ ꢑꢁ ꢒ ꢋꢂ ꢓꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋꢁ ꢇꢎ ꢇꢂ ꢓ
ꢕꢇ ꢀ ꢆ ꢊꢕ ꢇ ꢀ ꢖꢆ ꢂ ꢌꢉꢖꢑ ꢋꢑꢖ ꢇ ꢀꢒ ꢓ ꢗ ꢒꢁꢀꢑꢈꢂ ꢖꢒ ꢏꢗꢂ ꢓꢀ ꢂꢓ
SLOS127 − JUNE 1993
†
TYPICAL CHARACTERISTICS
OPERATIONAL AMPLIFIER SECTION
CLOSED-LOOP OUTPUT IMPEDANCE
CROSSTALK ATTENUATION
vs
vs
FREQUENCY
FREQUENCY
100
10
1
140
120
100
80
V
T
A
=
15 V
CC
= 25°C
A
V
= 100
= 10
A
V
0.1
60
V
V
R
=
= 0
= 2 kΩ
= 25°C
15 V
CC
IC
L
A
V
= 1
0.01
40
20
T
A
0.001
10
100
1 k
10 k
100 k
10 M
10
100
1 k
10 k
100 k
1 M
f − Frequency − Hz
f − Frequency − Hz
Figure 57
Figure 58
†
Data applies to the operational amplifier block only. Switched-capacitor block is not supplying V
CC−
supply.
26
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂꢃ ꢄꢅ ꢃ
ꢆꢇ ꢈꢆ ꢉꢊꢋꢂ ꢂꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋꢐꢀ ꢌꢐꢑ ꢁ ꢒ ꢋꢂꢓ ꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋ ꢁꢇ ꢎꢇ ꢂꢓ
ꢕ ꢇꢀ ꢆ ꢊꢕ ꢇ ꢀꢖ ꢆꢂꢌꢉꢖꢑ ꢋꢑꢖꢇ ꢀꢒ ꢓ ꢗꢒ ꢁꢀꢑꢈ ꢂ ꢖꢒꢏ ꢗ ꢂꢓ ꢀꢂ ꢓ
SLOS127 − JUNE 1993
†
TYPICAL CHARACTERISTICS
SWITCHED-CAPACITOR SECTION
SHUTDOWN THRESHOLD VOLTAGE
SUPPLY CURRENT
vs
INPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
0.6
0.5
0.4
0.3
0.2
0.1
0
5
4
3
2
I
O
= 0
V
FB/SD
1
0
0
25
50
75
100
− 50
− 25
0
2.5
5
7.5
10
12.5
15
T
A
− Free-Air Temperature − °C
V
CC
− Input Voltage − V
Figure 59
Figure 60
SUPPLY CURRENT IN SHUTDOWN
OSCILLATOR FREQUENCY
vs
FREE-AIR TEMPERATURE
vs
INPUT VOLTAGE
120
100
80
60
40
20
0
35
33
31
29
27
25
23
21
19
17
V
= 0
FB/SD
V
= 15 V
CC
V
= 3.5 V
CC
15
− 50
0
2.5
5
7.5
10
12.5
15
0
25
50
75
100
−25
V
CC
− Input Voltage − V
T
A
− Free-Air Temperature − °C
Figure 61
Figure 62
†
Data applies to the switched-capacitor block only. Amplifier block is not connected.
27
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢃ
ꢆ ꢇꢈ ꢆꢉꢊ ꢋꢂꢂ ꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋ ꢐꢀ ꢌꢐ ꢑꢁ ꢒ ꢋꢂ ꢓꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋꢁ ꢇꢎ ꢇꢂ ꢓ
ꢕꢇ ꢀ ꢆ ꢊꢕ ꢇ ꢀ ꢖꢆ ꢂ ꢌꢉꢖꢑ ꢋꢑꢖ ꢇ ꢀꢒ ꢓ ꢗ ꢒꢁꢀꢑꢈꢂ ꢖꢒ ꢏꢗꢂ ꢓꢀ ꢂꢓ
SLOS127 − JUNE 1993
†
TYPICAL CHARACTERISTICS
SWITCHED-CAPACITOR SECTION
OUTPUT VOLTAGE LOSS
vs
INPUT CAPACITANCE
AVERAGE SUPPLY CURRENT
vs
OUTPUT CURRENT
1.4
1.2
1.0
140
120
100
I
O
= 100 mA
0.8
0.6
80
60
I
I
= 50 mA
= 10 mA
O
O
0.4
40
Inverter Configuration
= 100-µF Tantalum
osc
0.2
0
20
0
C
f
OUT
= 25 kHz
0
10 20 30 40 50 60 70 80 90 100
0
20
40
60
80
100
C
− Input Capacitance − µF
IN
I
O
− Output Current − mA
Figure 63
Figure 64
OUTPUT VOLTAGE LOSS
vs
OUTPUT VOLTAGE LOSS
vs
OSCILLATOR FREQUENCY
OSCILLATOR FREQUENCY
2.5
2.25
2
2.5
Inverter Configuration
Inverter Configuration
C
C
= 100-µF Tantalum
OUT
2.25
2
C
C
= 10-µF Tantalum
OUT
IN
IN
= 100-µF Tantalum
= 100-µF Tantalum
1.75
1.5
1.25
1
1.75
1.5
1.25
1
I
= 100 mA
= 50 mA
O
I
= 100 mA
= 50 mA
O
I
O
I
O
0.75
0.5
0.75
0.5
I
= 10 mA
O
0.25
0
0.25
0
I
= 10 mA
20
O
1
2
f
4
10
40
100
1
2
f
4
7 10
20
40
100
− Oscillator Frequency − kHz
− Oscillator Frequency − kHz
osc
osc
Figure 65
Figure 66
†
Data applies to the switched-capacitor block only. Amplifier block is not connected.
28
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂꢃ ꢄꢅ ꢃ
ꢆꢇ ꢈꢆ ꢉꢊꢋꢂ ꢂꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋꢐꢀ ꢌꢐꢑ ꢁ ꢒ ꢋꢂꢓ ꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋ ꢁꢇ ꢎꢇ ꢂꢓ
ꢕ ꢇꢀ ꢆ ꢊꢕ ꢇ ꢀꢖ ꢆꢂꢌꢉꢖꢑ ꢋꢑꢖꢇ ꢀꢒ ꢓ ꢗꢒ ꢁꢀꢑꢈ ꢂ ꢖꢒꢏ ꢗ ꢂꢓ ꢀꢂ ꢓ
SLOS127 − JUNE 1993
†
TYPICAL CHARACTERISTICS
SWITCHED-CAPACITOR SECTION
REGULATED OUTPUT VOLTAGE
vs
REFERENCE VOLTAGE CHANGE
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
− 4.7
− 4.8
100
80
− 4.9
− 5
60
40
V
CC =
7 V
− 5.1
−11.6
20
0
−11.8
−12
− 20
− 40
− 60
V
REF
@ 25°C = 2.5 V
V
CC =
15 V
−12.2
−12.4
−12.6
− 80
− 100
0
25
50
75
100
− 50
− 25
0
25
50
75
100
− 50
− 25
T
A
− Free-Air Temperature − °C
T
A
− Free-Air Temperature − °C
Figure 67
Figure 68
VOLTAGE LOSS
vs
OUTPUT CURRENT
2
3.5 V ≤ V
≤ 15 V
= 100 µF
CC
1.8
C
= C
IN
OUT
1.6
1.4
1.2
1
T
A
= 85°C
0.8
0.6
0.4
T
A
= 25°C
0.2
0
0
10 20 30 40 50 60 70
Output Current − mA
80 90 100
Figure 69
†
Data applies to the switched-capacitor block only. Amplifier block is not connected.
29
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢃ
ꢆ ꢇꢈ ꢆꢉꢊ ꢋꢂꢂ ꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋ ꢐꢀ ꢌꢐ ꢑꢁ ꢒ ꢋꢂ ꢓꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋꢁ ꢇꢎ ꢇꢂ ꢓ
ꢕꢇ ꢀ ꢆ ꢊꢕ ꢇ ꢀ ꢖꢆ ꢂ ꢌꢉꢖꢑ ꢋꢑꢖ ꢇ ꢀꢒ ꢓ ꢗ ꢒꢁꢀꢑꢈꢂ ꢖꢒ ꢏꢗꢂ ꢓꢀ ꢂꢓ
SLOS127 − JUNE 1993
APPLICATION INFORMATION
amplifier section
input characteristics
The TLE2682 is specified with a minimum and a maximum input voltage that if exceeded at either input could
cause the device to malfunction.
Because of the extremely high input impedance and resulting low bias-current requirements, the TLE2682
operational amplifier section is well suited for low-level signal processing; however, leakage currents on printed
circuit boards and sockets can easily exceed bias-current requirements and cause degradation in system
performance. It is a good practice to include guard rings around inputs (see Figure 70). These guards should
be driven from a low-impedance source at the same voltage level as the common-mode input.
Unused amplifiers should be connected as grounded voltage followers to avoid potential oscillation.
V
I
+
−
+
−
V
I
+
−
V
O
V
O
V
O
V
I
Figure 70. Use of Guard Rings
switched-capacitor section
Figure 71 shows the functional block diagram for the switched-capacitor block only.
V
CC
V
REF
2.5 V
REF
R
R
Drive
CAP +
+
†
−
C
FB/SD
OSC
IN
Q
Q
OSC
CAP −
Drive
Drive
GND
†
C
OUT
V
OUT
Drive
†
External capacitors
Figure 71. Functional Block Diagram for Switched-Capacitor Block Only
30
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂꢃ ꢄꢅ ꢃ
ꢆꢇ ꢈꢆ ꢉꢊꢋꢂ ꢂꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋꢐꢀ ꢌꢐꢑ ꢁ ꢒ ꢋꢂꢓ ꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋ ꢁꢇ ꢎꢇ ꢂꢓ
ꢕ ꢇꢀ ꢆ ꢊꢕ ꢇ ꢀꢖ ꢆꢂꢌꢉꢖꢑ ꢋꢑꢖꢇ ꢀꢒ ꢓ ꢗꢒ ꢁꢀꢑꢈ ꢂ ꢖꢒꢏ ꢗ ꢂꢓ ꢀꢂ ꢓ
SLOS127 − JUNE 1993
APPLICATION INFORMATION
The TLE2682 high-speed JFET-input amplifiers are ideal for conditioning fast signals from high-impedance sources.
When interfacing with ADCs in single-supply 5-V systems, its on board charge pump provides the negative rail
necessary for reliable operation of the JFET inputs and delivers a common-mode input voltage range that includes
ground and the positive rail. The amplifiers can also drive resistive loads to 0.000 V while sinking 25 mA.
Figure 72 shows the switched-capacitor section configured as a voltage inverter generating approximately −5-V
supply voltage from the single 5-V supply available. Three external components are necessary: the storage
capacitors, C and C
because the amplifiers present a load referenced to the positive rail and tend to pull V
prevent the switched-capacitor section from starting (see section on pin functions). The amplifiers use the 5-V supply
, and a fast recovery Schottky diode to clamp V
during start-up. The diode is necessary
IN
OUT
OUT
above ground, which may
OUT
for V
(pin 16) and the derived −5-V supply for V
(pin 4). One amplifier is shown driving an ADC; the other is
CC+
CC−
driving a resistive load (see Figure 73).
R
L
5 V
To ADC
R
F
1
2
3
4
5
6
7
8
16
1 OUT
1 IN−
1 IN+
V
CC+
R
R
Signal
From
F
F
15
14
13
12
11
10
9
2 OUT
2 IN−
2 IN+
Preamplifier
R
IN
Signal
From
Transducer
V
CC−
V
OUT
V
REF
Filter
CAP−
GND
C
IN
1N4933
+
C
OUT
OSC
CAP+
FB/SD
+
V
IN
Shutdown
Figure 72. Switched-Capacitor Block Supplying Negative Rail for Amplifiers
31
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢃ
ꢆ ꢇꢈ ꢆꢉꢊ ꢋꢂꢂ ꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋ ꢐꢀ ꢌꢐ ꢑꢁ ꢒ ꢋꢂ ꢓꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋꢁ ꢇꢎ ꢇꢂ ꢓ
ꢕꢇ ꢀ ꢆ ꢊꢕ ꢇ ꢀ ꢖꢆ ꢂ ꢌꢉꢖꢑ ꢋꢑꢖ ꢇ ꢀꢒ ꢓ ꢗ ꢒꢁꢀꢑꢈꢂ ꢖꢒ ꢏꢗꢂ ꢓꢀ ꢂꢓ
SLOS127 − JUNE 1993
APPLICATION INFORMATION
5 V
R
R
F
F
R
R
IN
IN
Signal
From
Preamplifier
Signal
From
Transducer
To ADC
−
+
−
+
AMP2
AMP1
R
L
V
IN
V
OUT
Voltage
Converter
FB/SD
Shutdown
V
REF
Figure 73. Equivalent Schematic: Amplifier 1 Driving Resistive Load,
Amplifier 2 Interfacing to an ADC
Using the switched-capacitor network to generate the negative rail for the amplifiers (or other circuitry) requires
special design considerations to minimize the effects of ripple and switching noise. Using larger values for C and
OUT
selecting low-ESR capacitors reduces the ripple and noise present on V
, the − 5-V rail (refer to the capacitor
OUT
section and the output ripple discussion in the switched-capacitor section). Figure 74 and Figure 75 show the
smoothing effect of changing C from 10 µF to 100 µF when V is supplying 1 mA. Figure 76 and Figure 77
OUT
OUT
demonstrate that at heavier loads the ripple and noise are more pronounced and while increasing the size of C
helps, other steps may be necessary.
OUT
RIPPLE AND SWITCHING NOISE ON
RIPPLE AND SWITCHING NOISE ON
SWITCHED-CAPACITOR OUTPUT
SWITCHED-CAPACITOR OUTPUT
vs
vs
TIME
TIME
80
60
40
20
20
15
10
5
V
= 5 V
CC+
V
I
C
C
= 5 V
CC+
= 1 mA
I
L
= 1 mA
L
C
C
= 100 µF
= 100 µF
= 10 µF
IN
OUT
IN
OUT
= 100 µF
0
0
−20
−5
−40
−10
−15
−20
−60
−80
0
10 20 30 40 50 60 70 80 90 100
0
10 20 30 40 50 60 70 80 90 100
t − Time − µs
t − Time − µs
Figure 74
Figure 75
32
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂꢃ ꢄꢅ ꢃ
ꢆꢇ ꢈꢆ ꢉꢊꢋꢂ ꢂꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋꢐꢀ ꢌꢐꢑ ꢁ ꢒ ꢋꢂꢓ ꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋ ꢁꢇ ꢎꢇ ꢂꢓ
ꢕ ꢇꢀ ꢆ ꢊꢕ ꢇ ꢀꢖ ꢆꢂꢌꢉꢖꢑ ꢋꢑꢖꢇ ꢀꢒ ꢓ ꢗꢒ ꢁꢀꢑꢈ ꢂ ꢖꢒꢏ ꢗ ꢂꢓ ꢀꢂ ꢓ
SLOS127 − JUNE 1993
APPLICATION INFORMATION
RIPPLE AND SWITCHING NOISE ON
RIPPLE AND SWITCHING NOISE ON
SWITCHED-CAPACITOR OUTPUT
SWITCHED-CAPACITOR OUTPUT
vs
vs
TIME
TIME
200
150
100
50
80
60
40
V
= 5 V
CC+
= 10 mA
I
L
C
C
= 100 µF
= 100 µF
IN
OUT
20
0
0
−50
−20
−100
−40
−60
−80
V
= 5 V
CC+
= 10 mA
I
L
−150
−200
C
C
= 100 µF
= 10 µF
IN
OUT
0
10 20 30 40 50 60 70 80 90 100
0
10 20 30 40 50 60 70 80 90 100
t − Time − µs
t − Time − µs
Figure 76
Figure 77
L
H
V
OUT
V
CC
C
0.1 µF
OUT
C
F
+
1
f =
r
LC
2 π
Filter
Figure 78. LC Filter Used to Reduce Ripple and Switching Noise,
f = 1/2π√LC, A = −40 dB per Decade
r
A low-pass LC filter can be added to the circuit to further reduce ripple and noise. For example, adding a filter as shown
in Figure 78, implemented using a 50-µH inductor and 200-µF capacitor (available in surface mount), achieves the
following results (see Figure 79 through Figure 82).
33
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢃ
ꢆ ꢇꢈ ꢆꢉꢊ ꢋꢂꢂ ꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋ ꢐꢀ ꢌꢐ ꢑꢁ ꢒ ꢋꢂ ꢓꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋꢁ ꢇꢎ ꢇꢂ ꢓ
ꢕꢇ ꢀ ꢆ ꢊꢕ ꢇ ꢀ ꢖꢆ ꢂ ꢌꢉꢖꢑ ꢋꢑꢖ ꢇ ꢀꢒ ꢓ ꢗ ꢒꢁꢀꢑꢈꢂ ꢖꢒ ꢏꢗꢂ ꢓꢀ ꢂꢓ
SLOS127 − JUNE 1993
APPLICATION INFORMATION
RIPPLE AND SWITCHING NOISE ON
RIPPLE AND SWITCHING NOISE ON
SWITCHED-CAPACITOR OUTPUT
SWITCHED-CAPACITOR OUTPUT
vs
vs
TIME
TIME
20
15
10
5
20
15
10
5
V
= 5 V
CC+
V
I
C
C
= 5 V
= 1 mA
= 100 µF
= 10 µF
CC+
L
IN
OUT
I
L
= 1 mA
C
C
= 100 µF
= 10 µF
IN
OUT
Without Filter
0
0
−5
−5
−10
−10
Filter:
L
C
= 50 µH
= 220 µF
F
F
−15
−20
−15
−20
See Figure 78
0
10 20 30 40 50 60 70 80 90 100
0
10 20 30 40 50 60 70 80 90 100
t − Time − µs
t − Time − µs
Figure 79
Figure 80
RIPPLE AND SWITCHING NOISE ON
RIPPLE AND SWITCHING NOISE ON
SWITCHED-CAPACITOR OUTPUT
SWITCHED-CAPACITOR OUTPUT
vs
vs
TIME
TIME
20
15
10
5
20
15
10
5
V
= 5 V
CC+
V
I
C
C
= 5 V
CC+
= 1 mA
I
L
= 1 mA
L
C
C
= 100 µF
= 100 µF
= 100 µF
IN
OUT
IN
OUT
= 100 µF
Without Filter
0
0
−5
−5
−10
−10
Filter:
L
C
= 50 µH
= 220 µF
F
F
−15
−20
−15
−20
See Figure 78
0
10 20 30 40 50 60 70 80 90 100
0
10 20 30 40 50 60 70 80 90 100
t − Time − µs
t − Time − µs
Figure 81
Figure 82
34
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂꢃ ꢄꢅ ꢃ
ꢆꢇ ꢈꢆ ꢉꢊꢋꢂ ꢂꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋꢐꢀ ꢌꢐꢑ ꢁ ꢒ ꢋꢂꢓ ꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋ ꢁꢇ ꢎꢇ ꢂꢓ
ꢕ ꢇꢀ ꢆ ꢊꢕ ꢇ ꢀꢖ ꢆꢂꢌꢉꢖꢑ ꢋꢑꢖꢇ ꢀꢒ ꢓ ꢗꢒ ꢁꢀꢑꢈ ꢂ ꢖꢒꢏ ꢗ ꢂꢓ ꢀꢂ ꢓ
SLOS127 − JUNE 1993
APPLICATION INFORMATION
As the load increases, filtering is still effective, but noise and ripple become more prominent (see Figure 83 through
Figure 86):
RIPPLE AND SWITCHING NOISE ON
RIPPLE AND SWITCHING NOISE ON
SWITCHED-CAPACITOR OUTPUT
SWITCHED-CAPACITOR OUTPUT
vs
vs
TIME
TIME
20
15
10
5
200
150
100
50
V
= 5 V
CC+
= 10 mA
I
L
C
C
= 100 µF
= 10 µF
IN
OUT
0
0
−5
−50
V
= 5 V
= 10 mA
= 100 µF
= 10 µF
CC+
−10
−100
I
C
C
Filter:
L
L
C
= 50 µH
= 220 µF
IN
OUT
F
F
−15
−20
−150
−200
Without Filter
See Figure 78
0
10 20 30 40 50 60 70 80 90 100
0
10 20 30 40 50 60 70 80 90 100
t − Time − µs
t − Time − µs
Figure 83
Figure 84
RIPPLE AND SWITCHING NOISE ON
RIPPLE AND SWITCHING NOISE ON
SWITCHED-CAPACITOR OUTPUT
SWITCHED-CAPACITOR OUTPUT
vs
vs
TIME
TIME
80
20
15
10
5
V
= 5 V
CC+
V
I
C
C
= 5 V
= 10 mA
= 100 µF
= 100 µF
CC+
L
IN
OUT
I
L
= 10 mA
60
40
20
C
C
= 100 µF
= 10 µF
IN
OUT
Without Filter
0
0
−20
−5
−40
−10
Filter:
L
C
= 50 µH
= 220 µF
F
F
−60
−80
−15
−20
See Figure 78
0
10 20 30 40 50 60 70 80 90 100
0
10 20 30 40 50 60 70 80 90 100
t − Time − µs
t − Time − µs
Figure 85
Figure 86
35
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢃ
ꢆ ꢇꢈ ꢆꢉꢊ ꢋꢂꢂ ꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋ ꢐꢀ ꢌꢐ ꢑꢁ ꢒ ꢋꢂ ꢓꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋꢁ ꢇꢎ ꢇꢂ ꢓ
ꢕꢇ ꢀ ꢆ ꢊꢕ ꢇ ꢀ ꢖꢆ ꢂ ꢌꢉꢖꢑ ꢋꢑꢖ ꢇ ꢀꢒ ꢓ ꢗ ꢒꢁꢀꢑꢈꢂ ꢖꢒ ꢏꢗꢂ ꢓꢀ ꢂꢓ
SLOS127 − JUNE 1993
APPLICATION INFORMATION
Even with filtering, switching noise is coupled into the amplifier’s signal path through ground. An example of this is
shown in Figure 87 and Figure 88. This cannot be avoided. In systems where high-precision measurement is
necessary, the shutdown pin, FB/SD, can be used to temporarily disable the switched-capacitor section while a
measurement is being taken.
RIPPLE AND SWITCHING NOISE ON
RIPPLE AND SWITCHING NOISE ON
AMPLIFIER OUTPUT
AMPLIFIER OUTPUT
vs
vs
TIME
TIME
V
V
V
+20
+15
+10
+5
V
V
V
+20
+15
+10
+5
OL
OL
OL
OL
OL
OL
V
= 5 V
= 600 Ω
= 100 µF
= 100 µF
V
= 5 V
= 600 Ω
= 100 µF
= 100 µF
Filter:
= 50 µH
CC+
L
IN
OUT
CC+
L
IN
OUT
R
C
C
R
C
C
L
C
F
= 220 µF
F
See Figure 78
Without Filter
V
V
OL
OL
V
OL
V
OL
V −5
OL
V −5
OL
V −10
OL
V −10
OL
V
−15
V
−15
OL
OL
OL
OL
V
−20
V
−20
0
10 20 30 40 50 60 70 80 90 100
0
10 20 30 40 50 60 70 80 90 100
t − Time − µs
t − Time − µs
Figure 87
Figure 88
By applying a voltage of less than 0.45 V to FB/SD, the internal switches are set to dump any remaining charge onto
. The voltage at V decays to zero at a rate dependent on both the size of C and loading. During this time,
C
OUT
OUT
OUT
the amplifier’s outputs are free of any switching-induced ripple and noise. Figure 89 and Figure 90 show the decay
and charge times of the negative supply when the amplifier is driving a 100-Ω load.
36
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂꢃ ꢄꢅ ꢃ
ꢆꢇ ꢈꢆ ꢉꢊꢋꢂ ꢂꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋꢐꢀ ꢌꢐꢑ ꢁ ꢒ ꢋꢂꢓ ꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋ ꢁꢇ ꢎꢇ ꢂꢓ
ꢕ ꢇꢀ ꢆ ꢊꢕ ꢇ ꢀꢖ ꢆꢂꢌꢉꢖꢑ ꢋꢑꢖꢇ ꢀꢒ ꢓ ꢗꢒ ꢁꢀꢑꢈ ꢂ ꢖꢒꢏ ꢗ ꢂꢓ ꢀꢂ ꢓ
SLOS127 − JUNE 1993
APPLICATION INFORMATION
OFF-STATE VOLTAGE DECAY
TURN-ON VOLTAGE RISE
AT SWITCHED-CAPACITOR OUTPUT
AT SWITCHED-CAPACITOR OUTPUT
vs
vs
TIME
TIME
3
2
3
2
V
V
C
R
V
= 5 V
= V
OUT
= 100 µF
= 100 Ω
= −100 mV
CC+
CC−
IN
V
V
C
R
= 5 V
= V
OUT
= 100 µF
= 100 Ω
= −100 mV
CC+
CC−
IN
L
L
1
1
ID
V
C
ID
C
= 22 µF
OUT
= 22 µF
OUT
0
0
− 1
− 2
− 3
− 4
− 5
− 1
− 2
− 3
− 4
− 5
0
1
2
3
4
5
6
7
8
0
10
20
30
40
50
60
70
80
t − Time − ms
t − Time − ms
Figure 89
Figure 90
It is important to remember that the amplifier’s negative common-mode input voltage limit (V
) is specified as an
ICR−
offset from the negative rail. Care should be taken to ensure that the input signal does not violate this limit as V
decays. The negative output voltage swing is similarly affected by the gradual loss of the negative rail.
OUT
This application takes advantage of the otherwise unused V
output of the switched-capacitor block to bias one
REF
amplifier to 2.5 V. This is especially useful when the amplifier is followed by an ADC, keeping the signal centered in
the middle of the converter’s dynamic range. Other biasing methods may be necessary in precision systems.
In Figure 91, V
voltage, fed into FB/SD, is used to regulate the voltage at V
this way, there is a higher voltage loss (V − |V
, R1, and R2 are used to generate a feedback voltage to the TLE2682’s error amplifier. This
REF
, thereby further reducing output ripple. When used
OUT
|) associated with the regulation. For example, the inverter
IN
OUT
generates an unregulated voltage of approximately −4.5 V from a positive 5-V source; it can achieve a regulated
output voltage of only about −3.5 V. Though this reduces the amplifier’s input and output dynamic range, both V
ICR−
and V still extends to below ground.
OL
37
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢃ
ꢆ ꢇꢈ ꢆꢉꢊ ꢋꢂꢂ ꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋ ꢐꢀ ꢌꢐ ꢑꢁ ꢒ ꢋꢂ ꢓꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋꢁ ꢇꢎ ꢇꢂ ꢓ
ꢕꢇ ꢀ ꢆ ꢊꢕ ꢇ ꢀ ꢖꢆ ꢂ ꢌꢉꢖꢑ ꢋꢑꢖ ꢇ ꢀꢒ ꢓ ꢗ ꢒꢁꢀꢑꢈꢂ ꢖꢒ ꢏꢗꢂ ꢓꢀ ꢂꢓ
SLOS127 − JUNE 1993
APPLICATION INFORMATION
R
L
5 V
To ADC
R
F
1
2
3
4
5
6
7
8
16
1 OUT
1 IN −
1 IN+
V
CC+
R
R
IN
F
15
14
13
12
11
10
9
2 OUT
2 IN −
2 IN+
CAP−
GND
R
IN
C
OUT
+
V
CC−
V
OUT
V
REF
+
C1
R2
C
IN
R1
+
1N4933
OSC
CAP+
FB/SD
V
IN
Restart
R3
R4
Shutdown
V
OUT
R2 = R1
+1
V
REF
− 40 mV
2
Where: V
= 2.5 V Nominal
REF
Figure 91. Switched Capacitor Configured as Regulated Inverter
The reference voltage, though being used as part of the regulation circuitry, is still available for other uses if total
current drawn from it is limited to under 60 µA. The shutdown feature remains available, though a restart pulse may
be necessary to start the switched capacitor if the voltage on C
is not fully discharged. This restart pulse is isolated
OUT
from the feedback loop using a blocking diode. A more detailed discussion of this configuration can be found in the
switched-capacitor section.
The TLE2682s switched-capacitor building block can also be configured as a positive doubler, extending the range
of single-supply systems. This configuration is shown in Figure 92. As with the inverting configuration, noise and
ripple components show up at the doubled output voltage and vary in magnitude with load. As before, filtering can
be used to improve the output waveform; but unlike the voltage inverter, changing the size of C
Figure 93 through Figure 98 illustrate the effects of loading and filtering.
has little effect.
OUT
38
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀꢁ ꢂꢃ ꢄꢅ ꢃ
ꢆꢇ ꢈꢆ ꢉꢊꢋꢂ ꢂꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋꢐꢀ ꢌꢐꢑ ꢁ ꢒ ꢋꢂꢓ ꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋ ꢁꢇ ꢎꢇ ꢂꢓ
ꢕ ꢇꢀ ꢆ ꢊꢕ ꢇ ꢀꢖ ꢆꢂꢌꢉꢖꢑ ꢋꢑꢖꢇ ꢀꢒ ꢓ ꢗꢒ ꢁꢀꢑꢈ ꢂ ꢖꢒꢏ ꢗ ꢂꢓ ꢀꢂ ꢓ
SLOS127 − JUNE 1993
APPLICATION INFORMATION
1
2
3
4
5
6
7
8
16
1 OUT
1 IN−
1 IN+
V
+
CC
R
F
15
14
13
12
11
10
9
R
R
2 OUT
2 IN−
2 IN+
CAP−
GND
R
IN
Input
Signal
V
CC−
V
OUT
V
REF
OSC
CAP+
FB/SD
10 µF
5 V
V
IN
+
V
O
+
1N4001
1N4001
+
2 µF
0.1 µF
C
OUT
V
+ 3.5 V through 15 V
IN
– ǒVL
DiodeǓ
V
[ 2 V
) 2 V
O
IN
V
+ voltage loss switched-capacitor voltage converter
L
Figure 92. Voltage Converter Configured as Positive Doubler
39
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢃ
ꢆ ꢇꢈ ꢆꢉꢊ ꢋꢂꢂ ꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋ ꢐꢀ ꢌꢐ ꢑꢁ ꢒ ꢋꢂ ꢓꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋꢁ ꢇꢎ ꢇꢂ ꢓ
ꢕꢇ ꢀ ꢆ ꢊꢕ ꢇ ꢀ ꢖꢆ ꢂ ꢌꢉꢖꢑ ꢋꢑꢖ ꢇ ꢀꢒ ꢓ ꢗ ꢒꢁꢀꢑꢈꢂ ꢖꢒ ꢏꢗꢂ ꢓꢀ ꢂꢓ
SLOS127 − JUNE 1993
APPLICATION INFORMATION
RIPPLE AND SWITCHING NOISE
RIPPLE AND SWITCHING NOISE
AT DOUBLER OUTPUT
AT DOUBLER OUTPUT
vs
vs
TIME
TIME
40
30
20
10
40
30
20
10
V
= 5 V
CC+
= 6 mA
V
= 5 V
CC+
= 6 mA
I
L
I
C
C
L
C
C
= 10 µF
= 100 µF
IN
OUT
= 10 µF
= 100 µF
IN
OUT
Without Filter
0
0
− 10
− 10
− 20
− 20
Filter:
L
C
= 50 µH
= 220 µF
F
F
− 30
− 40
− 30
− 40
See Figure 78
0
10 20 30 40 50 60 70 80 90 100
0
10 20 30 40 50 60 70 80 90 100
t − Time − µs
t − Time − µs
Figure 93
Figure 94
RIPPLE AND SWITCHING NOISE
RIPPLE AND SWITCHING NOISE
AT DOUBLER OUTPUT
AT DOUBLER OUTPUT
vs
vs
TIME
TIME
40
30
20
10
40
30
20
10
V
= 5 V
CC+
V
I
C
C
= 5 V
= 15 mA
= 10 µF
= 100 µF
CC+
L
IN
OUT
I
L
= 15 mA
C
C
= 10 µF
IN
OUT
= 100 µF
Without Filter
0
0
− 10
− 10
− 20
− 30
− 40
− 20
Filter:
= 50 µH
L
C
F
− 30
− 40
= 220 µF
See Figure 78
F
0
10 20 30 40 50 60 70 80 90 100
0
10 20 30 40 50 60 70 80 90 100
t − Time − µs
t − Time − µs
Figure 95
Figure 96
40
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ꢀꢁ ꢂꢃ ꢄꢅ ꢃ
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ꢕ ꢇꢀ ꢆ ꢊꢕ ꢇ ꢀꢖ ꢆꢂꢌꢉꢖꢑ ꢋꢑꢖꢇ ꢀꢒ ꢓ ꢗꢒ ꢁꢀꢑꢈ ꢂ ꢖꢒꢏ ꢗ ꢂꢓ ꢀꢂ ꢓ
SLOS127 − JUNE 1993
APPLICATION INFORMATION
RIPPLE AND SWITCHING NOISE
RIPPLE AND SWITCHING NOISE
AT DOUBLER OUTPUT
AT DOUBLER OUTPUT
vs
vs
TIME
TIME
40
30
20
10
40
30
20
10
V
I
C
C
= 5 V
= 25 mA
= 10 µF
= 100 µF
V
I
C
C
= 5 V
= 25 mA
= 10 µF
= 100 µF
CC+
L
IN
OUT
CC+
L
IN
OUT
Without Filter
0
0
− 10
− 10
− 20
− 20
Filter:
L
C
= 50 µH
= 220 µF
F
F
− 30
− 40
− 30
− 40
See Figure 78
0
10 20 30 40 50 60 70 80 90 100
0
10 20 30 40 50 60 70 80 90 100
t − Time − µs
t − Time − µs
Figure 97
Figure 98
As with the inverter configuration, when the operational amplifiers are supplied using the voltage converter block,
switching noise are coupled into the signal path through ground. Using the shutdown pin allows precision measurement
of the output signal by an ADC by temporarily disabling the switching mechanism. Figure 99 and Figure 100 show
the decay and charge times at the doubler output with the amplifier connected as shown.
41
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ꢕꢇ ꢀ ꢆ ꢊꢕ ꢇ ꢀ ꢖꢆ ꢂ ꢌꢉꢖꢑ ꢋꢑꢖ ꢇ ꢀꢒ ꢓ ꢗ ꢒꢁꢀꢑꢈꢂ ꢖꢒ ꢏꢗꢂ ꢓꢀ ꢂꢓ
SLOS127 − JUNE 1993
APPLICATION INFORMATION
TURN-ON VOLTAGE RISE
OFF-STATE VOLTAGE DECAY
AT DOUBLER OUTPUT
AT DOUBLER OUTPUT
vs
vs
TIME
TIME
9
8
7
6
5
9
8
7
6
5
4
3
2
1
C
= 22 µF
OUT
C
= 220 µF
OUT
C
= 100 µF
OUT
C
= 100 µF
OUT
C
= 220 µF
OUT
C
= 22 µF
OUT
4
3
2
1
V
= 5 V
= 10 µF
IN
= 100 Ω
V
C
R
= 5 V
= 10 µF
= 100 Ω
= 100 mV
IN
IN
IN
L
C
R
V
L
= 100 mV
V
ID
ID
0
5
10
15
20
25
30
35
40
0
50 100 150 200 250 300 350 400
t − Time − ms
t − Time − ms
Figure 99
Figure 100
The circuit designer should be aware that the TLE2682 amplifier and switched-capacitor sections are tested and
specified separately. Performance may differ from that shown in the Typical Characteristics section of this data sheet
when they are used together. This is evident, for example, in the dependence of V
and V on V
as previously
ICR−
OL
CC−
discussed. The impact of supplying the amplifier’s negative rail using the switched-capacitor block in each design
should be considered and carefully evaluated.
The more esoteric features of the switched-capacitor building block, including external synchronization of the internal
oscillator and power dissipation considerations, are covered in detail in the following switched-capacitor building
block application information section.
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ꢕ ꢇꢀ ꢆ ꢊꢕ ꢇ ꢀꢖ ꢆꢂꢌꢉꢖꢑ ꢋꢑꢖꢇ ꢀꢒ ꢓ ꢗꢒ ꢁꢀꢑꢈ ꢂ ꢖꢒꢏ ꢗ ꢂꢓ ꢀꢂ ꢓ
SLOS127 − JUNE 1993
APPLICATION INFORMATION
switched-capacitor section
A review of a basic switched-capacitor building block is helpful in understanding the operation of the TLE2682.
When the switch shown in Figure 101 is in the left position, capacitor C1 charges to the voltage at V1. The total
charge on C1 is q1 = C1 × V1. When the switch is moved to the right, C1 is discharged to the voltage at V2. After
this discharge time, the charge on C1 is q2 = C1 × V2. The charge has been transferred from the source V1
to the output V2. The amount of charge transferred is as shown in equation 1.
∆q = q1 − q2 = C1(V1 − V2)
(1)
If the switch is cycled f times per second, the charge transfer per unit time (i.e., current) is as shown in equation 2.
(2)
I = f x ∆q = f x C1(V1 − V2)
To obtain an equivalent resistance for a switched-capacitor network, this equation can be rewritten in terms of
voltage and impedance equivalence as shown in equation 3.
V1 * V2
(1ńf C1)
V1 * V2
I +
+
(3)
R
EQUIV
V1
V2
f
R
L
C1
C2
Figure 101. Switched-Capacitor Block
, is defined as R = 1 ÷ f × C1. The equivalent circuit for the switched-capacitor
A new variable, R
EQUIV
EQUIV
network is as shown in Figure 102. The TLE2682 has the same switching action as the basic switched-capacitor
voltage converter. Even though this simplification does not include finite switch-on resistance and
output-voltage ripple, it provides an insight into how the device operates.
These simplified circuits explain voltage loss as a function of oscillator frequency (see Figure 66). As oscillator
frequency is decreased, the output impedance is eventually dominated by the 1/f × C1 term and voltage losses
rise.
Voltage losses also rise as oscillator frequency increases. This is caused by internal switching losses that occur
due to some finite charge being lost on each switching cycle. This charge loss per unit cycle when multiplied
by the switching frequency becomes a current loss. At high frequency, this loss becomes significant and voltage
losses again rise.
The oscillator of the TLE2682 switched-capacitor section is designed to run in the frequency band where voltage
losses are at a minimum.
R
EQUIV
V1
V2
C2
R
L
1
R
=
EQUIV
f×C1
Figure 102. Switched-Capacitor Equivalent Circuit
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ꢕꢇ ꢀ ꢆ ꢊꢕ ꢇ ꢀ ꢖꢆ ꢂ ꢌꢉꢖꢑ ꢋꢑꢖ ꢇ ꢀꢒ ꢓ ꢗ ꢒꢁꢀꢑꢈꢂ ꢖꢒ ꢏꢗꢂ ꢓꢀ ꢂꢓ
SLOS127 − JUNE 1993
APPLICATION INFORMATION
pin functions (see functional block diagram − converter)
Supply voltage (V ) alternately charges C to the input voltage when C is switched in parallel with the input
IN
IN
IN
supply and then transfers charge to C
when C is switched in parallel with C
. Switching occurs at the
OUT
IN
OUT
oscillator frequency. During the time that C is charging, the peak supply current is approximately 2.2 times
the output current. During the time that C is delivering a charge to C
IN
IN
, the supply current drops to
OUT
approximately 0.2 times the output current. An input supply bypass capacitor supplies part of the peak input
current drawn by the TLE2682 switched-capacitor section and averages out the current drawn from the supply.
A minimum input supply bypass capacitor of 2 µF, preferably tantalum or some other low-ESR type, is
recommended. A larger capacitor is desirable in some cases. An example is when the actual input supply is
connected to the TLE2682 through long leads or when the pulse currents drawn by the TLE2682 might affect
other circuits through supply coupling.
In addition to being the output pin, V
is tied to the substrate of the device. Special care must be taken in
positive with respect to any of the other pins. For circuits with the output
OUT
TLE2682 circuits to avoid making V
OUT
load connected from V
to V
or from some external positive supply voltage to V
, an external
CC+
OUT
OUT
Schottky diode must be added (see Figure 103). This diode prevents V
from being pulled above the GND
OUT
during start up. A fast recovery diode such as IN4933 with low forward voltage (V ≈ 0.2 V) can be used.
f
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1 OUT
1 IN−
1 IN+
V
+
CC
2 OUT
2 IN−
2 IN+
CAP−
GND
V
CC−
V
OUT
V
REF
V
OUT
C
OUT
IN4933
C
IN
+
+
OSC
CAP+
FB/SD
V
IN
Load
V
CC+
or External Supply Voltage
Figure 103. Circuit With Load Connected From V
to V
OUT
CC
The voltage reference (V
) output provides a 2.5-V reference point for use in TLE2682-based regulator
REF
circuits. The temperature coefficient (TC) of the reference voltage has been adjusted so that the TC of the
regulated output voltage is near zero. As seen in the typical performance curves, this requires the reference
output to have a positive TC. This nonzero drift is necessary to offset a drift term inherent in the internal reference
divider and comparator network tied to the feedback pin. The overall result of these drift terms is a regulated
output that has a slight positive TC at output voltages below 5 V and a slight negative TC at output voltages
above 5 V. For regulator feedback networks, reference output current should be limited to approximately 60 µA.
V
draws approximately 100 µA when shorted to ground and does not affect the internal reference/regulator.
REF
This pin can also be used as a pullup for TLE2682 circuits that require synchronization.
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ꢕ ꢇꢀ ꢆ ꢊꢕ ꢇ ꢀꢖ ꢆꢂꢌꢉꢖꢑ ꢋꢑꢖꢇ ꢀꢒ ꢓ ꢗꢒ ꢁꢀꢑꢈ ꢂ ꢖꢒꢏ ꢗ ꢂꢓ ꢀꢂ ꢓ
SLOS127 − JUNE 1993
APPLICATION INFORMATION
pin functions (continued)
CAP+ is the positive side of input capacitor C and is alternately driven between V
and ground. When driven
IN
CC
to V , CAP+ sources current from V . When driven to ground, CAP+ sinks current to ground. CAP− is the
CC
CC
negative side of the input capacitor and is driven alternately between ground and V
. When driven to ground,
OUT
CAP− sinks current to ground. When driven to V
in the switches is unidirectional as should be expected when using bipolar switches.
, CAP− sources current from C
. In all cases, current flow
OUT
OUT
OSC can be used to raise or lower the oscillator frequency or to synchronize the device to an external clock.
Internally, OSC is connected to the oscillator timing capacitor (C ≈ 150 pF), which is alternately charged and
t
discharged by current sources of 7 µA so that the duty cycle is approximately 50%. The TLE2682
switched-capacitor section oscillator is designed to run in the frequency band where switching losses are
minimized. However, the frequency can be raised, lowered, or synchronized to an external system clock if
necessary.
The frequency can be increased by adding an external capacitor (C2 in Figure 104) in the range of
5 pF−20 pF from CAP+ to OSC. This capacitor couples a charge into C as the switch transitions. This shortens
t
the charge and discharge time and raises the oscillator frequency. Synchronization can be accomplished by
adding an external pullup resistor from OSC to V
open-collector gate or an npn transistor can then be used to drive OSC at the external clock frequency as shown
in Figure 104.
. A 20-kΩ pullup resistor is recommended. An
REF
The frequency can be lowered by adding an external capacitor (C1 in Figure 104) from OSC to ground. This
increases the charge and discharge times, which lowers the oscillator frequency.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1 OUT
1 IN−
1 IN+
V
+
CC
2 OUT
2 IN−
2 IN+
CAP−
GND
V
CC−
V
OUT
V
REF
C
OUT
C1
+
C
IN
+
OSC
CAP+
FB/SD
V
V
IN
IN
C2
Figure 104. External Clock System
The feedback/shutdown (FB/SD) pin has two functions. Pulling FB/SD below the shutdown threshold ( ≈ 0.45 V)
puts the device into shutdown. In shutdown, the reference/regulator is turned off and switching stops. The
switches are set such that both C and C
are discharged through the output load. Quiescent current in
IN
OUT
shutdown drops to approximately 100 µA. Any open-collector gate can be used to put the TLE2682 into
shutdown. For normal (unregulated) operation, the device restarts when the external gate is shut off. In
TLE2682 circuits that use the regulation feature, the external resistor divider can provide enough pulldown to
keep the device in shutdown until the output capacitor (C
) has fully discharged. For most applications where
OUT
45
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ꢕꢇ ꢀ ꢆ ꢊꢕ ꢇ ꢀ ꢖꢆ ꢂ ꢌꢉꢖꢑ ꢋꢑꢖ ꢇ ꢀꢒ ꢓ ꢗ ꢒꢁꢀꢑꢈꢂ ꢖꢒ ꢏꢗꢂ ꢓꢀ ꢂꢓ
SLOS127 − JUNE 1993
APPLICATION INFORMATION
the TLE2682 is run intermittently, this does not present a problem because the discharge time of the output
capacitor is short compared to the off time of the device. In applications where the device has to start up before
the output capacitor (C
) has fully discharged, a restart pulse must be applied to FB/SD of the TLE2682.
OUT
Using the circuit shown in Figure 105, the restart signal can be either a pulse (t > 100 µs) or a logic high. Diode
p
coupling the restart signal into FB/SD allows the output voltage to rise and regulate without overshoot. The
resistor divider R3/R4 shown in Figure 105 should be chosen to provide a signal level at FB/SD of
0.7 V−1.1 V. FB/SD is also the inverting input of the TLE2682 switched-capacitor section error amplifier and,
as such, can be used to obtain a regulated output voltage.
C
OUT
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1 OUT
1 IN−
1 IN+
V
+
100 µF Tantalum
CC
+
2 OUT
2 IN−
2 IN+
CAP−
GND
C1
+
V
OUT
V
CC−
V
OUT
V
REF
R2
C
IN
R1
10 µF
Tantalum
+
OSC
CAP+
FB/SD
V
IN
V
IN
R3
R4
+
2.2 µF
V
OUT
R2 = R1
+1
V
REF
− 40 mV
Shutdown
Restart
2
Where: V
= 2.5 V Nominal
REF
Figure 105. Basic Regulation Configuration
regulation
The error amplifier of the TLE2682 switched-capacitor section drives the npn switch to control the voltage across
the input capacitor (C ), which determines the output voltage. When the reference and error amplifier of the
IN
TLE2682 is used, an external resistive divider is all that is needed to set the regulated output voltage. Figure 105
shows the basic regulator configuration and the formula for calculating the appropriate resistor values. R1
should be 20 kΩ or greater because the reference current is limited to 100 µA. R2 should be in the range of
100 kΩ to 300 kΩ. Frequency compensation is accomplished by adjusting the ratio of C to C
For best
IN
OUT.
results, this ratio should be approximately 1 to 10. Capacitor C1, required for good load regulation, should be
0.002 µF for all output voltages.
46
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ꢕ ꢇꢀ ꢆ ꢊꢕ ꢇ ꢀꢖ ꢆꢂꢌꢉꢖꢑ ꢋꢑꢖꢇ ꢀꢒ ꢓ ꢗꢒ ꢁꢀꢑꢈ ꢂ ꢖꢒꢏ ꢗ ꢂꢓ ꢀꢂ ꢓ
SLOS127 − JUNE 1993
APPLICATION INFORMATION
regulation (continued)
The functional block diagram shows that the maximum regulated output voltage is limited by the supply voltage.
For the basic configuration, V
referenced to GND of the TLE2682 must be less than the total of the supply
OUT
voltage minus the voltage loss due to the switches. The voltage loss versus output current due to the switches
can be found in the typical performance curves.
capacitor selection
While the exact values of C and C
are necessary to minimize voltage losses at high currents. For C , the effect of the equivalent series resistance
(ESR) of the capacitor is multiplied by four since switch currents are approximately two times higher than output
are noncritical, good-quality low-ESR capacitors such as solid tantalum
IN
OUT
IN
current. Losses occur on both the charge and discharge cycle, which means that a capacitor with 1 Ω of ESR
for C has the same effect as increasing the output impedance of the switched-capacitor section by 4 Ω. This
IN
represents a significant increase in the voltage losses. C
is alternately charged and discharged at a current
OUT
approximately equal to the output current. The ESR of the capacitor causes a step function to occur in the output
ripple at the switch transitions. This step function degrades the output regulation for changes in output load
current and should be avoided. A smaller tantalum capacitor can be connected in parallel with a large aluminum
electrolytic capacitor to gain both low ESR and reasonable cost.
output ripple
The peak-to-peak output ripple is determined by the output capacitor and the output current values.
Peak-to-peak output ripple is approximated as shown in equation 4:
I
OUT
DV +
(4)
2 f C
OUT
where:
∆V = peak-to-peak ripple
= oscillator frequency
f
OSC
For output capacitors with significant ESR, a second term must be added to account for the voltage step at the
switch transitions. This step is approximately equal to:
(2I
) (ESR of C
)
(5)
OUT
OUT
power dissipation (switched-capacitor section only)
The power dissipation of any TLE2682 circuit must be limited so that the junction temperature of the device does
not exceed the maximum junction temperature ratings. The total power dissipation is calculated from two
components: the power loss due to voltage drops in the switches and the power loss due to drive current losses.
The total power dissipated by the TLE2682 is calculated as shown in equation 6:
Ť
Ť ) I
P [ (V
* V
) (V ) (I
) (0.2)
refer to GND. The power dissipation is equivalent to that of a linear
OUT
(6)
CC
and V
OUT
OUT
CC OUT
where both V
CC
regulator. Due to limitations of the DW package, steps must be taken to dissipate power externally for large input
or output differentials. This is accomplished by placing a resistor in series with C as shown in Figure 106. A
IN
portion of the input voltage is dropped across this resistor without affecting the output regulation. Since switch
current is approximately 2.2 times the output current and the resistor causes a voltage drop when C is both
IN
charging and discharging, the resistor value is calculated as follows:
R
+ V ń(4.4 I
)
X
X
OUT
where:
V
Ť
OUT
Ť
ƫ
ƪ
[ V
* (TLE2682 voltage loss) (1.3) ) V
(7)
X
CC
I
= maximum required output current
OUT
47
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POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢃ
ꢆ ꢇꢈ ꢆꢉꢊ ꢋꢂꢂ ꢌ ꢍ ꢎ ꢂꢀꢉꢇ ꢏꢋ ꢐꢀ ꢌꢐ ꢑꢁ ꢒ ꢋꢂ ꢓꢑꢀ ꢇꢒ ꢏꢑꢁ ꢑꢔ ꢋꢁ ꢇꢎ ꢇꢂ ꢓ
ꢕꢇ ꢀ ꢆ ꢊꢕ ꢇ ꢀ ꢖꢆ ꢂ ꢌꢉꢖꢑ ꢋꢑꢖ ꢇ ꢀꢒ ꢓ ꢗ ꢒꢁꢀꢑꢈꢂ ꢖꢒ ꢏꢗꢂ ꢓꢀ ꢂꢓ
SLOS127 − JUNE 1993
APPLICATION INFORMATION
power dissipation (continued)
The factor of 1.3 allows some operating margin for the TLE2682.
When using a 12-V to −5-V converter at 100-mA output current, calculate the power dissipation without an
external resistor:
|
|
P + (12 V * * 5 V ) (100 mA) ) (12 V) (100 mA) (0.2)
(8)
P + 700 mW ) 240 mW + 940 mW
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1 OUT
1 IN−
1 IN+
V
+
CC
C
OUT
+
2 OUT
2 IN−
2 IN+
CAP−
GND
C1
+
V
OUT
V
CC−
V
OUT
V
REF
R2
R1
C
IN
+
OSC
CAP+
FB/SD
Rx
V
IN
+
V
IN
Figure 106. Power-Dissipation-Limiting Resistor in Series With C
IN
At θ of 130°C/W for a commercial plastic device, a junction temperature rise of 122°C is seen. The device
JA
exceeds the maximum junction temperature at an ambient temperature of 25°C. To calculate the power
dissipation with an external resistor (R ), determine how much voltage can be dropped across R . The
X
X
maximum voltage loss of the TLE2682 in the standard regulator configuration at 100 mA output current is 1.6 V.
[
|
| ]
+ 4.9 V
V
R
+ 12 V * (1.6 V) (1.3) ) * 5 V
and
(9)
X
X
+ 4.9 Vń(4.4) (100 mA) + 11 W
The resistor reduces the power dissipated by the TLE2682 by (4.9 V) (100 mA) = 490 mW. The total power
dissipated by the TLE2682 is equal to (940 mW − 490 mW) = 450 mW. The junction temperature rise is 58°C.
Although commercial devices are functional up to a junction temperature of 125°C, the specifications are tested
to a junction temperature of 100°C. In this example, this means limiting the ambient temperature to 42°C. To
allow higher ambient temperatures, the thermal resistance numbers for the TLE2682 packages represent
worst-case numbers with no heat-sinking and still air. Small clip-on heat sinks can be used to lower the thermal
resistance of the TLE2682 package. Airflow in some systems helps to lower the thermal resistance. Wide PC
board traces from the TLE2682 leads help to remove heat from the device. This is especially true for plastic
packages.
48
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相关型号：
TLE2682IDWR
HIGH-SPEED JFET-INPUT DUAL OPERATIONAL AMPLIFIER WITH SWITCHED-CAPACITOR VOLTAGE CONVERTER
TI
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