TLV2434CPWRG4 [TI]
QUAD OP-AMP, 2500uV OFFSET-MAX, 0.5MHz BAND WIDTH, PDSO14, GREEN, PLASTIC, TSSOP-14;
| 型号： | TLV2434CPWRG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | QUAD OP-AMP, 2500uV OFFSET-MAX, 0.5MHz BAND WIDTH, PDSO14, GREEN, PLASTIC, TSSOP-14 放大器 光电二极管 |
| 文件： | 总45页 (文件大小：1113K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
Output Swing Includes Both Supply Rails
Extended Common-Mode Input Voltage
Very Low Supply Current . . . 125 µA Per
Channel Max
Range . . . 0 V to 4.5 V (Min) with 5-V Single
Supply
600-Ω Output Drive
Macromodel Included
No Phase Inversion
Available in Q-Temp Automotive
HighRel Automotive Applications
Configuration Control / Print Support
Qualification to Automotive Standards
Low Noise . . . 18 nV/√Hz Typ at f = 1 kHz
Low Input Offset Voltage
950 µV Max at T = 25°C (TLV243xA)
A
Low Input Bias Current . . . 1 pA Typ
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
description
The TLV243x and TLV243xA are low-voltage
operational amplifier from Texas Instruments. The
common-mode input voltage range for each
device is extended over the typical CMOS
amplifiers making them suitable for a wide range
of applications. In addition, these devices do not
phase invert when the common-mode input is
driven to the supply rails. This satisfies most
design requirements without paying a premium
for rail-to-rail input performance. They also exhibit
rail-to-rail output performance for increased
dynamic range in single- or split-supply applica-
tions. This family is fully characterized at 3-V and
5-V supplies and is optimized for low-voltage
operation. The TLV243x only requires 100 µA
(typ) of supply current per channel, making it ideal
for battery-powered applications. The TLV243x
also has increased output drive over previous
rail-to-rail operational amplifiers and can drive
600-Ω loads for telecom applications.
5
V
= 5 V
DD
4
3
T
= 125°C
A
T
= 85°C
A
2
T
= 25°C
A
T
=–40°C
A
1
0
0
4
8
12
16
20
I
– High-Level Output Current –
A
OH
Figure 1
The other members in the TLV243x family are the high-power, TLV244x, and micro-power, TLV2422, versions.
The TLV243x, exhibiting high input impedance and low noise, is excellent for small-signal conditioning for
high-impedance sources, such as piezoelectric transducers. Because of the micropower dissipation levels and
low-voltage operation, these devices work well in hand-held monitoring and remote-sensing applications. In
addition, the rail-to-rail output feature with single- or split-supplies makes this family a great choice when
interfacing with analog-to-digital converters (ADCs). For precision applications, the TLV243xA is available and
has a maximum input offset voltage of 950 µV.
Ifthedesignrequiressingleoperationalamplifiers, seetheTITLV2211/21/31. Thisisafamilyofrail-to-railoutput
operational amplifiers in the SOT-23 package. Their small size and low power consumption, make them ideal
for high density, battery-powered equipment.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Advanced LinCMOS is a trademark of Texas Instruments.
Copyright 2001, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
unless otherwise noted. On all other products, production
testing of all parameters.
processing does not necessarily include testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TLV2432 and TLV2432A AVAILABLE OPTIONS
PACKAGED DEVICES
V
max
IO
SMALL
OUTLINE
(D)
CERAMIC FLAT
T
A
CHIP CARRIER
(FK)
CERAMIC DIP
(JG)
TSSOP
(PW)
AT 25°C
PACK
(U)
0°C to 70°C
2.5 mV
TLV2432CD
—
—
TLV2432CPW
—
950 µV
2.5 mV
TLV2432AID
TLV2432ID
—
—
—
—
TLV2432AIPW
—
—
–40°C to 85°C
—
950 µV
2.5 mV
TLV2432AQD
TLV2432QD
—
—
—
—
—
—
—
—
–40°C to 125°C
–55°C to 125°C
950 µV
2.5 mV
—
—
TLV2432AMFK
TLV2432MFK
TLV2432AMJG
TLV2432MJG
—
—
TLV2432AMU
TLV2432MU
The D packages are available taped and reeled. Add R suffix to device type (e.g., TLV2432CDR). The PW package is available only left-end taped
and reeled.
TLV2434 AVAILABLE OPTIONS
PACKAGED DEVICES
SMALL
T
A
V
IO
max AT 25°C
TSSOP
(PW)
OUTLINE
(D)
0°C to 70°C
2.5 mV
TLV2434CD
TLV2434CPW
950 µV
2.5 mV
TLV2434AID
TLV2434ID
TLV2434AIPW
TLV2434IPW
–40°C to 125°C
The D packages are available taped and reeled. Add R suffix to device type (e.g., TLV2434CDR). The
PW package is available only left-end taped and reeled.
TLV2432
D OR JG PACKAGE
(TOP VIEW)
TLV2432
PW PACKAGE
(TOP VIEW)
1
2
3
8
7
6
5
1OUT
1IN–
1IN+
/GND
V
DD+
1OUT
1IN–
1IN+
/GND
V
DD+
1
2
3
4
8
7
6
5
2OUT
2IN–
2IN+
2OUT
2IN–
2IN+
4
V
DD –
V
DD–
TLV2432
FK PACKAGE
(TOP VIEW)
TLV2434
D OR PW PACKAGE
TLV2432
U PACKAGE
(TOP VIEW)
(TOP VIEW)
3
2
1
20 19
18
NC
NC
1IN–
NC
4
5
6
7
8
1
2
3
4
5
6
7
14
13
12
11
10
9
1OUT
1IN–
1IN+
4OUT
4IN–
4IN+
NC
NC
1
10
9
2OUT
NC
17
16
15
14
1OUT
1IN –
1IN +
/GND
V
+
2
3
4
5
DD
2OUT
2IN –
2IN +
8
2IN–
NC
1IN+
NC
V
+
V
/GND
7
DD
DD–
9 10 11 12 13
2IN+
2IN–
V
3IN+
3IN–
3OUT
6
DD–
8
2OUT
NC – No internal connection
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
equivalent schematic (each amplifier)
Q22
Q29
Q31
Q34
Q36
VB3
Q26
Q27
Q24
Q32
Q33
VB2
VB1
V
DD+
Q35
Q25
VB4
COMPONENT
COUNT
Transistors
Diodes
Resistors
Capacitors
69
Q23
Q30
D1
5
26
6
Q37
R10
R9
R3
Q3
R4
R7
Q13
Q15
IN–
Q6
Q8
Q10
Q18
Q1
Q4
Q20
IN+
C2
R5
R6
Q7
Q9
V /GND
DD–
C1
OUT
C3
Q11
Q12
Q16
Q17
VB3
VB2
Q14
Q2
Q5
Q21
R8
Q19
R1
R2
VB4
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 V
DD
Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±V
ID
DD
DD
Input voltage, V (any input, see Note 1): C and I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to V
I
Input current, I (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5 mA
I
Output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
O
Total current into V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
DD+
DD–
Total current out of V
Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, T : C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
A
I suffix (dual) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C
I suffix (quad) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 125°C
Q suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 125°C
M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
Storage temperature range, T
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between V
and V .
DD+
DD –
2. Differential voltages are at IN+ with respect to IN–. Excessive current flows if input is brought below V
– 0.3 V.
DD–
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING FACTOR
T
= 70°C
T
= 85°C
T = 125°C
A
POWER RATING
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING
POWER RATING
A
D (8)
D (14)
FK
725 mW
1022 mW
1375 mW
1050 mW
525 mW
720 mW
675 mW
5.8 mW/°C
7.6 mW/°C
11.0 mW/°C
8.4 mW/°C
4.2 mW/°C
5.6 mW/°C
5.4 mW/°C
464 mW
900 mW
880 mW
672 mW
336 mW
634 mW
432 mW
377 mW
777 mW
715 mW
546 mW
273 mW
547 mW
350 mW
145 mW
450 mW
275 mW
210 mW
105 mW
317 mW
135 mW
JG
PW (8)
PW (14)
U
recommended operating conditions
C SUFFIX
I SUFFIX
Q SUFFIX
M SUFFIX
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
Supply voltage, V
2.7
10
2.7
10
2.7
10
2.7
10
V
V
DD
Input voltage range, V
V
V
V
V
–0.8
V
V
V
V
–0.8
V
V
V
V
–0.8
V
V
V
V
–0.8
I
DD–
DD+
DD–
DD+
DD–
DD+
DD–
DD+
Common-mode input voltage, V
IC
–1.3
–1.3
–1.3
–1.3
V
DD–
DD+
DD–
–40
DD+
DD–
–40
DD+
DD–
–55
DD+
Operating free-air temperature, T
0
70
125
125
125
°C
A
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
electrical characteristics at specified free-air temperature, V
= 3 V (unless otherwise noted)
DD
TLV243x
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
TYP MAX
300 2000
2500
25°C
Full range
25°C
TLV243xC,
TLV243xI
V
V
V
= 0,
= 0,
IC
O
DD
V
IO
Input offset voltage
µV
± = ±1.5 V,
= 50 Ω
300
950
TLV243xAI
R
S
Full range
1500
25°C
to 70°C
α
Temperature coefficient of input offset voltage
2
µV/°C
µV/mo
pA
VIO
Input offset voltage long-term drift
(see Note 4)
25°C
0.003
0.5
V
V
= 0,
= 0,
V
R
± = ±1.5 V,
= 50 Ω
IC
O
DD
S
25°C
Full range
25°C
60
150
60
I
I
Input offset current
Input bias current
IO
1
pA
IB
Full range
150
0
to
–0.25
to
25°C
2.5
2.75
V
ICR
Common-mode input voltage range
|V | ≤ 5 mV,
IO
R
= 50 Ω
V
S
0
to
Full range
2.2
I
I
= –100 µA
= –3 mA
= 1.5 V,
25°C
25°C
2.98
2.5
OH
V
V
High-level output voltage
V
V
OH
OH
Full range
25°C
2.25
V
V
I
I
= 100 µA
0.02
0.83
IC
OL
Low-level output voltage
25°C
OL
= 1.5 V,
= 3
A
IC
OL
Full range
25°C
1
1.5
1
2.5
‡
R
R
= 2 kΩ
V
V
= 2.5 V,
= 1 V to 2 V
L
L
IC
O
Full range
25°C
A
VD
Large-signal differential voltage amplification
V/mV
‡
750
= 1 MΩ
r
r
Differential input resistance
25°C
GΩ
GΩ
pF
Ω
1000
1000
8
i(d)
i(c)
Common-mode input resistance
Common-mode input capacitance
Closed-loop output impedance
25°C
c
z
f = 10 kHz
25°C
i(c)
o
f = 100 kHz,
A
= 10
25°C
130
83
V
25°C
70
70
80
80
V
R
= 0 to 2.5 V, V = 1.5 V,
O
= 50 Ω
IC
S
CMRR Common-mode rejection ratio
dB
dB
µA
Full range
25°C
95
98
V
DD
V
IC
= 2.7 V to 8 V,
k
Supply-voltage rejection ratio (∆V /∆V
)
SVR
DD
IO
= V
/2,
No load
Full range
25°C
DD
125
125
I
Supply current (per channel)
V
O
= 1.5 V,
No load
DD
Full range
†
‡
Full range for the C suffix is 0°C to 70°C. Full range for the dual I suffix is – 40°C to 85°C. Full range for the quad I suffix is – 40°C to 125°C.
Referenced to 2.5 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at T = 150°C extrapolated
A
to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
operating characteristics at specified free-air temperature, V
= 3 V
DD
TLV243x
TYP
†
PARAMETER
TEST CONDITIONS
UNIT
V/µs
T
A
MIN
MAX
25°C
0.15
0.25
‡
V
C
= 1 V to 2 V,
R
= 2 kΩ ,
L
O
L
SR
Slew rate at unity gain
Full
range
‡
= 100 pF
0.1
f = 10 Hz
f = 1 kHz
25°C
25°C
25°C
25°C
25°C
120
22
2.7
4
V
n
Equivalent input noise voltage
nV/√Hz
f = 0.1 Hz to 1 Hz
f = 0.1 Hz to 10 Hz
V
I
Peak-to-peak equivalent input noise voltage
Equivalent input noise current
µV
N(PP)
0.6
fA√Hz
n
V
= 0.5 V to 2.5 V,
A
= 1
0.065%
0.5%
O
V
THD + N Total harmonic distortion plus noise
Gain-bandwidth product
25°C
f = 1 kHz,
R
‡
= 2 kΩ
A
V
= 10
L
‡
f = 10 kHz,
R
= 2 kΩ ,
L
25°C
25°C
0.5
MHz
kHz
‡
C
= 100 pF
L
V
= 1 V,
A
= 1,
O(PP)
V
B
Maximum output-swing bandwidth
Settling time
220
6.4
OM
‡
‡
‡
C
= 100 pF
R
= 2 kΩ ,
L
L
A
= –1,
V
To 0.1%
Step = 0.5 V to 2.5 V,
t
s
25°C
µs
‡
R
C
= 2 kΩ ,
L
L
To 0.01%
14.1
‡
= 100 pF
62°
φ
m
Phase margin at unity gain
Gain margin
25°C
25°C
‡,
= 2 kΩ
R
C = 100 pF
L
L
11
dB
†
‡
Full range for the C suffix is 0°C to 70°C. Full range for the dual I suffix is – 40°C to 85°C. Full range for the quad I suffix is – 40°C to 125°C.
Referenced to 2.5 V
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
electrical characteristics at specified free-air temperature, V
= 3 V (unless otherwise noted)
DD
TLV243xQ,
TLV243xM
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
TYP MAX
25°C
Full range
25°C
300 2000
2500
TLV243xQ,
TLV243xM
V
V
V
= 0,
= 0,
± = ±1.5 V,
DD
= 50 Ω
IC
V
IO
Input offset voltage
µV
300
950
TLV243xAQ,
TLV243xAM
R
S
Full range
2000
25°C
to 70°C
α
Temperature coefficient of input offset voltage
2
µV/°C
µV/mo
pA
VIO
Input offset voltage long-term drift
(see Note 4)
25°C
0.003
0.5
V
V
= 0,
= 0,
V
R
± = ±1.5 V,
= 50 Ω
IC
O
DD
S
25°C
Full range
25°C
60
150
60
I
I
Input offset current
Input bias current
IO
1
pA
IB
Full range
300
0
to
–0.25
to
25°C
2.5
2.75
V
ICR
Common-mode input voltage range
|V | ≤ 5 mV,
IO
R
= 50 Ω
V
S
0
to
Full range
2.2
I
I
= –100 µA
= –3 mA
= 1.5 V,
25°C
25°C
2.98
2.5
OH
V
V
High-level output voltage
V
V
OH
OH
Full range
25°C
2.25
V
V
I
I
= 100 µA
0.02
0.83
IC
OL
Low-level output voltage
25°C
OL
= 1.5 V,
= 3
A
IC
OL
Full range
25°C
1
1.5
0.5
2.5
‡
R
R
= 2 kΩ
V
V
= 2.5 V,
= 1 V to 2 V
L
L
IC
O
Full range
25°C
A
VD
Large-signal differential voltage amplification
V/mV
‡
750
= 1 MΩ
r
r
Differential input resistance
25°C
GΩ
GΩ
pF
Ω
1000
1000
8
i(d)
i(c)
Common-mode input resistance
Common-mode input capacitance
Closed-loop output impedance
25°C
c
z
f = 10 kHz
25°C
i(c)
o
f = 100 kHz,
A
= 10
25°C
130
83
V
25°C
70
70
80
80
V
R
= 0 to 2.5 V, V = 1.5 V,
O
= 50 Ω
IC
S
CMRR Common-mode rejection ratio
dB
dB
µA
Full range
25°C
95
V
DD
V
IC
= 2.7 V to 8 V,
k
Supply-voltage rejection ratio (∆V /∆V
)
SVR
DD
IO
= V
/2,
No load
Full range
25°C
DD
195
250
260
I
Supply current
V
O
= 1.5 V,
No load
DD
Full range
†
‡
Full range is –40°C to 125°C for Q level part, –55°C to 125°C for M level part.
Referenced to 2.5 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at T = 150°C extrapolated
A
to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
operating characteristics at specified free-air temperature, V
= 3 V
DD
TLV243xQ,
TLV243xM,
TLV243xAQ,
TLV243xAM
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
TYP
MAX
25°C
0.15
0.25
‡
V
C
= 1 V to 2 V,
= 100 pF
R
= 2 kΩ ,
L
O
L
SR
Slew rate at unity gain
V/µs
Full
range
‡
0.1
f = 10 Hz
f = 1 kHz
25°C
25°C
25°C
25°C
25°C
120
22
2.7
4
V
n
Equivalent input noise voltage
nV/√Hz
f = 0.1 Hz to 1 Hz
f = 0.1 Hz to 10 Hz
V
I
Peak-to-peak equivalent input noise voltage
Equivalent input noise current
µV
N(PP)
0.6
fA√Hz
n
V
= 0.5 V to 2.5 V,
A
= 1
0.065%
0.5%
O
V
THD + N Total harmonic distortion plus noise
Gain-bandwidth product
25°C
f = 1 kHz,
R
‡
= 2 kΩ
A
V
= 10
L
‡
f = 10 kHz,
R
= 2 kΩ ,
L
25°C
25°C
0.5
MHz
kHz
‡
C
= 100 pF
L
V
= 1 V,
A
= 1,
O(PP)
V
B
Maximum output-swing bandwidth
Settling time
220
6.4
OM
‡
‡
‡
C
= 100 pF
R
= 2 kΩ ,
L
L
A
= –1,
V
To 0.1%
Step = 0.5 V to 2.5 V,
t
s
25°C
µs
‡
R
C
= 2 kΩ ,
L
L
To 0.01%
14.1
‡
= 100 pF
62°
φ
m
Phase margin at unity gain
Gain margin
25°C
25°C
‡,
= 2 kΩ
R
C = 100 pF
L
L
11
dB
†
‡
Full range is –40°C to 125°C for Q level part, –55°C to 125°C for M level part.
Referenced to 2.5 V
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
electrical characteristics at specified free-air temperature, V
= 5 V (unless otherwise noted)
DD
TLV243x
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
TYP MAX
300 2000
2500
25°C
Full range
25°C
V
V
V
= 0,
TLV243x
IC
O
DD
= 0,
V
IO
Input offset voltage
µV
± = ±2.5 V,
= 50 Ω
300
950
TLV243xA
R
S
Full range
1500
25°C
to 70°C
α
Temperature coefficient of input offset voltage
2
µV/°C
µV/mo
pA
VIO
Input offset voltage long-term drift
(see Note 4)
25°C
0.003
0.5
V
V
= 0,
= 0,
V
R
± = ±2.5 V,
= 50 Ω
IC
O
DD
S
25°C
Full range
25°C
60
150
60
I
I
Input offset current
Input bias current
IO
1
pA
IB
Full range
150
0
to
–0.25
to
25°C
4.5
4.75
V
ICR
Common-mode input voltage range
|V | ≤ 5 mV,
IO
R
= 50 Ω
V
S
0
to
Full range
4.2
I
I
= –100 µA
= –5 mA
= 2.5 V,
25°C
25°C
4.97
4.35
OH
V
V
High-level output voltage
4
4
V
V
OH
OH
Full range
25°C
V
V
I
I
= 100 µA
0.01
0.8
IC
OL
Low-level output voltage
25°C
OL
= 2.5 V,
= 5
A
IC
OL
Full range
25°C
1.25
2.5
1.5
3.8
‡
R
R
= 2 kΩ
V
V
= 2.5 V,
= 1 V to 4 V
L
L
IC
O
Full range
25°C
A
VD
Large-signal differential voltage amplification
V/mV
‡
950
= 1 MΩ
r
r
Differential input resistance
25°C
GΩ
GΩ
pF
Ω
1000
1000
8
i(d)
i(c)
Common-mode input resistance
Common-mode input capacitance
Closed-loop output impedance
25°C
c
z
f = 10 kHz
25°C
i(c)
o
f = 100 kHz,
A
= 10
25°C
130
90
V
25°C
70
70
80
80
V
R
= 0 to 4.5 V, V = 2.5 V,
O
= 50 Ω
IC
S
CMRR Common-mode rejection ratio
dB
dB
µA
Full range
25°C
95
V
DD
V
IC
= 4.4 V to 8 V,
k
Supply-voltage rejection ratio (∆V /∆V
)
SVR
DD
IO
= V
/2,
No load
Full range
25°C
DD
100
125
125
I
Supply current (per channel)
V
O
= 2.5 V,
No load
DD
Full range
†
‡
Full range for the C suffix is 0°C to 70°C. Full range for the dual I suffix is – 40°C to 85°C. Full range for the quad I suffix is – 40°C to 125°C.
Referenced to 2.5 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at T = 150°C extrapolated
A
to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
operating characteristics at specified free-air temperature, V
= 5 V
DD
TLV243x
TYP
†
PARAMETER
TEST CONDITIONS
UNIT
V/µs
T
A
MIN
MAX
25°C
0.15
0.25
‡
V
C
= 1.5 V to 3.5 V,
R
= 2 kΩ ,
L
O
L
SR
Slew rate at unity gain
Full
range
‡
= 100 pF
0.1
f = 10 Hz
f = 1 kHz
25°C
25°C
25°C
25°C
25°C
100
18
V
n
Equivalent input noise voltage
nV/√Hz
f = 0.1 Hz to 1 Hz
f = 0.1 Hz to 10 Hz
1.9
2.8
0.6
V
I
Peak-to-peak equivalent input noise voltage
Equivalent input noise current
µV
N(PP)
fA√Hz
n
V
= 1.5 V to 3.5 V,
A
= 1
0.045%
0.4%
O
V
THD + N Total harmonic distortion plus noise
Gain-bandwidth product
25°C
f = 1 kHz,
R
‡
= 2 kΩ
A
V
= 10
L
‡
f = 10 kHz,
R
=2 kΩ ,
L
25°C
25°C
0.55
MHz
kHz
‡
C
= 100 pF
L
V
= 2 V,
A
= 1,
O(PP)
V
B
Maximum output-swing bandwidth
Settling time
100
6.4
OM
‡
‡
‡
C
= 100 pF
R
= 2 kΩ ,
L
L
A
V
= –1,
To 0.1%
Step = 1.5 V to 3.5 V,
t
s
25°C
µs
‡
R
C
= 2 kΩ ,
L
L
To 0.01%
13.1
‡
= 100 pF
66°
φ
m
Phase margin at unity gain
Gain margin
25°C
25°C
‡,
= 2 kΩ
R
C = 100 pF
L
L
11
dB
†
‡
Full range for the C suffix is 0°C to 70°C. Full range for the dual I suffix is – 40°C to 85°C. Full range for the quad I suffix is – 40°C to 125°C.
Referenced to 2.5 V
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
electrical characteristics at specified free-air temperature, V
= 5 V (unless otherwise noted)
DD
TLV243xQ,
TLV243xM
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
TYP MAX
25°C
Full range
25°C
300 2000
2500
V
V
V
= 0,
= 0,
± = ±2.5 V,
DD
= 50 Ω
TLV2453x
IC
V
IO
Input offset voltage
µV
300
950
TLV2453xA
R
S
Full range
2000
25°C
to 70°C
α
Temperature coefficient of input offset voltage
2
µV/°C
µV/mo
pA
VIO
Input offset voltage long-term drift
(see Note 4)
25°C
0.003
0.5
V
V
= 0,
= 0,
V
R
± = ±2.5 V,
= 50 Ω
IC
O
DD
S
25°C
Full range
25°C
60
150
60
I
I
Input offset current
Input bias current
IO
1
pA
IB
Full range
300
0
to
–0.25
to
25°C
4.5
4.75
V
ICR
Common-mode input voltage range
|V | ≤ 5 mV,
IO
R
= 50 Ω
V
S
0
to
Full range
4.2
I
I
= –100 µA
= –5 mA
= 2.5 V,
25°C
25°C
4.97
4.35
OH
V
V
High-level output voltage
4
4
V
V
OH
OH
Full range
25°C
V
V
I
I
= 100 µA
0.01
0.8
IC
OL
Low-level output voltage
25°C
OL
= 2.5 V,
= 5
A
IC
OL
Full range
25°C
1.25
2.5
0.5
3.8
‡
R
R
= 2 kΩ
V
V
= 2.5 V,
= 1 V to 4 V
L
L
IC
O
Full range
25°C
A
VD
Large-signal differential voltage amplification
V/mV
‡
950
= 1 MΩ
r
r
Differential input resistance
25°C
GΩ
GΩ
pF
Ω
1000
1000
8
i(d)
i(c)
Common-mode input resistance
Common-mode input capacitance
Closed-loop output impedance
25°C
c
z
f = 10 kHz
25°C
i(c)
o
f = 100 kHz,
A
= 10
25°C
130
90
V
25°C
70
70
80
80
V
R
= 0 to 4.5 V, V = 2.5 V,
O
= 50 Ω
IC
S
CMRR Common-mode rejection ratio
dB
dB
µA
Full range
25°C
95
V
DD
V
IC
= 4.4 V to 8 V,
k
Supply-voltage rejection ratio (∆V /∆V
)
SVR
DD
IO
= V
/2,
No load
Full range
25°C
DD
200
250
270
I
Supply current
V
O
= 2.5 V,
No load
DD
Full range
†
‡
Full range is –40°C to 125°C for Q level part, –55°C to 125°C for M level part.
Referenced to 2.5 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at T = 150°C extrapolated
A
to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
operating characteristics at specified free-air temperature, V
= 5 V
DD
TLV243xQ,
TLV243xM,
TLV243xAQ,
TLV243xAM
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
TYP
MAX
25°C
0.15
0.25
‡
V
= 1.5 V to 3.5 V,
R
= 2 kΩ ,
L
O
L
SR
Slew rate at unity gain
V/µs
Full
range
‡
0.1
f = 10 Hz
f = 1 kHz
25°C
25°C
25°C
25°C
25°C
100
18
V
n
Equivalent input noise voltage
nV/√Hz
f = 0.1 Hz to 1 Hz
f = 0.1 Hz to 10 Hz
1.9
2.8
0.6
V
I
Peak-to-peak equivalent input noise voltage
Equivalent input noise current
µV
N(PP)
fA√Hz
n
V
= 1.5 V to 3.5 V,
A
= 1
0.045%
0.4%
O
V
THD + N Total harmonic distortion plus noise
Gain-bandwidth product
25°C
f = 1 kHz,
R
‡
= 2 kΩ
A
V
= 10
L
‡
f = 10 kHz,
R
=2 kΩ ,
L
25°C
25°C
0.55
MHz
kHz
‡
C
= 100 pF
L
V
= 2 V,
A
= 1,
O(PP)
V
B
Maximum output-swing bandwidth
Settling time
100
6.4
OM
‡
‡
‡
C
= 100 pF
R
= 2 kΩ ,
L
L
A
= –1,
V
To 0.1%
Step = 1.5 V to 3.5 V,
t
s
25°C
µs
‡
R
C
= 2 kΩ ,
L
L
To 0.01%
13.1
‡
= 100 pF
66°
φ
m
Phase margin at unity gain
Gain margin
25°C
25°C
‡,
= 2 kΩ
R
C = 100 pF
L
L
11
dB
†
‡
Full range is –40°C to 125°C for Q level part, –55°C to 125°C for M level part.
Referenced to 2.5 V
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
Distribution
vs Common-mode input voltage
2,3
4,5
V
IO
Input offset voltage
α
Temperature coefficient
Distribution
6,7
8
VIO
I
/I
Input bias and input offset currents
High-level output voltage
vs Free-air temperature
vs High-level output current
vs Low-level output current
vs Frequency
IB IO
V
V
V
9,11
10,12
13
OH
Low-level output voltage
OL
Maximum peak-to-peak output voltage
O(PP)
vs Supply voltage
vs Free-air temperature
14
15
I
Short-circuit output current
OS
V
Differential input voltage
vs Output voltage
vs Load resistance
vs Frequency
16,17
18
ID
Differential gain
A
VD
Large-signal differential voltage amplification
Differential voltage amplification
Output impedance
19,20
21,22
23,24
A
vs Free-air temperature
vs Frequency
VD
o
z
vs Frequency
vs Free-air temperature
25
26
CMRR
Common-mode rejection ratio
vs Frequency
vs Free-air temperature
27,28
29
k
Supply-voltage rejection ratio
Supply current
SVR
I
vs Supply voltage
30
DD
vs Load capacitance
vs Free-air temperature
31
32
SR
Slew rate
V
V
V
V
V
Inverting large-signal pulse response
Voltage-follower large-signal pulse response
Inverting small-signal pulse response
Voltage-follower small-signal pulse response
Equivalent input noise voltage
33,34
35,36
37,38
39,40
41, 42
43
O
O
O
O
n
vs Frequency
Noise voltage (referred to input)
Over a 10-second period
vs Frequency
THD + N
Total harmonic distortion plus noise
44,45
vs Free-air temperature
vs Supply voltage
46
47
Gain-bandwidth product
Phase margin
vs Frequency
vs Load capacitance
19,20
48
φ
m
Gain margin
vs Load capacitance
vs Load capacitance
49
50
B
1
Unity-gain bandwidth
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLV2432
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLV2432
INPUT OFFSET VOLTAGE
35
30
35
30
408 Amplifiers From 1 Wafer Lot
408 Amplifiers From 1 Wafer Lot
V = ± 1.5 V
DD±
= 25°C
V = ± 2.5 V
DD±
= 25°C
T
A
T
A
25
20
15
25
20
15
10
10
5
5
0
0
–1600
–800
0
800
1600
–1600
–800
0
800
1600
V
IO
– Input Offset Voltage – µV
V
IO
– Input Offset Voltage – µV
Figure 2
Figure 3
INPUT OFFSET VOLTAGE
vs
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
COMMON-MODE INPUT VOLTAGE
2
2
V
T
=3 V
= 25°C
DD
A
V
T
A
= 5 V
DD
= 25°C
1.5
1.5
1
1
0.5
0.5
0
–0.5
–1
0
–0.5
–1
–1.5
–2
–1.5
–2
–0.5
0
0.5
1
1.5
2
2.5
3
–0.5 0 0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
V
IC
– Common-Mode Input Voltage – V
V
IC
– Common-Mode Input Voltage – V
Figure 4
Figure 5
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLV2432 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT
DISTRIBUTION OF TLV2432 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT
25
25
20
32 Amplifiers From 1 Wafer Lot
32 Amplifiers From 1 Wafer Lot
V = ± 2.5 V
DD
T = 25°C to 125°C
V = ± 1.5 V
DD
T = 25°C to 125°C
A
A
20
15
15
10
5
10
5
0
0
–4
–3
–2
–1
0
1
2
3
4
–4
–3
–2
–1
0
1
2
3
4
α
α
– Temperature Coefficient – µV/°C
– Temperature Coefficient – µV/°C
VIO
VIO
Figure 6
Figure 7
INPUT BIAS AND INPUT OFFSET CURRENTS
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
vs
FREE-AIR TEMPERATURE
35
3
2.5
2
V
V
V
= ±2.5 V
= 0 V
= 0
= 50 Ω
DD±
IC
O
V
DD
= 3 V
30
25
R
S
T
A
= –40°C
I
IB
T
A
= 25°C
20
15
T
A
= 125°C
1.5
1
I
IO
10
T
A
= 0°C
0.5
0
5
0
25
45
65
85
105
125
0
3
6
9
12
15
T
A
– Free-Air Temperature – °C
I
– High-Level Output Current – mA
OH
Figure 8
Figure 9
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
1.4
1.2
5
V
DD
= 3 V
V
DD
= 5 V
T
A
= 125°C
4
3
T
A
= 85°C
1
0.8
0.6
0.4
T
A
= 125°C
T
A
= 85°C
2
T
A
= 25°C
T
= 25°C
=–40°C
A
T
T
A
= –40°C
A
1
0
0.2
0
0
1
2
3
4
5
0
4
8
12
16
20
I
OL
– Low-Level Output Current – mA
I
– High-Level Output Current –
A
OH
Figure 10
Figure 11
LOW-LEVEL OUTPUT VOLTAGE
vs
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
FREQUENCY
1.2
1
5
4
3
2
R
T
A
= 2 kΩ
= 25°C
L
V
DD
= 5 V
V
= 5 V
DD
DD
T
= 125°C
A
0.8
T
A
= 85°C
0.6
V
= 3 V
0.4
0.2
0
T
= 25°C
A
T
A
= –40°C
1
0
0
1
2
3
4
5
2
3
10
4
5
10
6
10
10
10
f – Frequency – Hz
I
– Low-Level Output Current – mA
OL
Figure 12
Figure 13
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
SHORT-CIRCUIT OUTPUT CURRENT
SHORT-CIRCUIT OUTPUT CURRENT
vs
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
20
15
20
15
V
V
T
A
= V /2
DD
DD
= 25°C
O
IC
V
V
V
= 5 V
= 2.5 V
= 2.5 V
DD
IC
O
= V /2
V
ID
= –100 mV
10
5
10
5
0
0
–5
–5
–10
–10
–15
–20
V
ID
= 100 mV
–15
–20
2
3
4
5
6
7
8
9
10
–75 –50 –25
0
25
50
75
100 125
V
DD
– Supply Voltage – V
T
– Free-Air Temperature – °C
A
Figure 14
Figure 15
DIFFERENTIAL INPUT VOLTAGE
DIFFERENTIAL INPUT VOLTAGE
vs
vs
OUTPUT VOLTAGE
OUTPUT VOLTAGE
1000
1000
750
V
R
= 3 V
= 2 kΩ
= 1.5 V
= 25°C
DD
L
V
V
R
= 5 V
DD
IC
L
= 2.5 V
= 2 kΩ
= 25°C
750
500
250
0
V
T
IC
A
T
A
500
250
0
–250
–500
–250
–500
–750
–750
–1000
–1000
0
0.5
1
1.5
2
2.5
3
0
1
2
3
4
5
V
O
– Output Voltage – V
V
O
– Output Voltage – V
Figure 16
Figure 17
17
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TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
DIFFERENTIAL GAIN
vs
LOAD RESISTANCE
3
2
10
V
T
A
= 2 V
O(PP)
= 25°C
V
DD
= 5 V
V
= 3 V
DD
10
1
10
1
1
10
2
10
3
10
1
R
– Load Resistance – kΩ
L
Figure 18
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE MARGIN
vs
FREQUENCY
80
60
40
180°
135°
90°
V
R
C
= 5 V
= 2 kΩ
= 100 pF
= 25°C
DD
L
L
T
A
20
0
45°
0°
–20
–40
–45°
–90°
4
5
10
6
10
7
10
10
f – Frequency – Hz
Figure 19
18
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TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE MARGIN
vs
FREQUENCY
80
60
40
180°
135°
90°
V
R
C
= 3 V
= 2 kΩ
= 100 pF
= 25°C
DD
L
L
T
A
45°
20
0
0°
–20
–40
–45°
–90°
4
5
10
6
10
7
10
10
f – Frequency – Hz
Figure 20
DIFFERENTIAL VOLTAGE AMPLIFICATION
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
10000
1000
100
10
1000
100
10
V
V
V
= 3 V
= 2.5 V
= 0.5 V to 2.5 V
DD
IC
O
R
= 1 MΩ
L
R
= 1 MΩ
L
R
= 2 kΩ
L
1
1
V
V
V
= 5 V
= 2.5 V
= 1 V to 4 V
DD
IC
O
R
= 2 kΩ
L
0.1
0.1
–75 –50 –25
0
25
50
75 100 125
–75 –50 –25
0
25
50
75 100 125
T
A
– Free-Air Temperature – °C
T
A
– Free-Air Temperature – °C
Figure 21
Figure 22
19
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TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
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SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
OUTPUT IMPEDANCE
vs
OUTPUT IMPEDANCE
vs
FREQUENCY
FREQUENCY
1000
100
1000
100
V
T
A
= 3 V
DD
= 25°C
V
T
A
= 5 V
DD
= 25°C
A
= 100
V
A
= 100
V
A
V
= 10
A
V
= 10
10
10
A
V
= 1
A
V
= 1
1
10
1
10
2
3
10
4
10
5
10
2
3
10
4
10
5
10
f – Frequency – Hz
f – Frequency – Hz
Figure 23
Figure 24
COMMON-MODE REJECTION RATIO
COMMON-MODE REJECTION RATIO
vs
vs
FREQUENCY
FREE-AIR TEMPERATURE
100
80
100
T
A
= 25°C
V
V
= 5 V
= 2.5 V
DD
IC
V
DD
= 5 V
98
96
V
V
= 3 V
= 1.5 V
DD
IC
60
V
DD
= 3 V
40
94
20
0
92
90
2
3
10
4
10
5
10
6
10
10
–75 –50 –25
0
25
50
75 100 125
f – Frequency – Hz
T
A
– Free-Air Temperature – °C
Figure 25
Figure 26
20
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
SUPPLY-VOLTAGE REJECTION RATIO
SUPPLY-VOLTAGE REJECTION RATIO
vs
vs
FREQUENCY
FREQUENCY
120
100
120
100
80
V
T
A
= 3 V
DD
= 25°C
V
T
A
= 5 V
DD
= 25°C
80
60
40
60
40
20
0
20
0
1
2
10
3
10
4
10
5
10
6
10
10
1
2
10
3
10
4
10
5
10
6
10
10
f – Frequency – Hz
f – Frequency – Hz
Figure 27
Figure 28
SUPPLY VOLTAGE REJECTION RATIO
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
vs
FREE-AIR TEMPERATURE
100
300
250
200
150
V
= V /2
DD
O
No Load
T
A
= 25°C
98
96
T
= –40°C
= 85°C
A
T
A
94
100
92
90
50
0
V
V
= 2.7 V to 8 V
DD
= V /2
O
DD
–75 –50 –25
0
25
50
75 100 125
0
2
4
6
8
10
T
A
– Free-Air Temperature – °C
V
DD
– Supply Voltage – V
Figure 29
Figure 30
21
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Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
SLEW RATE
vs
LOAD CAPACITANCE
SLEW RATE
vs
FREE-AIR TEMPERATURE
0.6
0.35
V
= 3 V
DD
= –1
V
R
C
= 5 V
DD
L
L
SR–
A
V
A
= 2 kΩ
= 100 pF
= 1
T
= 25°C
0.5
0.4
0.3
A
V
SR+
0.25
0.3
0.2
0.2
0.15
0.1
0.1
0
1
2
L
3
4
5
10
10
10
10
10
–75 –50 –25
0
25
50
75 100 125
C
– Load Capacitance – pF
T
A
– Free-Air Temperature – °C
Figure 31
Figure 32
INVERTING LARGE-SIGNAL PULSE
RESPONSE
INVERTING LARGE-SIGNAL PULSE
RESPONSE
3
2.5
2
5
4
V
R
C
= 3 V
= 2 kΩ
= 100 pF
= –1
DD
L
L
V
R
C
= 5 V
= 2 kΩ
= 100 pF
= –1
DD
L
L
A
V
A
A
V
A
T
= 25°C
T
= 25°C
3
2
1.5
1
1
0
0.5
0
0
10
20
30
40
50
0
10
20
30
40
50
t – Time – µs
t – Time – µs
Figure 33
Figure 34
22
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Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
3
2.5
2
5
4
3
2
1
0
V
R
C
= 3 V
= 2 kΩ
= 100 pF
= 1
DD
L
L
V
R
C
= 5 V
= 2 kΩ
= 100 pF
= 1
DD
L
L
A
V
A
A
V
A
T
= 25°C
T
= 25°C
1.5
1
0.5
0
0
10
20
30
40
50
0
5
10 15 20 25 30 35 40 45 50
t – Time – µs
t – Time – µs
Figure 35
Figure 36
INVERTING SMALL-SIGNAL PULSE
RESPONSE
INVERTING SMALL-SIGNAL
PULSE RESPONSE
1.58
1.56
2.58
2.56
2.54
V
R
C
= 3 V
= 2 kΩ
= 100 pF
= –1
DD
L
L
V
R
C
= 5 V
DD
L
L
= 2 kΩ
= 100 pF
= –1
A
V
A
A
V
A
T
= 25°C
T
= 25°C
1.54
1.52
2.52
2.5
1.5
1.48
1.46
1.44
2.48
2.46
2.44
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
t – Time – µs
t – Time – µs
Figure 37
Figure 38
23
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
VOLTAGE-FOLLOWER SMALL-SIGNAL
PULSE RESPONSE
VOLTAGE-FOLLOWER SMALL-SIGNAL
PULSE RESPONSE
1.58
1.56
1.54
2.58
2.56
V
R
C
= 3 V
= 2 kΩ
= 100 pF
= 1
DD
L
L
V
R
C
= 5 V
= 2 kΩ
= 100 pF
= 1
DD
L
L
A
V
A
A
V
A
T
= 25°C
T
= 25°C
2.54
2.52
1.52
1.5
2.5
1.48
1.46
1.44
2.48
2.46
2.44
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
t – Time – µs
t – Time – µs
Figure 39
Figure 40
EQUIVALENT INPUT NOISE VOLTAGE
EQUIVALENT INPUT NOISE VOLTAGE
vs
vs
FREQUENCY
FREQUENCY
120
100
80
120
100
V
R
T
A
= 3 V
= 20 Ω
= 25°C
DD
S
V
= 5 V
= 20 Ω
= 25°C
DD
S
R
T
A
80
60
60
40
40
20
0
20
0
1
2
10
3
10
4
10
1
2
10
3
10
4
10
10
10
f – Frequency – Hz
f – Frequency – Hz
Figure 41
Figure 42
24
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Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
NOISE VOLTAGE OVER A 10-SECOND PERIOD
2000
1500
1000
500
0
–500
–1000
–1500
–2000
V
= 5 V
DD
f = 0.1 Hz to 10 Hz
= 25°C
T
A
0
1
2
3
4
5
6
7
8
9
10
t – Time – s
Figure 43
TOTAL HARMONIC DISTORTION PLUS NOISE
TOTAL HARMONIC DISTORTION PLUS NOISE
vs
vs
FREQUENCY
FREQUENCY
10
10
V
T
= 5 V
= 25°C
DD
A
V
T
A
= 3 V
DD
= 25°C
R
R
= 2 kΩ Tied to 2.5 V
= 2 kΩ Tied to 0 V
L
L
R
R
= 2 kΩ Tied to 1.5 V
= 2 kΩ Tied to 0 V
L
L
A
V
= 10
A
V
= 10
A
V
= 1
A
V
= 1
1
1
0.1
0.1
A
= 10
V
A
= 10
= 1
V
A
= 1
A
V
V
0.01
0.01
1
2
3
10
4
10
5
10
10
10
1
2
10
3
10
4
10
5
10
10
f – Frequency – Hz
f – Frequency – Hz
Figure 44
Figure 45
25
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
GAIN-BANDWIDTH PRODUCT
vs
FREE-AIR TEMPERATURE
GAIN-BANDWIDTH PRODUCT
vs
SUPPLY VOLTAGE
800
700
750
700
R
C
= 2 kΩ
L
f = 10 kHz
L = 100 pF
R
C
T
= 2 kΩ
= 100 pF
= 25°C
L
L
f = 10 kHz
A
600
500
650
600
400
300
200
100
0
550
500
–50
–25
0
25
50
75
100
125
0
1
2
3
4
5
6
7
8
T
A
– Free-Air Temperature – °C
V
DD
– Supply Voltage – V
Figure 46
Figure 47
PHASE MARGIN
vs
LOAD CAPACITANCE
GAIN MARGIN
vs
LOAD CAPACITANCE
75°
20
15
T
R
= 25°C
= 2 kΩ
A
L
R
= 500 Ω
null
= 1 kΩ
R
= 1000 Ω
null
R
= 500 Ω
null
R
null
60°
45°
30°
R
= 200 Ω
null
R
= 100 Ω
R
= 200 Ω
null
null
10
R
= 0
null
5
0
R
= 0
null
15°
0°
T
R
= 25°C
= 2 kΩ
A
L
R
= 100 Ω
null
1
10
2
10
3
10
4
5
10
10
1
2
L
3
4
10
5
10
10
10
10
C
– Load Capacitance – pF
L
C
– Load Capacitance – pF
Figure 48
Figure 49
26
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
UNITY-GAIN BANDWIDTH
vs
LOAD CAPACITANCE
600
T
R
= 25°C
= 2 kΩ
A
L
500
400
300
200
100
0
1
2
10
3
10
4
10
5
10
10
C
– Load Capacitance – pF
L
Figure 50
27
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using Microsim Parts , the model generation software used
with Microsim PSpice . The Boyle macromodel (see Note 5) and subcircuit in Figure 51 are generated using
the TLV243x typical electrical and operating characteristics at T = 25°C. Using this information, output
A
simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):
Maximum positive output voltage swing
Maximum negative output voltage swing
Slew rate
Unity-gain frequency
Common-mode rejection ratio
Phase margin
Quiescent power dissipation
Input bias current
DC output resistance
AC output resistance
Short-circuit output current limit
Open-loop voltage amplification
NOTE 4: G. R. Boyle, B. M. Cohn, D. O. Pederson, andJ. E. Solomon, “MacromodelingofIntegratedCircuitOperationalAmplifiers”, IEEEJournal
of Solid-State Circuits, SC-9, 353 (1974).
99
DLN
3
EGND
+
V
CC+
92
9
FB
–
+
91
90
RSS
ISS
RO2
–
+
+
VB
DLP
RP
2
VLP
VLN
HLIM
–
+
10
+
–
–
VC
IN –
R2
C2
J1
J2
–
7
DP
6
53
+
IN+
1
VLIM
11
DC
12
RD2
GA
GCM
–
8
C1
RD1
60
RO1
+
–
DE
VAD
5
54
V
CC–
–
+
4
VE
OUT
.SUBCKT TLV2432 1 2 3 4 5
RD1
RD2
R01
R02
RP
RSS
VAD
VB
VC
VE
60
60
8
11
12
5
21.22E3
21.22E3
120
C1
11
6
12
7
3.560E–12
C2
15.00E–12
DC
5
53
5
DX
DX
DX
DX
DX
7
99
4
120
DE
54
90
92
4
3
26.04E3
24.24E6
–.6
DLP
DLN
DP
91
90
3
10
60
9
99
4
0
DC 0
EGND
FB
99
7
0
99
POLY (2) (3,0) (4,0) 0 .5 .5
POLY (5) VB VC VE VLP
3
53
4
DC .65
DC .65
DC 0
54
7
+ VLN 0 21.04E6 –30E6 30E6 30E6 –30E6
VLIM
VLP
VLN
8
GA
6
0
6
11
10
12 47.12E–6
99 4.9E–9
91
0
0
DC 1.4
DC 9.4
GCM
ISS
HLIM
J1
0
92
3
10
0
DC 8.250E–6
VLIM 1K
10 JX
10 JX
100.0E3
.MODEL DX D (IS=800.0E–18)
90
11
12
6
.MODEL JX PJF (IS=500.0E–15 BETA=281E–6
2
1
+ VTO=–.065)
.ENDS
J2
R2
9
Figure 51. Boyle Macromodel and Subcircuit
PSpice and Parts are trademarks of MicroSim Corporation.
28
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
0.050 (1,27)
0.020 (0,51)
0.014 (0,35)
0.010 (0,25)
M
14
8
0.008 (0,20) NOM
0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane
0.010 (0,25)
1
7
0°–8°
0.044 (1,12)
0.016 (0,40)
A
Seating Plane
0.004 (0,10)
0.010 (0,25)
0.004 (0,10)
0.069 (1,75) MAX
PINS **
8
14
16
DIM
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MAX
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
A MIN
4040047/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
29
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
MECHANICAL DATA
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
21
22
23
24
25
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
B SQ
A SQ
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
30
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
MECHANICAL DATA
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE PACKAGE
0.400 (10,20)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
0.130 (3,30) MIN
Seating Plane
0.063 (1,60)
0.015 (0,38)
0°–15°
0.023 (0,58)
0.015 (0,38)
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification on press ceramic glass frit seal only.
E. Falls within MIL-STD-1835 GDIP1-T8
31
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
MECHANICAL DATA
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
0,30
0,65
M
0,10
0,19
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
0,75
A
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
7,70
9,80
9,60
A MAX
A MIN
4040064/E 08/96
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
32
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLV2432, TLV2432A, TLV2434, TLV2434A
Advanced LinCMOS RAIL-TO-RAIL OUTPUT
WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS
SLOS168F – NOVEMBER 1996 – REVISED MARCH 2001
MECHANICAL DATA
U (S-GDFP-F10)
CERAMIC DUAL FLATPACK
0.250 (6,35)
0.246 (6,10)
0.006 (0,15)
0.004 (0,10)
0.080 (2,03)
0.050 (1,27)
0.045 (1,14)
0.026 (0,66)
0.300 (7,62)
0.350 (8,89)
0.350 (8,89)
0.250 (6,35)
0.250 (6,35)
0.019 (0,48)
0.015 (0,38)
1
10
0.050 (1,27)
0.250 (6,35)
5
6
0.025 (0,64)
0.005 (0,13)
1.000 (25,40)
0.750 (19,05)
4040179/B 03/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only.
E. Falls within MIL STD 1835 GDFP1-F10 and JEDEC MO-092AA
33
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
16-Oct-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
CFP
Drawing
5962-9751001Q2A
5962-9751001QHA
5962-9751001QPA
5962-9751002Q2A
5962-9751002QHA
5962-9751002QPA
TLV2432AID
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
FK
U
20
10
8
1
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
A42
A42
N / A for Pkg Type
N / A for Pkg Type
CDIP
LCCC
CFP
JG
FK
U
20
10
8
POST-PLATE N / A for Pkg Type
A42
A42
N / A for Pkg Type
N / A for Pkg Type
CDIP
SOIC
JG
D
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2432AIDG4
TLV2432AIDR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
D
D
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2432AIDRG4
TLV2432AIPW
TLV2432AIPWG4
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
PW
PW
150 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
150 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2432AIPWLE
TLV2432AIPWR
OBSOLETE TSSOP
PW
PW
8
8
TBD
Call TI
Call TI
ACTIVE
TSSOP
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2432AIPWRG4
ACTIVE
TSSOP
PW
8
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2432AMFKB
TLV2432AMJGB
TLV2432AMUB
TLV2432AQD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
LCCC
CDIP
CFP
FK
JG
U
20
8
1
1
TBD
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
A42
A42
N / A for Pkg Type
N / A for Pkg Type
10
8
1
SOIC
SOIC
D
75
CU NIPDAU Level-1-220C-UNLIM
TLV2432AQDG4
D
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2432AQDR
ACTIVE
ACTIVE
SOIC
SOIC
D
D
8
8
2500
TBD
CU NIPDAU Level-1-220C-UNLIM
TLV2432AQDRG4
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2432CD
TLV2432CDG4
TLV2432CDR
TLV2432CDRG4
TLV2432ID
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
D
D
D
D
D
D
D
D
8
8
8
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS &
no Sb/Br)
Call TI
Level-1-260C-UNLIM
2500 Green (RoHS &
no Sb/Br)
Call TI
Level-1-260C-UNLIM
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2432IDG4
TLV2432IDR
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2432IDRG4
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
16-Oct-2009
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
no Sb/Br)
TLV2432MFKB
TLV2432MJGB
TLV2432MUB
TLV2432QD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
LCCC
CDIP
CFP
FK
JG
U
20
8
1
1
TBD
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
A42
A42
N / A for Pkg Type
N / A for Pkg Type
10
8
1
SOIC
SOIC
D
75
CU NIPDAU Level-1-220C-UNLIM
TLV2432QDG4
D
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2432QDR
ACTIVE
ACTIVE
SOIC
SOIC
D
D
8
8
2500
TBD
CU NIPDAU Level-1-220C-UNLIM
TLV2432QDRG4
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2434AID
TLV2434AIDG4
TLV2434AIDR
TLV2434AIDRG4
TLV2434AIPWR
TLV2434AIPWRG4
TLV2434CD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
D
D
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS &
no Sb/Br)
Call TI
Level-1-260C-UNLIM
SOIC
D
2500 Green (RoHS &
no Sb/Br)
Call TI
Level-1-260C-UNLIM
TSSOP
TSSOP
SOIC
PW
PW
D
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2434CDG4
TLV2434CDR
SOIC
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS &
no Sb/Br)
Call TI
Level-1-260C-UNLIM
TLV2434CDRG4
TLV2434CPW
TLV2434CPWG4
TLV2434CPWR
TLV2434CPWRG4
TLV2434ID
SOIC
D
2500 Green (RoHS &
no Sb/Br)
Call TI
Level-1-260C-UNLIM
TSSOP
TSSOP
TSSOP
TSSOP
SOIC
PW
PW
PW
PW
D
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2434IDG4
TLV2434IDR
SOIC
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2434IDRG4
TLV2434IPW
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
PW
PW
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2434IPWG4
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
16-Oct-2009
Orderable Device
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TLV2434IPWR
TSSOP
PW
14
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TLV2434IPWRG4
TSSOP
PW
14
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLV2432, TLV2432A, TLV2432AM, TLV2432M :
Automotive: TLV2432-Q1, TLV2432A-Q1
•
NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
TLV2432AIDR
TLV2432AIPWR
TLV2432CDR
TLV2432IDR
SOIC
TSSOP
SOIC
D
PW
D
8
8
2500
2000
2500
2500
2500
2000
2500
2000
2500
2000
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
12.4
12.4
12.4
12.4
16.4
12.4
16.4
12.4
16.4
12.4
6.4
7.0
6.4
6.4
6.5
7.0
6.5
7.0
6.5
7.0
5.2
3.6
5.2
5.2
9.0
5.6
9.0
5.6
9.0
5.6
2.1
1.6
2.1
2.1
2.1
1.6
2.1
1.6
2.1
1.6
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
16.0
12.0
16.0
12.0
16.0
12.0
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
8
SOIC
D
8
TLV2434AIDR
TLV2434AIPWR
TLV2434CDR
TLV2434CPWR
TLV2434IDR
SOIC
D
14
14
14
14
14
14
TSSOP
SOIC
PW
D
TSSOP
SOIC
PW
D
TLV2434IPWR
TSSOP
PW
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TLV2432AIDR
TLV2432AIPWR
TLV2432CDR
TLV2432IDR
SOIC
TSSOP
SOIC
D
PW
D
8
8
2500
2000
2500
2500
2500
2000
2500
2000
2500
2000
346.0
346.0
346.0
346.0
346.0
346.0
346.0
346.0
346.0
346.0
346.0
346.0
346.0
346.0
346.0
346.0
346.0
346.0
346.0
346.0
29.0
29.0
29.0
29.0
33.0
29.0
33.0
29.0
33.0
29.0
8
SOIC
D
8
TLV2434AIDR
TLV2434AIPWR
TLV2434CDR
TLV2434CPWR
TLV2434IDR
SOIC
D
14
14
14
14
14
14
TSSOP
SOIC
PW
D
TSSOP
SOIC
PW
D
TLV2434IPWR
TSSOP
PW
Pack Materials-Page 2
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.063 (1,60)
0.015 (0,38)
0.020 (0,51) MIN
0.200 (5,08) MAX
0.130 (3,30) MIN
Seating Plane
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
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