TLV2442AQDRQ1 [TI]
Advanced LinCMOS⢠RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS; 高级LinCMOSâ ?? ¢轨到轨输出，宽输入电压运算放大器
| 型号： | TLV2442AQDRQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Advanced LinCMOS⢠RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE OPERATIONAL AMPLIFIERS |
| 文件： | 总35页 (文件大小：1067K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TLV2442-Q1, TLV2442A-Q1
TLV2444A-Q1
www.ti.com ........................................................................................................................................... SGLS181C–SEPTEMBER 2003–REVISED AUGUST 2009
Advanced LinCMOS™ RAIL-TO-RAIL OUTPUT WIDE-INPUT-VOLTAGE
OPERATIONAL AMPLIFIERS
1
FEATURES
23
•
Qualified for Automotive Applications
•
•
Low Noise: 16 nV/√Hz Typ at f = 1 kHz
•
ESD Protection Exceeds 2000 V Per
Low Input Offset Voltage:
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
950 µV Max at TA = 25°C (TLV244xA)
•
•
•
•
•
Low Input Bias Current: 1 pA (Typ)
600-Ω Output Drive
•
•
Output Swing Includes Both Supply Rails
Extended Common-Mode Input Voltage Range:
0 V to 4.25 V (Min) at 5-V Single Supply
High-Gain Bandwidth: 1.8 MHz (Typ)
Low Supply Current: 750 µA Per Channel (Typ)
Macromodel Included
•
No Phase Inversion
HIGH-LEVEL OUTPUT VOLTAGE
vs
DESCRIPTION
HIGH-LEVEL OUTPUT CURRENT
The TLV244x and TLV244xA are low-voltage
operational amplifiers from Texas Instruments. The
common-mode input voltage range of these devices
has been extended over typical standard CMOS
amplifiers, making them suitable for a wide range of
applications. In addition, these devices do not phase
invert when the common-mode input is driven to the
supply rails. This satisfies most design requirements
3
V
DD
= 3 V
2.5
2
without paying
a premium for rail-to-rail input
T = −40°C
A
performance. They also exhibit rail-to-rail output
performance for increased dynamic range in single-
or split-supply applications. This family is fully
characterized at 3-V and 5-V supplies and is
optimized for low-voltage operation. Both devices
offer comparable ac performance while having lower
noise, input offset voltage, and power dissipation than
existing CMOS operational amplifiers. The TLV244x
has increased output drive over previous rail-to-rail
operational amplifiers and can drive 600-Ω loads for
telecommunications applications.
1.5
1
T = 125°C
A
0.5
0
T = 85°C T = 25°C
A
A
0
2
4
6
8
10
12
I
− High-Level Output Current − mA
OH
The other members in the TLV244x family are the
low-power, TLV243x, and micro-power, TLV2422,
versions.
Figure 1.
The TLV244x, exhibiting high input impedance and low noise, is excellent for small-signal conditioning for
high-impedance sources, such as piezoelectric transducers. Because of the micropower dissipation levels and
low-voltage operation, these devices work well in hand-held monitoring and remote-sensing applications. In
addition, the rail-to-rail output feature with single- or split-supplies makes this family a great choice when
interfacing with analog-to-digital converters (ADCs). For precision applications, the TLV244xA is available with a
maximum input offset voltage of 950 µV.
If the design requires single operational amplifiers, see the TI TLV2211/21/31. This is a family of rail-to-rail output
operational amplifiers in the SOT-23 package. Their small size and low power consumption make them ideal for
high-density battery-powered equipment.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
3
Advanced LinCMOS is a trademark of Texas Instruments.
PSpice, Parts are trademarks of MicroSim.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2009, Texas Instruments Incorporated
TLV2442-Q1, TLV2442A-Q1
TLV2444A-Q1
SGLS181C–SEPTEMBER 2003–REVISED AUGUST 2009........................................................................................................................................... www.ti.com
ORDERING INFORMATION(1)
VIOmax
AT 25＝C
ORDERABLE PART
NUMBER
TA
PACKAGE(2)
TOP-SIDE MARKING
SOIC – D
Reel of 2500
Reel of 2000
Reel of 2500
Reel of 2500
Reel of 2000
Reel of 2000
TLV2442AQDRQ1
TLV2442AQPWRQ1
TLV2442QDGKRQ1
TLV2442QDRQ1
2442AQ
2442AQ
OBR
950 µV
Dual
TSSOP – PW
MSOP – DGK
SOIC – D
–40°C to 125°C
2.5 mV
Dual
2442Q1
2442Q1
2444AQ
TSSOP – PW
TSSOP – PW
TLV2442QPWRQ1
TLV2444AQPWRQ1
950 µV
Quad
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
TLV2442
D, DGK, OR PW PACKAGE
(TOP VIEW)
TLV2444
PW PACKAGE
(TOP VIEW)
1OUT
1IN-
V
DD+
1
2
3
4
8
7
6
5
1
2
3
4
5
6
7
14
13
12
11
10
9
1OUT
1IN-
4OUT
4IN-
2OUT
2IN-
1IN+
/GND
1IN+
4IN+
V
2IN+
DD-
V
+
V
DD-
/GND
DD
2IN+
2IN-
3IN+
3IN-
8
2OUT
3OUT
2
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TLV2442-Q1, TLV2442A-Q1
TLV2444A-Q1
www.ti.com ........................................................................................................................................... SGLS181C–SEPTEMBER 2003–REVISED AUGUST 2009
EQUIVALENT SCHEMATIC (EACH AMPLIFIER)
Copyright © 2003–2009, Texas Instruments Incorporated
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TLV2442-Q1, TLV2442A-Q1
TLV2444A-Q1
SGLS181C–SEPTEMBER 2003–REVISED AUGUST 2009........................................................................................................................................... www.ti.com
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
VDD
VID
VI
Supply voltage(2)
Differential input voltage(3)
Input voltage (any input)(2)
12 V
±VDD
–0.3 V to VDD
±5 mA
II
Input current (any input)
IO
Output current
±50 mA
Total current into VDD+
±50 mA
Total current out of VDD–
±50 mA
Duration of short-circuit current at (or below) 25＝C(4)
Continuous total dissipation
Operating free-air temperature range
Storage temperature range
Unlimited
See Dissipation Rating Table
–40°C to 125°C
–65°C to 150°C
260°C
TA
Tstg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential voltages, are with respect to the midpoint between VDD+ and VDD–
.
(3) Differential voltages are at IN+ with respect to IN–. Excessive current will flow if input is brought below VDD– – 0.3 V.
(4) The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation
rating is not exceeded.
DISSIPATION RATINGS
T
A ≤ 25°C
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
TA = 125°C
POWER RATING
PACKAGE
POWER RATING
D (8 pin)
DGK (8 pin)
PW (8 pin)
PW (14 pin)
725 mW
5.8 mW/°C
4.847 mW/°C
4.2 mW/°C
5.6 mW/°C
464 mW
388 mW
336 mW
634 mW
377 mW
315 mW
273 mW
547 mW
145 mW
121 mW
105 mW
317 mW
606 mW
525 mW
720 mW
RECOMMENDED OPERATING CONDITIONS
MIN
2.7
MAX
10
UNIT
V
VDD
VI
Supply voltage
Input voltage
VDD–
VDD–
–40
VDD+ – 1
VDD+ – 1
125
V
VIC
TA
Common-mode input voltage
Operating free-air temperature
V
°C
4
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TLV2442-Q1, TLV2442A-Q1
TLV2444A-Q1
www.ti.com ........................................................................................................................................... SGLS181C–SEPTEMBER 2003–REVISED AUGUST 2009
ELECTRICAL CHARACTERISTICS
VDD = 3 V, at specified free-air temperature (unless otherwise noted)
(1)
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX UNIT
25°C
300
2000
TLV244x
Full range
25°C
2500
µV
VIC = 1.5 V, VO = 1.5 V,
RS = 50 Ω
VIO
Input offset voltage
300
2
950
TLV244xA
Full range
1600
Temperature coefficient of
input offset voltage
αVIO
VIC = 1.5 V, VO = 1.5 V, RS = 50 Ω
VIC = 1.5 V, VO = 1.5 V, RS = 50 Ω
25°C to 85°C
25°C
µV/°C
Input offset voltage
long-term drift(2)
0.002
0.5
µV/mo
25°C
Full range
25°C
IIO
Input offset current
Input bias current
VIC = 1.5 V, VO = 1.5 V, RS = 50 Ω
VIC = 1.5 V, VO = 1.5 V, RS = 50 Ω
pA
150
1
IIB
pA
Full range
260
0 to –0.25 to
25°C
Common-mode input
voltage range
2.25
2.5
VICR
|VIO| ≤ 8 mV, RS = 50 Ω
V
V
Full range
25°C
0.2 to 2
IO = –100 µA
2.98
2.5
VOH
High-level output voltage
Low-level output voltage
25°C
IO = –3 mA
Full range
25°C
2.25
IO = 100 µA
0.02
0.63
VOL
VIC = 1.5 V
25°C
V
IO = 3 mA
Full range
25°C
1
0.7
0.4
1
RL = 600 Ω
RL = 1 MΩ
Large-signal differential
voltage amplification
AVD
VO = 1 V to 2 V
Full range
25°C
V/mV
750
rid
ri
Differential input resistance
25°C
1000
GΩ
GΩ
Common-mode input
resistance
25°C
25°C
25°C
1000
8
Common-mode input
capacitance
ci
f = 10 kHz
pF
Closed-loop output
impedance
zo
f = 1 MHz, AV = 10
130
75
Ω
25°C
Full range
25°C
65
50
80
80
Common-mode rejection
ratio
CMRR
kSVR
IDD
VIC = VICR MIN, VO = VDD/2, RS = 50 Ω
VDD = 2.7 V to 8 V, VIC = VDD/2, No load
VO = 1.5 V, No load
dB
dB
95
Supply-voltage rejection
ratio (ΔVDD±/ΔVIO
)
Full range
25°C
725
1100
µA
Supply current
(per channel)
Full range
1100
(1) Full range is –40°C to 125°C.
(2) Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
Copyright © 2003–2009, Texas Instruments Incorporated
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SGLS181C–SEPTEMBER 2003–REVISED AUGUST 2009........................................................................................................................................... www.ti.com
OPERATING CHARACTERISTICS
VDD = 3 V, at specified free-air temperature (unless otherwise noted)
(1)
PARAMETER
TEST CONDITIONS
TA
MIN
0.65
0.4
TYP
MAX
UNIT
25°C
1.3
VO = 1 V to 2 V, RL = 600 Ω,
CL = 100 pF
SR
Vn
Slew rate at unity gain
V/µs
Full range
f = 10 Hz
170
18
Equivalent input
noise voltage
25°C
nV/√Hz
f = 1 kHz
f = 0.1 Hz to 1 Hz
f = 0.1 Hz to 10 Hz
2.6
5.1
0.6
0.08
0.3
2
Peak-to-peak equivalent input
noise voltage
Vn(PP)
In
25°C
25°C
µV
Equivalent input noise current
fA/√Hz
AV = 1
Total harmonic distortion
plus noise
VO = 0.5 V to 2.5 V,
RL = 600 Ω, f = 1 kHz
THD+N
AV = 10
25°C
%
AV = 100
Gain-bandwidth product
f = 10 kHz, RL = 600 Ω, CL = 100 pF
25°C
25°C
1.75
MHz
MHz
Maximum output-swing
bandwidth
VO(PP) = 1 V, RL = 600 Ω, AV = 1,
CL = 100 pF
BOM
0.9
AV = –1,
Step = –2.3 V to 2.3 V,
RL = 600 Ω, CL = 100 pF
To 0.1%
1.5
3.2
ts
Settling time
25°C
µs
To 0.01%
φm
Phase margin at unity gain
Gain margin
RL = 600 Ω, CL = 100 pF
RL = 600 Ω, CL = 100 pF
25°C
25°C
65
9
°
dB
(1) Full range is –40°C to 125°C.
6
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www.ti.com ........................................................................................................................................... SGLS181C–SEPTEMBER 2003–REVISED AUGUST 2009
ELECTRICAL CHARACTERISTICS
VDD = 5 V, at specified free-air temperature (unless otherwise noted)
(1)
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX UNIT
25°C
300
2000
TLV244x
Full range
25°C
2500
µV
VDD± = ±2.5 V, VIC = 0,
VO = 0, RS = 50 Ω
VIO
Input offset voltage
300
2
950
TLV244xA
Full range
1600
Temperature coefficient of
input offset voltage
αVIO
VDD± = ±2.5 V, VIC = 0, VO = 0, RS = 50 Ω
VDD± = ±2.5 V, VIC = 0, VO = 0, RS = 50 Ω
25°C to 85°C
25°C
µV/°C
Input offset voltage
long-term drift(2)
0.002
0.5
µV/mo
25°C
Full range
25°C
IIO
Input offset current
Input bias current
VDD± = ±2.5 V, VIC = 0, VO = 0, RS = 50 Ω
VDD± = ±2.5 V, VIC = 0, VO = 0, RS = 50 Ω
pA
150
1
IIB
pA
Full range
260
0 to –0.25 to
25°C
Common-mode input
voltage range
4.25
4.5
VICR
|VIO| ≤ 5 mV, RS = 50 Ω
V
V
Full range
25°C
0 to 4
IOH = –100 µA
IOH = –5 mA
IOL = 100 µA
4.97
4.35
VOH
High-level output voltage
Low-level output voltage
25°C
4
4
Full range
25°C
0.01
0.8
VOL
VIC = 2.5 V
IOL = 5 mA
25°C
V
Full range
25°C
1.25
0.9
0.5
1.3
RL = 600 Ω(3)
Large-signal differential
voltage amplification
VIC = 2.5 V,
VO = 1 V to 4 V
AVD
Full range
25°C
V/mV
RL = 1 MΩ(3)
950
rid
ri
Differential input resistance
25°C
1000
GΩ
GΩ
Common-mode input
resistance
25°C
25°C
25°C
1000
8
Common-mode input
capacitance
ci
f = 10 kHz
pF
Closed-loop output
impedance
zo
f = 1 MHz, AV = 10
140
75
Ω
25°C
Full range
25°C
70
70
80
80
Common-mode rejection
ratio
CMRR
kSVR
IDD
VIC = VICR MIN, VO = VDD/2, RS = 50 Ω
VDD = 4.4 V to 8 V, VIC = VDD/2, No load
VO = 2.5 V, No load
dB
dB
95
Supply-voltage rejection
ratio (ΔVDD/ΔVIO
)
Full range
25°C
750
1100
µA
Supply current
(per channel)
Full range
1100
(1) Full range is –40°C to 125°C.
(2) Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to
TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
(3) Referenced to 2.5 V
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SGLS181C–SEPTEMBER 2003–REVISED AUGUST 2009........................................................................................................................................... www.ti.com
OPERATING CHARACTERISTICS
VDD = 5 V, at specified free-air temperature (unless otherwise noted)
(1)
PARAMETER
TEST CONDITIONS
TA
MIN
0.75
0.5
TYP
MAX
UNIT
VO = 0.5 V to 2.5 V, RL = 600 Ω(2)
,
25°C
1.4
SR
Vn
Slew rate at unity gain
V/µs
CL = 100 pF(2)
Full range
f = 10 Hz
130
16
Equivalent input
noise voltage
25°C
nV/√Hz
f = 1 kHz
f = 0.1 Hz to 1 Hz
f = 0.1 Hz to 10 Hz
1.8
Peak-to-peak equivalent input
noise voltage
Vn(PP)
In
25°C
25°C
µV
3.6
Equivalent input noise current
0.6
fA/√Hz
AV = 1
0.017
0.17
1.5
Total harmonic distortion
plus noise
VO = 1.5 V to 3.5V,
THD+N
AV = 10
25°C
%
f = 1 kHz, RL = 600 Ω(2)
AV = 100
f = 10 kHz, RL = 600 Ω(2)
,
Gain-bandwidth product
25°C
25°C
1.81
MHz
MHz
CL = 100 pF(2)
Maximum output-swing
bandwidth
VO(PP) = 2 V, AV = 1, RL = 600 Ω(2)
,
BOM
0.5
1.5
CL = 100 pF(2)
AV = –1,
To 0.1%
Step = –0.5 V to 2.5 V,
ts
Settling time
25°C
µs
RL = 600 Ω(2)
,
To 0.01%
2.6
CL = 100 pF(2)
φm
Phase margin at unity gain
Gain margin
RL = 600 Ω(2), CL = 100 pF(2)
RL = 600 Ω(2), CL = 100 pF(2)
25°C
25°C
68
8
°
dB
(1) Full range is –40°C to 125°C.
(2) Referenced to 2.5 V
8
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www.ti.com ........................................................................................................................................... SGLS181C–SEPTEMBER 2003–REVISED AUGUST 2009
TYPICAL CHARACTERISTICS
Table of Graphs(1)
FIGURE
Distribution
2, 3
4, 5
6, 7
8
VIO
Input offset voltage
vs Common-mode input voltage
Distribution
αVIO
IIB/IIO
VOH
Input offset voltage temperature coefficient
Input bias and input offset currents
High-level output voltage
vs Free-air temperature
vs High-level output current
vs Low-level output current
vs Frequency
9, 10
11, 12
13
VOL
Low-level output voltage
VO(PP)
Maximum peak-to-peak output voltage
vs Supply voltage
14
IOS
VO
Short-circuit output current
vs Free-air temperature
vs Differential input voltage
vs Load resistance
vs Frequency
15
Output voltage
16, 17
18
Differential voltage amplification
Large-signal differential voltage amplification and phase margin
Large-signal differential voltage amplification
Output impedance
AVD
19, 20
21, 22
23, 24
25
vs Free-air temperature
vs Frequency
zo
vs Frequency
CMRR
Common-mode rejection ratio
vs Free-air temperature
vs Frequency
26
27, 28
29
kSVR
IDD
Supply-voltage rejection ratio
Supply current
vs Free-air temperature
vs Supply voltage
30
vs Load capacitance
vs Free-air temperature
31
SR
Slew rate
32
Inverting large-signal pulse response
Voltage-follower large-signal pulse response
Inverting small-signal pulse response
Voltage-follower small-signal pulse response
Equivalent input noise voltage
33, 34
35, 36
37, 38
39, 40
41, 42
43
VO
Vn
vs Frequency
Noise voltage
Over a 10-second period
vs Frequency
THD + N
Total harmonic distortion plus noise
44, 45
46
vs Free-air temperature
vs Supply voltage
vs Frequency
Gain-bandwidth product
Phase margin
47
19, 20
48
φm
vs Load capacitance
vs Load capacitance
vs Load capacitance
Gain margin
49
B1
Unity-gain bandwidth
50
(1) For all graphs where VDD = 5 V, all loads are referenced to 2.5 V.
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TLV2444A-Q1
SGLS181C–SEPTEMBER 2003–REVISED AUGUST 2009........................................................................................................................................... www.ti.com
DISTRIBUTION OF TLV2442
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLV2442
INPUT OFFSET VOLTAGE
20
18
16
14
12
10
8
20
18
16
14
12
10
8
868 Amplifiers From
1 Wafer Lot
= ±1.5 V
868 Amplifiers From
1 Wafer Lot
V = ±2.5 V
DD
V
DD
T
= 25°C
T = 25°C
A
A
6
6
4
4
2
0
2
0
V
IO
− Input Offset Voltage − µV
V
IO
− Input Offset Voltage − µV
Figure 2.
Figure 3.
INPUT OFFSET VOLTAGE
vs
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
COMMON-MODE INPUT VOLTAGE
2
2
V
DD
= 3 V
V = 5 V
DD
T
A
= 25°C
T
A
= 25°C
1.5
1
1.5
1
0.5
0
0.5
0
−0.5
−1
−0.5
−1
−1.5
−2
−1.5
−2
−0.5
0
0.5
1
1.5
2
2.5
3
−0.5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
V
IC
− Common-Mode Input Voltage − V
V
IC
− Common-Mode Input Voltage − V
Figure 4.
Figure 5.
10
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Product Folder Link(s): TLV2442-Q1 TLV2442A-Q1 TLV2444A-Q1
TLV2442-Q1, TLV2442A-Q1
TLV2444A-Q1
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DISTRIBUTION OF TLV2442 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT
DISTRIBUTION OF TLV2442 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT
15
12
9
18
15
12
9
32 Amplifiers From 2
Wafer Lots
32 Amplifiers From 1
Wafer Lot
V
DD
= ±2.5 V
V
DD
= ±1.5 V
P Package
25°C to 125°C
P Package
25°C to 125°C
6
6
3
3
0
0
−8 −7 −6 −5 −4 −3 −2 −1
0
1
2
3
4
−8 −7 −6 −5 −4 −3 −2 −1
0
1
2
3
4
αV − Temperature Coefficient − µV/°C
αV − Temperature Coefficient − µV/°C
IO
IO
Figure 6.
Figure 7.
INPUT BIAS AND INPUT OFFSET CURRENTS
HIGH-LEVEL OUTPUT VOLTAGE
vs
vs
FREE-AIR TEMPERATURE
HIGH-LEVEL OUTPUT CURRENT
35
30
25
20
15
10
5
3
V
V
V
= ±2.5 V
= 0
= 0
= 50 Ω
DD
V
= 3 V
DD
IC
O
2.5
2
R
S
T = −40°C
A
I
IB
1.5
I
IO
1
T = 125°C
A
0.5
0
T = 85°C T = 25°C
A
A
0
25
45
T
65
85
105
125
0
2
4
6
8
10
12
− Free-Air Temperature − °C
I
− High-Level Output Current − mA
A
OH
Figure 8.
Figure 9.
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HIGH-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT CURRENT
3
5
4.5
4
V
= 5 V
V
DD
= 3 V
DD
2.5
2
T
A
= 125°C
T
A
= −40°C
3.5
3
T
A
= 25°C
T
A
= 85°C
1.5
1
2.5
2
T
A
= 125°C
T
= 25°C
A
1.5
1
T
= 85°C
A
T
A
= −40°C
0.5
0
0.5
0
0
5
10
15
20
25
0
2
4
6
8
10
I
− High-Level Output Current − mA
I
− Low-Level Output Current − mA
OH
OL
Figure 10.
Figure 11.
LOW-LEVEL OUTPUT VOLTAGE
vs
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
FREQUENCY
2.5
5
4
3
2
1
V
DD
= 5 V
R
L
= 600 Ω
V
DD
= 5 V
2
1.5
1
T
A
= 125°C
V
DD
= 3 V
T
= 85°C
A
T
= 25°C
A
0.5
0
T
A
= −40°C
0
0
2
4
6
8
10
100
1 k
10 k
100 k
1 M
10 M
I
− Low-Level Output Current − mA
f − Frequency − Hz
OL
Figure 12.
Figure 13.
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SHORT-CIRCUIT OUTPUT CURRENT
SHORT-CIRCUIT OUTPUT CURRENT
vs
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
25
20
15
10
5
25
20
15
10
5
V
V
T
A
= V /2
DD
= V /2
DD
= 25°C
O
V
V
= 5 V
= 2.5 V
DD
IC
O
V
ID
= −100 mV
V
ID
= −100 mV
0
−5
0
−5
−10
−15
−10
−15
V
ID
= 100 mV
V
7
= 100 mV
ID
−20
−25
−20
−25
2
3
4
5
6
8
9
10
−75 −50 −25
0
25
50
75
100 125
V
DD
− Supply Voltage − V
T
A
− Free-Air Temperature − °C
Figure 14.
Figure 15.
OUTPUT VOLTAGE
vs
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
DIFFERENTIAL INPUT VOLTAGE
= 5 V
DD
3
2.5
2
5
V
V
= 3 V
V
V
DD
= 1.5 V
= 2.5 V
IC
IC
R = 600 Ω
T
A
R = 600 Ω
L
T = 25°C
A
L
4
3
= 25°C
1.5
1
2
1
0
0.5
0
−1000 −750 −500 −250
0
250 500 750 1000
−1000 −750 −500 −250
0
250 500 750 1000
V
ID
− Differential Input Voltage − µV
V
ID
− Differential Input Voltage − µV
Figure 16.
Figure 17.
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DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
LOAD RESISTANCE
100
V
O(PP)
= 2 V
T
A
= 25°C
V
DD
= 5 V
V
DD
= 3 V
10
1
0.1
1
10
100
1000
R − Load Resistance − kΩ
L
Figure 18.
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE MARGIN
vs
FREQUENCY
80
180°
135°
V
R
C
= 3 V
DD
= 600 Ω
= 600 pF
= 25°C
L
L
60
40
T
A
90°
45°
0°
20
0
−20
−40
−45°
−90°
10 k
100 k
1 M
10 M
f − Frequency − Hz
Figure 19.
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LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE MARGIN
vs
FREQUENCY
80
60
180°
135°
V
R
C
= 5 V
DD
= 600 Ω
= 600 pF
= 25°C
L
L
T
A
40
90°
45°
0°
20
0
−20
−40
−45°
−90°
10 k
100 k
1 M
10 M
f − Frequency − Hz
Figure 20.
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
1000
100
10
1000
100
10
V
V
V
= 3 V
= 2.5 V
= 1 V to 4 V
V
V
V
= 5 V
= 2.5 V
= 1 V to 4 V
DD
DD
R = 1 MΩ
L
IC
O
IC
O
R = 1 MΩ
L
R = 600 Ω
L
1
1
R = 600 Ω
L
0.1
0.1
−75 −50 −25
0
25
50
75
100 125
−75 −50 −25
0
25
50
75
100 125
T
A
− Free-Air Temperature − °C
T
A
− Free-Air Temperature − °C
Figure 21.
Figure 22.
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OUTPUT IMPEDANCE
vs
OUTPUT IMPEDANCE
vs
FREQUENCY
FREQUENCY
1000
100
10
100
10
V
T
= 3 V
= 25°C
DD
A = 100
A
V
A = 100
V
A
= 10
V
A
= 10
= 1
V
1
A
V
= 1
A
V
1
V
DD
= 5 V
T
A
= 25°C
0.1
100
0.1
100
1 k
10 k
100 k
1 M
1 k
10 k
100 k
1 M
f − Frequency − Hz
f − Frequency − Hz
Figure 23.
Figure 24.
COMMON-MODE REJECTION RATIO
COMMON-MODE REJECTION RATIO
vs
vs
FREQUENCY
FREE-AIR TEMPERATURE
100
90
80
70
60
100
80
V
= 5 V
T
A
= 25°C
DD
V
V
= 5 V
= 2.5 V
DD
IC
V
V
= 3 V
= 1.5 V
DD
60
IC
V
= 3 V
DD
40
20
0
10
100
1 k
10 k
100 k
1 M
10 M
−75 −50 −25
0
25
50
75 100 125
f − Frequency − Hz
T
A
− Free-Air Temperature − °C
Figure 25.
Figure 26.
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SUPPLY-VOLTAGE REJECTION RATIO
SUPPLY-VOLTAGE REJECTION RATIO
vs
vs
FREQUENCY
FREQUENCY
100
80
60
40
20
0
100
80
V
T
A
= 5 V
= 25°C
DD
V
T
A
= 3 V
= 25°C
DD
60
40
20
k
SVR+
k
SVR+
k
SVR−
k
SVR−
0
10
10
100
1 k
10 k
100 k
1 M
10 M
100
1 k
10 k
100 k
1 M
10 M
f − Frequency − Hz
f − Frequency − Hz
Figure 27.
Figure 28.
SUPPLY-VOLTAGE REJECTION RATIO
SUPPLY CURRENT
vs
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
100
2.5
2
V
DD
= 2.5 V to 8 V
98
96
T
A
= 25°C
T
A
= 85°C
1.5
1
T
A
= −40°C
94
92
90
0.5
0
−75 −50 −25
0
25
50
75 100 125
0
2
4
6
8
10
T
A
− Free-Air Temperature − °C
V
DD
− Supply Voltage − V
Figure 29.
Figure 30.
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SLEW RATE
vs
SLEW RATE
vs
LOAD CAPACITANCE
FREE-AIR TEMPERATURE
3
3
2.5
2
V
= 5 V
DD
V
R
C
= 5 V
= 600 Ω
= 100 pF
= 1
DD
A = −1
V
L
T
A
= 25°C
L
2.5
2
A
V
SR −
SR +
SR −
SR +
1.5
1.5
1
1
0.5
0.5
0
0
−75 −50 −25
0
25
50
75 100 125
10
100
1 k
10 k
100 k
C − Load Capacitance − pF
L
T
A
− Free-Air Temperature − °C
Figure 31.
Figure 32.
INVERTING LARGE-SIGNAL PULSE RESPONSE
INVERTING LARGE-SIGNAL PULSE RESPONSE
5
4
3
2
3
2
V
R
C
= 5 V
= 2 kΩ
= 100 pF
DD
V
R
C
= 3 V
= 2 kΩ
= 100 pF
DD
L
L
L
L
A = −1
V
A = −1
V
T
A
= 25°C
T
A
= 25°C
1
0
1
0
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
t − Time − µs
t − Time − µs
Figure 33.
Figure 34.
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VOLTAGE-FOLLOWER
VOLTAGE-FOLLOWER
LARGE-SIGNAL PULSE RESPONSE
LARGE-SIGNAL PULSE RESPONSE
5
4
3
2
V
R
C
= 5 V
= 600 Ω
= 100 pF
= 1
V
R
C
= 3 V
= 600 Ω
= 100 pF
= 1
DD
DD
L
L
L
L
A
A
V
V
T = 25°C
A
T
A
= 25°C
3
2
1
0
1
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0
1
2
3
4
5
6
7
8
9
10
t − Time − µs
t − Time − µs
Figure 35.
Figure 36.
INVERTING SMALL-SIGNAL PULSE RESPONSE
INVERTING SMALL-SIGNAL PULSE RESPONSE
1.58
1.56
1.54
1.52
2.58
2.56
2.54
2.52
2.5
V
R
C
= 5 V
= 600 Ω
= 100 pF
V
R
C
= 3 V
= 600 Ω
= 100 pF
DD
DD
L
L
L
L
A = −1
A = −1
V
V
T
A
= 25°C
T
A
= 25°C
1.5
1.48
2.48
1.46
1.44
2.46
2.44
0
1
2
3
4
5
6
7
9
10
0
1
2
3
4
5
6
7
8
9
10
8
t − Time − µs
t − Time − µs
Figure 37.
Figure 38.
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VOLTAGE-FOLLOWER
VOLTAGE-FOLLOWER
SMALL-SIGNAL PULSE RESPONSE
SMALL-SIGNAL PULSE RESPONSE
1.58
1.56
1.54
1.52
1.5
2.58
2.56
2.54
V
R
C
= 5 V
= 600 Ω
= 100 pF
DD
V
= 3 V
DD
L
R = 600 Ω
C = 100 pF
L
L
L
A = −1
V
A = −1
V
T
A
= 25°C
T
A
= 25°C
2.52
2.5
1.48
2.48
2.46
2.44
1.46
1.44
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0
0.5
1
1.5
2
2.5
3
3.5
4.5
5
4
t − Time − µs
t − Time − µs
Figure 39.
Figure 40.
EQUIVALENT INPUT NOISE VOLTAGE
EQUIVALENT INPUT NOISE VOLTAGE
vs
vs
FREQUENCY
FREQUENCY
140
120
100
80
200
180
160
140
120
V
= 3 V
= 20 Ω
= 25°C
V
T
= 5 V
= 20 Ω
= 25°C
DD
DD
R
T
R
S
S
A
A
100
80
60
40
20
0
60
40
20
0
10
100
1 k
10 k
10
100
1 k
10 k
f − Frequency − Hz
f − Frequency − Hz
Figure 41.
Figure 42.
20
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NOISE VOLTAGE
TOTAL HARMONIC DISTORTION PLUS NOISE
OVER A 10-SECOND PERIOD
vs
FREQUENCY
2000
1500
1000
500
0
10
V
= 5 V
DD
V
R
T
A
= 3 V
= 600 Ω
= 25°C
DD
f = 0.1 Hz to 10
Hz T = 25°C
L
A
A = 100
V
1
−500
A
V
= 10
0.1
−1000
A
V
= 1
−1500
−2000
0
1
2
3
4
5
6
7
8
9
10
0.01
10
100
1 k
10 k
100 k
t − Time − s
f − Frequency − Hz
Figure 44.
Figure 43.
TOTAL HARMONIC DISTORTION PLUS NOISE
GAIN-BANDWIDTH PRODUCT
vs
vs
FREQUENCY
FREE-AIR TEMPERATURE
10
3
V
= 5 V
= 600 Ω
= 25°C
R
C
= 600 Ω
= 100 pF
DD
L
R
T
L
L
f = 10 kHz
A
2.5
A = 100
V
1
2
A
V
= 10
0.1
1.5
1
A
V
= 1
0.01
10
100
1 k
10 k
100 k
−50
−25
0
25
50
75
100
125
f − Frequency − Hz
Figure 45.
T
A
− Free-Air Temperature − °C
Figure 46.
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GAIN-BANDWIDTH PRODUCT
PHASE MARGIN
vs
vs
SUPPLY VOLTAGE
LOAD CAPACITANCE
2
1.9
1.8
1.7
75°
60°
R = 600 Ω
L
R
null
= 100 Ω
C
L
= 100 pF
f = 10 kHz
= 25°C
T
A
45°
30°
R
null
= 50 Ω
R
null
= 20 Ω
R
null
= 0
15°
0°
1.6
1.5
R = 600 Ω
L
T
= 25°C
A
0
1
2
3
4
5
6
7
8
10
100
1 k
10 k
100 k
|V
DD
| − Supply Voltage − V
C − Load Capacitance − pF
L
±
Figure 47.
Figure 48.
GAIN MARGIN
vs
UNITY-GAIN BANDWIDTH
vs
LOAD CAPACITANCE
LOAD CAPACITANCE
25
2
R = 600 Ω
L
R = 600 Ω
L
R
null
= 50 Ω
T
= 25°C
A
T
= 25°C
A
20
15
1.5
R
null
= 100 Ω
R
null
= 20 Ω
1
10
5
R
null
= 0
0.5
0
0
10
100
1 K
10 K
100 K
10
100
1 k
10 k
100 k
C − Load Capacitance − pF
L
C − Load Capacitance − pF
L
Figure 49.
Figure 50.
22
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APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using PSpice™ Parts™ model generation software. The Boyle
macromodel(2) and subcircuit in Figure 51 were generated using the TLV244x typical electrical and operating
characteristics at TA = 25°C. Using this information, output simulations of the following key parameters can be
generated to a tolerance of 20% (in most cases):
(2) G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers,” IEEE
Journal of Solid-State Circuits, SC-9, 353 (1974).
•
•
•
•
•
•
Unity gain frequency
Common-mode rejection ratio
Phase margin
DC output resistance
AC output resistance
Short-circuit output current limit
•
•
•
•
•
•
Maximum positive output voltage swing
Maximum negative output voltage swing
Slew rate
Quiescent power dissipation
Input bias current
Open-loop voltage amplification
99
DLN
3
EGND
+
−
V
CC+
92
9
FB
+
91
90
RSS
ISS
RO2
+
−
+
−
VB
DLP
RP
2
VLP
VLN
HLIM
−
+
−
10
+
−
VC
IN −
IN+
R2
C2
J1
J2
7
DP
6
53
+
−
1
VLIM
11
DC
12
RD2
GA
GCM
8
C1
RD1
60
RO1
+
−
DE
VAD
5
54
V
CC−
−
+
4
VE
OUT
.SUBCKT TLV2442 1 2 3 4 5
RD1
60
60
8
11
12
5
2.653E3
2.653E3
50
C1
11
6
12
7
14E−12
RD2
R01
R02
RP
C2
60.00E−12
DC
5
53
5
DX
DX
DX
DX
DX
7
99
4
50
DE
54
90
92
4
3
4.310E3
925.9E3
−.5
DLP
DLN
DP
91
90
3
RSS
VAD
VB
VC
VE
VLIM
VLP
VLN
10
60
9
99
4
0
DC 0
EGND
FB
99
7
0
99
POLY (2) (3,0) (4,) 0 .5 .5
POLY (5) VB VC VE VLP VLN 0
3
53
4
DC .78
DC .78
DC 0
54
7
+ 984.9E3 −1E6 1E6 1E6 −1E6
8
0
GA
6
0
6
11
10
12 377.0E−6
99 134E−9
91
0
DC 1.9
DC 9.4
GCM
ISS
HLIM
J1
0
92
3
10
0
DC 216.0E−6
VLIM 1K
10 JX
.MODEL DX D (IS=800.0E−18)
90
11
12
6
.MODEL JX PJF (IS=1.500E−12BETA=1.316E-3
2
1
+ VTO=−.270)
.ENDS
J2
10 JX
100.OE3
R2
9
Figure 51. Boyle Macromodel and Subcircuit
Copyright © 2003–2009, Texas Instruments Incorporated
Submit Documentation Feedback
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Product Folder Link(s): TLV2442-Q1 TLV2442A-Q1 TLV2444A-Q1
PACKAGE OPTION ADDENDUM
www.ti.com
17-Aug-2012
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
TLV2442AQDRG4Q1
TLV2442AQDRQ1
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
D
D
8
8
8
2500
2500
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
TLV2442AQPWRG4Q1
TSSOP
PW
Green (RoHS
& no Sb/Br)
TLV2442AQPWRQ1
TLV2442QDGKRQ1
ACTIVE
ACTIVE
TSSOP
VSSOP
PW
8
8
TBD
Call TI
Call TI
DGK
2500
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
TLV2442QDRG4Q1
ACTIVE
SOIC
D
8
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2442QDRQ1
ACTIVE
ACTIVE
SOIC
D
8
8
TBD
Call TI
Call TI
TLV2442QPWRG4Q1
TSSOP
PW
2000
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
TLV2442QPWRQ1
TLV2444AQPWRQ1
ACTIVE
ACTIVE
TSSOP
TSSOP
PW
PW
8
TBD
Call TI
Call TI
14
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
17-Aug-2012
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLV2442-Q1, TLV2442A-Q1, TLV2444A-Q1 :
Catalog: TLV2442, TLV2442A, TLV2444A
•
Military: TLV2442M, TLV2442AM
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Military - QML certified for Military and Defense Applications
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Aug-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TLV2442QDGKRQ1
TLV2442QPWRG4Q1
VSSOP
TSSOP
DGK
PW
8
8
2500
2000
330.0
330.0
12.4
12.4
5.3
7.0
3.4
3.6
1.4
1.6
8.0
8.0
12.0
12.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Aug-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TLV2442QDGKRQ1
TLV2442QPWRG4Q1
VSSOP
TSSOP
DGK
PW
8
8
2500
2000
367.0
367.0
367.0
367.0
35.0
35.0
Pack Materials-Page 2
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