TLV2474IDRG4_技术文档

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED DECEMBER 2003

TLV2470

DBV PACKAGE

(TOP VIEW)

D

CMOS Rail-To-Rail Input/Output

Input Bias Current . . . 2.5 pA

Low Supply Current . . . 600 µA/Channel

Ultra-Low Power Shutdown Mode

1

2

3

6

5

4

V

DD

OUT

GND

- I

. . . 350 nA/ch at 3 V

. . . 1000 nA/ch at 5 V

DD(SHDN)

SHDN

IN -

D

Gain-Bandwidth Product . . . 2.8 MHz

High Output Drive Capability

IN+

-

10 mA at 180 mV

35 mA at 500 mV

D

Input Offset Voltage . . . 250 µV (typ)

Supply Voltage Range . . . 2.7 V to 6 V

Ultra Small Packaging

- 5 or 6 Pin SOT-23 (TLV2470/1)

- 8 or 10 Pin MSOP (TLV2472/3)

description

The TLV247x is a family of CMOS rail-to-rail input/output operational amplifiers that establishes a new

performance point for supply current versus ac performance. These devices consume just 600 µA/channel

while offering 2.8 MHz of gain-bandwidth product. Along with increased ac performance, the amplifier provides

high output drive capability, solving a major shortcoming of older micropower operational amplifiers. The

TLV247x can swing to within 180 mV of each supply rail while driving a 10-mA load. For non-RRO applications,

the TLV247x can supply 35 mA at 500 mV off the rail. Both the inputs and outputs swing rail-to-rail for increased

dynamic range in low-voltage applications. This performance makes the TLV247x family ideal for sensor

interface, portable medical equipment, and other data acquisition circuits.

FAMILY PACKAGE TABLE

PACKAGE TYPES

SOIC SOT-23 TSSOP MSOP

NUMBER OF

CHANNELS

UNIVERSAL EVM

BOARD

DEVICE

SHUTDOWN

PDIP

8

TLV2470

TLV2471

TLV2472

TLV2473

TLV2474

TLV2475

1

2

4

8

6

—

14

16

—

8

Yes

—

8

5

Refer to the EVM

Selection Guide

(Lit# SLOU060)

8

—

14

16

14

16

10

—

Yes

—

Yes

†

A SELECTION OF SINGLE-SUPPLY OPERATIONAL AMPLIFIER PRODUCTS

V

BW

SLEW RATE

I (per channel)

DD

OUTPUT

DRIVE

DD

IO

DEVICE

RAIL-TO-RAIL

(V)

(µV)

250

20

(MHz)

(V/µs)

(µA)

TLV247X

TLV245X

TLV246X

TLV277X

2.7 - 6.0

2.5 - 6.0

2.8

0.22

6.4

1.5

0.11

1.6

600

23

35 mA

10 mA

90 mA

10 mA

I/O

O

150

360

550

1000

5.1

10.5

†

All specifications measured at 5 V.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Copyright  1999-2003, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED AUGUST 2003

TLV2470 and TLV2471 AVAILABLE OPTIONS

PACKAGED DEVICES

SOT-23

T

A

SMALL OUTLINE

PLASTIC DIP

(P)

†

(D)

(DBV)

SYMBOL

TLV2470CD

TLV2471CD

TLV2470CDBV

TLV2471CDBV

VAUC

VAVC

TLV2470CP

TLV2471CP

0°C to 70°C

TLV2470ID

TLV2471ID

TLV2470IDBV

TLV2471IDBV

VAUI

VAVI

TLV2470IP

TLV2471IP

- 40°C to 125°C

TLV2470AID

TLV2471AID

—

TLV2470AIP

TLV2471AIP

†

This package is available taped and reeled. To order this packaging option, add an R suffix to the part number

(e.g., TLV2470CDR).

TLV2472 AND TLV2473 AVAILABLE OPTIONS

PACKAGED DEVICES

SMALL

PLASTIC

DIP

PLASTIC

DIP

MSOP

T

A

OUTLINE

†

‡

†

‡

†

(DGN)

SYMBOL

(DGQ)

SYMBOL

(D)

(N)

(P)

TLV2472CD

TLV2473CD

TLV2472CDGN

xxTIABU

—

TLV2472CP

0°C to 70°C

—

TLV2473CDGQ

xxTIABW

TLV2473CN

—

TLV2472ID

TLV2473ID

TLV2472IDGN

xxTIABV

—

xxTIABX

—

TLV2472IP

—

TLV2473IDGQ

TLV2473IN

—

- 40°C to 125°C

TLV2472AID

TLV2473AID

—

TLV2472AIP

TLV2473AIN

—

†

‡

This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2472CDR).

xx represents the device date code.

TLV2474 and TLV2475 AVAILABLE OPTIONS

PACKAGED DEVICES

T

A

SMALL OUTLINE

PLASTIC DIP

(N)

TSSOP

(PWP)

†

(D)

TLV2474CD

TLV2475CD

TLV2474CN

TLV2475CN

TLV2474CPWP

TLV2475CPWP

0°C to 70°C

TLV2474ID

TLV2475ID

TLV2474IN

TLV2475IN

TLV2474IPWP

TLV2475IPWP

- 40°C to 125°C

TLV2474AID

TLV2475AID

TLV2474AIN

TLV2475AIN

TLV2474AIPWP

TLV2475AIPWP

†

This package is available taped and reeled. To order this packaging option, add an R

suffix to the part number (e.g., TLV2474CDR).

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED AUGUST 2003

TLV247x PACKAGE PINOUTS⁽¹⁾

TLV2470

DBV PACKAGE

(TOP VIEW)

TLV2471

DBV PACKAGE

(TOP VIEW)

TLV2470

D OR P PACKAGE

(TOP VIEW)

1

2

3

V

5

V

DD

OUT

GND

OUT

GND

1

2

6

5

NC

IN -

SHDN

V_DD

DD

1

2

3

4

8

7

6

5

SHDN

IN -

IN+

OUT

NC

GND

4

IN -

IN+

3

4

TLV2472

D, DGN, OR P PACKAGE

(TOP VIEW)

TLV2471

D OR P PACKAGE

(TOP VIEW)

TLV2473

DGQ PACKAGE

(TOP VIEW)

1OUT

1IN -

1IN+

GND

V_DD

1

2

3

4

8

7

6

5

NC

IN -

NC

1

2

3

4

8

7

6

5

1

1OUT

1IN -

1IN+

GND

1SHDN

V_DD

2OUT

2IN -

2IN+

2SHDN

10

2OUT

2IN -

2IN+

V_DD

OUT

NC

2

3

4

5

9

8

7

6

IN+

GND

TLV2473

D OR N PACKAGE

TLV2474

D, N, OR PWP PACKAGE

TLV2475

D, N, OR PWP PACKAGE

(TOP VIEW)

1OUT

1IN -

1IN+

GND

NC

V_DD

1

2

3

4

5

6

7

14

13

12

11

10

9

1

2

3

4

5

6

7

14

13

12

11

10

9

1OUT

1IN -

1IN+

V_DD

4OUT

4IN -

1OUT

1IN -

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

2OUT

2IN -

2IN+

NC

4IN -

4IN+

GND

3IN+

3IN -

3OUT

4IN+

1IN+

GND

V_DD

2IN+

2IN -

2OUT

3IN+

2IN+

1SHDN

NC

2SHDN

NC

3IN-

2IN -

8

3OUT

3/4SHDN

2OUT

1/2SHDN

NC - No internal connection

TYPICAL PIN 1 INDICATORS

Pin 1

Printed or

Molded Dot

Pin 1

Stripe

Pin 1

Molded ”U” Shape

Pin 1

Bevel Edges

3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED AUGUST 2003

description (continued)

Three members of the family (TLV2470/3/5) offer a shutdown terminal for conserving battery life in portable

applications. During shutdown, the outputs are placed in a high-impedance state and the amplifier consumes

only 350 nA/channel. The family is fully specified at 3 V and 5 V across an expanded industrial temperature

range (- 40°C to 125°C). The singles and duals are available in the SOT23 and MSOP packages, while the

quads are available in TSSOP. The TLV2470 offers an amplifier with shutdown functionality all in a 6-pin SOT23

package, making it perfect for high density power-sensitive circuits.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)^†

Supply voltage, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V

DD

Differential input voltage, V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

V

DD

ID

Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table

Operating free-air temperature range, T : C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C

A

I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 40°C to 125°C

Maximum junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C

J

Storage temperature range, T

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65°C to 150°C

stg

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE: All voltage values, except differential voltages, are with respect to GND.

DISSIPATION RATING TABLE

θ

T ≤ 25°C

A

POWER RATING

JC

JA

PACKAGE

(°C/W)

D (8)

38.3

176

710 mW

D (14)

D (16)

26.9

25.7

55

122.3

114.7

324.1

294.3

52.7

1022 mW

1090 mW

385 mW

425 mW

2.37 W

DBV (5)

DBV (6)

DGN (8)

55

4.7

DGQ (10)

N (14, 16)

P (8)

4.7

32

52.3

78

2.39 W

1600 mW

1200 mW

4.07 W

41

104

30.7

29.7

PWP (14)

PWP (16)

2.07

4.21 W

recommended operating conditions

MIN

2.7

1.35

0

MAX

UNIT

Single supply

Split supply

6

3

Supply voltage, V

V

DD

Common-mode input voltage range, V

V

DD

ICR

C-suffix

I-suffix

0

70

Operating free-air temperature, T

°C

A

- 40

2

125

0.8

V

IH

‡

Shutdown on/off voltage level

V

IL

‡

Relative to GND

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED AUGUST 2003

electrical characteristics at specified free-air temperature, V_DD= 3 V (unless otherwise noted)

†

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

2200

2400

1600

1800

T

A

UNIT

25°C

Full range

25°C

250

TLV247x

V

IO

Input offset voltage

µV

250

TLV247xA

Full range

Temperature coefficient of input

offset voltage

α

0.4

1.5

µV/°C

VIO

V

= V /2,

DD

IC

= V /2,

O

DD

25°C

Full range

25°C

50

100

300

50

R

= 50 Ω

S

TLV247xC

TLV247xI

I

IO

Input offset current

Input bias current

pA

2

TLV247xC

TLV247xI

Full range

25°C

100

300

I

IB

2.85

2.8

2.6

2.5

2.94

2.74

0.07

0.2

I

= - 2.5 mA

= - 10 mA

= 2.5 mA

= 10 mA

OH

OL

Full range

25°C

V

High-level output voltage

Low-level output voltage

V

= V /2

V

OH

OL

IC

DD

Full range

25°C

0.15

0.2

Full range

25°C

V

= V /2

IC

DD

0.35

0.5

Full range

25°C

30

20

62

60

59

30

20

62

60

59

Sourcing

Full range

25°C

Sourcing,

Outside of rails

TLV247xC

TLV247xI

Full range

25°C

‡

I

Short-circuit output current

mA

OS

Sinking

Full range

25°C

Sinking,

Outside of rails

TLV247xC

TLV247xI

Full range

25°C

‡

Output current

V

= 0.5 V from rail

22

O

25°C

90

88

116

Large-signal differential voltage

amplification

A

VD

= 1 V,

dB

Ω

R = 10 kΩ

L

O(PP)

Full range

25°C

12

r

Differential input resistance

10

i(d)

Common-mode input

capacitance

C

z

f = 10 kHz

f = 10 kHz,

25°C

19.3

2

pF

Ω

IC

Closed-loop output impedance

A = 10

V

25°C

o

†

‡

Full range is 0°C to 70°C for C suffix and - 40°C to 125°C for I suffix. If not specified, full range is - 40°C to 125°C.

Depending on package dissipation rating

5

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED AUGUST 2003

electrical characteristics at specified free-air temperature, V_DD= 3 V (unless otherwise noted)

(continued)

†

PARAMETER

TEST CONDITIONS

MIN

61

59

58

74

66

77

68

TYP

MAX

T

A

UNIT

25°C

Full range

25°C

78

V

R

= 0 to 3 V,

IC

TLV247xC

TLV247xI

CMRR

Common-mode rejection ratio

dB

= 50 Ω

S

90

92

V

DD

= 2.7 V to 6 V,

V

IC

= V /2,

DD

No load

Full range

25°C

Supply voltage rejection ratio

k

I

dB

SVR

(∆V

/∆V )

IO

DD

V

DD

= 3 V to 5 V,

V

IC

= V /2,

DD

No load

Full range

25°C

550

350

750

800

Supply current (per channel)

V

O

= 1.5 V,

No load

µA

DD

Full range

25°C

1500

2000

4000

Supply current in shutdown mode

(TLV2470, TLV2473, TLV2475)

(per channel)

TLV247xC

TLV247xI

Full range

I

SHDN = 0 V

nA

DD(SHDN)

†

Full range is 0°C to 70°C for C suffix and - 40°C to 125°C for I suffix. If not specified, full range is - 40°C to 125°C.

operating characteristics at specified free-air temperature, V_DD= 3 V (unless otherwise noted)

†

PARAMETER

TEST CONDITIONS

MIN

1.1

TYP

MAX

UNIT

T

A

25°C

Full range

25°C

1.4

V

= 0.8 V, C = 150 pF,

O(PP)

L

SR

Slew rate at unity gain

V/µs

R = 10 kΩ

L

0.6

f = 100 Hz

f = 1 kHz

28

15

nV/√Hz

pA/√Hz

V

I

Equivalent input noise voltage

Equivalent input noise current

n

25°C

0.405

0.02%

0.1%

0.5%

5

n

A

V

= 1

V

O(PP)

= 2 V,

A

= 10

= 100

R = 10 kΩ,

THD + N Total harmonic distortion plus noise

25°C

V

L

f = 1 kHz

A

V

t

Amplifier turnon time

Amplifier turnoff time

Gain-bandwidth product

25°C

µs

ns

(on)

‡

R = OPEN

L

250

(off)

2.8

MHz

f = 10 kHz,

R = 600 Ω

L

V

= 2 V,

(STEP)PP

= -1,

0.1%

1.5

3.9

1.6

4

A

V

C = 10 pF,

R = 10 kΩ

L

0.01%

0.1%

L

t

s

Settling time

25°C

µs

V

= 2 V,

(STEP)PP

A

= -1,

V

C = 56 pF,

R = 10 kΩ

L

0.01%

L

φ

m

Phase margin

Gain margin

25°C

61°

R = 10 kΩ,

C = 1000 pF

L

15

dB

R = 10 kΩ,

L

C = 1000 pF

L

†

‡

Full range is 0°C to 70°C for C suffix and - 40°C to 125°C for I suffix. If not specified, full range is - 40°C to 125°C.

Depending on package dissipation rating

6

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED AUGUST 2003

electrical characteristics at specified free-air temperature, V_DD= 5 V (unless otherwise noted)

†

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

2200

2400

1600

2000

T

A

UNIT

25°C

Full range

25°C

250

TLV247x

V

IO

Input offset voltage

µV

250

TLV247xA

Full range

Temperature coefficient of input

offset voltage

α

0.4

1.7

µV/°C

VIO

V

R

= V /2,

DD

IC

O

= V /2,

DD

25°C

Full range

25°C

50

100

300

50

= 50 Ω

S

TLV247xC

TLV247xI

I

IO

Input offset current

Input bias current

pA

2.5

TLV247xC

TLV247xI

Full range

25°C

100

300

I

IB

4.85

4.8

4.96

4.82

I

= - 2.5 mA

= - 10 mA

= 2.5 mA

= 10 mA

OH

OL

Full range

25°C

V

High-level output voltage

Low-level output voltage

V

= V /2

V

OH

OL

IC

DD

4.72

4.65

Full range

25°C

0.07

0.15

0.2

Full range

25°C

V

= V /2

IC

DD

0.178

0.28

0.35

Full range

25°C

110

60

63

61

58

90

60

63

61

58

Sourcing

Full range

25°C

Sourcing,

Outside of rails

TLV247xC

TLV247xI

Full range

25°C

‡

I

Short-circuit output current

mA

OS

Sinking

Full range

25°C

Sinking,

Outside of rails

TLV247xC

TLV247xI

Full range

25°C

‡

Output current

V

= 0.5 V from rail

35

O

25°C

92

91

120

Large-signal differential voltage

amplification

A

VD

= 3 V,

dB

Ω

R = 10 kΩ

L

O(PP)

Full range

25°C

12

r

Differential input resistance

10

i(d)

Common-mode input

capacitance

C

z

f = 10 kHz

f = 10 kHz,

25°C

18.9

1.8

pF

Ω

IC

Closed-loop output impedance

A = 10

V

25°C

o

†

‡

Full range is 0°C to 70°C for C suffix and - 40°C to 125°C for I suffix. If not specified, full range is - 40°C to 125°C.

Depending on package dissipation rating

7

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED AUGUST 2003

electrical characteristics at specified free-air temperature, V_DD= 5 V (unless otherwise noted)

(continued)

†

PARAMETER

TEST CONDITIONS

MIN

64

63

58

74

66

77

66

TYP

MAX

T

A

UNIT

25°C

Full range

25°C

84

V

R

= 0 to 5 V,

IC

TLV247xC

TLV247xI

CMRR

Common-mode rejection ratio

dB

= 50 Ω

S

90

92

V

DD

= 2.7 V to 6 V,

V

IC

= V /2,

DD

No load

Full range

25°C

Supply voltage rejection ratio

k

I

dB

SVR

(∆V

/∆V )

IO

DD

V

DD

= 3 V to 5 V,

V

IC

= V /2,

DD

No load

Full range

25°C

600

1000

900

1000

2500

3000

6000

Supply current (per channel)

V

= 2.5 V,

No load

µA

DD

O

Full range

25°C

Supply current in shutdown

mode (TLV2470, TLV2473,

TLV2475) (per channel)

nA

TLV247xC

TLV247xI

Full range

I

SHDN = 0 V

DD(SHDN)

†

Full range is 0°C to 70°C for C suffix and - 40°C to 125°C for I suffix. If not specified, full range is - 40°C to 125°C.

operating characteristics at specified free-air temperature, V_DD= 5 V (unless otherwise noted)

†

PARAMETER

TEST CONDITIONS

MIN

1.1

TYP

MAX

UNIT

T

A

25°C

Full range

25°C

1.5

V

= 2 V, C = 150 pF,

O(PP)

L

SR

Slew rate at unity gain

V/µs

R = 10 kΩ

L

0.7

f = 100 Hz

f = 1 kHz

28

15

nV/√Hz

pA/√Hz

V

I

Equivalent input noise voltage

Equivalent input noise current

n

25°C

0.39

0.01%

0.05%

0.3%

5

n

A

V

= 1

V

O(PP)

= 4 V,

A

= 10

= 100

R = 10 kΩ,

THD + N Total harmonic distortion plus noise

25°C

V

L

f = 1 kHz

A

V

t

Amplifier turnon time

Amplifier turnoff time

Gain-bandwidth product

25°C

µs

ns

(on)

‡

R = OPEN

L

250

(off)

2.8

MHz

f = 10 kHz,

R = 600 Ω

L

V

= 2 V,

(STEP)PP

= -1,

0.1%

1.8

3.3

1.7

3

A

V

C = 10 pF,

R = 10 kΩ

L

0.01%

0.1%

L

t

s

Settling time

25°C

µs

V

= 2 V,

(STEP)PP

A

= -1,

V

C = 56 pF,

R = 10 kΩ

L

0.01%

L

φ

m

Phase margin

Gain margin

25°C

68°

R = 10 kΩ,

C = 1000 pF

L

23

dB

R = 10 kΩ,

L

C = 1000 pF

L

†

‡

Full range is 0°C to 70°C for C suffix and - 40°C to 125°C for I suffix. If not specified, full range is - 40°C to 125°C.

Disable and enable time are defined as the interval between application of logic signal to SHDN and the point at which the supply current has

reached half its final value.

8

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED AUGUST 2003

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

V

Input offset voltage

vs Common-mode input voltage

vs Free-air temperature

1, 2

IO

I

IB

IO

Input bias current

3, 4

I

Input offset current

V

High-level output voltage

Low-level output voltage

Output impedance

vs High-level output current

vs Low-level output current

vs Frequency

5, 7

6, 8

OH

OL

o

Z

9

I

Supply current

vs Supply voltage

vs Frequency

10

DD

PSRR

CMRR

Power supply rejection ratio

Common-mode rejection ratio

Equivalent input noise voltage

Maximum peak-to-peak output voltage

Differential voltage gain and phase

Phase margin

11

vs Frequency

12

V

vs Frequency

13

n

vs Frequency

14, 15

16, 17

18, 19

20, 21

22

O(PP)

A

vs Frequency

VD

m

φ

vs Load capacitance

vs Supply voltage

vs Free-air temperature

vs Frequency

Gain margin

Gain-bandwidth product

23

SR

Slew rate

24, 25

26

Crosstalk

THD+N

Total harmonic distortion + noise

Large and small signal follower

Shutdown pulse response

Shutdown forward and reverse isolation

Shutdown supply current

Shutdown pulse current

vs Frequency

27, 28

29 - 32

33, 34

35, 36

37

V

O

vs Time

vs Frequency

I

vs Supply voltage

vs Free-air temperature

vs Time

DD(SHDN)

38

39, 40

9

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED AUGUST 2003

TYPICAL CHARACTERISTICS

INPUT BIAS AND INPUT OFFSET

INPUT OFFSET VOLTAGE

vs

INPUT OFFSET VOLTAGE

vs

CURRENTS

vs

COMMON-MODE INPUT VOLTAGE

FREE-AIR TEMPERATURE

600

400

200

0

600

400

200

0

50

40

30

20

10

0

V

=3 V

DD

V =5 V

DD

V

=3 V

DD

T =25 °C

A

T =25° C

A

I

IB

-200

-400

-600

-800

-200

-400

-600

-800

I

IO

-10

-55 -35 -15

-0.5

0.5

1.5

2.5

3.5

4.5

5.5

-0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5

5

25 45 65 85 105 125

V

- Common-Mode Input Voltage - V

V

- Common-Mode Input Voltage - V

ICR

T

- Free-Air Temperature - °C

ICR

A

Figure 2

Figure 1

Figure 3

INPUT BIAS AND INPUT OFFSET

LOW-LEVEL OUTPUT VOLTAGE

vs

HIGH-LEVEL OUTPUT VOLTAGE

vs

CURRENTS

vs

LOW-LEVEL OUTPUT CURRENT

HIGH-LEVEL OUTPUT CURRENT

FREE-AIR TEMPERATURE

3.0

2.5

2.0

1.5

1.0

0.5

0.0

50

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

V

=5 V

V

=3 V

DD

V

=3 V

DD

40

30

20

10

0

T

=125°C

=85°C

A

T

A

T

=25°C

A

T

=-40°C

A

T

=125°C

=85°C

I

A

IB

T

A

T

=25°C

A

I

IO

T

=-40°C

A

-10

-55 -35 -15

0

10

20

30

40

50

5

25 45 65 85 105 125

0

10

20

30

40

50

60

I

- Low-Level Output Current - mA

T

- Free-Air Temperature - °C

OL

A

I

- High-Level Output Current - mA

OH

Figure 4

Figure 6

Figure 5

HIGH-LEVEL OUTPUT VOLTAGE

vs

LOW-LEVEL OUTPUT VOLTAGE

vs

OUTPUT IMPEDANCE

vs

HIGH-LEVEL OUTPUT CURRENT

LOW-LEVEL OUTPUT CURRENT

FREQUENCY

5.5

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

5.0

1000

100

V

=3 & 5 V

=25°C

T

=125°C

=85°C

DD

A

V

=5 V

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

DD

T

A

T

A

AV=100

T

=25°C

A

10

1

T

=-40°C

AV=10

A

T

=125°C

=85°C

A

T

A

AV=1

0.1

T

=25°C

A

T

=-40°C

A

V

=5 V

DD

0.01

0

20 40 60 80 100 120 140 160

0

20

40

60

80 100 120 140

100

1k

10k

100k

1M

10M

I

- High-Level Output Current - mA

I

- Low-Level Output Current - mA

f - Frequency - Hz

OH

OL

Figure 8

Figure 9

Figure 7

10

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED AUGUST 2003

TYPICAL CHARACTERISTICS

POWER SUPPLY REJECTION RATIO

SUPPLY CURRENT

vs

COMMON-MODE REJECTION RATIO

vs

FREQUENCY

130

FREQUENCY

SUPPLY VOLTAGE

100

90

80

70

60

50

40

30

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0.0

V

=3 & 5 V

PSRR+

DD

F

I

T

=125°C

A

120

110

100

R =5 kΩ

T

=85°C

A

R =50 Ω

T

=25°C

A

PSRR-

T

=25°C

A

V

=5 V

DD

90

80

70

60

50

=2.5 V

IC

T

=-40°C

A

V

=3 V

DD

=1.5 V

A

= 1

IC

V

SHDN= V

DD

Per Channel

10

100

1k

10k

100k

1M

10M

100

1k

10k

100k

1M

10M

2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0

f - Frequency - Hz

V

- Supply Voltage - V

DD

Figure 11

Figure 12

Figure 10

MAXIMUM PEAK-TO-PEAK

OUTPUT VOLTAGE

vs

MAXIMUM PEAK-TO-PEAK

OUTPUT VOLTAGE

vs

EQUIVALENT NOISE VOLTAGE

vs

FREQUENCY

5.5

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

80

THD+N ≤ 2.0%

V

A

V

T

=3 & 5 V

= 10

DD

V

IN

A

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

R =600 Ω

R =10 kΩ

70

60

50

40

30

20

10

0

L

T

=25°C

T

=25°C

A

= V /2

A

V

=5 V

O(PP)

DD

=25°C

V

=5 V

O(PP)

V

=3 V

O(PP)

V

=3 V

O(PP)

10k

100k

1M

10k

100k

1M

10

100

1k

10k

100k

f - Frequency - Hz

Figure 14

Figure 15

Figure 13

DIFFERENTIAL VOLTAGE GAIN AND PHASE

vs

FREQUENCY

100

45

100

45

V

= 3

DD

L

V

= 5

DD

L

80

60

40

20

R =600 Ω

C =0

0

80

60

40

20

0

R =600 Ω

C =0

T

=25°C

A

T

=25°C

-45

-90

-135

A

-45

-90

-135

0

-180

-225

0

-180

-225

-20

-40

100

-270

100M

-40

100

-270

100M

1k

10k

100k

1M

10M

1k

10k

100k

1M

10M

Frequency - Hz

Figure 16

Figure 17

11

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED AUGUST 2003

TYPICAL CHARACTERISTICS

PHASE MARGIN

vs

PHASE MARGIN

vs

GAIN MARGIN

vs

LOAD CAPACITANCE

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

V =3V

DD

V

=3 V

Rnull=50

DD

L

V

=5V

DD

L

R =10 kΩ

Rnull=50

R =10 kΩ

L

R =10 kΩ

T

=25°C

5

T

=25°C

A

T =25°C

A

Rnull=0

See Figure 42

Rnull=100

10

15

Rnull=100

Rnull=20

Rnull=100

Rnull=20

20

Rnull=20

10k

25

30

Rnull=50

1k

Rnull=0

1k

Rnull=0

1k

100

10k

100k

100

100k

100

10k

100k

C

- Load Capacitance - pF

C

- Load Capacitance - pF

C - Load Capacitance - pF

L

Figure 18

Figure 19

Figure 20

SLEW RATE

vs

GAIN MARGIN

vs

GAIN-BANDWIDTH PRODUCT

vs

SUPPLY VOLTAGE

LOAD CAPACITANCE

SUPPLY VOLTAGE

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0.0

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

0

5

SR-

SR+

R =10 kΩ

L

Rnull=0

10

15

R =600 Ω

L

Rnull=20

20

25

C =11 pF

L

f=10 kHz

=25°C

Rnull=100

Rnull=50

V

A

=1.5 V

O(PP)

T

A

=-1

V

=5V

V

DD

L

R =10 kΩ

C =150 pF

L

R =10 kΩ

30

35

L

T

=25°C

A

2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0

100

1k

10k

100k

2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0

V

- Supply Voltage - V

DD

C

- Load Capacitance - pF

V

- Supply Voltage - V

DD

L

Figure 23

Figure 21

Figure 22

SLEW RATE

vs

FREE-AIR TEMPERATURE

2.00

1.75

1.50

1.25

1.00

0.75

0.50

0.25

0.00

2.00

1.75

1.50

1.25

1.00

0.75

0.50

0.25

0.00

SR-

SR+

SR-

V

=5 V

DD

L

V

=3 V

R =10 kΩ

C =150 pF

DD

L

V

R =10 kΩ

C =150 pF

A

=-1

A

=-1

-55 -35 -15

5

25 45 65 85 105 125

-55 -35 -15

5

25 45 65 85 105 125

T

- Free-Air Temperature - °C

T

- Free-Air Temperature - °C

A

Figure 24

Figure 25

12

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED AUGUST 2003

TYPICAL CHARACTERISTICS

TOTAL HARMONIC

DISTORTION PLUS NOISE

vs

TOTAL HARMONIC

DISTORTION PLUS NOISE

vs

CROSSTALK

vs

FREQUENCY

0

V

= 3V & 5V

1

0.1

1

0.1

DD

V

L

A

= 100

V

A

= 100

V

-20

A = 1

R = 600Ω

V

=2V

I(PP)

-40

-60

All Channels

A

= 10

= 1

V

A

= 10

= 1

V

-80

-100

-120

-140

0.01

0.001

0.01

0.001

V

R

V

= 3 V

DD

V

R

= 5 V

DD

= 10 kΩ

L

0

= 10 kΩ

L

0

= 2 V

PP

V

T

= 4 V

PP

T

= 25°C

A

= 25°C

A

-160

10

100

1k

10k

100k

10

100

1k

10k

100k

10

100

1 k

10 k

100 k

f - Frequency - Hz

Figure 26

Figure 27

Figure 28

LARGE SIGNAL FOLLOWER

SMALL SIGNAL FOLLOWER

PULSE RESPONSE

vs

TIME

V (2 V/DIV)

I

V (50 mV/DIV)

I

V (2 V/DIV)

I

V

R

C

= 3 V

= 10 kΩ

= 8 pF

DD

L

f = 1 MHz

= 25°C

V

(1 V/DIV)

T

O

A

V

(1 V/DIV)

O

V

R

C

= 5 V

DD

V

R

C

= 3 V

= 10 kΩ

= 8 pF

DD

= 10 kΩ

L

V

(50 mV/DIV)

O

= 8 pF

L

f = 85 kHz

T

A

= 25°C

T

A

= 25°C

0

100

200

300

400

500

0

1

2

3

4

5

6

7

8

9

10

0

1

2

3

4

5

6

7

8

9

10

t - Time - µs

Figure 29

Figure 30

Figure 31

SMALL SIGNAL FOLLOWER

SHUTDOWN (ON AND OFF)

PULSE RESPONSE

vs

TIME

V

(2 V/DIV)

SHDN

V (50 mV/DIV)

I

V

R

C

= 5 V

= 10 kΩ

= 8 pF

V

(2 V/DIV)

DD

SHDN

L

R

= 600 Ω

L

R

= 600 Ω

L

f = 1 MHz

R

= 10 kΩ

L

R

= 10 kΩ

T

= 25°C

L

A

V

(500 mV/DIV)

V

(1 V/DIV)

O

V

(50 mV/DIV)

O

V

= 3 V

DD

V

= 5 V

= 8 pF

= 25°C

DD

C

T

= 8 pF

= 25°C

L

C

T

L

A

0

2

4

6

8

10 12 14 16

0

2

4

6

8

10 12 14 16 18

0

100

200

300

400

500

t - Time - µs

Figure 32

Figure 33

Figure 34

13

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED AUGUST 2003

TYPICAL CHARACTERISTICS

SHUTDOWN FORWARD

SHUTDOWN SUPPLY CURRENT

SHUTDOWN REVERSE ISOLATION

ISOLATION

vs

SUPPLY VOLTAGE

FREQUENCY

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0.0

120

100

80

120

100

80

V = 3 & 5 V

DD

V

= 3 & 5 V

DD

R =10 kΩ

C =0 pF

L

C =0 pF

A

= 1

L

V

A = 1

V

=0.1, 1.5, 3 V

I(PP)

T

=125

A

V

=0.1, 1.5, 3 Vp-p

IN

T

=85

A

R =600 Ω

L

R =600 Ω

L

60

T

=25

A

R =10 kΩ

L

T =-40

A

40

20

40

20

Shutdown On

R =OPEN

L

V =V

I

DD/2

0

2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0

100

1k

10k

100k

1M

10M

100

1k

10k

100k

1M

10M

f - Frequency - Hz

V

- Supply Voltage - V

DD

Figure 35

Figure 36

Figure 37

SHUTDOWN SUPPLY CURRENT

vs

FREE-AIR TEMPERATURE

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0.0

SD MODE Channel 1 & 2

A

V

= 1

R = OPEN

L

V

=V

DD/2

IN

V

=5 V

DD

V

=3 V

DD

-55 -35 -15

5

25 45 65 85 105 125

T

- Free-Air Temperature - °C

A

Figure 38

SHUTDOWN PULSE CURRENT

vs

TIME

2

1.75

1.5

4

2

1.75

1.5

6

4

Shutdown Pulse

3

Shutdown Pulse

2

1

1.25

1

1.25

1

0

I

R =10 kΩ

DD

L

-1

I

R =10 kΩ

DD

L

-2

-4

-6

-8

-10

0.75

0.5

-2

-3

-4

-5

-6

-7

-8

0.75

0.5

I

R =600 Ω

L

I

R =600Ω

L

DD

0.25

0

0.25

V

= 5 V

DD

C =8 pF

L

T =25°C

A

V

= 3 V

0

DD

C =8 pF

L

T =25°C

A

-0.25

-0.5

-0.25

-0.5

-12

0

4

8

12 16 20 24 28 30

0

4

8

12 16 20 24 28 30

t - Time - µs

Figure 39

Figure 40

14

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED AUGUST 2003

PARAMETER MEASUREMENT INFORMATION

R

_

+

null

R

L

C

L

Figure 41

APPLICATION INFORMATION

driving a capacitive load

When the amplifier is configured in this manner, capacitive loading directly on the output will decrease the

device’s phase margin leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater

than 10 pF, it is recommended that a resistor be placed in series (R ) with the output of the amplifier, as

NULL

shown in Figure 42. A minimum value of 20 Ω should work well for most applications.

R

F

R

G

R

_

+

NULL

Input

Output

C

LOAD

Figure 42. Driving a Capacitive Load

offset voltage

The output offset voltage, (V ) is the sum of the input offset voltage (V ) and both input bias currents (I ) times

OO

IO

IB

the corresponding gains. The following schematic and formula can be used to calculate the output offset

voltage:

R

F

I

IB-

R

G

+

-

V

I

V

O

+

R

S

I

IB+

R

F

V

+ V

1 ) ǒ Ǔ " I

R

1 ) ǒ Ǔ " I

R

ǒ Ǔ ǒ Ǔ

OO

IO

IB)

S

IB–

F

R

G

Figure 43. Output Offset Voltage Model

15

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED AUGUST 2003

APPLICATION INFORMATION

general configurations

When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often

required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier

(see Figure 44).

R

F

G

-

V

1

O

+

V

I

R1

V

C1

f

+

–3dB

2pR1C1

R

O

F

1

ǒ

Ǔ

+

ǒ

1 )

Ǔ

V

R

1 ) sR1C1

I

G

Figure 44. Single-Pole Low-Pass Filter

If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this

task. For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth.

Failure to do this can result in phase shift of the amplifier.

C1

R1 = R2 = R

C1 = C2 = C

Q = Peaking Factor

(Butterworth Q = 0.707)

+

_

V

I

1

R1

R2

f

+

–3dB

2pRC

C2

R

F

R

=

G

1

R

F

2 -

)

(

R

Q

G

Figure 45. 2-Pole Low-Pass Sallen-Key Filter

shutdown function

Three members of the TLV247x family (TLV2470/3/5) have a shutdown terminal for conserving battery life in

portable applications. When the shutdown terminal is tied low, the supply current is reduced to 350 nA/channel,

the amplifier is disabled, and the outputs are placed in a high impedance mode. To enable the amplifier, the

shutdown terminal can either be left floating or pulled high. When the shutdown terminal is left floating, care

should be taken to ensure that parasitic leakage current at the shutdown terminal does not inadvertently place

the operational amplifier into shutdown. The shutdown terminal threshold is always referenced to V /2.

DD

Therefore, when operating the device with split supply voltages (e.g. 2.5 V), the shutdown terminal needs to

be pulled to V - (not GND) to disable the operational amplifier.

DD

16

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED AUGUST 2003

APPLICATION INFORMATION

shutdown function (continued)

The amplifier’s output with a shutdown pulse is shown in Figures 33 and 34. The amplifier is powered with a

single 5-V supply and configured as a noninverting configuration with a gain of 5. The amplifier turnon and turnoff

times are measured from the 50% point of the shutdown pulse to the 50% point of the output waveform. The

times for the single, dual, and quad are listed in the data tables.

Figures 35 and 36 show the amplifier’s forward and reverse isolation in shutdown. The operational amplifier is

powered by 1.35-V supplies and configured as a voltage follower (A = 1). The isolation performance is plotted

V

across frequency using 0.1-V , 1.5-V , and 2.5-V input signals. During normal operation, the amplifier

PP

would not be able to handle a 2.5-V input signal with a supply voltage of 1.35 V since it exceeds the

PP

common-mode input voltage range (V ). However, this curve illustrates that the amplifier remains in shutdown

ICR

even under a worst case scenario.

circuit layout considerations

To achieve the levels of high performance of the TLV247x, follow proper printed-circuit board design techniques.

A general set of guidelines is given in the following.

D

Ground planes - It is highly recommended that a ground plane be used on the board to provide all

components with a low inductive ground connection. However, in the areas of the amplifier inputs and

output, the ground plane can be removed to minimize the stray capacitance.

D

Proper power supply decoupling - Use a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramic

capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers

depending on the application, but a 0.1-µF ceramic capacitor should always be used on the supply terminal

of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible to the supply

terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less

effective. The designer should strive for distances of less than 0.1 inches between the device power

terminals and the ceramic capacitors.

D

Sockets - Sockets can be used but are not recommended. The additional lead inductance in the socket pins

will often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit board

is the best implementation.

Short trace runs/compact part placements - Optimum high performance is achieved when stray series

inductance has been minimized. To realize this, the circuit layout should be made as compact as possible,

thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of

the amplifier. Its length should be kept as short as possible. This will help to minimize stray capacitance at

the input of the amplifier.

D

Surface-mount passive components - Using surface-mount passive components is recommended for high

performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of

surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small

size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray

inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be

kept as short as possible.

17

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED AUGUST 2003

APPLICATION INFORMATION

general PowerPAD design considerations

The TLV247x is available in a thermally-enhanced PowerPAD family of packages. These packages are

constructed using a downset leadframe upon which the die is mounted [see Figure 46(a) and Figure 46(b)]. This

arrangement results in the lead frame being exposed as a thermal pad on the underside of the package [see

Figure 46(c)]. Because this thermal pad has direct thermal contact with the die, excellent thermal performance

can be achieved by providing a good thermal path away from the thermal pad.

The PowerPAD package allows for both assembly and thermal management in one manufacturing operation.

During the surface-mount solder operation (when the leads are being soldered), the thermal pad can also be

soldered to a copper area underneath the package. Through the use of thermal paths within this copper area,

heat can be conducted away from the package into either a ground plane or other heat dissipating device.

The PowerPAD package represents a breakthrough in combining the small area and ease of assembly of

surface mount with the, heretofore, awkward mechanical methods of heatsinking.

DIE

Side View (a)

Thermal

Pad

DIE

End View (b)

Bottom View (c)

NOTE A: The thermal pad is electrically isolated from all terminals in the package.

Figure 46. Views of Thermally Enhanced DGN Package

Although there are many ways to properly heatsink the PowerPAD package, the following steps illustrate the

recommended approach.

Thermal Pad Area

Quad

Single or Dual

68 mils x 70 mils) with 5 vias

78 mils x 94 mils) with 9 vias

(Via diameter = 13 mils

(Via diameter = 13 mils)

Figure 47. PowerPAD PCB Etch and Via Pattern

PowerPAD is a trademark of Texas Instruments Incorporated.

18

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED AUGUST 2003

APPLICATION INFORMATION

general PowerPAD design considerations (continued)

1. Prepare the PCB with a top side etch pattern as shown in Figure 47. There should be etch for the leads as

well as etch for the thermal pad.

2. Place five holes (dual) or nine holes (quad) in the area of the thermal pad. These holes should be 13 mils

in diameter. Keep them small so that solder wicking through the holes is not a problem during reflow.

3. Additional vias may be placed anywhere along the thermal plane outside of the thermal pad area. This helps

dissipate the heat generated by the TLV247x IC. These additional vias may be larger than the 13-mil

diameter vias directly under the thermal pad. They can be larger because they are not in the thermal pad

area to be soldered so that wicking is not a problem.

4. Connect all holes to the internal ground plane.

5. When connecting these holes to the ground plane, do not use the typical web or spoke via connection

methodology. Web connections have a high thermal resistance connection that is useful for slowing the heat

transfer during soldering operations. This makes the soldering of vias that have plane connections easier.

In this application, however, low thermal resistance is desired for the most efficient heat transfer. Therefore,

the holes under the TLV247x PowerPAD package should make their connection to the internal ground plane

with a complete connection around the entire circumference of the plated-through hole.

6. The top-side solder mask should leave the terminals of the package and the thermal pad area with its five

holes (dual) or nine holes (quad) exposed. The bottom-side solder mask should cover the five or nine holes

of the thermal pad area. This prevents solder from being pulled away from the thermal pad area during the

reflow process.

7. Apply solder paste to the exposed thermal pad area and all of the IC terminals.

8. With these preparatory steps in place, the TLV247x IC is simply placed in position and run through the solder

reflow operation as any standard surface-mount component. This results in a part that is properly installed.

For a given θ , the maximum power dissipation is shown in Figure 48 and is calculated by the following formula:

JA

T

–T

MAX

A

P

+

ǒ Ǔ

D

q

JA

Where:

P

T

= Maximum power dissipation of TLV247x IC (watts)

= Absolute maximum junction temperature (150°C)

= Free-ambient air temperature (°C)

= θ + θ

D

MAX

T

A

θ

JA

JC

CA

θ

= Thermal coefficient from junction to case

JC

= Thermal coefficient from case to ambient air (°C/W)

CA

19

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED AUGUST 2003

APPLICATION INFORMATION

general PowerPAD design considerations (continued)

MAXIMUM POWER DISSIPATION

vs

FREE-AIR TEMPERATURE

7

PWP Package

T

= 150°C

J

Low-K Test PCB

= 29.7°C/W

θ

JA

6

5

4

3

2

SOT-23 Package

Low-K Test PCB

= 324°C/W

θ

JA

DGN Package

Low-K Test PCB

θ

= 52.3°C/W

JA

SOIC Package

Low-K Test PCB

θ

JA

= 176°C/W

PDIP Package

Low-K Test PCB

θ

JA

= 104°C/W

1

0

-55 -40 -25 -10

5

20 35 50 65 80 95 110 125

T

A

- Free-Air Temperature - °C

NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB.

Figure 48. Maximum Power Dissipation vs Free-Air Temperature

The next consideration is the package constraints. The two sources of heat within an amplifier are quiescent

power and output power. The designer should never forget about the quiescent heat generated within the

device, especially multi-amplifier devices. Because these devices have linear output stages (Class A-B), most

of the heat dissipation is at low output voltages with high output currents. Figure 49 to Figure 54 show this effect,

along with the quiescent heat, with an ambient air temperature of 70°C and 125°C. When using V = 3 V, there

DD

is generally not a heat problem with an ambient air temperature of 70°C. But, when using V

= 5 V, the

DD

packages are severely limited in the amount of heat it can dissipate. The other key factor when looking at these

graphs is how the devices are mounted on the PCB. The PowerPAD devices are extremely useful for heat

dissipation. But, the device should always be soldered to a copper plane to fully use the heat dissipation

properties of the PowerPAD. The SOIC package, on the other hand, is highly dependent on how it is mounted

on the PCB. As more trace and copper area is placed around the device, θ decreases and the heat dissipation

JA

capability increases. The currents and voltages shown in these graphs are for the total package. For the dual

or quad amplifier packages, the sum of the RMS output currents and voltages should be used to choose the

proper package.

20

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED AUGUST 2003

APPLICATION INFORMATION

general PowerPAD design considerations (continued)

†

TLV2470, TLV2471

MAXIMUM RMS OUTPUT CURRENT

vs

RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS

180

160

140

120

100

180

160

140

120

100

Maximum Output

Current Limit Line

Maximum Output

Current Limit Line

Packages With

≤ 110°C/W

C

G

C

θ

JA

B

at T = 125°C

A

or

B

A

θ

JA

≤ 355°C/W

A

80

60

40

80

60

40

at T = 70°C

A

Packages With

≤ 210°C/W

Safe Operating Area

θ

JA

at T = 70°C

A

V

T

A

=

3 V

DD

V

T

A

=

5 V

DD

= 150°C

= 125°C

20

0

20

0

J

= 150°C

= 125°C

J

Safe Operating Area

1.5 2.5

0

0.25

0.5

0.75

1

1.25

1.5

0

0.5

1

2

| V | - RMS Output Voltage - V

O

| V | - RMS Output Voltage - V

O

Figure 49

Figure 50

†

TLV2472, TLV2473

MAXIMUM RMS OUTPUT CURRENT

vs

RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS

MAXIMUM RMS OUTPUT CURRENT

vs

RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS

180

160

140

120

100

180

160

140

120

100

Maximum Output

Current Limit Line

Maximum Output

Current Limit Line

G

C

H

F

Packages With

≤ 55°C/W

D

G

θ

JA

at T = 125°C

A

H

or

D

80

60

40

80

60

40

θ

≤ 178°C/W

JA

C

at T = 70°C

A

Packages With

θ

JA

≤ 105°C/W

at T = 70°C

A

Safe Operating Area

V

T

A

=

3 V

DD

V

T

A

=

5 V

DD

= 150°C

= 125°C

20

0

20

0

J

= 150°C

= 125°C

J

Safe Operating Area

1.5 2.5

0

0.25

0.5

0.75

1

1.25

1.5

0

0.5

1

2

| V | - RMS Output Voltage - V

O

| V | - RMS Output Voltage - V

O

Figure 51

Figure 52

†

A - SOT23(5); B - SOT23 (6); C - SOIC (8); D - SOIC (14); E - SOIC (16); F - MSOP PP (8); G - PDIP (8); H - PDIP (14); I - PDIP (16);

J - TSSOP PP (14/16)

21

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED AUGUST 2003

APPLICATION INFORMATION

general PowerPAD design considerations (continued)

†

TLV2474, TLV2475

MAXIMUM RMS OUTPUT CURRENT

vs

TLV2474, TLV2475

MAXIMUM RMS OUTPUT CURRENT

vs

RMS OUTPUT VOLTAGE DUE TO THERMAL LIMITS

180

160

140

120

100

180

160

140

120

100

Maximum Output

Current Limit Line

Maximum Output

Current Limit Line

J

H and I

E

H and I

E

Packages With

80

60

40

80

60

40

θ

JA

≤ 88°C/W

V

T

A

=

5 V

DD

D

= 150°C

= 125°C

at T = 70°C

J

A

Packages With

V

T

A

= 3 V

= 150°C

= 125°C

DD

θ

JA

≤ 52°C/W

20

0

20

0

J

Safe Operating Area

0.75 1.25

at T = 70°C

Safe Operating Area

0.5

A

0

0.25

0.5

1

1.5

0

1

1.5

2

2.5

| V | - RMS Output Voltage - V

O

| V | - RMS Output Voltage - V

O

Figure 53

Figure 54

†

A - SOT23(5); B - SOT23 (6); C - SOIC (8); D - SOIC (14); E - SOIC (16); F - MSOP PP (8); G - PDIP (8); H - PDIP (14); I - PDIP (16); J

- TSSOP PP (14/16)

22

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TLV2470, TLV2471, TLV2472, TLV2473, TLV2474, TLV2475, TLV247xA

FAMILY OF 600−µA/Ch 2.8−MHz RAIL−TO−RAIL INPUT/OUTPUT

HIGH−DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN

SLOS232C - JUNE 1999 - REVISED AUGUST 2003

APPLICATION INFORMATION

macromodel information

Macromodel information provided was derived using Microsim Parts, the model generation software used

with Microsim PSpice. The Boyle macromodel (see Note 2) and subcircuit in Figure 55 are generated using

the TLV247x typical electrical and operating characteristics at T = 25°C. Using this information, output

A

simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):

D

Maximum positive output voltage swing

Maximum negative output voltage swing

Slew rate

D

Unity-gain frequency

Common-mode rejection ratio

Phase margin

Quiescent power dissipation

Input bias current

DC output resistance

AC output resistance

Short-circuit output current limit

Open-loop voltage amplification

NOTE 1: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers,” IEEE Journal

of Solid-State Circuits, SC-9, 353 (1974).

3

99

V

DD

+

-

egnd

rd1

11

rd2

12

rss

ro2

css

fb

rp

c1

7

+

c2

vlim

-

8

1

2

+

-

r2

9

6

IN+

IN-

vc

D

S

D

S

+

-

vb

ga

G

ro1

gcm

ioff

53

OUT

dp

5

dlp

dln

91

90

92

10

+

-

+

-

iss

dc

vlp

hlim

vln

+

GND

-

+ 54

4

de

ve

* TLV247x operational amplifier ”macromodel” subcircuit

* created using Parts release 8.0 on 4/27/99 at 14:31

* Parts is a MicroSim product.

iss

hlim

ioff

j1

10

90

0

4

dc

10.714E-6

75E-9

0

vlim 1K

dc

6

*

11

12

6

2

10 jx1

10 jx2

* connections: non-inverting input

j2

1

*

| inverting input

r2

9

100.00E3

12.527E3

10

| | positive power supply

| | | negative power supply

| | | | output

rd1

rd2

ro1

ro2

rp

3

11

12

5

3

8

| | | | |

7

99

4

10

.subckt TLV247x 1 2 3 4 5

*

3

3.8023E3

18.667E6

dc 0

rss

vb

vc

ve

vlim

vlp

vln

.model

.ends

*$

10

9

99

0

c1

11

6

12

7

99

53

5

91

90

3

0

99

1.1094E-12

c2

5.5000E-12

3

53

4

dc .842

dc 0

dc 110

css

dc

de

dlp

dln

dp

egnd

fb

10

5

556.53E-15

54

7

dy

dx

8

54

90

92

4

91

0

92

dx

dy

jx1

jx2

D(Is=800.00E-18)

D(Is=800.00E-18 Rs=1m Cjo=10p)

99

7

poly(2) (3,0) (4,0) 0 .5 .5

poly(5) vb vc ve vlp vln 0

NJF(Is=1.0825E-12 Beta=594.78E-06 + Vto=-1)

+ 39.614E6 -1E3 1E3 40E6 -40E6

ga

gcm

6

0

6

11

10

12 79.828E-6

99 32.483E-9

Figure 55. Boyle Macromodel and Subcircuit

PSpice and Parts are trademarks of MicroSim Corporation.

23

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM

www.ti.com

4-Nov-2005

PACKAGING INFORMATION

Orderable Device

TLV2470AID

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

SOIC

D

8

6

8

6

8

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2470AIDG4

TLV2470AIDR

TLV2470AIDRG4

TLV2470AIP

SOIC

D

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SOIC

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

PDIP

P

50

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

TLV2470AIPE4

TLV2470CD

PDIP

P

50

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

SOIC

D

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2470CDBVR

TLV2470CDBVRG4

TLV2470CDBVT

TLV2470CDBVTG4

TLV2470CDR

SOT-23

SOIC

DBV

D

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2470CDRG4

TLV2470CP

SOIC

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

PDIP

P

50

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

TLV2470CPE4

TLV2470ID

PDIP

P

50

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

SOIC

D

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2470IDBVR

TLV2470IDBVRG4

TLV2470IDBVT

TLV2470IDBVTG4

TLV2470IDR

SOT-23

SOIC

DBV

D

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2470IDRG4

TLV2470IP

SOIC

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

PDIP

P

50

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

TLV2470IPE4

TLV2471AID

PDIP

P

50

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

SOIC

D

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

4-Nov-2005

Orderable Device

TLV2471AIDR

TLV2471AIDRG4

TLV2471AIP

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

SOIC

D

8

5

8

5

8

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SOIC

PDIP

D

P

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

50

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

TLV2471AIPE4

TLV2471CD

PDIP

P

50

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

SOIC

D

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2471CDBVR

TLV2471CDBVRG4

TLV2471CDBVT

TLV2471CDBVTG4

TLV2471CDR

SOT-23

SOIC

DBV

D

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2471CDRG4

TLV2471CP

SOIC

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

PDIP

P

50

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

TLV2471CPE4

TLV2471ID

PDIP

P

50

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

SOIC

D

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2471IDBVR

TLV2471IDBVRG4

TLV2471IDBVT

TLV2471IDBVTG4

TLV2471IDR

SOT-23

SOIC

DBV

D

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2471IDRG4

TLV2471IP

SOIC

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

PDIP

P

50

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

TLV2471IPE4

PDIP

P

50

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

TLV2472AID

SOIC

D

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2472AIDG4

TLV2472AIDR

TLV2472AIDRG4

SOIC

D

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SOIC

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SOIC

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

Addendum-Page 2

PACKAGE OPTION ADDENDUM

www.ti.com

4-Nov-2005

Orderable Device

TLV2472AIP

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

PDIP

P

8

50

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

TLV2472AIPE4

TLV2472CD

PDIP

SOIC

P

D

50

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2472CDGN

MSOP-

Power

PAD

DGN

80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2472CDGNR

ACTIVE

MSOP-

Power

PAD

DGN

8

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2472CDGNRG4

MSOP-

Power

PAD

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2472CDR

TLV2472CDRG4

TLV2472CP

ACTIVE

SOIC

PDIP

SOIC

D

8

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

P

50

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

TLV2472CPE4

TLV2472ID

P

50

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

D

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2472IDG4

TLV2472IDGN

D

75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

MSOP-

Power

PAD

DGN

80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2472IDGNG4

TLV2472IDGNR

ACTIVE

MSOP-

Power

PAD

DGN

8

80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

MSOP-

Power

PAD

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2472IDGNRG4

MSOP-

Power

PAD

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2472IDR

TLV2472IDRG4

TLV2472IP

ACTIVE

SOIC

PDIP

SOIC

PDIP

D

P

D

N

8

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

8

50

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

TLV2472IPE4

TLV2473AID

TLV2473AIDR

TLV2473AIN

8

50

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

14

50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

25

Pb-Free

(RoHS)

CU NIPD

Level-NC-NC-NC

Addendum-Page 3

PACKAGE OPTION ADDENDUM

www.ti.com

4-Nov-2005

Orderable Device

TLV2473AINE4

TLV2473CD

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

PDIP

N

14

10

25

Pb-Free

(RoHS)

CU NIPD

Level-NC-NC-NC

SOIC

D

50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2473CDGQ

MSOP-

Power

PAD

DGQ

80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2473CDGQR

ACTIVE

MSOP-

Power

PAD

DGQ

10

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2473CDGQRG4

MSOP-

Power

PAD

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2473CDR

TLV2473CDRG4

TLV2473ID

ACTIVE

SOIC

D

14

10

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

D

50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2473IDG4

TLV2473IDGQ

D

50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

MSOP-

Power

PAD

DGQ

80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2473IDGQG4

TLV2473IDGQR

ACTIVE

MSOP-

Power

PAD

DGQ

10

80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

MSOP-

Power

PAD

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2473IDGQRG4

MSOP-

Power

PAD

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2473IN

TLV2473INE4

TLV2474AID

ACTIVE

PDIP

N

14

25

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

PDIP

Pb-Free

(RoHS)

SOIC

D

50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2474AIDG4

TLV2474AIDR

TLV2474AIDRG4

TLV2474AIN

SOIC

D

50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SOIC

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SOIC

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

PDIP

N

25

Pb-Free

(RoHS)

CU NIPD

Level-NC-NC-NC

TLV2474AINE4

TLV2474AIPWP

TLV2474AIPWPR

PDIP

N

25

Pb-Free

(RoHS)

CU NIPD

Level-NC-NC-NC

HTSSOP

PWP

90 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

Addendum-Page 4

PACKAGE OPTION ADDENDUM

www.ti.com

4-Nov-2005

Orderable Device

TLV2474AIPWPRG4

TLV2474AIPWR

TLV2474CD

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

HTSSOP

PWP

14

16

2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

TSSOP

SOIC

PW

D

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2474CDR

SOIC

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2474CDRG4

TLV2474CN

SOIC

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

PDIP

N

25

Pb-Free

(RoHS)

CU NIPD

Level-NC-NC-NC

TLV2474CNE4

TLV2474CPWP

TLV2474CPWPR

TLV2474CPWPRG4

TLV2474ID

PDIP

N

25

Pb-Free

(RoHS)

CU NIPD

Level-NC-NC-NC

HTSSOP

SOIC

PWP

D

90 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2474IDR

SOIC

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2474IDRG4

TLV2474IN

SOIC

D

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

PDIP

N

25

Pb-Free

(RoHS)

CU NIPD

Level-NC-NC-NC

TLV2474INE4

PDIP

N

25

Pb-Free

(RoHS)

CU NIPD

Level-NC-NC-NC

TLV2474IPWP

TLV2474IPWPG4

TLV2474IPWPR

TLV2474IPWPRG4

TLV2475AIDR

TLV2475AIN

HTSSOP

SOIC

PWP

D

90 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

90 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

PDIP

N

25

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

TLV2475AINE4

TLV2475AIPWP

TLV2475AIPWPR

TLV2475AIPWPRG4

TLV2475CD

PDIP

N

25

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

HTSSOP

SOIC

PWP

D

90 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

Addendum-Page 5

PACKAGE OPTION ADDENDUM

www.ti.com

4-Nov-2005

Orderable Device

TLV2475CDR

TLV2475CN

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

SOIC

D

16

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

PDIP

N

25

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

TLV2475CNE4

TLV2475CPWPR

TLV2475IDR

25

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

HTSSOP

SOIC

PWP

D

2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TLV2475IN

PDIP

N

25

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

TLV2475INE4

TLV2475IPWPR

TLV2475IPWPRG4

PDIP

N

25

Pb-Free

(RoHS)

CU NIPDAU Level-NC-NC-NC

HTSSOP

PWP

2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

2000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR

no Sb/Br)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan

-

The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS

&

no Sb/Br)

-

please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 6

MECHANICAL DATA

MPDI001A – JANUARY 1995 – REVISED JUNE 1999

P (R-PDIP-T8)

PLASTIC DUAL-IN-LINE

0.400 (10,60)

0.355 (9,02)

8

5

0.260 (6,60)

0.240 (6,10)

1

4

0.070 (1,78) MAX

0.325 (8,26)

0.300 (7,62)

0.020 (0,51) MIN

0.015 (0,38)

Gage Plane

0.200 (5,08) MAX

Seating Plane

0.010 (0,25) NOM

0.125 (3,18) MIN

0.100 (2,54)

0.021 (0,53)

0.430 (10,92)

MAX

0.010 (0,25)

M

0.015 (0,38)

4040082/D 05/98

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.

C. Falls within JEDEC MS-001

For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA

MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999

PW (R-PDSO-G**)

PLASTIC SMALL-OUTLINE PACKAGE

14 PINS SHOWN

0,30

0,19

M

0,10

0,65

14

8

0,15 NOM

4,50

4,30

6,60

6,20

Gage Plane

0,25

1

7

0°–8°

A

0,75

0,50

Seating Plane

0,10

0,15

0,05

1,20 MAX

PINS **

8

14

16

20

24

28

DIM

3,10

2,90

5,10

4,90

5,10

4,90

6,60

6,40

7,90

9,80

9,60

A MAX

A MIN

7,70

4040064/F 01/97

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.

D. Falls within JEDEC MO-153

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,

enhancements, improvements, and other changes to its products and services at any time and to discontinue

any product or service without notice. Customers should obtain the latest relevant information before placing

orders and should verify that such information is current and complete. All products are sold subject to TI’s terms

and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its hardware products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI

deems necessary to support this warranty. Except where mandated by government requirements, testing of all

parameters of each product is not necessarily performed.

TI assumes no liability for applications assistance or customer product design. Customers are responsible for

their products and applications using TI components. To minimize the risks associated with customer products

and applications, customers should provide adequate design and operating safeguards.

TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,

copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process

in which TI products or services are used. Information published by TI regarding third-party products or services

does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.

Use of such information may require a license from a third party under the patents or other intellectual property

of the third party, or a license from TI under the patents or other intellectual property of TI.

Reproduction of information in TI data books or data sheets is permissible only if reproduction is without

alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction

of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for

such altered documentation.

Resale of TI products or services with statements different from or beyond the parameters stated by TI for that

product or service voids all express and any implied warranties for the associated TI product or service and

is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.

Following are URLs where you can obtain information on other Texas Instruments products and application

solutions:

Products

Applications

Audio

Amplifiers

amplifier.ti.com

www.ti.com/audio

Data Converters

dataconverter.ti.com

Automotive

www.ti.com/automotive

DSP

dsp.ti.com

Broadband

Digital Control

Military

www.ti.com/broadband

www.ti.com/digitalcontrol

www.ti.com/military

Interface

Logic

interface.ti.com

logic.ti.com

Power Mgmt

Microcontrollers

power.ti.com

Optical Networking

Security

www.ti.com/opticalnetwork

www.ti.com/security

www.ti.com/telephony

www.ti.com/video

microcontroller.ti.com

Telephony

Video & Imaging

Wireless

www.ti.com/wireless

Mailing Address:

Texas Instruments

Post Office Box 655303 Dallas, Texas 75265


型号：	TLV2474IDRG4
厂家：	TEXAS INSTRUMENTS
描述：	FAMILY OF 600-mA/Ch 2.8-MHz RAIL-TO-RAIL INPUT/OUTPUT HIGH-DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN FAMILY 600毫安/通道280 MHz的轨到轨输入/输出高驱动运算放大器，带有关断运算放大器放大器电路光电二极管输出元件输入元件驱动
文件：	总41页 (文件大小：1173K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

TLV2474IDRG4 [TI]

相关型号：

TLV2474IN

TLV2474INE4

TLV2474IPWP

TLV2474IPWPG4

TLV2474IPWPR

TLV2474IPWPRG4

TLV2474QDRG4Q1

TLV2474QDRQ1

TLV2474QPWPRQ1

TLV2475