TLV2702_14 [TI]
FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS AND PUSH-PULL COMPARATORS;
| 型号： | TLV2702_14 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS AND PUSH-PULL COMPARATORS 放大器 |
| 文件： | 总23页 (文件大小：431K) |
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
FAMILY OF NANOPOWER OPERATIONAL AMPLIFIERS AND
PUSH-PULL COMPARATORS
The TLV270x’s low supply current is coupled with
FEATURES
extremely low input bias currents enabling them to be
used with mega-ohm resistors making them ideal for
portable, long active life, applications. DC accuracy is
ensured with a low typical offset voltage as low as
390µV, CMRR of 90 dB, and minimum open loop gain
of 130 V/mV at 2.7 V.
D
Micro-Power Operation . . . 1.4 µA
Input Common-Mode Range Exceeds the
Rails . . . –0.1 V to V + 5 V
D
CC
D
D
D
D
Supply Voltage Range . . . 2.5 V to 16 V
Rail-to-Rail Input/Output (Amplifier)
Reverse Battery Protection Up to 18 V
The maximum recommended supply voltage is as high
as 16 V and ensured operation down to 2.5 V, with
electrical characteristics specified at 2.7 V, 5 V, and
15 V. The 2.5-V operation makes it compatible with
Li-Ion battery-powered systems and many micro-power
microcontrollersavailabletodayincludingTI’sMSP430.
Gain Bandwidth Product . . . 5.5 kHz
(Amplifier)
D
Push-Pull CMOS Output Stage (Comparator)
Specified Temperature Range
D
– T = –40°C to 125°C . . . Industrial Grade
A
All members are available in PDIP and SOIC with the
duals, one op-amp and one comparator, in the small
MSOP package and quads, two operational amplifiers
and two comparators, in the TSSOP package.
D
D
Ultrasmall Packaging
– 8-Pin MSOP (TLV2702)
Universal Op-Amp EVM (See the SLOU060 For
More Information)
–
+
APPLICATIONS
D
D
D
Portable Battery Monitoring
Consumer Medical Electronics
Security Detection Systems
SUPPLY CURRENT
vs
DESCRIPTION
SUPPLY VOLTAGE
2.5
The TLV270x combines sub-micropower operational
amplifier and comparator into a single package that
produces excellent micropower signal conditioning with
only 1.4 µA of supply current. This combination gives
thedesignermoreboardspaceandreducespartcounts
in systems that require an operational amplifier and
comparator. The low supply current makes it an ideal
choice for battery powered portable applications where
quiescent current is the primary concern. Reverse
battery protection guards the amplifier from an
over-current condition due to improper battery
installation. For harsh environments, the inputs can be
taken 5 V above the positive supply rail without damage
to the device.
2.25
2
1.75
1.5
1.25
1
Op Amp
0.75
V = V /2
I
CC
Comparator
0.5
V
T
= –1 V
= 25°C
ID
A
0.25
0
2
4
6
8
10 12 14
0
16
V
– Supply Voltage – V
CC
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright 2001, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
†
A SELECTION OF OUTPUT COMPARATORS
V
(V)
V
I
/Ch
GBW
(kHz)
SR
(V/µs)
t
t
t
f
RAIL-TO-
RAIL
OUTPUT
STAGE
CC
IO
CC
(µA)
PLH
PHL
DEVICE
(µV)
390
390
390
600
250
250
(µs)
56
55
—
(µs)
83
30
—
(µs)
‡
TLV270x
TLV230x
TLV240x
TLV224x
TLV340x
TLV370x
2.5 – 16
2.5 – 16
2.5 – 16
2.5 – 12
2.5 – 16
2.5 – 16
1.4
1.4
5.5
5.5
5.5
5.5
—
0.0025
0.0025
0.0025
0.002
—
8
I/O
I/O
I/O
I/O
I
PP
OD
—
‡
5
880
1
—
—
5
—
—
—
0.47
0.56
55
56
30
83
OD
PP
—
—
8
I
†
‡
All specifications are typical values measured at 5 V.
ICC is specified as one op-amp and one comparator.
TLV2702 AVAILABLE OPTIONS
PACKAGED DEVICES
MSOP
V
max
IO
T
A
†
SMALL OUTLINE
(D)
PLASTIC DIP
(P)
AT 25°C
†
MSOP
SYMBOLS
(DGK)
-40°C to 125°C
4000 µV
TLV2702ID
TLV2702IDGK
xxTIAQF
TLV2702IP
†
This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g.,
TLV2702IDR).
TLV2704 AVAILABLE OPTIONS
PACKAGED DEVICES
V
IO
max
†
T
A
SMALL OUTLINE
(D)
TSSOP
(PW)
PLASTIC DIP
(N)
AT 25°C
–40°C to 125°C
4000 µV
TLV2704ID
TLV2704IPW
TLV2704IN
†
This package is available taped and reeled. To order this packaging option, add an R suffix to the part
number (e.g., TLV2704IDR).
TLV270x PACKAGE PINOUTS
TLV2704
D, N, OR PW PACKAGE
(TOP VIEW)
TLV2702
D, DGK, OR P PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
C1OUT
C1IN–
C1IN+
A2OUT
A2IN–
A2IN+
GND
AOUT
AIN–
AIN+
GND
V
CC
1
2
3
4
8
7
6
5
COUT
CIN–
CIN+
V
CC
C2IN+
C2IN–
C2OUT
A1IN+
A1IN–
A1OUT
8
2
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Differential input voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
ID
CC
Input voltage range, V (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to V
Input current range, I (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA
Output current range, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
+ 5 V
I
CC
I
O
Operating free-air temperature range, T : I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 125°C
A
Maximum junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
J
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to GND
2. Input voltage range is limited to 20 V max or V + 5 V, whichever is smaller.
CC
DISSIPATION RATING TABLE
≤ 25°C
Θ
Θ
T
A
T = 125°C
A
POWER RATING
JC
JA
PACKAGE
POWER RATING
(°C/W)
(°C/W)
D (8)
38.3
176
710 mW
142 mW
D (14)
26.9
122.3
1022 mW
204.4 mW
DGK (8)
N (14)
54.2
32
259.9
78
481 mW
1600 mW
1200 mW
720 mW
96.2 mW
320.5 mW
240.4 mW
144 mW
P (8)
41
104
PW (14)
29.3
173.6
recommended operating conditions
MIN
MAX
16
UNIT
Single supply
2.5
±1.25
–0.1
Supply voltage, V
V
CC
Split supply
±8
Common-mode input voltage range, V
ICR
Amplifier and comparator
V
+5
CC
125
V
Operating free-air temperature, T
–40
°C
A
3
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
electrical characteristics at recommended operating conditions, V
otherwise noted)
= 2.7, 5 V, and 15 V (unless
CC
amplifier dc performance
†
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
4000
6000
T
UNIT
A
25°C
Full range
25°C
390
V
IO
Input offset voltage
Offset voltage draft
µV
V
O
= V /2 V,
CC
V
= V /2 V, R = 50 Ω
CC S
IC
α
3
µV/°C
VIO
25°C
55
52
73
V
V
V
= 2.7 V
= 5 V
CC
CC
CC
Full range
25°C
60
80
90
CMRR Common-mode rejection ratio
V
= 0 to V , R = 50 Ω
dB
IC
CC
S
Full range
25°C
55
66
= 15 V
= 500 kΩ
Full range
25°C
60
130
30
400
1000
1800
120
120
V
V
V
= 2.7 V,
V
V
= 1.5 V,
= 3 V,
R
L
CC
CC
CC
O(pp)
O(pp)
L
Full range
25°C
300
100
400
120
90
Large-signal differential voltage
amplification
A
VD
= 5 V,
R
= 500 kΩ
V/mV
Full range
25°C
= 15 V,
V
= 8 V, R = 500 kΩ
O(pp) L
Full range
25°C
V
= 2.7 to 5 V
= 5 to 15 V
CC
CC
Full range
25°C
85
Power supply rejection ratio
PSRR
V
= V /2 V, No load
CC
dB
IC
(∆V /∆V
CC IO
)
94
V
Full range
90
†
Full range is –40°C to 125°C.
amplifier and comparator input characteristics
†
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
250
300
700
500
550
1700
T
A
UNIT
25°C
0 to 70°C
Full range
25°C
25
I
I
Input offset current
Input bias current
pA
IO
IB
V
R
= V /2 V,
CC
= 50 Ω
V
= V /2 V
IC CC
O
S
100
0 to 70°C
Full range
25°C
pA
r
Differential input resistance
300
3
MΩ
i(d)
C
Common-mode input capacitance
f = 100 kHz
25°C
pF
i(c)
†
Full range is –40°C to 125°C.
4
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
electrical characteristics at recommended operating conditions, V
otherwise noted) (continued)
= 2.7, 5 V, and 15 V (unless
CC
amplifier output characteristics
†
PARAMETER
TEST CONDITIONS
MIN
2.55
2.5
TYP
MAX
T
A
UNIT
25°C
Full range
25°C
2.65
V
CC
V
CC
V
CC
= 2.7 V
= 5 V
4.85
4.8
4.95
V
I
= V /2,
CC
= –50 µA
IC
OH
V
V
High-level output voltage
V
OH
Full range
25°C
14.8 14.95
14.8
= 15 V
Full range
25°C
180
260
300
Low-level output voltage
V
IC
= V /2,
CC
I = 50 µA
OL
mV
OL
Full range
25°C
I
O
Output current
V
O
= 0.5 V from rail
±200
µA
kΩ
Z
O
Closed-loop output impedance
f = 100 Hz,
A
V
= 10
25°C
1.2
†
Full range is –40°C to 125°C.
amplifier dynamic performance
PARAMETER
TEST CONDITIONS
T
MIN
TYP
5.5
2.5
60°
15
MAX
UNIT
kHz
A
UGBW
SR
Unity gain bandwidth
Slew rate at unity gain
Phase margin
R
= 500 kΩ,
C
C
= 100 pF
= 100 pF
25°C
25°C
L
L
L
V
O(pp)
= 0.8 V,
R
C
= 500 kΩ,
V/ms
L
L
φM
R
= 500 kΩ,
= 100 pF
25°C
25°C
L
Gain margin
dB
ms
V
V
A
V
= 2.7 or 5 V,
CC
(STEP)PP
= 1 V,
C
R
= 100 pF,
= 100 kΩ
0.1%
1.84
L
L
= –1,
t
s
Settling time
V
V
A
V
= 15 V,
0.1%
6.1
32
CC
(STEP)PP
= –1,
= 1 V,
C
R
= 100 pF,
= 100 kΩ
L
L
0.01%
f = 0.1 to 10 Hz
f = 100 Hz
5.3
µV
pp
Equivalent input noise
voltage
V
25°C
25°C
n
500
nV/√Hz
Equivalent input noise
current
I
n
f = 100 Hz
8
fA/√Hz
supply current
†
PARAMETER
TEST CONDITIONS
MIN
TYP
1.4
MAX
T
A
UNIT
V
= 2.7 V or 5 V
25°C
25°C
CC
CC
Supply current (one op-amp and one
comparator)
1.4
1.9
3.7
I
V
V
= V /2
CC
µA
CC
O
V
= 15 V
Full range
25°C
Reverse supply current
= –18 V, V = 0 V, V = open
50
nA
CC
I
O
†
Full range is –40°C to 125°C.
5
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
electrical characteristics at recommended operating conditions, V
otherwise noted) (continued)
= 2.7, 5 V, and 15 V (unless
CC
comparator dc performance
†
T
†
PARAMETER
MIN
TYP MAX
UNIT
TEST CONDITIONS
A
25°C
Full range
25°C
250 5000
V
Input offset voltage
Offset voltage drift
µV
IO
7000
V
IC
= V /2,
CC
R
= 50 Ω
S
α
3
µV/°C
VIO
25°C
55
72
V
CC
V
CC
V
CC
= 2.7 V
= 5 V
Full range
25°C
50
60
55
65
60
76
88
V
R
= 0 to V
= 50 Ω
,
IC
S
CC
CMRR Common-mode rejection ratio
dB
Full range
25°C
= 15 V
Full range
Large-signal differential voltage
amplification
A
25°C
1000
100
V/mV
dB
VD
25°C
Full range
25°C
75
70
85
80
V
V
= 2.7 to 5 V
= 5 to 15 V
CC
Power supply rejection ratio
V
= V /2 V,
CC
IC
PSRR
(∆V /∆V
CC IO
)
No load
105
CC
Full range
†
Full range is –40°C to 125°C.
comparator output characteristics
†
†
PARAMETER
T
A
MIN
TYP MAX
UNIT
TEST CONDITIONS
r
Differential input resistance
25°C
25°C
300
MΩ
i(d)
V
V
–320
–450
V
V
= V /2,
CC
I
I
= –50 µA,
= 50 µA,
CC
IC
ID
OL
V
High-level output voltage
mV
mV
OH
= 1 V
Full range
25°C
CC
80
200
300
V
V
= V /2,
CC
= –1 V
IC
ID
OL
V
Low-level output voltage
OL
Full range
†
Full range is –40°C to 125°C.
switching characteristics at recommended operating conditions, V
otherwise noted)
= 2.7 V, 5 V, 15 V (unless
CC
PARAMETER
TEST CONDITIONS
Overdrive = 2 mV
T
MIN
TYP
240
64
MAX
UNIT
A
Propagation response time, low-to-
high-level output
Overdrive = 10 mV
Overdrive = 50 mV
Overdrive = 2 mV
Overdrive = 10 mV
Overdrive = 50 mV
t
25°C
(PLH)
(PHL)
f = 10 kHz,
= 100 mV,
36
V
C
STEP
L
µs
= 10 pF,
= 2.7 V
167
67
Propagation response time, high-to-
low-level output
V
CC
t
25°C
37
t
t
Rise time
Fall time
C
C
= 10 pF,
= 10 pF,
V
V
= 2.7 V
= 2.7 V
25°C
25°C
7
µs
µs
r
L
L
CC
9
f
CC
NOTE: The propagation response time specified is the interval between the input step function and the instant when the output crosses 1.4 V.
Propagation responses are longer at higher supply voltages, refer to Figure 18 through Figure 36 for further details.
6
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
1, 2
V
Input offset voltage
Input bias current
vs Common-mode input voltage
vs Free-air temperature
IO
3, 5, 7
4, 6
I
I
I
IB
vs Common-mode input voltage
vs Free-air temperature
3, 5, 7
4, 6
Input offset current
Supply current
IO
vs Common-mode input voltage
vs Supply voltage
8
CC
vs Free-air temperature
9
Amplifier
CMRR
Common-mode rejection ratio
High-level output voltage
Low-level output voltage
Output voltage, peak-to-peak
Power supply rejection ratio
Voltage noise over a 10 Second Period
Phase margin
vs Frequency
10
11, 13
12, 14
15
V
V
V
vs High-level output current
vs Low-level output current
vs Frequency
OH
OL
O(PP)
PSRR
vs Frequency
16
17
φ
m
vs Capacitive load
vs Frequency
18
A
VD
Differential voltage gain
19
Phase
vs Frequency
19
Gain-bandwidth product
vs Supply voltage
vs Free-air temperature
20
SR
Slew rate
21
Large-signal follower pulse response
Small-signal follower pulse response
Large-signal inverting pulse response
Small-signal inverting pulse response
22
23
24
25
Comparator
V
High-level output voltage
Low-level output voltage
Output rise/fall time
vs High-level output current
vs Low-level output current
vs Supply voltage
26, 28
27, 29
OH
OL
V
30
Low-to-high level output response for various input overdrives
High-to-low level output response for various input overdrives
31, 33, 35
32, 34, 36
7
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
AMPLIFIER AND COMPARATOR TYPICAL CHARACTERISTICS
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
INPUT BIAS / OFFSET CURRENT
vs
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
FREE-AIR TEMPERATURE
600
500
400
300
200
100
0
100
1400
1200
1000
800
600
400
200
0
V
V
= 2.7 V
CC
= 1.35 V
V
T
A
= 2.7 V
CC
= 25°C
IC
0
–100
–200
–300
–400
I
IO
I
IB
–100
–200
V
T
A
= 5 V
CC
= 25 °C
–200
–40 –25 –10
5
20 35 50 65 80 95 110 125
–0.2 0.4 1.0 1.6 2.2 2.8 3.4 4.0 4.6 5.2
–0.10.2 0.6 1.0 1.4 1.8 2.2 2.6 2.9
T
A
– Free-Air Temperature – °C
V
– Common-Mode Input Voltage – V
ICR
V
– Common-Mode Input Voltage – V
ICR
Figure 1
Figure 2
Figure 3
INPUT BIAS/OFFSET CURRENT
INPUT BIAS/OFFSET CURRENT
INPUT BIAS/OFFSET CURRENT
vs
vs
vs
COMMON MODE INPUT
VOLTAGE
COMMON-MODE INPUT
VOLTAGE
FREE-AIR TEMPERATURE
600
500
400
300
200
100
0
400
350
300
250
200
150
100
50
200
150
100
50
V
V
= 5 V
CC
= 2.5 V
V
T
A
= 2.7 V
V
= 5 V
CC
= 25 °C
CC
T = 25 °C
A
IC
I
IO
0
I
I
IO
I
IO
–50
–100
–150
0
I
IB
I
–50
–100
–150
IB
–100
–200
IB
–40 –25 –10
5
20 35 50 65 80 95 110 125
0.2 0.6 1.0 1.4 1.8 2.2 2.6 2.9
–0.1
–0.2 0.4 1.0 1.6 2.2 2.8 3.4 4.0 4.6 5.2
T
A
– Free-Air Temperature – °C
V
– Common Mode Input Voltage – V
V
– Common Mode Input Voltage – V
ICR
ICR
Figure 5
Figure 4
Figure 6
SUPPLY CURRENT
vs
SUPPLY CURRENT
vs
INPUT BIAS/OFFSET CURRENT
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
2
1200
1000
800
2.5
V
= 15 V
CC
2.25
T
= 125°C
A
T
1.75
2
1.5
= 70°C
A
1.75
1.25
1.5
I
IB
600
1
1.25
V
= 2.7, 5, & 15 V
CC
400
200
T
= 0°C
A
1
0.75
0.5
0.25
0
Op Amp
V = V /2
A
Comparator
V = –1 V
ID
T
= –40°C
0.75
A
I
V
CC
= 1
Op Amp
I
T
= 25°C
IO
0.5
A
V = V /2
I
CC
Comparator
= –1 V
0
0.25
V
ID
10 12 14
0
–200
–40 –25 –10
2
4
6
8
0
16
–40 –25 –10
5
20 35 50 65 80 95 110 125
5 20 35 50 65 80 95 110 125
V
– Supply Voltage – V
T
– Free-Air Temperature – °C
T
– Free-Air Temperature – °C
CC
A
A
Figure 8
Figure 7
Figure 9
8
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
AMPLIFIER TYPICAL CHARACTERISTICS
COMMON-MODE REJECTION RATIO
HIGH-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
vs
HIGH-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT CURRENT
FREQUENCY
2.7
2.4
2.1
1.8
1.5
1.2
1.50
1.25
1.00
0.75
0.50
0.25
0.00
120
100
80
60
40
20
0
V
T
= 2.7 V
CC
V
= 2.7 V
CC
=25 °C
= 0 °C
= –40°C
A
T
A
T
A
T
= –40°C
A
T
T
T
T
= –0°C
A
A
A
A
= 25 °C
= 70 °C
= 125 °C
T
T
= 70 °C
= 125 °C
A
A
0
50
100
150
200
0
50
100
150
200
1
10
100
1k
10k
f – Frequency – Hz
I
– High-Level Output Current – µA
I
– Low-Level Output Current – µA
OH
OL
Figure 10
Figure 11
Figure 12
OUTPUT VOLTAGE
PEAK-TO-PEAK
vs
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
FREQUENCY
5.0
4.5
4.0
3.5
3.0
1.50
1.25
1.00
0.75
0.50
0.25
0.00
16
14
12
10
8
V
= 5 V
CC
V
= 15 V
V
= 5 V
CC
CC
T
= –40°C
A
T
= 0 °C
= –40°C
A
T
A
T
= –0°C
A
T
T
T
= 25 °C
= 70 °C
= 125 °C
A
A
A
T
= 25 °C
= 70 °C
= 125 °C
6
A
T
A
R
C
T
A
= 100 kΩ
= 100 pF
= 25°C
L
L
4
V
= 5 V
CC
T
A
2
V
= 2.7 V
CC
0
0
50
100
150
200
0
50
100
150
200
10
100
1k
I
– High-Level Output Current – µA
I
– Low-Level Output Current – µA
f – Frequency – Hz
OH
OL
Figure 13
Figure 14
Figure 15
POWER SUPPLY REJECTION RATIO
PHASE MARGIN
vs
VOLTAGE NOISE
vs
OVER A 10 SECOND PERIOD
FREQUENCY
CAPACITIVE LOAD
120
110
100
90
80
70
60
50
40
30
20
10
0
4
3
V
= 5 V
CC
f = 0.1 Hz to 10 Hz
= 25°C
V
T
A
= 2.7, 5, & 15 V
CC
= 25°C
T
A
2
1
80
0
70
–1
–2
–3
V
= 2.7, 5, & 15 V
CC
60
R = 500 kΩ
L
A
T
= 25°C
50
40
–4
10
100
1k
10k
10
100
1k
10k
0
1
2
3
4
5
6
7
8
9
10
f – Frequency – Hz
C
– Capacitive Load – pF
t – Time – s
L
Figure 16
Figure 17
Figure 18
9
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
AMPLIFIER TYPICAL CHARACTERISTICS
DIFFERENTIAL VOLTAGE GAIN AND PHASE
GAIN BANDWIDTH PRODUCT
SLEW RATE
vs
FREE-AIR TEMPERATURE
vs
vs
FREQUENCY
SUPPLY VOLTAGE
60
50
135
90
7
6
5
4
3
2
1
0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
T
A
= 25°C
R
C
= 100 kΩ
= 100 pF
L
L
SR+
40
30
20
10
f = 1kHz
V
= 5, 15 V
CC
V
= 2.7 V
CC
45
V
= 2.7, 5, 15 V
CC
SR–
0
0
V
=2.7, 5, 15 V
CC
L
L
R =500 kΩ
C =100 pF
–10
T
=25°C
A
–20
–45
10k
10
100
1k
2.5 4.0 5.5 7.0 8.5 10.0 11.5 13.0 14.5 16.0
–40 –25 –10
5
20 35 50 65 80 95 110 125
f – Frequency – Hz
V
– Supply Voltage –V
CC
T
A
– Free-Air Temperature – °C
Figure 19
Figure 20
Figure 21
SMALL-SIGNAL FOLLOWER
PULSE RESPONSE
LARGE-SIGNAL FOLLOWER
PULSE RESPONSE
4
3
2
120
100
80
300
150
V
= 5 V
= 1
= 100 kΩ
= 100 pF
= 25°C
V
CC
IN
A
V
V
IN
R
0
L
L
C
T
V
= 2.7, 5,
CC
& 15 V
–150
1
0
A
A
= 1
= 100 kΩ
= 100 pF
V
4
R
C
L
L
3
–1
60
V
O
T = 25°C
A
2
V
O
40
1
20
0
0
0
1
2
3
4
5
6
0
100 1200 300 400 500
t – Time – ms
t – Time – µs
Figure 22
Figure 23
LARGE-SIGNAL INVERTING
PULSE RESPONSE
SMALL-SIGNAL INVERTING
PULSE RESPONSE
50
4
3
2
1
0
200
100
0
V
IN
V
IN
V
= 2.7,
CC
5, & 15 V
= –1
= 100 kΩ
= 100 pF
0.5
V
A
= 5 V
CC
= –1
A
0.0
V
–1
V
–100
R
C
T
A
L
L
R
C
T
A
= 100 kΩ
= 100 pF
= 25°C
–0.5
–1.0
–1.5
–2.0
–2.5
–3.0
–3.5
L
L
0
= 25°C
–50
–100
–150
V
O
V
O
1
0
1
2
3
4
5
6
7
–0
0
200 400 600 800 1000 1200
t – Time – ms
t – Time – ms
Figure 24
Figure 25
10
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
COMPARATOR TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT CURRENT
2.7
2.4
2.1
1.8
1.5
1.2
0.9
0.6
0.3
0.0
2.7
2.4
2.1
1.8
1.5
1.2
0.9
0.6
0.3
0.0
V
V
= 2.7 V
V
V
= 2.7 V
CC
= –1 V
CC
= –1 V
ID
ID
T
= 125°C
A
T
A
= –40°C
T
A
= 0°C
T
= 70°C
= 25°C
A
T
A
T
A
= 25°C
T
= 0°C
A
T
= 70°C
A
T
A
= –40°C
T
= 125°C
A
0
0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
I
– High-Level Output Current – mA
I
– Low-Level Output Current – mA
OH
OL
Figure 26
Figure 27
HIGH-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT CURRENT
5
5
V
V
= 5 V
CC
= –1 V
V
V
= 5 V
CC
= –1 V
4.5
4
ID
4.5
4
ID
T
= –40°C
A
T
= 125°C
A
3.5
3
3.5
3
T
A
= 0°C
T
= 70°C
A
T
A
= 25°C
2.5
2
2.5
2
T
= 25°C
A
T
= 70°C
A
1.5
1
1.5
1
T
= 0°C
A
T
= 125°C
T = –40°C
A
A
0.5
0
0.5
0
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
0
0.4 0.8
1.2
1.6
2.0 2.4
2.8
I
– High-Level Output Current – mA
OH
I
– Low-Level Output Current – mA
OL
Figure 28
Figure 29
OUTPUT RISE/FALL TIME
vs
SUPPLY VOLTAGE
120
100
80
V
= 1 V to –1 V
Input Rise/Fall Time = 4 µs
= 10 pF
= 25°C
ID
C
L
T
A
60
Fall Time
40
20
0
Rise Time
10 12.5
0
2.5
5
7.5
15
V
– Supply Voltage – V
CC
Figure 30
11
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
TYPICAL CHARACTERISTICS
LOW-TO-HIGH OUTPUT RESPONSE
HIGH-TO-LOW LEVEL OUTPUT RESPONSE
FOR VARIOUS INPUT OVERDRIVES
FOR VARIOUS INPUT OVERDRIVES
3
2.7
2.4
2.1
1.8
3
2.7
2.4
2.1
1.8
1.5
1.2
0.9
0.6
0.3
0
50 mV
1.5
1.2
0.9
0.6
0.3
0
50 mV
10 mV
2 mV
2 mV
10 mV
–0.3
0.05
0
0.15
0.10
0.05
V
= 2.7 V
CC
= 10 pF
C
T
L
–0.05
–0.10
–0.15
= 25°C
V
= 2.7 V
A
CC
C
= 10 pF
L
0
T
A
= 25°C
–0.05
0
25 50 75 100125150175200225250275 300
0
25 50 75 100125150175200225250275300
t – Time – µs
t – Time – µs
Figure 31
Figure 32
LOW-TO-HIGH LEVEL OUTPUT RESPONSE
HIGH-TO-LOW LEVEL OUTPUT RESPONSE
FOR VARIOUS INPUT OVERDRIVES
FOR VARIOUS INPUT OVERDRIVES
6
6
5
5
4
4
50 mV
50 mV
3
3
2 mV
2 mV
10 mV
2
10 mV
2
1
0
1
0
0.05
0
V
C
T
A
= 5 V
= 10 pF
= 25°C
CC
L
0.10
0.05
0
V
C
T
A
= 5 V
CC
= 10 pF
–0.05
–0.10
–0.15
L
= 25°C
–0.05
0
25 50 75 100125150175200225250275300
0
25 50 75100125150175200225250275300
t – Time – µs
t – Time – µs
Figure 33
Figure 34
LOW-TO-HIGH LEVEL OUTPUT RESPONSE
HIGH-TO-LOW LEVEL OUTPUT RESPONSE
FOR VARIOUS INPUT OVERDRIVES
FOR VARIOUS INPUT OVERDRIVES
16
16
14
14
12
10
12
10
50 mV
8
6
8
6
4
2
0
50 mV
2 mV
10 mV
10 mV
2 mV
4
2
0
V
= 15 V
= 10 pF
= 25°C
CC
L
C
T
0.04
0
–0.04
–0.08
–0.12
A
0.12
0.08
0.04
V
= 15 V
= 10 pF
= 25°C
CC
L
C
T
A
0
–0.04
0
50 100 150 200 250 300 350 400
0
25 50 75 100125150175200225250275300
t – Time – µs
t – Time – µs
Figure 35
Figure 36
12
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
APPLICATION INFORMATION
reverse battery protection
The TLV2702/4 are protected against reverse battery voltage up to 18 V. When subjected to reverse battery
condition the supply current is typically less than 100 nA at 25°C (inputs grounded and outputs open). This
current is determined by the leakage of 6 Schottky diodes and will therefore increase as the ambient
temperature increases.
When subjected to reverse battery conditions and negative voltages applied to the inputs or outputs, the input
ESD structure will turn on—this current should be limited to less than 10 mA. If the inputs or outputs are referred
to ground, rather than midrail, no extra precautions need be taken.
common-mode input range
The TLV2702/4 has rail-rail input and outputs. For common-mode inputs from –0.1 V to V
differential pair will provide the gain.
– 0.8 V a PNP
CC
For inputs between V
– 0.8 V and V , two NPN emitter followers buffering a second PNP differential pair
CC
CC
provide the gain. This special combination of NPN/PNP differential pair enables the inputs to be taken 5 V above
the rails; because as the inputs go above V , the NPNs switch from functioning as transistors to functioning
CC
as diodes. This will lead to an increase in input bias current. The second PNP differential pair continues to
function normally as the inputs exceed V
.
CC
The TLV2702/4 has a negative common-input range that exceeds ground by 100 mV. If the inputs are taken
much below this, reduced open loop gain will be observed with the ultimate possibility of phase inversion.
offset voltage
Theoutputoffsetvoltage,(V )isthesumoftheinputoffsetvoltage(V )andbothinputbiascurrents(I )times
OO
IO
IB
the corresponding gains. The following schematic and formula can be used to calculate the output offset
voltage.
R
F
I
IB–
R
G
+
–
V
I
V
O
+
R
S
I
IB+
R
R
F
F
V
+ V
1 ) ǒ Ǔ " I
R
1 ) ǒ Ǔ " I
R
ǒ Ǔ ǒ Ǔ
OO
IO
IB)
S
IB–
F
R
R
G
G
Figure 37. Output Offset Voltage Model
13
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
APPLICATION INFORMATION
general configurations
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often
required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier
(see Figure 38).
R
R
F
G
–
V
1
O
+
V
I
R1
V
C1
f
+
–3dB
2pR1C1
R
O
F
1
ǒ
Ǔ
+
ǒ
1 )
Ǔ
V
R
1 ) sR1C1
I
G
Figure 38. Single-Pole Low-Pass Filter
If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this
task. For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth.
Failure to do this can result in phase shift of the amplifier.
C1
R1 = R2 = R
C1 = C2 = C
Q = Peaking Factor
(Butterworth Q = 0.707)
+
_
V
I
1
R1
R2
f
+
–3dB
2pRC
C2
R
F
1
R
=
G
R
F
2 –
)
(
R
Q
G
Figure 39. 2-Pole Low-Pass Sallen-Key Filter
14
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
APPLICATION INFORMATION
circuit layout considerations
ToachievethelevelsofhighperformanceoftheTLV270x, followproperprinted-circuitboarddesigntechniques.
A general set of guidelines is given in the following.
D
Ground planes—It is highly recommended that a ground plane be used on the board to provide all
components with a low inductive ground connection. However, in the areas of the amplifier inputs and
output, the ground plane can be removed to minimize the stray capacitance.
D
Proper power supply decoupling—Use a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramic
capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers
depending on the application, but a 0.1-µF ceramic capacitor should always be used on the supply terminal
of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible to the supply
terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less
effective. The designer should strive for distances of less than 0.1 inches between the device power
terminals and the ceramic capacitors.
D
D
Sockets—Socketscanbeusedbutarenotrecommended. Theadditionalleadinductanceinthesocketpins
will often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit board
is the best implementation.
Short trace runs/compact part placements—Optimum high performance is achieved when stray series
inductance has been minimized. To realize this, the circuit layout should be made as compact as possible,
thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of
the amplifier. Its length should be kept as short as possible. This will help to minimize stray capacitance at
the input of the amplifier.
D
Surface-mount passive components—Using surface-mount passive components is recommended for high
performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of
surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small
size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray
inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be
kept as short as possible.
15
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
general power dissipation considerations
Foragivenθ , themaximumpowerdissipationisshowninFigure40andiscalculatedbythefollowingformula:
JA
T
–T
MAX
A
P
+
ǒ Ǔ
D
q
JA
Where:
P
= Maximum power dissipation of TLV270x IC (watts)
= Absolute maximum junction temperature (150°C)
= Free-ambient air temperature (°C)
D
T
MAX
T
A
θ
= θ + θ
JA
JC CA
θ
θ
= Thermal coefficient from junction to case
JC
= Thermal coefficient from case to ambient air (°C/W)
CA
MAXIMUM POWER DISSIPATION
vs
FREE-AIR TEMPERATURE
2
T
= 150°C
PDIP Package
J
Low-K Test PCB
1.75
1.5
1.25
1
θ
= 104°C/W
JA
MSOP Package
Low-K Test PCB
SOIC Package
Low-K Test PCB
θ
= 260°C/W
JA
θ
= 176°C/W
JA
0.75
0.5
0.25
0
–55–40 –25 –10
5
20 35 50 65 80 95 110 125
T
A
– Free-Air Temperature – °C
NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB.
Figure 40. Maximum Power Dissipation vs Free-Air Temperature
16
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
APPLICATION INFORMATION
amplifier macromodel information
Macromodel information provided was derived using Microsim Parts Release 8, the model generation
software used with Microsim PSpice . The Boyle macromodel (see Note 2) and subcircuit in Figure 41 are
generated using the TLV270x typical electrical and operating characteristics at T = 25°C. Using this
A
information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most
cases):
D
D
D
D
D
D
Maximum positive output voltage swing
Maximum negative output voltage swing
Slew rate
D
D
D
D
D
D
Unity-gain frequency
Common-mode rejection ratio
Phase margin
Quiescent power dissipation
Input bias current
DC output resistance
AC output resistance
Short-circuit output current limit
Open-loop voltage amplification
NOTE 3: G. R. Boyle, B. M. Cohn, D. O. Pederson, andJ. E. Solomon, “MacromodelingofIntegratedCircuitOperationalAmplifiers”, IEEEJournal
of Solid-State Circuits, SC-9, 353 (1974).
3
99
V
CC+
+
egnd
ree
ro2
cee
fb
rp
rc1
11
rc2
12
–
c1
7
+
1
2
c2
vlim
–
8
IN+
+
r2
9
6
vc
+
q1
q2
IN–
–
vb
ga
–
ro1
gcm
ioff
53
dp
14
13
V
OUT
re1
re2
dlp
dln
5
91
90
92
10
+
hlim
–
+
iee
dc
vlp
vln
V
CC–
–
–
+
–
+ 54
4
de
ve
.subckt 270X_5V–X 1 2 3 4 5
rc1
rc2
re1
re2
ree
ro1
ro2
rp
3
3
11 978.81E3
12 978.81E3
*
c1
c2
11 12 9.8944E–12
30.000E–12
13 10 30.364E3
14 10 30.364E3
10 99 3.6670E9
6
7
cee 10 99 8.8738E–12
dc
5
53 dy
dy
8
5
10
de
dlp
dln
dp
54
5
7
99 10
90 91 dx
92 90 dx
4
3
4
0
1.4183E6
dc
vb
9
0
3
0
dx
poly(2) (3,0) (4,0) 0 .5 .5
vc
ve
vlim
vlp
vln
3
53 dc .88315
egnd 99
fb
ga
54
7
4
8
0
dc .88315
dc
dc 540
7
6
99 poly(5) vb vc ve vlp vln 0 61.404E6 –1E3 1E3 61E6 –61E6
0
0
6
4
6
0
2
1
9
11 12 1.0216E–6
10 99 10.216E–12
dc 54.540E–9
dc 5e–12
91
0
gcm
iee
ioff
0
92 dc 540
10
0
.model dx D(Is=800.00E–18)
.model dy D(Is=800.00E–18 Rs=1m Cjo=10p)
.model qx1 NPN(Is=800.00E–18 Bf=27.270E21)
.model qx2 NPN(Is=800.0000E–18 Bf=27.270E21)
.ends
hlim 90
vlim 1K
q1
q2
r2
11
12
6
13 qx1
14 qx2
100.00E3
Figure 41. Boyle Macromodels and Subcircuit
PSpice and Parts are trademarks of MicroSim Corporation.
17
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
0.050 (1,27)
0.020 (0,51)
0.014 (0,35)
0.010 (0,25)
M
14
8
0.008 (0,20) NOM
0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane
0.010 (0,25)
1
7
0°–ā8°
0.044 (1,12)
A
0.016 (0,40)
Seating Plane
0.004 (0,10)
0.010 (0,25)
0.004 (0,10)
0.069 (1,75) MAX
PINS **
8
14
16
DIM
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MAX
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
A MIN
4040047/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
18
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
MECHANICAL INFORMATION
DGK (R-PDSO-G8)
PLASTIC SMALL-OUTLINE PACKAGE
0,38
0,25
M
0,65
8
0,25
5
0,15 NOM
3,05
2,95
4,98
4,78
Gage Plane
0,25
0°–ā6°
1
4
0,69
3,05
2,95
0,41
Seating Plane
0,10
0,15
0,05
1,07 MAX
4073329/B 04/98
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion.
D. Falls within JEDEC MO-187
19
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
MECHANICAL INFORMATION
N (R-PDIP-T**)
PLASTIC DUAL-IN-LINE PACKAGE
16 PINS SHOWN
PINS **
14
16
18
20
DIM
0.775
(19,69)
0.775
(19,69)
0.920
(23,37)
0.975
(24,77)
A MAX
A
16
9
0.745
(18,92)
0.745
(18,92)
0.850
(21,59)
0.940
(23,88)
A MIN
0.260 (6,60)
0.240 (6,10)
1
8
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.035 (0,89) MAX
0.020 (0,51) MIN
0.015 (0,38)
Gauge Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.010 (0,25)
0.430 (10,92) MAX
0.021 (0,53)
0.015 (0,38)
M
14/18 PIN ONLY
4040049/D 02/00
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001 (20-pin package is shorter than MS-001).
20
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
MECHANICAL INFORMATION
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE PACKAGE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.125 (3,18) MIN
0.100 (2,54)
0°–ā15°
0.021 (0,53)
0.015 (0,38)
0.010 (0,25)
M
0.010 (0,25) NOM
4040082/B 03/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
21
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TLV2702
TLV2704
SLOS340B – DECEMBER 2000 – REVISED AUGUST 2001
MECHANICAL INFORMATION
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–ā8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
22
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any product or service without notice, and advise customers to obtain the latest version of relevant information
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pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its products to the specifications applicable at the time of sale in accordance with
TI’sstandardwarranty. TestingandotherqualitycontroltechniquesareutilizedtotheextentTIdeemsnecessary
to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except
those mandated by government requirements.
Customers are responsible for their applications using TI components.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
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Copyright 2001, Texas Instruments Incorporated
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