TLV2721IDBVR [TI]

Single, 10-V, 510-kHz operational amplifier | DBV | 5 | -40 to 85;
TLV2721IDBVR
型号: TLV2721IDBVR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

Single, 10-V, 510-kHz operational amplifier | DBV | 5 | -40 to 85

放大器 运算放大器 放大器电路
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TLV2721, TLV2721Y  
Advanced LinCMOS RAIL-TO-RAIL  
VERY LOW-POWER SINGLE OPERATIONAL AMPLIFIERS  
SLOS197 – AUGUST1997  
DBV PACKAGE  
(TOP VIEW)  
Output Swing Includes Both Supply Rails  
Low Noise . . . 19 nV/Hz Typ at f = 1 kHz  
Low Input Bias Current . . . 1 pA Typ  
OUT  
1
2
3
5
4
V
/GND  
DD–  
Fully Specified for Single-Supply 3-V and  
5-V Operation  
V
DD+  
Very Low Power . . . 110 µA Typ  
IN+  
IN–  
Common-Mode Input Voltage Range  
Includes Negative Rail  
Wide Supply Voltage Range  
2.7 V to 10 V  
Macromodel Included  
description  
The TLV2721 is a single low-voltage operational amplifier available in the SOT-23 package. It offers a  
compromise between the ac performance and output drive of the TLV2731 and the micropower TLV2711.  
It consumes only 150 µA (max) of supply current and is ideal for battery-powered applications. The device  
exhibits rail-to-rail output performance for increased dynamic range in single- or split-supply applications. The  
TLV2721 is fully characterized at 3 V and 5 V and is optimized for low-voltage applications.  
The TLV2721, exhibiting high input impedance and low noise, is excellent for small-signal conditioning for  
high-impedance sources, such as piezoelectric transducers. Because of the micropower dissipation levels  
combined with 3-V operation, these devices work well in hand-held monitoring and remote-sensing  
applications. In addition, the rail-to-rail output feature with single or split supplies makes this family a great  
choice when interfacing with analog-to-digital converters (ADCs).  
2
With a total area of 5.6mm , the SOT-23 package only requires one third the board space of the standard 8-pin  
SOIC package. This ultra-small package allows designers to place single amplifiers very close to the signal  
source, minimizing noise pick-up from long PCB traces.  
AVAILABLE OPTIONS  
CHIP  
FORM  
(Y)  
PACKAGED DEVICES  
T
A
V
IO  
max AT 25°C  
SYMBOL  
SOT-23 (DBV)  
0°C to 70°C  
3 mV  
3 mV  
TLV2721CDBV  
TLV2721IDBV  
VAKC  
VAKI  
TLV2721Y  
40°C to 85°C  
The DBV package available in tape and reel only.  
Chip forms are tested at T = 25°C only.  
A
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Advanced LinCMOS is a trademark of Texas Instruments Incorporated.  
Copyright 1997, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLV2721, TLV2721Y  
Advanced LinCMOS RAIL-TO-RAIL  
VERY LOW-POWER SINGLE OPERATIONAL AMPLIFIERS  
SLOS197 – AUGUST1997  
TLV2721Y chip information  
This chip, when properly assembled, displays characteristics similar to the TLV2721C. Thermal compression  
or ultrasonic bonding may be used on the doped-aluminum bonding pads. This chip may be mounted with  
conductive epoxy or a gold-silicon preform.  
BONDING PAD ASSIGNMENTS  
(5)  
V
(1)  
DD+  
(2)  
(3)  
(4)  
+
IN+  
IN–  
(1)  
OUT  
(5)  
V
DD–  
/GND  
CHIP THICKNESS: 10 MILS TYPICAL  
46  
BONDING PADS: 4 × 4 MILS MINIMUM  
T max = 150°C  
J
(2)  
TOLERANCES ARE ±10%.  
ALL DIMENSIONS ARE IN MILS.  
PIN (2) IS INTERNALLY CONNECTED  
TO BACKSIDE OF CHIP.  
(4)  
(3)  
31  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
equivalent schematic  
V
DD+  
Q3  
Q6  
Q9  
Q12  
Q14  
Q16  
R7  
C2  
IN+  
R6  
OUT  
C1  
IN–  
R5  
Q1  
Q4  
Q13  
Q15  
R2  
Q17  
D1  
Q2  
R3  
Q5  
R4  
Q7  
Q8  
Q10  
Q11  
R1  
V
DD–/GND  
COMPONENT COUNT  
Transistors  
Diodes  
23  
5
Resistors  
Capacitors  
11  
2
Includes both amplifiers and all  
ESD, bias, and trim circuitry  
TLV2721, TLV2721Y  
Advanced LinCMOS RAIL-TO-RAIL  
VERY LOW-POWER SINGLE OPERATIONAL AMPLIFIERS  
SLOS197 – AUGUST 1997  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage, V  
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 V  
DD  
Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±V  
Input voltage range, V (any input, see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to V  
ID  
DD  
DD  
I
Input current, I (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5 mA  
I
Output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA  
O
Total current into V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA  
DD+  
DD–  
Total current out of V  
Duration of short-circuit current (at or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited  
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table  
Operating free-air temperature range, T : TLV2721C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C  
A
TLV2721I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40°C to 85°C  
Storage temperature range, T  
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: DBV package . . . . . . . . . . . . . . . . . . 260°C  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. All voltage values, except differential voltages, are with respect to V  
.
DD –  
2. Differential voltages are at the noninverting input with respect to the inverting input. Excessive current flows when input is brought  
below V – 0.3 V.  
DD–  
3. The output can be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum  
dissipation rating is not exceeded.  
DISSIPATION RATING TABLE  
T
25°C  
DERATING FACTOR  
T
= 70°C  
T = 85°C  
A
POWER RATING  
A
A
PACKAGE  
POWER RATING  
ABOVE T = 25°C  
POWER RATING  
A
DBV  
150 mW  
1.2 mW/°C  
96 mW  
78 mW  
recommended operating conditions  
TLV2721C  
TLV2721I  
UNIT  
MIN  
MAX  
MIN  
MAX  
10  
1.3  
Supply voltage, V  
2.7  
10  
2.7  
V
V
DD  
Input voltage range, V  
V
V
V
V
1.3  
V
V
V
V
I
DD–  
DD+  
DD–  
DD+  
Common-mode input voltage, V  
IC  
Operating free-air temperature, T  
1.3  
1.3  
V
DD–  
0
DD+  
DD–  
40  
DD+  
70  
85  
°C  
A
NOTE 1: All voltage values, except differential voltages, are with respect to V  
DD –  
.
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLV2721, TLV2721Y  
Advanced LinCMOS RAIL-TO-RAIL  
VERY LOW-POWER SINGLE OPERATIONAL AMPLIFIERS  
SLOS197 – AUGUST 1997  
electrical characteristics at specified free-air temperature, V  
= 3 V (unless otherwise noted)  
DD  
TLV2721C  
TYP MAX  
TLV2721I  
TYP MAX  
PARAMETER  
TEST CONDITIONS  
T
A
UNIT  
MIN  
MIN  
V
IO  
Input offset voltage  
0.5  
3
0.5  
3
mV  
Temperature  
coefficient of input  
offset voltage  
Full range  
α
1
1
µV/°C  
VIO  
Input offset voltage  
long-term drift  
(see Note 4)  
V
V
= ±1.5 V,  
V
R
= 0,  
= 50 Ω  
S
DD±  
= 0,  
IC  
25°C  
0.003  
0.5  
0.003  
0.5  
µV/mo  
O
25°C  
Full range  
25°C  
I
I
Input offset current  
Input bias current  
pA  
pA  
IO  
150  
150  
150  
150  
1
1
IB  
Full range  
0
to  
2
0.3  
to  
2.2  
0
to  
2
0.3  
to  
2.2  
25°C  
Common-mode input  
voltage range  
V
ICR  
R
= 50 Ω,  
|V | 5 mV  
IO  
V
S
0
to  
0
to  
Full range  
1.7  
1.7  
I
I
= 100 µA  
= 400 µA  
= 1.5 V,  
25°C  
25°C  
2.97  
2.88  
2.97  
2.88  
OH  
High-level output  
voltage  
V
V
V
OH  
OH  
Full range  
25°C  
2.6  
2.6  
V
V
I
I
= 50 µA  
15  
15  
IC  
OL  
Low-level output  
voltage  
25°C  
150  
150  
mV  
OL  
= 1.5 V,  
= 500 µA  
IC  
OL  
Full range  
25°C  
500  
500  
2
1
3
2
1
3
Large-signal  
differential voltage  
amplification  
= 2 kΩ  
R
R
V
V
= 1.5 V,  
= 1 V to 2 V  
L
L
IC  
O
Full range  
25°C  
A
VD  
V/mV  
250  
250  
= 1 MΩ  
Differential input  
resistance  
12  
10  
12  
10  
r
r
25°C  
25°C  
25°C  
25°C  
id  
Common-mode input  
resistance  
12  
10  
12  
10  
ic  
Common-mode input  
capacitance  
c
z
f = 10 kHz  
f = 10 kHz,  
6
6
pF  
ic  
o
Closed-loop output  
impedance  
A
= 10  
90  
82  
90  
82  
V
25°C  
70  
65  
70  
65  
Common-mode  
rejection ratio  
V
IC  
V
O
= 0 to 1.7 V,  
= 1.5 V,  
CMRR  
dB  
dB  
µA  
R
= 50 Ω  
S
Full range  
Supply voltage  
rejection ratio  
25°C  
80  
80  
95  
80  
80  
95  
V
V
= 2.7 V to 8 V,  
DD  
IC  
k
SVR  
= V  
/2,  
No load  
DD  
Full range  
(V  
/V )  
DD  
IO  
25°C  
100  
150  
200  
100  
150  
200  
I
Supply current  
V
O
= 1.5 V,  
No load  
DD  
Full range  
Full range for the TLV2721C is 0°C to 70°C. Full range for the TLV2721I is – 40°C to 85°C.  
Referenced to 1.5 V  
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at T = 150°C extrapolated  
A
to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.  
A
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLV2721, TLV2721Y  
Advanced LinCMOS RAIL-TO-RAIL  
VERY LOW-POWER SINGLE OPERATIONAL AMPLIFIERS  
SLOS197 – AUGUST 1997  
operating characteristics at specified free-air temperature, V  
= 3 V  
DD  
TLV2721C  
TYP  
TLV2721I  
TYP MAX  
PARAMETER  
TEST CONDITIONS  
UNIT  
T
A
MIN  
MAX MIN  
25°C  
0.1  
0.25  
0.1  
0.25  
Slew rate at unity  
gain  
V
C
= 1.1 V to 1.9 V,  
= 100 pF  
R
= 2 k,  
O
L
L
SR  
V/µs  
Full  
range  
0.05  
0.05  
f = 10 Hz  
f = 1 kHz  
25°C  
25°C  
120  
20  
120  
20  
Equivalent input  
noise voltage  
V
n
nV/Hz  
mV  
Peak-to-peak  
equivalent input  
noise voltage  
f = 0.1 Hz to 1 Hz  
f = 0.1 Hz to 10 Hz  
25°C  
25°C  
680  
860  
680  
860  
V
N(PP)  
Equivalent input  
noise current  
I
25°C  
25°C  
0.6  
0.6  
fA/Hz  
n
V
= 1 V to 2 V,  
A
= 1  
2.52%  
7.01%  
2.52%  
7.01%  
O
V
f = 20 kHz,  
R
= 2 kΩ  
A
V
= 10  
= 1  
L
Total harmonic  
distortion plus noise  
THD+N  
V
O
= 1 V to 2 V,  
A
V
0.076%  
0.147%  
0.076%  
0.147%  
25°C  
25°C  
25°C  
f = 20 kHz,  
§
= 2 kΩ  
A
V
= 10  
R
L
Gain-bandwidth  
product  
R
= 2 k,  
f = 1 kHz,  
C
L
480  
30  
480  
30  
kHz  
kHz  
= 100 pF  
L
Maximum  
output-swing  
bandwidth  
V
R
= 1 V,  
A
= 1,  
= 100 pF  
L
O(PP)  
V
B
OM  
= 2 k,  
C
L
A
= –1,  
V
To 0.1%  
25°C  
25°C  
4.5  
6.8  
4.5  
6.8  
µs  
µs  
Step = 1 V to 2 V,  
t
s
Settling time  
R
C
= 2 k,  
= 100 pF  
L
L
To 0.01%  
Phase margin at  
unity gain  
φ
25°C  
25°C  
53°  
53°  
m
R
= 2 k,  
C = 100 pF  
L
L
Gain margin  
12  
12  
dB  
§
Full range is 40°C to 85°C.  
Referenced to 1.5 V  
Referenced to 0 V  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLV2721, TLV2721Y  
Advanced LinCMOS RAIL-TO-RAIL  
VERY LOW-POWER SINGLE OPERATIONAL AMPLIFIERS  
SLOS197 – AUGUST 1997  
electrical characteristics at specified free-air temperature, V  
= 5 V (unless otherwise noted)  
DD  
TLV2721C  
TYP MAX  
TLV2721I  
TYP MAX  
PARAMETER  
TEST CONDITIONS  
T
A
UNIT  
MIN  
MIN  
V
IO  
Input offset voltage  
0.5  
3
0.5  
3
mV  
Temperature  
coefficient of input  
offset voltage  
Full range  
α
1
1
µV/°C  
VIO  
Input offset voltage  
long-term drift  
(see Note 4)  
V
V
= ±2.5 V,  
V
R
= 0,  
= 50 Ω  
S
DD±  
= 0,  
IC  
25°C  
0.003  
0.5  
0.003  
0.5  
µV/mo  
O
25°C  
Full range  
25°C  
I
I
Input offset current  
Input bias current  
pA  
pA  
IO  
150  
150  
150  
150  
1
1
IB  
Full range  
0
to  
4
0.3  
to  
4.2  
0
to  
4
0.3  
to  
4.2  
25°C  
Common-mode input  
voltage range  
V
ICR  
R
= 50 Ω,  
|V | 5 mV  
IO  
V
S
0
to  
0
to  
Full range  
3.5  
3.5  
I
I
= 500 µA  
= 1 mA  
= 2.5 V,  
4.75  
4.6  
4.88  
4.76  
12  
4.75  
4.6  
4.88  
4.76  
12  
High-level output  
voltage  
OH  
V
V
25°C  
V
OH  
OH  
V
I
I
= 50 µA  
25°C  
25°C  
IC  
IC  
OL  
Low-level output  
voltage  
120  
120  
mV  
OL  
V
= 2.5 V,  
= 500 µA  
OL  
Full range  
25°C  
500  
500  
3
1
5
3
1
5
Large-signal  
differential voltage  
amplification  
= 2 kΩ  
R
R
V
V
= 2.5 V,  
= 1 V to 4 V  
L
L
IC  
O
Full range  
25°C  
A
VD  
V/mV  
800  
800  
= 1 MΩ  
Differential input  
resistance  
12  
10  
12  
10  
r
r
25°C  
25°C  
25°C  
25°C  
id  
Common-mode  
input resistance  
12  
10  
12  
10  
ic  
Common-mode  
input capacitance  
c
z
f = 10 kHz  
f = 10 kHz,  
6
6
pF  
ic  
o
Closed-loop  
output impedance  
A
= 10  
70  
85  
70  
85  
V
25°C  
70  
65  
70  
65  
Common-mode  
rejection ratio  
V
R
= 0 to 2.7 V,  
= 50 Ω  
V
O
= 1.5 V,  
IC  
S
CMRR  
dB  
dB  
µA  
Full range  
Supply voltage  
rejection ratio  
25°C  
80  
80  
95  
80  
80  
95  
V
V
= 4.4 V to 8 V,  
DD  
IC  
k
SVR  
= V  
/2,  
No load  
DD  
Full range  
(V  
/V )  
DD  
IO  
25°C  
110  
150  
200  
110  
150  
200  
I
Supply current  
V
O
= 2.5 V,  
No load  
DD  
Full range  
Full range for the TLV2721C is 0°C to 70°C. Full range for the TLV2721I is – 40°C to 85°C.  
Referenced to 2.5 V  
NOTE 5: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at T = 150°C extrapolated  
A
to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.  
A
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLV2721, TLV2721Y  
Advanced LinCMOS RAIL-TO-RAIL  
VERY LOW-POWER SINGLE OPERATIONAL AMPLIFIERS  
SLOS197 – AUGUST 1997  
operating characteristics at specified free-air temperature, V  
= 5 V  
DD  
TLV2721C  
TYP  
TLV2721I  
TYP MAX  
PARAMETER  
TEST CONDITIONS  
UNIT  
T
A
MIN  
MAX MIN  
25°C  
0.1  
0.25  
0.1  
0.25  
Slew rate at unity  
gain  
V
C
= 1.5 V to 3.5 V,  
= 100 pF  
R
= 2 k,  
O
L
L
SR  
V/µs  
Full  
range  
0.05  
0.05  
f = 10 Hz  
f = 1 kHz  
25°C  
25°C  
90  
19  
90  
19  
Equivalent input  
noise voltage  
V
n
nV/Hz  
mV  
Peak-to-peak  
equivalent input  
noise voltage  
f = 0.1 Hz to 1 Hz  
f = 0.1 Hz to 10 Hz  
25°C  
25°C  
800  
960  
800  
960  
V
N(PP)  
Equivalent input  
noise current  
I
25°C  
25°C  
0.6  
0.6  
fA/Hz  
n
V
= 1.5 V to 3.5 V,  
A
= 1  
2.45%  
5.54%  
2.45%  
5.54%  
O
V
f = 20 kHz,  
R
= 2 kΩ  
A
V
= 10  
= 1  
L
Total harmonic  
distortion plus noise  
THD+N  
V
O
= 1.5 V to 3.5 V,  
A
V
0.142%  
0.257%  
0.142%  
0.257%  
25°C  
25°C  
f = 20 kHz,  
§
= 2 kΩ  
A
V
= 10  
R
L
Gain-bandwidth  
product  
f = 1 kHz,  
C
R
= 2 k,  
L
510  
510  
kHz  
kHz  
= 100 pF  
L
Maximum output-  
swing bandwidth  
V
R
= 1 V,  
A
= 1,  
= 100 pF  
L
O(PP)  
V
B
25°C  
25°C  
25°C  
40  
6.8  
9.2  
40  
6.8  
9.2  
OM  
= 2 k,  
C
L
A
= –1,  
V
To 0.1%  
Step = 1.5 V to 3.5 V,  
t
s
Settling time  
µs  
R
C
= 2 k,  
= 100 pF  
L
L
To 0.01%  
Phase margin at  
unity gain  
φ
25°C  
25°C  
53°  
53°  
m
R
= 2 k,  
C = 100 pF  
L
L
Gain margin  
12  
12  
dB  
§
Full range is 40°C to 85°C.  
Referenced to 2.5 V  
Referenced to 0 V  
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLV2721, TLV2721Y  
Advanced LinCMOS RAIL-TO-RAIL  
VERY LOW-POWER SINGLE OPERATIONAL AMPLIFIERS  
SLOS197 – AUGUST 1997  
electrical characteristics at V  
= 3 V, T = 25°C (unless otherwise noted)  
DD  
A
TLV2721Y  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN  
TYP  
620  
0.5  
1
MAX  
V
IO  
Input offset voltage  
Input offset current  
Input bias current  
µV  
pA  
pA  
V
R
± = ±1.5 V,  
= 50 Ω  
V
IC  
= 0,  
V = 0,  
O
DD  
S
I
IO  
IB  
I
0.3  
to  
2.2  
V
ICR  
Common-mode input voltage range  
| V | 5 mV,  
IO  
R
= 50 Ω  
V
S
V
V
High-level output voltage  
Low-level output voltage  
I
= 100 µA  
= 1.5 V,  
2.97  
15  
V
OH  
OH  
V
I
I
= 50 µA  
IC  
IC  
OL  
mV  
OL  
V
= 1.5 V,  
= 500 µA  
150  
3
OL  
R
R
= 2 kΩ  
Large-signal differential  
voltage amplification  
L
L
A
VD  
V
= 1 V to 2 V  
V/mV  
O
250  
= 1 MΩ  
12  
r
r
Differential input resistance  
10  
10  
id  
12  
Common-mode input resistance  
Common-mode input capacitance  
Closed-loop output impedance  
Common-mode rejection ratio  
ic  
c
z
f = 10 kHz  
f = 10 kHz,  
6
90  
82  
95  
pF  
ic  
o
A
= 10  
V
CMRR  
V
V
V
= 0 to 1.7 V,  
V
O
= 0,  
= 0,  
R = 50 Ω  
S
dB  
dB  
µA  
IC  
k
I
Supply voltage rejection ratio (V  
/V  
IO  
)
= 2.7 V to 8 V,  
V
IC  
No load  
SVR  
DD  
DD  
Supply current  
= 0,  
No load  
100  
DD  
O
Referenced to 1.5 V  
electrical characteristics at V  
= 5 V, T = 25°C (unless otherwise noted)  
DD  
A
TLV2721Y  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN  
TYP  
610  
0.5  
1
MAX  
V
IO  
Input offset voltage  
Input offset current  
Input bias current  
µV  
pA  
pA  
V
R
± = ±1.5 V,  
= 50 Ω  
V
IC  
= 0,  
V = 0,  
O
DD  
S
I
I
IO  
IB  
0.3  
to  
4.2  
V
ICR  
Common-mode input voltage range  
| V | 5 mV,  
IO  
R
= 50 Ω  
V
S
V
V
High-level output voltage  
Low-level output voltage  
I
= 500 µA  
= 2.5 V,  
4.88  
12  
V
OH  
OH  
V
I
I
= 50 µA  
IC  
IC  
OL  
mV  
OL  
V
= 2.5 V,  
= 500 µA  
120  
5
OL  
R
R
= 2 kΩ  
Large-signal differential  
voltage amplification  
L
L
A
VD  
V
= 1 V to 4 V  
V/mV  
O
800  
= 1 MΩ  
12  
r
r
Differential input resistance  
10  
10  
id  
12  
Common-mode input resistance  
Common-mode input capacitance  
Closed-loop output impedance  
Common-mode rejection ratio  
ic  
c
z
f = 10 kHz  
f = 10 kHz,  
6
70  
85  
95  
pF  
ic  
o
A
= 10  
V
CMRR  
V
V
V
= 0 to 1.7 V,  
V
O
= 0,  
= 0,  
R = 50 Ω  
S
dB  
dB  
µA  
IC  
k
I
Supply voltage rejection ratio (V  
/V  
IO  
)
= 2.7 V to 8 V,  
V
IC  
No load  
SVR  
DD  
DD  
Supply current  
= 0,  
No load  
110  
DD  
O
Referenced to 2.5 V  
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLV2721, TLV2721Y  
Advanced LinCMOS RAIL-TO-RAIL  
VERY LOW-POWER SINGLE OPERATIONAL AMPLIFIERS  
SLOS197 – AUGUST 1997  
TYPICAL CHARACTERISTICS  
Table of Graphs  
FIGURE  
Distribution  
vs Common-mode input voltage  
1, 2  
3, 4  
V
IO  
Input offset voltage  
α
Input offset voltage temperature coefficient  
Input bias and input offset currents  
Distribution  
5, 6  
7
VIO  
I
/I  
vs Free-air temperature  
IB IO  
vs Supply voltage  
vs Free-air temperature  
8
9
V
I
Input voltage  
V
V
V
High-level output voltage  
vs High-level output current  
vs Low-level output current  
vs Frequency  
10, 13  
11, 12, 14  
15  
OH  
Low-level output voltage  
OL  
Maximum peak-to-peak output voltage  
O(PP)  
vs Supply voltage  
vs Free-air temperature  
16  
17  
I
Short-circuit output current  
OS  
V
Output voltage  
vs Differential input voltage  
vs Load resistance  
18, 19  
20  
O
A
VD  
Differential voltage amplification  
vs Frequency  
vs Free-air temperature  
21, 22  
23, 24  
A
Large signal differential voltage amplification  
Output impedance  
VD  
o
z
vs Frequency  
25, 26  
vs Frequency  
vs Free-air temperature  
27  
28  
CMRR  
Common-mode rejection ratio  
vs Frequency  
vs Free-air temperature  
29, 30  
31  
k
Supply-voltage rejection ratio  
Supply current  
SVR  
I
vs Supply voltage  
32  
DD  
vs Load capacitance  
vs Free-air temperature  
33  
34  
SR  
Slew rate  
V
V
V
V
V
Inverting large-signal pulse response  
Voltage-follower large-signal pulse response  
Inverting small-signal pulse response  
Voltage-follower small-signal pulse response  
Equivalent input noise voltage  
vs Time  
35, 36  
37, 38  
39, 40  
41, 42  
43, 44  
45  
O
O
O
O
n
vs Time  
vs Time  
vs Time  
vs Frequency  
Over a 10-second period  
vs Frequency  
Input noise voltage (referred to input)  
Total harmonic distortion plus noise  
THD + N  
46  
vs Free-air temperature  
vs Supply voltage  
47  
48  
Gain-bandwidth product  
Phase margin  
vs Frequency  
vs Load capacitance  
21, 22  
51, 52  
φ
m
Gain margin  
vs Load capacitance  
vs Load capacitance  
49, 50  
53, 54  
B
1
Unity-gain bandwidth  
10  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLV2721, TLV2721Y  
Advanced LinCMOS RAIL-TO-RAIL  
VERY LOW-POWER SINGLE OPERATIONAL AMPLIFIERS  
SLOS197 – AUGUST 1997  
TYPICAL CHARACTERISTICS  
DISTRIBUTION OF TLV2721  
INPUT OFFSET VOLTAGE  
DISTRIBUTION OF TLV2721  
INPUT OFFSET VOLTAGE  
25  
20  
15  
20  
18  
16  
545 Amplifiers  
From 1 Wafer Lot  
= ±1.5 V  
545 Amplifiers From 1 Wafer Lot  
V = ±2.5 V  
DD  
T = 25°C  
V
A
DD  
= 25°C  
T
A
14  
12  
10  
8
10  
6
4
5
0
2
0
–1.5 –1.1 –0.7 –0.3  
0.1  
0.5  
0.9  
1.3  
–1.5 –1.1 –0.7 –0.3 0.1  
0.5  
0.9  
1.3  
V
IO  
– Input Offset Voltage – mV  
V
IO  
– Input Offset Voltage – mV  
Figure 1  
Figure 2  
INPUT OFFSET VOLTAGE  
vs  
INPUT OFFSET VOLTAGE  
vs  
COMMON-MODE INPUT VOLTAGE  
COMMON-MODE INPUT VOLTAGE  
1
1
V
= 3 V  
= 50 Ω  
= 25°C  
DD  
V
= 5 V  
= 50 Ω  
= 25°C  
DD  
0.8  
R
S
0.8  
R
S
T
A
T
A
0.6  
0.4  
0.2  
0.6  
0.4  
0.2  
0
0.2  
0.4  
0
0.2  
0.4  
0.6  
0.8  
0.6  
0.8  
–1  
–1  
–1  
0
1
2
3
–1  
0
1
2
3
4
5
V
IC  
– Common-Mode Input Voltage – V  
V
IC  
– Common-Mode Input Voltage – V  
Figure 3  
Figure 4  
For all curves where V  
DD  
= 5 V, all loads are referenced to 2.5 V. For all curves where V  
DD  
= 3 V, all loads are referenced to 1.5 V.  
11  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLV2721, TLV2721Y  
Advanced LinCMOS RAIL-TO-RAIL  
VERY LOW-POWER SINGLE OPERATIONAL AMPLIFIERS  
SLOS197 – AUGUST 1997  
TYPICAL CHARACTERISTICS  
DISTRIBUTION OF TLV2721 INPUT OFFSET  
VOLTAGE TEMPERATURE COEFFICIENT  
DISTRIBUTION OF TLV2721 INPUT OFFSET  
VOLTAGE TEMPERATURE COEFFICIENT  
25  
20  
15  
10  
5
25  
20  
15  
10  
5
32 Amplifiers From 1 Wafer Lot  
32 Amplifiers From 1 Wafer Lot  
V
= ±2.5 V  
DD  
P Package  
= 25°C to 125°C  
V
= ±1.5 V  
DD  
P Package  
= 25°C to 125°C  
T
A
T
A
0
0
–4 –3  
–2  
–1  
0
1
2
3
4
–4 –3  
–2  
–1  
0
1
2
3
4
α
– Input Offset Voltage  
α
VIO  
– Input Offset Voltage  
Temperature Coefficient – µV/°C  
VIO  
Temperature Coefficient – µV/°C  
Figure 5  
Figure 6  
INPUT BIAS AND INPUT OFFSET CURRENTS  
INPUT VOLTAGE  
vs  
vs  
FREE-AIR TEMPERATURE  
SUPPLY VOLTAGE  
5
100  
90  
80  
70  
60  
50  
40  
30  
R
T
= 50 Ω  
= 25°C  
S
A
V
V
V
= ±2.5 V  
= 0  
= 0  
= 50 Ω  
DD±  
IC  
O
4
3
R
S
2
1
0
|V | 5 mV  
IO  
–1  
–2  
–3  
–4  
I
IB  
20  
10  
0
I
IO  
–5  
1
1.5  
2
2.5  
3
3.5  
4
25  
45  
65  
85  
105  
125  
T
A
– Free-Air Temperature – °C  
|V | – Supply Voltage – V  
DD±  
Figure 7  
Figure 8  
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.  
12  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLV2721, TLV2721Y  
Advanced LinCMOS RAIL-TO-RAIL  
VERY LOW-POWER SINGLE OPERATIONAL AMPLIFIERS  
SLOS197 – AUGUST 1997  
TYPICAL CHARACTERISTICS  
†‡  
INPUT VOLTAGE  
vs  
†‡  
HIGH-LEVEL OUTPUT VOLTAGE  
vs  
FREE-AIR TEMPERATURE  
HIGH-LEVEL OUTPUT CURRENT  
3
5
4
3
2
1
V
= 3 V  
DD  
V
DD  
= 5 V  
2.5  
T
A
= 40°C  
2
1.5  
1
T
A
= 25°C  
|V | 5 mV  
IO  
T
A
= 85°C  
T
= 125°C  
A
0
0.5  
0
–1  
55 35 15  
5
25  
45  
65 85 105 125  
0
0.5  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
5
T
A
– Free-Air Temperature – °C  
|I | – High-Level Output Current – mA  
OH  
Figure 9  
Figure 10  
LOW-LEVEL OUTPUT VOLTAGE  
vs  
†‡  
LOW-LEVEL OUTPUT VOLTAGE  
vs  
LOW-LEVEL OUTPUT CURRENT  
LOW-LEVEL OUTPUT CURRENT  
1.2  
1
1.4  
1.2  
1
V
T
= 3 V  
V
= 3 V  
DD  
= 25°C  
DD  
= 1.5 V  
V
IC  
A
T
= 125°C  
A
V
IC  
= 0  
0.8  
0.6  
0.4  
0.2  
0
V
= 1.5 V  
IC  
T
A
= 85°C  
0.8  
0.6  
V
IC  
= 0.75 V  
T
A
= 25°C  
0.4  
T
A
= – 40°C  
0.2  
0
0
1
2
3
4
5
0
1
2
3
4
5
I
– Low-Level Output Current – mA  
I
– Low-Level Output Current – mA  
OL  
OL  
Figure 11  
Figure 12  
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.  
For all curves where V = 5 V, all loads are referenced to 2.5 V. For all curves where V = 3 V, all loads are referenced to 1.5 V.  
DD DD  
13  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLV2721, TLV2721Y  
Advanced LinCMOS RAIL-TO-RAIL  
VERY LOW-POWER SINGLE OPERATIONAL AMPLIFIERS  
SLOS197 – AUGUST 1997  
TYPICAL CHARACTERISTICS  
†‡  
†‡  
LOW-LEVEL OUTPUT VOLTAGE  
vs  
HIGH-LEVEL OUTPUT VOLTAGE  
vs  
LOW-LEVEL OUTPUT CURRENT  
HIGH-LEVEL OUTPUT CURRENT  
1.4  
1.2  
5
4
3
V
V
= 5 V  
V
V
= 5 V  
DD  
= 2.5 V  
DD  
IC  
IC = 2.5 V  
T
A
= 125°C  
T
= 40°C  
A
1
T
A
= 25°C  
T
= 85°C  
A
0.8  
T
A
= 85°C  
0.6  
0.4  
0.2  
0
2
T
= 125°C  
T
= 25°C  
A
A
T
A
= 40°C  
1
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
7
8
I
– Low-Level Output Current – mA  
OL  
|I | – High-Level Output Current – mA  
OH  
Figure 13  
Figure 14  
SHORT-CIRCUIT OUTPUT CURRENT  
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE  
vs  
vs  
SUPPLY VOLTAGE  
FREQUENCY  
20  
16  
12  
5
V
= V /2  
DD  
O
T
= 25°C  
A
V
DD  
= 5 V  
V
= V /2  
IC  
DD  
4
3
V
ID  
= 100 mV  
8
4
0
V
DD  
= 3 V  
2
1
0
V
= 100 mV  
ID  
–4  
–8  
R
T
A
= 2 kΩ  
= 25°C  
L
2
3
4
5
6
7
8
2
3
4
5
10  
10  
10  
10  
V
– Supply Voltage – V  
DD  
f – Frequency – Hz  
Figure 15  
Figure 16  
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.  
For all curves where V  
= 5 V, all loads are referenced to 2.5 V. For all curves where V  
= 3 V, all loads are referenced to 1.5 V.  
DD  
DD  
14  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLV2721, TLV2721Y  
Advanced LinCMOS RAIL-TO-RAIL  
VERY LOW-POWER SINGLE OPERATIONAL AMPLIFIERS  
SLOS197 – AUGUST 1997  
TYPICAL CHARACTERISTICS  
†‡  
SHORT-CIRCUIT OUTPUT CURRENT  
OUTPUT VOLTAGE  
vs  
vs  
DIFFERENTIAL INPUT VOLTAGE  
FREE-AIR TEMPERATURE  
3
20  
16  
V
= 3 V  
V
V
V
= 5 V  
= 2.5 V  
= 2.5 V  
DD  
R = 2 kΩ  
DD  
IC  
O
I
2.5  
V
= 1.5 V  
IC  
= 25°C  
T
A
12  
8
2
1.5  
1
V
ID  
= 100 mV  
4
0
V
ID  
= 100 mV  
0.5  
0
–4  
–8  
–5 –4 –3 –2 –1  
0
1
2
3
4
5
75 50 25  
0
25  
50  
75  
100 125  
T
A
– Free-Air Temperature – °C  
V
ID  
– Differential Input Voltage – V  
Figure 17  
Figure 18  
OUTPUT VOLTAGE  
DIFFERENTIAL VOLTAGE AMPLIFICATION  
vs  
vs  
DIFFERENTIAL INPUT VOLTAGE  
LOAD RESISTANCE  
5
4
3
2
1
1
10  
10  
10  
V
T
= 2 V  
V
V
R
= 5 V  
O(PP)  
DD  
= 25°C  
= 2.5 V  
= 2 kΩ  
= 25°C  
A
IC  
L
V
DD  
= 5 V  
T
A
3
V
DD  
= 3 V  
2
1
0
1
10  
2
3
10  
–5 –4 –3 –2 –1  
0
1
2
3
4
5
1
10  
V
ID  
– Differential Input Voltage – V  
R
L
– Load Resistance – kΩ  
Figure 19  
Figure 20  
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.  
For all curves where V = 5 V, all loads are referenced to 2.5 V. For all curves where V = 3 V, all loads are referenced to 1.5 V.  
DD DD  
15  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLV2721, TLV2721Y  
Advanced LinCMOS RAIL-TO-RAIL  
VERY LOW-POWER SINGLE OPERATIONAL AMPLIFIERS  
SLOS197 – AUGUST 1997  
TYPICAL CHARACTERISTICS  
LARGE-SIGNAL DIFFERENTIAL VOLTAGE  
AMPLIFICATION AND PHASE MARGIN  
vs  
FREQUENCY  
80  
180°  
135°  
V
R
= 5 V  
= 2 kΩ  
DD  
L
L
C = 100 pF  
T
A
60  
40  
= 25°C  
90°  
45°  
Phase Margin  
20  
0
Gain  
0°  
45°  
90°  
20  
40  
4
10  
5
10  
6
10  
7
10  
f – Frequency – Hz  
Figure 21  
LARGE-SIGNAL DIFFERENTIAL VOLTAGE  
AMPLIFICATION AND PHASE MARGIN  
vs  
FREQUENCY  
180°  
135°  
80  
60  
V
R
= 3 V  
= 2 kΩ  
DD  
L
L
C = 100 pF  
T
A
= 25°C  
90°  
45°  
40  
Phase Margin  
20  
0
Gain  
0°  
45°  
90°  
20  
40  
4
10  
5
10  
6
10  
7
10  
f – Frequency – Hz  
Figure 22  
For all curves where V  
DD  
= 5 V, all loads are referenced to 2.5 V. For all curves where V  
= 3 V, all loads are referenced to 1.5 V.  
DD  
16  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
TLV2721, TLV2721Y  
Advanced LinCMOS RAIL-TO-RAIL  
VERY LOW-POWER SINGLE OPERATIONAL AMPLIFIERS  
SLOS197 – AUGUST 1997  
TYPICAL CHARACTERISTICS  
LARGE-SIGNAL DIFFERENTIAL  
VOLTAGE AMPLIFICATION  
vs  
LARGE-SIGNAL DIFFERENTIAL  
VOLTAGE AMPLIFICATION  
vs  
†‡  
†‡  
FREE-AIR TEMPERATURE  
FREE-AIR TEMPERATURE  
4
3
3
2
10  
10  
10  
10  
V
V
V
= 5 V  
= 2.5 V  
= 1 V to 4 V  
V
V
V
= 3 V  
= 1.5 V  
= 0.5 V to 2.5 V  
DD  
IC  
O
DD  
IC  
O
R
= 1 MΩ  
L
R
= 1 MΩ  
L
2
1
10  
10  
1
10  
R
0
= 2 kΩ  
L
R
= 2 kΩ  
L
1
1
75 50 25  
0
25  
50  
75  
100 125  
75 50 25  
25  
50  
75  
100 125  
T
A
– Free-Air Temperature – °C  
T
A
– Free-Air Temperature – °C  
Figure 23  
Figure 24  
OUTPUT IMPEDANCE  
OUTPUT IMPEDANCE  
vs  
vs  
FREQUENCY  
FREQUENCY  
1000  
100  
10  
1000  
100  
10  
V
T
A
= 3 V  
= 25°C  
DD  
V
T
A
= 5 V  
= 25°C  
DD  
A
= 100  
V
A
= 100  
V
A
= 10  
= 1  
V
A
= 10  
= 1  
V
A
1
V
A
V
1
0.1  
10  
1
10  
2
3
4
5
10  
10  
10  
10  
1
2
3
4
5
10  
10  
10  
f– Frequency – Hz  
10  
f– Frequency – Hz  
Figure 25  
Figure 26  
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.  
For all curves where V = 5 V, all loads are referenced to 2.5 V. For all curves where V = 3 V, all loads are referenced to 1.5 V.  
DD DD  
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TYPICAL CHARACTERISTICS  
†‡  
COMMON-MODE REJECTION RATIO  
COMMON-MODE REJECTION RATIO  
vs  
vs  
FREE-AIR TEMPERATURE  
FREQUENCY  
100  
80  
88  
86  
T
A
= 25°C  
V
V
= 5 V  
= 2.5 V  
DD  
IC  
V = 5 V  
DD  
V
V
= 3 V  
= 1.5 V  
DD  
IC  
84  
60  
40  
20  
0
V
DD  
= 3 V  
82  
80  
78  
4
5
6
10  
1
2
3
10  
10  
10  
10  
10  
75 50 25  
0
25  
50  
75  
100 125  
T
A
– Free-Air Temperature – °C  
f – Frequency – Hz  
Figure 27  
Figure 28  
SUPPLY-VOLTAGE REJECTION RATIO  
SUPPLY-VOLTAGE REJECTION RATIO  
vs  
vs  
FREQUENCY  
FREQUENCY  
100  
80  
100  
80  
60  
40  
20  
V
T
= 3 V  
= 25°C  
V
T
= 5 V  
= 25°C  
DD  
A
DD  
A
k
SVR+  
k
SVR+  
60  
k
SVR–  
k
SVR–  
40  
20  
0
0
20  
20  
6
1
2
3
4
5
6
10  
1
2
3
4
5
10  
10  
10  
10  
10  
10  
10  
10  
10  
10  
10  
f – Frequency – Hz  
f – Frequency – Hz  
Figure 29  
Figure 30  
For all curves where V  
DD  
= 5 V, all loads are referenced to 2.5 V. For all curves where V  
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.  
= 3 V, all loads are referenced to 1.5 V.  
DD  
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TYPICAL CHARACTERISTICS  
SUPPLY CURRENT  
vs  
SUPPLY-VOLTAGE REJECTION RATIO  
vs  
SUPPLY VOLTAGE  
FREE-AIR TEMPERATURE  
200  
175  
150  
125  
100  
V
= 0  
V
V
= 2.7 V to 8 V  
O
DD  
= V = V /2  
DD  
No Load  
IC  
O
98  
96  
T
A
= 40°C  
100  
75  
T
A
= 85°C  
T
= 25°C  
A
94  
92  
90  
50  
25  
0
0
2
4
6
8
10  
75 50 25  
0
25  
50  
75  
100 125  
V
DD  
– Supply Voltage – V  
T
A
– Free-Air Temperature – °C  
Figure 31  
Figure 32  
†‡  
SLEW RATE  
SLEW RATE  
vs  
vs  
LOAD CAPACITANCE  
FREE-AIR TEMPERATURE  
0.5  
0.4  
0.5  
0.4  
0.3  
0.2  
V
= 5 V  
V
= 5 V  
DD  
= 1  
DD  
A
R
C
A
= 2 kΩ  
= 100 pF  
= 1  
V
A
L
L
V
T
= 25°C  
SR–  
0.3  
0.2  
SR–  
SR+  
SR+  
0.1  
0
0.1  
0
1
2
10  
3
10  
4
10  
5
10  
75 50 25  
0
25  
50  
75 100 125  
10  
C
– Load Capacitance – pF  
T
A
– Free-Air Temperature – °C  
L
Figure 33  
Figure 34  
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.  
For all curves where V = 5 V, all loads are referenced to 2.5 V. For all curves where V = 3 V, all loads are referenced to 1.5 V.  
DD DD  
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TYPICAL CHARACTERISTICS  
INVERTING LARGE-SIGNAL PULSE  
INVERTING LARGE-SIGNAL PULSE  
RESPONSE  
RESPONSE  
5
4
3
2.5  
2
V
R
C
= 5 V  
= 2 kΩ  
= 100 pF  
= 1  
DD  
L
L
V
= 3 V  
= 2 kΩ  
= 100 pF  
= 1  
DD  
R
C
A
L
L
V
A
V
A
T
= 25°C  
T
A
= 25°C  
3
2
1.5  
1
1
0
0.5  
0
0
5
10 15 20 25 30 35 40 45 50  
0
5
10 15 20 25 30 35 40 45 50  
t – Time – µs  
t – Time – µs  
Figure 35  
Figure 36  
VOLTAGE-FOLLOWER LARGE-SIGNAL  
VOLTAGE-FOLLOWER LARGE-SIGNAL  
PULSE RESPONSE  
PULSE RESPONSE  
5
4
5
4
3
2
V
= 5 V  
= 100 pF  
= 1  
V
= 5 V  
= 2 kΩ  
= 100 pF  
= 1  
= 25°C  
DD  
L
DD  
C
A
R
C
A
L
L
V
V
A
R
= 100 kΩ  
T
= 25°C  
L
Tied to 2.5 V  
T
A
3
2
R
= 2 kΩ  
R = 2 kΩ  
L
L
1
0
1
0
Tied to 2.5 V  
Tied to 0 V  
0
5
10 15 20 25 30 35 40 45 50  
0
5
10 15 20 25 30 35 40 45 50  
t – Time – µs  
t – Time – µs  
Figure 37  
Figure 38  
For all curves where V  
DD  
= 5 V, all loads are referenced to 2.5 V. For all curves where V  
= 3 V, all loads are referenced to 1.5 V.  
DD  
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TYPICAL CHARACTERISTICS  
INVERTING SMALL-SIGNAL  
INVERTING SMALL-SIGNAL  
PULSE RESPONSE  
PULSE RESPONSE  
0.82  
0.8  
2.58  
2.56  
V
R
C
= 3 V  
= 2 kΩ  
= 100 pF  
= 1  
= 25°C  
DD  
L
L
V
R
C
= 5 V  
= 2 kΩ  
= 100 pF  
= 1  
= 25°C  
DD  
L
L
A
V
A
A
V
A
T
T
2.54  
2.52  
2.5  
0.78  
0.76  
0.74  
2.48  
0.72  
0.7  
2.46  
2.44  
0
0.5  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
5
0
0.5  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
5
t – Time – µs  
t – Time – µs  
Figure 39  
Figure 40  
VOLTAGE-FOLLOWER SMALL-SIGNAL  
VOLTAGE-FOLLOWER SMALL-SIGNAL  
PULSE RESPONSE  
PULSE RESPONSE  
0.82  
0.8  
2.58  
2.56  
V
R
C
= 3 V  
= 2 kΩ  
= 100 pF  
= 1  
= 25°C  
DD  
L
L
V
R
C
= 5 V  
= 2 kΩ  
= 100 pF  
= 1  
= 25°C  
DD  
L
L
A
V
A
A
V
A
T
T
2.54  
2.52  
2.5  
0.78  
0.76  
0.74  
2.48  
0.72  
0.7  
2.46  
2.44  
0
1
2
3
4
5
6
7
8
9
10  
0
0.5  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
5
t – Time – µs  
t – Time – µs  
Figure 41  
Figure 42  
For all curves where V  
DD  
= 5 V, all loads are referenced to 2.5 V. For all curves where V = 3 V, all loads are referenced to 1.5 V.  
DD  
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TYPICAL CHARACTERISTICS  
EQUIVALENT INPUT NOISE VOLTAGE  
EQUIVALENT INPUT NOISE VOLTAGE  
vs  
vs  
FREQUENCY  
FREQUENCY  
120  
100  
120  
100  
80  
V
R
T
A
= 5 V  
= 20 Ω  
= 25°C  
DD  
S
V
R
T
A
= 3 V  
= 20 Ω  
= 25°C  
DD  
S
80  
60  
40  
60  
40  
20  
0
20  
0
1
10  
2
3
4
1
2
3
4
10  
10  
10  
10  
10  
10  
10  
f – Frequency – Hz  
f – Frequency – Hz  
Figure 43  
Figure 44  
TOTAL HARMONIC DISTORTION PLUS NOISE  
INPUT NOISE VOLTAGE OVER  
vs  
A 10-SECOND PERIOD  
FREQUENCY  
10  
1000  
V
T
= 5 V  
= 25°C  
V
= 5 V  
DD  
A
DD  
f = 0.1 Hz to 10 Hz  
750  
500  
250  
0
T
A
= 25°C  
A
V
= 10  
R
R
= 2 kTied to 2.5 V  
= 2 kTied to 0 V  
L
L
A
V
= 1  
1
250  
500  
0.1  
A
V
= 10  
750  
A
V
= 1  
0.01  
1000  
1
2
3
4
5
10  
10  
10  
10  
10  
0
2
4
6
8
10  
f – Frequency – Hz  
t – Time – s  
Figure 45  
Figure 46  
For all curves where V  
DD  
= 5 V, all loads are referenced to 2.5 V. For all curves where V  
= 3 V, all loads are referenced to 1.5 V.  
DD  
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TYPICAL CHARACTERISTICS  
†‡  
GAIN-BANDWIDTH PRODUCT  
vs  
GAIN-BANDWIDTH PRODUCT  
vs  
FREE-AIR TEMPERATURE  
SUPPLY VOLTAGE  
800  
700  
600  
500  
400  
300  
200  
600  
575  
550  
525  
V
= 5 V  
DD  
R
C
T
A
= 2k  
= 100 pF  
= 25°C  
L
L
f = 10 kHz  
R
C
= 2 kHz  
= 100 pF  
L
L
500  
475  
450  
425  
400  
75 50 25  
0
25  
50  
75 100 125  
– Free-Air Temperature – °C  
0
1
2
V
3
4
5
6
7
8
T
A
– Supply Voltage – V  
DD  
Figure 47  
Figure 48  
GAIN MARGIN  
vs  
LOAD CAPACITANCE  
GAIN MARGIN  
vs  
LOAD CAPACITANCE  
20  
15  
10  
20  
15  
10  
R
= 1 kΩ  
null  
R
= 1 kΩ  
null  
R
= 500 Ω  
null  
R
= 100 Ω  
R
null  
500 Ω  
=
null  
R
= 0  
R
= 0  
null  
null  
R
= 200 Ω  
null  
5
0
5
0
T
R
= 25°C  
= 2 kΩ  
T
R
= 25°C  
=  
A
L
A
L
1
2
3
4
10  
1
10  
2
3
4
10  
10  
10  
10  
10  
10  
C
– Load Capacitance – pF  
L
C
– Load Capacitance – pF  
L
Figure 49  
Figure 50  
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.  
For all curves where V = 5 V, all loads are referenced to 2.5 V. For all curves where V = 3 V, all loads are referenced to 1.5 V.  
DD DD  
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PHASE MARGIN  
vs  
LOAD CAPACITANCE  
PHASE MARGIN  
vs  
LOAD CAPACITANCE  
75°  
60°  
75°  
60°  
T
R
= 25°C  
= ∞  
A
L
T
R
= 25°C  
= 2 kΩ  
A
L
R
= 1 kΩ  
null  
R
= 1 kΩ  
R
= 500 Ω  
null  
null  
45°  
30°  
45°  
30°  
R
= 500 Ω  
null  
R
= 0  
null  
R
= 0  
null  
R
= 200 Ω  
null  
15°  
0°  
15°  
0°  
R
= 100 Ω  
null  
4
1
2
3
4
5
10  
1
2
3
5
10  
10  
10  
10  
10  
10  
10  
10  
10  
C
L
– Load Capacitance – pF  
C
– Load Capacitance – pF  
L
Figure 51  
Figure 52  
UNITY-GAIN BANDWIDTH  
vs  
LOAD CAPACITANCE  
UNITY-GAIN BANDWIDTH  
vs  
LOAD CAPACITANCE  
600  
600  
500  
T
R
= 25°C  
= ∞  
A
L
T
R
= 25°C  
= 2 kΩ  
A
L
500  
400  
300  
400  
300  
200  
200  
100  
0
100  
0
1
10  
2
3
4
5
10  
10  
C
10  
10  
1
2
3
4
5
10  
10  
10  
10  
10  
– Load Capacitance – pF  
L
C
– Load Capacitance – pF  
L
Figure 53  
Figure 54  
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APPLICATION INFORMATION  
driving large capacitive loads  
The TLV2721 is designed to drive larger capacitive loads than most CMOS operational amplifiers. Figure 50  
through Figure 55 illustrate its ability to drive loads greater than 100 pF while maintaining good gain and phase  
margins (R  
= 0).  
null  
A small series resistor (R ) at the output of the device (Figure 55) improves the gain and phase margins when  
null  
driving large capacitive loads. Figure 50 through Figure 53 show the effects of adding series resistances of  
100 , 200 , 500 , and 1 k. The addition of this series resistor has two effects: the first effect is that it adds  
a zero to the transfer function and the second effect is that it reduces the frequency of the pole associated with  
the output load in the transfer function.  
The zero introduced to the transfer function is equal to the series resistance times the load capacitance. To  
calculate the approximate improvement in phase margin, equation 1 can be used.  
–1  
(1)  
∆φ  
tan  
2 × π × UGBW × R  
× C  
m1  
null  
L
where :  
∆φ  
improvement in phase margin  
m1  
UGBW  
unity-gain bandwidth frequency  
output series resistance  
R
null  
C
load capacitance  
L
The unity-gain bandwidth (UGBW) frequency decreases as the capacitive load increases (Figure 54 and Figure  
55). To use equation 1, UGBW must be approximated from Figure 54 and Figure 55.  
V
DD+  
R
null  
V
I
+
C
L
R
L
V
/GND  
DD–  
Figure 55. Series-Resistance Circuit  
The TLV2721 is designed to provide better sinking and sourcing output currents than earlier CMOS rail-to-rail  
output devices. This device is specified to sink 500 µA and source 1 mA at V = 5 V at a maximum quiescent  
DD  
I
of 200 µA. This provides a greater than 80% power efficiency.  
DD  
When driving heavy dc loads, such as 2 k, the positive edge under slewing conditions can experience some  
distortion. This condition can be seen in Figure 38. This condition is affected by three factors:  
Where the load is referenced. When the load is referenced to either rail, this condition does not occur. The  
distortion occurs only when the output signal swings through the point where the load is referenced.  
Figure 39 illustrates two 2-kload conditions. The first load condition shows the distortion seen for a 2-kΩ  
load tied to 2.5 V. The third load condition in Figure 39 shows no distortion for a 2-kload tied to 0 V.  
Load resistance. As the load resistance increases, the distortion seen on the output decreases. Figure 39  
illustrates the difference seen on the output for a 2-kload and a 100-kload with both tied to 2.5 V.  
Inputsignaledgerate. Fasterinputedgeratesforastepinputresultinmoredistortionthanwithslowerinput  
edge rates.  
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APPLICATION INFORMATION  
macromodel information  
Macromodel information provided was derived using Microsim Parts , the model generation software used  
with Microsim PSpice . The Boyle macromodel (see Note 6) and subcircuit in Figure 57 are generated using  
the TLV2721 typical electrical and operating characteristics at T = 25°C. Using this information, output  
A
simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):  
Maximum positive output voltage swing  
Maximum negative output voltage swing  
Slew rate  
Unity-gain frequency  
Common-mode rejection ratio  
Phase margin  
Quiescent power dissipation  
Input bias current  
DC output resistance  
AC output resistance  
Short-circuit output current limit  
Open-loop voltage amplification  
NOTE 6: G. R. Boyle, B. M. Cohn, D. O. Pederson, andJ. E. Solomon, “MacromodelingofIntegratedCircuitOperationalAmplifiers”, IEEEJournal  
of Solid-State Circuits, SC-9, 353 (1974).  
99  
DLN  
3
EGND  
+
V
DD+  
92  
9
FB  
+
91  
90  
RSS  
ISS  
RO2  
+
+
VB  
DLP  
RP  
2
VLP  
VLN  
HLIM  
+
10  
+
VC  
IN –  
IN+  
R2  
C2  
J1  
J2  
7
DP  
6
53  
+
1
VLIM  
11  
DC  
12  
RD2  
GA  
GCM  
8
C1  
RD1  
60  
RO1  
+
DE  
VAD  
5
54  
V
DD–  
+
4
VE  
OUT  
.SUBCKT TLV2721 1 2 3 4 5  
RD1  
RD2  
R01  
R02  
RP  
RSS  
VAD  
VB  
VC  
VE  
60  
60  
8
11  
12  
5
10.61E3  
10.61E3  
35  
C1  
11  
6
12  
7
12.53E–12  
C2  
50.00E–12  
DC  
5
53  
5
DX  
DX  
DX  
DX  
DX  
7
99  
4
35  
DE  
54  
90  
92  
4
3
49.50E3  
22.22E6  
–.5  
DLP  
DLN  
DP  
91  
90  
3
10  
60  
9
99  
4
0
DC 0  
EGND  
FB  
99  
7
0
99  
POLY (2) (3,0) (4,0) 0 .5 .5  
POLY (5) VB VC VE VLP  
3
53  
4
DC .666  
DC .666  
DC 0  
54  
7
+ VLN 0 893.6E3 –90E3 90E3 90E3 –90E3  
VLIM  
VLP  
VLN  
8
GA  
6
0
6
11  
10  
12 94.25E–6  
99 9.300E–9  
91  
0
0
DC 3.4  
DC 11.4  
GCM  
ISS  
HLIM  
J1  
0
92  
3
10  
0
DC 9.000E–6  
VLIM 1K  
10 JX  
10 JX  
100.0E3  
.MODEL DX D (IS=800.0E–18)  
90  
11  
12  
6
.MODEL JX PJF (IS=500.0E–15 BETA=1.527E–3  
2
1
+ VTO=–.001)  
.ENDS  
J2  
R2  
9
Figure 56. Boyle Macromodel and Subcircuit  
PSpice and Parts are trademark of MicroSim Corporation.  
Macromodels, simulation models, or other models provided by TI,  
directly or indirectly, are not warranted by TI as fully representing all  
of the specification and operating characteristics of the  
semiconductor product to which the model relates.  
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MECHANICAL INFORMATION  
DBV (R-PDSO-G5)  
PLASTIC SMALL-OUTLINE PACKAGE  
0,40  
0,20  
M
0,25  
0,95  
5
4
0,15 NOM  
1,80  
1,50  
3,00  
2,50  
1
3
Gage Plane  
3,10  
2,70  
0,25  
0°8°  
0,55  
0,35  
Seating Plane  
0,10  
1,30  
1,00  
0,05 MIN  
4073253-4/A 12/96  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions include mold flash or protrusion.  
27  
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