TLV2782CDGKR [TI]
FAMILY OF 1.8V HIGH SPEED RAIL TO RAIL INPUT OUTPUT OPERATIONAL AMPLIFIERS WITH SHUTDOWN; 家庭的1.8V高速轨至轨输入输出运算放大器，带有关断
| 型号： | TLV2782CDGKR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | FAMILY OF 1.8V HIGH SPEED RAIL TO RAIL INPUT OUTPUT OPERATIONAL AMPLIFIERS WITH SHUTDOWN |
| 文件： | 总32页 (文件大小：897K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢈ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢃ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢉ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢊ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢋ ꢇ ꢀꢁꢂ ꢃꢄ ꢅꢌ ꢍ
ꢎꢍꢏꢐ ꢁꢑ ꢒ ꢎ ꢈ ꢓꢅ ꢂ ꢔꢐ ꢕꢔ ꢖꢗꢘꢙ ꢙꢚ ꢛꢍꢐ ꢁ ꢖꢀꢒ ꢖꢛꢍꢐ ꢁ ꢐꢜ ꢘꢝꢀ ꢞ ꢒ ꢝꢀ ꢘꢝ ꢀ
ꢒ ꢘꢙꢛ ꢍꢀ ꢐꢒ ꢜꢍꢁ ꢍꢏ ꢘꢁ ꢐꢎ ꢐꢙ ꢛꢗ ꢟ ꢐꢀ ꢔ ꢗꢔꢝ ꢀꢚ ꢒ ꢟꢜ
SLOS245E − MARCH 2000 − REVISED JANUARY 2005
Operational Amplifier
D
D
D
D
D
D
D
D
Supply Voltage Range . . . 1.8 V to 3.6 V
Rail-to-Rail Input/Output
+
−
High Bandwidth . . . 8 MHz
High Slew Rate . . . 4.8 V/µs
V
Exceeds Rails . . . −0.2 V to V + 0.2
DD
ICR
DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE
Supply Current . . . 650 µA/Channel
Input Noise Voltage . . . 9 nV/√Hz at 10 kHz
Specified Temperature Range:
0°C to 70°C . . . Commercial Grade
−40°C to 125°C . . . Industrial Grade
vs
FREQUENCY
80
70
240
210
180
150
120
90
V
= 1.8 V & 2.7 V
DD
R = 2 kΩ
L
60
50
40
30
C
= 10 pF
L
T
A
= 25° C
D
D
Ultrasmall Packaging
Phase
Universal Operational Amplifier EVM
60
20
10
30
description
Gain
1 M
0
0
−10
−20
−30
−30
−60
The TLV278x single supply operational amplifiers
provide rail-to-rail input and output capability. The
TLV278x takes the minimum operating supply
voltage down to 1.8 V over the extended industrial
temperature range (−40°C to 125°C) while adding
−90
−120
−40
1 k
10 k
100 k
10 M
f − Frequency − Hz
the rail-to-rail output swing feature. The TLV278x also provides 8 MHz bandwidth from only 650 µA of supply
current. The maximum recommended supply voltage is 3.6 V, which allows the devices to be operated from
( 1.8 V supplies down to 0.9 V) two rechargeable cells.
The combination of wide bandwidth, low noise, and low distortion makes it ideal for high speed and high
resolution data converter applications.
All members are available in PDIP, SOIC, and the newer, smaller SOT-23 (singles), MSOP (duals), and TSSOP
(quads).
FAMILY PACKAGE TABLE
V
[V]
V
I
/ch
I
GBW
[MHz]
SLEW RATE
V
I
O
RAIL-TO-
RAIL
DD
IO
DD
IB
n, 1 kHz
DEVICE
SHUTDOWN
[µV]
250
550
150
250
300
360
[µA]
650
20
[pA]
2.5
3
[V/µs]
[mA]
10
5
[nV/√Hz]
TLV278x(A)
TLV276x(A)
TLV246x(A)
TLV247x(A)
TLV244x(A)
TLV277x(A)
1.8−3.6
1.8−3.6
2.7−6
8
5
18
Y
Y
I/O
I/O
I/O
I/O
O
0.5
6.4
2.8
1.81
5.1
0.23
1.6
95
11
15
16
17
550
600
750
1000
1300
2.5
1
25
20
2
Y
2.7−6
1.5
Y
2.7−10
2.5−5.5
1.4
—
Y
2
10.5
6
O
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2000−2005, Texas Instruments Incorporated
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1
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ꢀ ꢁꢂ ꢃ ꢄꢅ ꢆ ꢇ ꢀ ꢁꢂꢃ ꢄꢅ ꢈ ꢇ ꢀꢁꢂ ꢃ ꢄꢅ ꢃ ꢇ ꢀꢁꢂ ꢃ ꢄꢅ ꢉ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢊ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢋ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢌ ꢍ
ꢎꢍꢏ ꢐ ꢁꢑ ꢒꢎ ꢈ ꢓ ꢅ ꢂ ꢔꢐ ꢕ ꢔꢖꢗ ꢘꢙ ꢙ ꢚ ꢛꢍ ꢐ ꢁꢖꢀꢒ ꢖꢛꢍꢐ ꢁ ꢐꢜ ꢘꢝꢀ ꢞꢒ ꢝꢀ ꢘꢝ ꢀ
ꢒꢘ ꢙ ꢛꢍꢀ ꢐ ꢒꢜ ꢍ ꢁ ꢍꢏ ꢘꢁ ꢐ ꢎꢐ ꢙ ꢛꢗ ꢟ ꢐ ꢀꢔ ꢗ ꢔꢝꢀ ꢚꢒ ꢟ ꢜ
SLOS245E − MARCH 2000 − REVISED JANUARY 2005
(1)
TLV2780 and TLV2781 AVAILABLE OPTIONS
PACKAGED DEVICES
SOT-23
V
max
IO
T
A
SMALL OUTLINE
PLASTIC DIP
(P)
AT 25°C
†
(D)
(DBV)‡
SYMBOL
TLV2780CD
TLV2781CD
TLV2780CDBV
TLV2781CDBV
VASC
VATC
—
—
0°C to 70°C
3000 µV
3000 µV
2000 µV
TLV2780ID
TLV2781ID
TLV2780IDBV
TLV2781IDBV
VASI
VATI
TLV2780IP
TLV2781IP
-40°C to 125°C
TLV2780AID
TLV2781AID
—
—
—
—
—
—
†
‡
This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2780CDR).
This package is only available taped and reeled. For standard quantities (3,000 pieces per reel), add an R suffix (i.e., TLV2780CDBVR). For
smaller quantities (250 pieces per mini-reel), add a T suffix to the part number (e.g. TLV2780CDBVT).
(1)
TLV2782 and TLV2783 AVAILABLE OPTIONS
PACKAGED DEVICES
MSOP
V
max
SMALL
OUTLINE
(D)
PLASTIC
DIP
PLASTIC
DIP
IO
T
A
†
AT 25°C
†
†
(DGK)
SYMBOL
(DGS)
SYMBOL
(N)
(P)
TLV2782CD
TLV2783CD
TLV2782CDGK
—
xxTIADL
—
—
—
—
—
—
—
0°C to 70°C
3000 µV
3000 µV
2000 µV
TLV2783CDGS
xxTIADN
TLV2782ID
TLV2783ID
TLV2782IDGK
—
xxTIADM
—
—
—
—
TLV2782IP
—
TLV2783IDGS
xxTIADO
TLV2783IN
−40°C to 125°C
TLV2782AID
TLV2783AID
—
—
—
—
—
—
—
—
—
—
—
—
†
This package is available taped and reeled. To order this packaging option, add an R suffix to the part number (e.g., TLV2782CDR).
(1)
TLV2784 and TLV2785 AVAILABLE OPTIONS
PACKAGED DEVICES
V
max
IO
†
T
A
SMALL OUTLINE
PLASTIC DIP
(N)
TSSOP
(PW)
AT 25°C
3000 µV
3000 µV
2000 µV
(D)
TLV2784CD
TLV2785CD
—
—
TLV2784CPW
TLV2785CPW
0°C to 70°C
TLV2784ID
TLV2785ID
TLV2784IN
TLV2785IN
TLV2784IPW
TLV2785IPW
−40°C to 125°C
TLV2784AID
TLV2785AID
—
—
TLV2784AIPW
TLV2785AIPW
†
This package is available taped and reeled. To order this packaging option, add an R suffix to the part number
(e.g., TLV2784CDR).
1. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website
at www.ti.com.
2
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ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢇ ꢀꢁꢂꢃ ꢄ ꢅ ꢈ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢃ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢉ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢊ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢋ ꢇ ꢀꢁꢂ ꢃꢄ ꢅꢌ ꢍ
ꢎꢍꢏꢐ ꢁꢑ ꢒ ꢎ ꢈ ꢓꢅ ꢂ ꢔꢐ ꢕꢔ ꢖꢗꢘꢙ ꢙꢚ ꢛꢍꢐ ꢁ ꢖꢀꢒ ꢖꢛꢍꢐ ꢁ ꢐꢜ ꢘꢝꢀ ꢞ ꢒ ꢝꢀ ꢘꢝ ꢀ
ꢒ ꢘꢙꢛ ꢍꢀ ꢐꢒ ꢜꢍꢁ ꢍꢏ ꢘꢁ ꢐꢎ ꢐꢙ ꢛꢗ ꢟ ꢐꢀ ꢔ ꢗꢔꢝ ꢀꢚ ꢒ ꢟꢜ
SLOS245E − MARCH 2000 − REVISED JANUARY 2005
TLV278x PACKAGE PINOUTS
TLV2780
D OR P PACKAGE
(TOP VIEW)
TLV2781
DBV PACKAGE
(TOP VIEW)
TLV2780
DBV PACKAGE
(TOP VIEW)
1
2
3
1
2
3
5
V
DD
6
5
4
V
DD
OUT
GND
OUT
GND
NC
IN−
SHDN
1
2
3
4
8
7
6
5
V
DD
SHDN
IN−
IN+
OUT
NC
GND
4
IN−
IN+
IN+
TLV2783
DGS PACKAGE
(TOP VIEW)
TLV2781
D OR P PACKAGE
(TOP VIEW)
TLV2782
D, DGK, OR P PACKAGE
(TOP VIEW)
1
1OUT
1IN−
1IN+
GND
1SHDN
V
DD
2OUT
2IN−
2IN+
10
NC
IN−
NC
1
2
3
4
8
7
6
5
1OUT
1IN−
1IN+
GND
V
DD
1
2
3
4
8
7
6
5
2
9
V
2OUT
2IN−
2IN+
DD
3
8
4
IN+
OUT
NC
7
GND
5
6
2SHDN
TLV2785
TLV2784
TLV2783
D, N, OR PW PACKAGE
D, N, OR PW PACKAGE
D OR N PACKAGE
(TOP VIEW)
(TOP VIEW)
(TOP VIEW)
1OUT
1IN−
1IN+
4OUT
4IN−
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1OUT
1IN−
1IN+
GND
NC
V
1
2
3
4
5
6
7
14
13
12
11
10
9
1OUT
1IN−
1IN+
1
2
3
4
5
6
7
14
13
12
11
10
9
4OUT
4IN−
4IN+
GND
3IN+
3IN−
3OUT
DD
2OUT
2IN−
2IN+
NC
4IN+
V
GND
DD
V
DD
2IN+
2IN−
3IN+
2IN+
2IN−
3IN−
1SHDN
NC
2SHDN
NC
2OUT
3OUT
3/4SHDN
8
8
2OUT
1/2SHDN
NC − No internal connection
3
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ꢀ ꢁꢂ ꢃ ꢄꢅ ꢆ ꢇ ꢀ ꢁꢂꢃ ꢄꢅ ꢈ ꢇ ꢀꢁꢂ ꢃ ꢄꢅ ꢃ ꢇ ꢀꢁꢂ ꢃ ꢄꢅ ꢉ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢊ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢋ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢌ ꢍ
ꢎꢍꢏ ꢐ ꢁꢑ ꢒꢎ ꢈ ꢓ ꢅ ꢂ ꢔꢐ ꢕ ꢔꢖꢗ ꢘꢙ ꢙ ꢚ ꢛꢍ ꢐ ꢁꢖꢀꢒ ꢖꢛꢍꢐ ꢁ ꢐꢜ ꢘꢝꢀ ꢞꢒ ꢝꢀ ꢘꢝ ꢀ
ꢒꢘ ꢙ ꢛꢍꢀ ꢐ ꢒꢜ ꢍ ꢁ ꢍꢏ ꢘꢁ ꢐ ꢎꢐ ꢙ ꢛꢗ ꢟ ꢐ ꢀꢔ ꢗ ꢔꢝꢀ ꢚꢒ ꢟ ꢜ
SLOS245E − MARCH 2000 − REVISED JANUARY 2005
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Differential input voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 V
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V
ID
DD
Input current, I (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10 mA
10 mA
I
Output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, T : C-suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
A
I-suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C
Maximum junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
J
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values, except differential voltages, are with respect to GND.
DISSIPATION RATING TABLE
Θ
Θ
T
≤ 25°C
T = 125°C
A
POWER RATING
JC
JA
A
PACKAGE
POWER RATING
(°C/W)
(°C/W)
D (8)
38.3
176
710 mW
142 mW
D (14)
D (16)
26.9
25.7
55
122.3
114.7
324.1
294.3
259.9
1022 mW
1090 mW
385 mW
425 mW
481 mW
204.4 mW
218 mW
77.1 mW
85 mW
DBV (5)
DBV (6)
DGK (8)
55
54.2
96.2 mW
DGS (10)
N (14, 16)
P (8)
54.1
32
257.7
78
485 mW
1600 mW
1200 mW
720 mW
774 mW
97 mW
320.5 mW
240.4 mW
144 mW
41
104
PW (14)
PW (16)
29.3
28.7
173.6
161.4
154.9 mW
recommended operating conditions
MIN
1.8
MAX
3.6
UNIT
Single supply
Split supply
Supply voltage, V
DD
V
V
0.9
1.8
Common-mode input voltage range, V
ICR
−0.2
0
V
+0.2
70
DD
C-suffix
I-suffix
Operating free-air temperature, T
°C
A
−40
125
V
V
< 2.7 V
0.75V
DD
DD
2
V
V
IH
‡
= 2.7 to 3.6 V
Shutdown on/off voltage level
V
DD
0.6
IL
‡
Relative to GND.
4
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ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢇ ꢀꢁꢂꢃ ꢄ ꢅ ꢈ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢃ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢉ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢊ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢋ ꢇ ꢀꢁꢂ ꢃꢄ ꢅꢌ ꢍ
ꢎꢍꢏꢐ ꢁꢑ ꢒ ꢎ ꢈ ꢓꢅ ꢂ ꢔꢐ ꢕꢔ ꢖꢗꢘꢙ ꢙꢚ ꢛꢍꢐ ꢁ ꢖꢀꢒ ꢖꢛꢍꢐ ꢁ ꢐꢜ ꢘꢝꢀ ꢞ ꢒ ꢝꢀ ꢘꢝ ꢀ
ꢒ ꢘꢙꢛ ꢍꢀ ꢐꢒ ꢜꢍꢁ ꢍꢏ ꢘꢁ ꢐꢎ ꢐꢙ ꢛꢗ ꢟ ꢐꢀ ꢔ ꢗꢔꢝ ꢀꢚ ꢒ ꢟꢜ
SLOS245E − MARCH 2000 − REVISED JANUARY 2005
electrical characteristics at specified free-air temperature, V
noted)
= 1.8 V, 2.7 V (unless otherwise
DD
dc performance
†
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
3000
4500
2000
3000
T
A
UNIT
25°C
Full range
25°C
250
TLV278x
V
IO
Input offset voltage
µV
V
R
= V /2,
DD
O
L
250
= 2 kΩ,
= 50 Ω
TLV278xA
Full range
R
S
Temperature coefficient of input offset
voltage
α
VIO
8
µV/°C
25°C
Full range
25°C
50
50
76
V
V
V
= 1.8 V
DD
DD
DD
V
R
= 0 to V
= 50 Ω
,
IC
S
DD
55
80
100
CMRR Common-mode rejection ratio
= 2.7 V/ 3.6 V
= 2.7 V/ 3.6 V
dB
Full range
25°C
50
70
V
R
= 1.2 V to V
= 50 Ω
,
IC
DD
Full range
25°C
70
S
200
50
600
V
V
= 1.8 V
DD
Full range
25°C
Large-signal differential voltage
amplification
R
V
= 2 kΩ,
L
A
VD
V/mV
= 1 V
200
70
1000
O(PP)
= 2.7 V/ 3.6 V
DD
Full range
†
Full range is 0°C to 70°C for the C-suffix and −40°C to 125°C for the I-suffix. If not specified, full range is −40°C to 125°C.
input characteristics
†
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
15
T
A
UNIT
25°C
Full range
Full range
25°C
2.5
TLV278xC
100
300
15
I
IO
I
IB
Input offset current
pA
V
R
= V /2,
DD
O
L
TLV278xI
= 2 kΩ,
= 50 Ω
2.5
R
S
TLV278xC
TLV278xI
Full range
Full range
25°C
100
300
Input bias current
pA
r
Differential input resistance
1000
19
GΩ
i(d)
C
Common-mode input capacitance
f = 1 kHz
25°C
pF
i(c)
†
Full range is 0°C to 70°C for the C-suffix and −40°C to 125°C for the I-suffix. If not specified, full range is −40°C to 125°C.
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ꢒꢘ ꢙ ꢛꢍꢀ ꢐ ꢒꢜ ꢍ ꢁ ꢍꢏ ꢘꢁ ꢐ ꢎꢐ ꢙ ꢛꢗ ꢟ ꢐ ꢀꢔ ꢗ ꢔꢝꢀ ꢚꢒ ꢟ ꢜ
SLOS245E − MARCH 2000 − REVISED JANUARY 2005
electrical characteristics at specified free-air temperature, V
noted) (continued)
= 1.8 V, 2.7 V (unless otherwise
DD
output characteristics
†
PARAMETER
TEST CONDITIONS
MIN
1.7
TYP
MAX
T
A
UNIT
25°C
Full range
25°C
1.77
V
DD
= 1.8 V
1.63
2.6
2.68
I
= −1 mA
OH
OH
V
V
= 2.7 V
= 3.6 V
DD
Full range
25°C
2.6
3.58
1.55
DD
V
OH
High-level output voltage
V
25°C
1.5
1.46
2.5
V
DD
= 1.8 V
Full range
25°C
2.55
3.55
I
= −5 mA
V
V
= 2.7 V
= 3.6 V
DD
Full range
25°C
2.45
DD
25°C
70
80
I
I
= 1 mA
= 5 mA
OL
Full range
25°C
180
120
240
290
170
200
V
OL
Low-level output voltage
V
V
= 1.8 V
= 2.7 V
mV
DD
Full range
25°C
OL
DD
Full range
Positive rail
Negative rail
Positive rail
Negative rail
10
15
17
23
13
35
21
45
V
= 1.8 V,
DD
VO = 0.5 V from
I
I
Output current
25°C
mA
mA
O
V
DD
= 2.7 V,
VO = 0.5 V from
V
DD
V
DD
V
DD
V
DD
= 1.8 V
= 2.7 V
= 1.8 V
= 2.7 V
Sourcing
Short-circuit output current
25°C
OS
Sinking
†
Full range is 0°C to 70°C for the C-suffix and −40°C to 125°C for the I-suffix. If not specified, full range is −40°C to 125°C.
power supply
†
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
770
T
A
UNIT
25°C
Full range
25°C
650
SHDN = V
No load,
I
Supply current (per channel)
V
= V /2,
µA
DD
DD
O
DD
820
60
58
75
70
65
60
75
90
80
V
DD
V
IC
= 1.8 V to 2.7 V,
= V
/2
Full range
25°C
DD
Supply voltage rejection ratio
V
DD
V
IC
= 2.7 V to 3.6 V,
No load,
No load,
k
dB
SVR
(∆V
DD
/∆V
IO
)
= V
/2
Full range
25°C
DD
V
V
= 1.8 V to 3.6 V,
DD
IC
= V
/2
Full range
DD
†
Full range is 0°C to 70°C for the C-suffix and −40°C to 125°C for the I-suffix. If not specified, full range is −40°C to 125°C.
6
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ꢒ ꢘꢙꢛ ꢍꢀ ꢐꢒ ꢜꢍꢁ ꢍꢏ ꢘꢁ ꢐꢎ ꢐꢙ ꢛꢗ ꢟ ꢐꢀ ꢔ ꢗꢔꢝ ꢀꢚ ꢒ ꢟꢜ
SLOS245E − MARCH 2000 − REVISED JANUARY 2005
electrical characteristics at specified free-air temperature, V
noted) (continued)
= 1.8 V, 2.7 V (unless otherwise
DD
dynamic performance
†
PARAMETER
TEST CONDITIONS
MIN
TYP
8
MAX
UNIT
T
A
UGBW
SR+
Unity gain bandwidth
25°C
25°C
MHz
R
= 2 kΩ,
C
= 25 pF
L
L
3.3
3.1
3.8
3.5
4
4.3
V
V
V
V
V
V
= 1.8 V
= 2.7 V
= 3.6 V
= 1.8 V
= 2.7 V
= 3.6 V
= 25 pF
DD
Full range
25°C
V
R
C
= 1 V,
= 2 kΩ,
= 50 pF
O(PP)
4.8
5
Positive slew rate at unity gain
L
L
DD
DD
DD
DD
DD
Full range
25°C
Full range
25°C
3.6
2.1
1.89
2.2
1.97
3.5
3.4
V/µs
2.8
2.8
4.2
Full range
25°C
V
R
C
= 1 V,
= 2 kΩ,
= 50 pF
O(PP)
SR−
Negative slew rate at unity gain
L
L
Full range
25°C
Full range
φ
m
Phase margin
Gain margin
58°
25°C
R
= 2 kΩ,
C
L
L
8
dB
V
V
= 1.8 V,
DD
0.1%
1.7
2.8
1.7
2.4
= 1 V,
(STEP)PP
= −1,
A
V
0.01%
0.1%
C
= 10 pF, R = 2 kΩ
L
L
t
s
Settling time
25°C
µs
V
V
= 2.7 V,
DD
(STEP)PP
= 1 V,
= −1,
= 10 pF, R = 2 kΩ
L
A
V
0.01%
C
L
†
Full range is 0°C to 70°C for the C-suffix and −40°C to 125°C for the I-suffix. If not specified, full range is −40°C to 125°C.
noise/distortion performance
PARAMETER
TEST CONDITIONS
MIN
TYP
0.055%
0.08%
0.45%
18
MAX
T
UNIT
A
A
= 1
V
V
R
= V /2,
DD
O(PP)
A
V
= 10
= 100
= 2 kΩ,
THD + N
Total harmonic distortion plus noise
L
f = 10 kHz
A
V
25°C
f = 1 kHz
f = 10 kHz
f = 1 kHz
nV/√Hz
fA/√Hz
V
I
Equivalent input noise voltage
Equivalent input noise current
n
9
0.9
n
shutdown characteristics
†
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
1400
1700
T
UNIT
A
25°C
900
Supply current, per channel in shutdown mode
(TLV2780, TLV2783, TLV2785)
SHDN = 0 V
I
nA
DD(SHDN)
Full range
‡
t
t
Amplifier turnon time
R
R
= 2 kΩ
= 2 kΩ
800
200
(on)
L
L
25°C
ns
‡
Amplifier turnoff time
(off)
†
‡
Full range is 0°C to 70°C for the C-suffix and −40°C to 125°C for the I-suffix. If not specified, full range is −40°C to 125°C.
Disable time and enable time are defined as the interval between application of the logic signal to SHDN and the point at which the supply current
has reached half its final value.
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SLOS245E − MARCH 2000 − REVISED JANUARY 2005
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
1, 2
3
V
Input offset voltage
vs Common-mode input voltage
vs Frequency
IO
CMRR
Common-mode rejection ratio
High-level output voltage
Low-level output voltage
Maximum peak-to-peak output voltage
Output impedance
V
V
V
vs High-level output current
vs Low-level output current
vs Frequency
4, 6
5, 7
8
OH
OL
O(PP)
o
Z
vs Frequency
9
I
I
Supply current
vs Supply voltage
vs Free-air temperature
vs Frequency
10
DD
Supply current
11
DD
PSRR
Power supply rejection ratio
Differential voltage amplification & phase
Gain-bandwidth product
12
A
vs Frequency
13
VD
vs Free-air temperature
vs Supply voltage
vs Free-air temperature
vs Load capacitance
vs Frequency
14
15
SR
Slew rate
16, 17
18
φ
Phase margin
m
V
Equivalent input noise voltage
Voltage-follower large-signal pulse response
Voltage-follower small-signal pulse response
Inverting large-signal pulse response
Inverting small-signal pulse response
Crosstalk
19
n
vs Time
20
vs Time
21
vs Time
22
vs Time
23
vs Frequency
24
Shutdown forward & reverse isolation
Shutdown supply current
vs Frequency
25
I
I
I
vs Free-air temperature
vs Supply voltage
vs Time
26
DD(SHDN)
DD(SHDN)
DD(SHDN)
Shutdown supply current
27
Shutdown supply current/output voltage
28
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ꢒ ꢘꢙꢛ ꢍꢀ ꢐꢒ ꢜꢍꢁ ꢍꢏ ꢘꢁ ꢐꢎ ꢐꢙ ꢛꢗ ꢟ ꢐꢀ ꢔ ꢗꢔꢝ ꢀꢚ ꢒ ꢟꢜ
SLOS245E − MARCH 2000 − REVISED JANUARY 2005
TYPICAL CHARACTERISTICS
INPUT OFFSET VOLTAGE
vs
INPUT OFFSET VOLTAGE
vs
COMMON-MODE REJECTION RATIO
vs
COMMON-MODE INPUT VOLTAGE
COMMON-MODE INPUT VOLTAGE
FREQUENCY
400
140
100
V
=1.8 V
V
=2.7 V
DD
=25° C
DD
130
120
110
100
90
V
= 3.6 V
DD
50
200
T
T
A
=25 °C
A
0
0
V
= 2.7 V
= 1.8 V
DD
−50
−100
−150
−200
−250
−300
−350
−400
−200
80
70
V
DD
−400
−600
60
50
40
30
−800
20
10
−1000
0
−0.2
0
0.2 0.4 0.6 0.8
1 1.2 1.4 1.6 1.8 2
−0.2 0.2 0.6
1
1.4 1.8 2.2 2.6
3
0
10
100
1k 10k 100k 1M 10M
V
− Common-Mode Input Voltage − V
V
− Common-Mode Input Voltage − V
f − Frequency − Hz
ICR
ICR
Figure 2
Figure 1
Figure 3
HIGH-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT CURRENT
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
2.7
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
V
= 2.7 V
V
=1.8 V
DD
DD
V
=1.8 V
2.4
2.1
1.8
1.5
1.2
0.9
0.6
0.3
0
DD
T
=125°C
A
T
=70°C
A
T
= 125°C
= 70°C
A
T
=125°C
=70°C
A
T
A
=25°C
T
A
T
A
T
A
=0°C
T
A
=−40°C
T
T
= 25°C
= 0°C
A
A
T
T
=25°C
=0°C
A
A
T
= −40°C
A
T
A
=−40°C
0
5
10 15 20 25 30 35 40
0
2
4 6 8 10 12 14 16 18 20 22 24 26 28
0
2
4
6
8
10 12 14 16
I
− Low-Level Output Current − mA
I
− High-Level Output Current − mA
I
− High-Level Output Current − mA
OL
OH
OH
Figure 5
Figure 4
Figure 6
MAXIMUM PEAK-TO-PEAK
OUTPUT VOLTAGE
vs
OUTPUT IMPEDANCE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
FREQUENCY
LOW-LEVEL OUTPUT CURRENT
FREQUENCY
2.7
2.4
2.1
1.8
1.5
1.2
0.9
0.6
0.3
0.0
100
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
V
T
A
= 2.7 V
= 25° C
V
= 2.7 V
DD
DD
V
= 2.7 V
O(PP)
T
=125°C
= 70°C
A
T
T
10
A
=25°C
A
T
A
=0°C
V
= 1.8 V
O(PP)
T
=−40°C
A
A
V
= 10
= 1
1
A
= −10
R =2 kΩ
A
V
L
L
V
C
T
A
= 10 pF
= 25° C
0.1
100
0
5
10 15 20 25 30 35 40 45 50 55
− Low-Level Output Current − mA
Figure 7
100
1 k
10 k
100 k
1 M
10 M
1k
10k
100k
1M
10M
I
f − Frequency − Hz
OL
f − Frequency − Hz
Figure 8
Figure 9
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ꢒꢘ ꢙ ꢛꢍꢀ ꢐ ꢒꢜ ꢍ ꢁ ꢍꢏ ꢘꢁ ꢐ ꢎꢐ ꢙ ꢛꢗ ꢟ ꢐ ꢀꢔ ꢗ ꢔꢝꢀ ꢚꢒ ꢟ ꢜ
SLOS245E − MARCH 2000 − REVISED JANUARY 2005
TYPICAL CHARACTERISTICS
SUPPLY CURRENT
vs
POWER SUPPLY REJECTION RATIO
SUPPLY CURRENT
vs
vs
FREE-AIR TEMPERATURE
FREQUENCY
SUPPLY VOLTAGE
700
1.4
120
100
80
60
40
20
0
V
T
=2.7 V
DD
=25°C
V
= 3.6 V
A
1.35
1.3
DD
600
T
= 125°C
A
500
400
300
200
100
0
T
= −40°C
A
1.25
1.2
V
= 2.7 V
DD
T
= 25°C
A
V
= 1.8 V
DD
1.15
1.1
A
V
= 1
V
= V /2
IC
DD
A
V
= 1
V
1.05
= V
V
DD/2
IC
1
0
0.6
1.2
1.8
2.4
3
3.6
10
100
1 k
10 k 100 k 1 M
10 M
−40 −25−10
5 20 35 50 65 80 95 110 125
T
− Free-Air Temperature − °C
V
− Supply Voltage − V
f − Frequency − Hz
A
DD
Figure 10
Figure 11
Figure 12
GAIN-BANDWIDTH PRODUCT
vs
DIFFERENTIAL VOLTAGE AMPLIFICATION AND PHASE
vs
FREE-AIR TEMPERATURE
FREQUENCY
9
8
7
6
5
4
3
2
1
0
80
70
240
210
180
150
120
90
V
= 1.8 V & 2.7 V
DD
R = 2 kΩ
V
= 1.8 V
DD
L
60
50
40
30
20
10
C
= 10 pF
L
T
A
= 25° C
Phase
60
V
= 2.7 V
DD
30
Gain
1 M
0
0
−10
−20
−30
−30
−60
R
C
= 2 kΩ
= 10 pF
L
L
f = 10 kHz
−90
−120
−40
−40 −25 −10
5 20 35 50 65 80 95 110 125
1 k
10 k
100 k
10 M
T
− Free-Air Temperature − °C
A
f − Frequency − Hz
Figure 13
Figure 14
SLEW RATE
vs
SLEW RATE
SLEW RATE
vs
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
6
5
4
3
2
1
0
8
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
SR+
SR+
SR−
SR+
SR−
SR−
A
V
= 1
V
A
= 2.7 V
= 1
R
C
V
= 2 kΩ
=10 pF
= 1 V
DD
V
L
L
O
IC
V
A
= 1.8 V
L
L
O
DD
= 1
V
R = 2 kΩ
C
V
R =2 kΩ
PP
DD
L
= 10 pF
= 1 V
V
T
= V /2
= 25° C
C =10 pF
IC
A
L
IC
PP
V
= V /2
V
= V /2
DD
DD
−40−25−10
5 20 35 50 65 80 95 110 125
1.8
2
2.2 2.4 2.6 2.8
3
3.2 3.4 3.6
−40 −25 −10
5 20 35 50 65 80 95 110 125
V
− Supply Voltage − V
T
− Free-Air Temperature − °C
A
DD
T
− Free-Air Temperature − °C
A
Figure 15
Figure 16
Figure 17
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SLOS245E − MARCH 2000 − REVISED JANUARY 2005
TYPICAL CHARACTERISTICS
EQUIVALENT INPUT NOISE VOLTAGE
vs
PHASE MARGIN
vs
FREQUENCY
LOAD CAPACITANCE
140
100
90
80
70
60
50
40
30
20
10
0
T
= 25°C
A
120
100
80
60
40
20
0
V
= 2.7 V
DD
Rnull=50 Ω
Rnull=20 Ω
V
= 2.7 V
= 2 kΩ
DD
R
L
V
A
A
T
= 1
= 25°C
V
= 1.8 V
100
DD
Rnull=0 Ω
10
1 k
10 k
100 k
10
100
1 k
10 k
f − Frequency − Hz
C
− Load Capacitance − pF
L
Figure 18
Figure 19
VOLTAGE-FOLLOWER SMALL-SIGNAL PULSE RESPONSE
vs
VOLTAGE-FOLLOWER LARGE-SIGNAL PULSE RESPONSE
vs
TIME
TIME
1.45
2.5
V
I
2
1.40
1.35
1.30
1.25
1.5
1
V
I
0.5
V
2.5
2
O
1.40
1.35
1.30
1.25
V = 2.7 V
DD
R
C
A
V
R
C
= 2.7 V
= 2 kΩ
= 10 pF
DD
L
L
1.5
V
O
= 2 kΩ
= 10 pF
= 1
L
L
V
1
A
T
A
= 1
= 25°C
V
0.5
T = 25°C
A
0
0
0.2 0.4 0.6 0.8
1
1.2 1.4
0
0.2 0.4 0.6 0.8
1 1.2 1.4 1.6 1.8
t − Time − µs
t − Time − µs
Figure 20
Figure 21
INVERTING LARGE-SIGNAL PULSE RESPONSE
vs
INVERTING SMALL-SIGNAL PULSE RESPONSE
vs
TIME
TIME
0.10
1
0.5
0.05
0
V
I
0
V
I
−0.5
−1
−0.05
2.5
V
= 2.7 V
DD
1.40
1.35
1.30
1.25
R
C
A
= 2 kΩ
= 10 pF
= −1
= 25°C
V
= 2.7 V
= 2 kΩ
= 10 pF
= −1
L
L
V
DD
L
L
2
R
C
A
1.5
T
A
V
T
A
1
0.5
0
= 25°C
V
O
V
O
0
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 3.3
0
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3
t − Time − µs
t − Time − µs
Figure 22
Figure 23
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ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢆ
ꢇ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢈ
ꢇ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢃ
ꢇ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢉ
ꢇ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
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ꢊ
ꢇ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢋ
ꢇ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢌ
ꢍ
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SLOS245E − MARCH 2000 − REVISED JANUARY 2005
TYPICAL CHARACTERISTICS
SHUTDOWN FORWARD
AND REVERSE ISOLATION
vs
SHUTDOWN SUPPLY CURRENT
vs
CROSSTALK
vs
FREE-AIR TEMPERATURE
FREQUENCY
FREQUENCY
3
140
0
Shutdown = 0V
V
A
V
= V /2
= 1
IC
DD
120
100
80
60
40
20
0
2.5
−20
Forward and Reverse Isolation
Crosstalk in Shutdown
−40
2.0
1.5
1
−60
−80
V
V
A
= 1.8 V & 2.7 V
DD
IC
V
V
= 3.6 V
DD
= 60% of V
= 1
DD
R = 2 kΩ
V
V
R
= 1.8 & 2.7 V
L
DD
= V
T
= 25°C
A
/2
IC
DD
All Channels
−100
−120
−140
= 2 kΩ
C = 10 pF
V
= 2.7 V
DD
L
0.5
0
L
A
= 1
V
T
A
V
= 1.8 V
= 25°C
DD
Crosstalk/No Shutdown
−40 −25 −10
5 20 35 50 65 80 95 110 125
10
100
1 k
10 k 100 k 1 M
10 M
10
100
1 k
10 k
100 k
T
− Free-Air Temperature − °C
A
f − Frequency − Hz
f − Frequency − Hz
Figure 24
Figure 25
Figure 26
SHUTDOWN SUPPLY CURRENT / OUTPUT VOLTAGE
vs
TIME
3.0
2.5
2.0
1.5
SHUTDOWN SUPPLY CURRENT
vs
1.0
0.5
0.0
SUPPLY VOLTAGE
SD
2.6
2.4
2.2
2
Shutdown = 0 V
V
A
V
= V /2
DD
IC
= 1
1.5
1.3
1.0
0.8
0.5
0.3
0.0
1.8
1.6
1.4
1.2
1
T
= 125°C
A
T
A
= −40°C
V
O
0.8
0.6
0.4
0.2
0
T
A
= 25°C
V
= 2.7 V
DD
= 1
0
0.4 0.8 1.2 1.6
2
2.4 2.8 3.2 3.6
1.8
1.5
1.3
1.0
0.8
0.5
0.3
0.0
A
V
V
− Supply Voltage − V
DD
R
C
= 10 kΩ
= 10 pF
L
L
Figure 27
V
T
A
= V /2
IC
DD
= 25° C
I
DD(SD)
−1
0
1
2
3
4
5
6
7
8
9
10
t − Time − µsec
Figure 28
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SLOS245E − MARCH 2000 − REVISED JANUARY 2005
PARAMETER MEASUREMENT INFORMATION
R
_
+
NULL
R
L
C
L
Figure 29
APPLICATION INFORMATION
driving a capacitive load
When the amplifier is configured in this manner, capacitive loading directly on the output will decrease the
device’s phase margin leading to high frequency ringing or oscillations. Therefore, for capacitive loads of greater
than 10 pF, it is recommended that a resistor be placed in series (R
shown in Figure 30.
) with the output of the amplifier, as
NULL
R
R
F
F
R
R
G
G
R
R
NULL
NULL
−
+
−
+
Input
Input
Output
Output
Snubber
C
R
C
R
C
L
L
L
L
(a)
(b)
Figure 30. Driving a Capacitive Load
offset voltage
The output offset voltage, (V ) is the sum of the input offset voltage (V ) and both input bias currents (I ) times
OO
IO
IB
the corresponding gains. The following schematic and formula can be used to calculate the output offset
voltage:
R
F
I
IB−
R
G
+
−
+
V
I
V
O
R
S
I
IB+
R
R
F
F
V
+ V
1 ) ǒ Ǔ " I
R
1 ) ǒ Ǔ " I
R
ǒ Ǔ ǒ Ǔ
OO
IO
IB)
S
IB–
F
R
R
G
G
Figure 31. Output Offset Voltage Model
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SLOS245E − MARCH 2000 − REVISED JANUARY 2005
APPLICATION INFORMATION
general configurations
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often
required. The simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier
(see Figure 32).
R
R
F
G
−
V
1
O
+
V
I
R1
V
C1
f
+
–3dB
2pR1C1
R
O
F
1
ǒ
Ǔ
+
ǒ
1 )
Ǔ
V
R
1 ) 2pfR1C1
I
G
Figure 32. Single-Pole Low-Pass Filter
If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this
task. For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth.
Failure to do this can result in phase shift of the amplifier.
C1
R1 = R2 = R
C1 = C2 = C
Q = Peaking Factor
(Butterworth Q = 0.707)
+
_
V
I
1
R1
R2
f
+
–3dB
2pRC
C2
R
F
1
R
=
G
R
F
2 −
)
R
(
Q
G
Figure 33. 2-Pole Low-Pass Sallen-Key Filter
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ꢎꢍꢏꢐ ꢁꢑ ꢒ ꢎ ꢈ ꢓꢅ ꢂ ꢔꢐ ꢕꢔ ꢖꢗꢘꢙ ꢙꢚ ꢛꢍꢐ ꢁ ꢖꢀꢒ ꢖꢛꢍꢐ ꢁ ꢐꢜ ꢘꢝꢀ ꢞ ꢒ ꢝꢀ ꢘꢝ ꢀ
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SLOS245E − MARCH 2000 − REVISED JANUARY 2005
APPLICATION INFORMATION
circuit layout considerations
To achieve the levels of high performance of the TLV278x, follow proper printed-circuit board design techniques.
A general set of guidelines is given in the following.
D
Ground planes − It is highly recommended that a ground plane be used on the board to provide all
components with a low inductive ground connection. However, in the areas of the amplifier inputs and
output, the ground plane can be removed to minimize the stray capacitance.
D
Proper power supply decoupling − Use a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramic
capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers
depending on the application, but a 0.1-µF ceramic capacitor should always be used on the supply terminal
of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible to the supply
terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less
effective. The designer should strive for distances of less than 0.1 inches between the device power
terminals and the ceramic capacitors.
D
D
Sockets − Sockets can be used but are not recommended. The additional lead inductance in the socket pins
will often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit board
is the best implementation.
Short trace runs/compact part placements − Optimum high performance is achieved when stray series
inductance has been minimized. To realize this, the circuit layout should be made as compact as possible,
thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of
the amplifier. Its length should be kept as short as possible. This will help to minimize stray capacitance at
the input of the amplifier.
D
Surface-mount passive components − Using surface-mount passive components is recommended for high
performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of
surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small
size of surface-mount components naturally leads to a more compact layout, thereby minimizing both stray
inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be
kept as short as possible.
shutdown function
Three members of the TLV278x family (TLV2780/3/5) have a shutdown terminal for conserving battery life in
portable applications. When the shutdown terminal is tied low, the supply current is reduced to 900 nA/channel,
the amplifier is disabled, and the outputs are placed in a high impedance mode. To enable the amplifier, the
shutdown terminal can either be left floating or pulled high. When the shutdown terminal is left floating, care
should be taken to ensure that parasitic leakage current at the shutdown terminal does not inadvertently place
the operational amplifier into shutdown.
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ꢒꢘ ꢙ ꢛꢍꢀ ꢐ ꢒꢜ ꢍ ꢁ ꢍꢏ ꢘꢁ ꢐ ꢎꢐ ꢙ ꢛꢗ ꢟ ꢐ ꢀꢔ ꢗ ꢔꢝꢀ ꢚꢒ ꢟ ꢜ
SLOS245E − MARCH 2000 − REVISED JANUARY 2005
APPLICATION INFORMATION
general power dissipation considerations
For a given θ , the maximum power dissipation is shown in Figure 34 and is calculated by the following formula:
JA
T
–T
MAX
A
P
+
ǒ Ǔ
D
q
JA
Where:
P
= Maximum power dissipation of TLV278x IC (watts)
= Absolute maximum junction temperature (150°C)
= Free-ambient air temperature (°C)
D
T
MAX
T
A
θ
= θ + θ
JA
JC CA
θ
θ
= Thermal coefficient from junction to case
JC
= Thermal coefficient from case to ambient air (°C/W)
CA
MAXIMUM POWER DISSIPATION
vs
FREE-AIR TEMPERATURE
2
T
= 150°C
PDIP Package
J
Low-K Test PCB
1.75
θ
= 104°C/W
JA
1.5
1.25
1
MSOP Package
Low-K Test PCB
SOIC Package
Low-K Test PCB
θ
= 260°C/W
JA
θ
= 176°C/W
JA
0.75
0.5
SOT-23 Package
Low-K Test PCB
0.25
0
θ
= 324°C/W
JA
−55−40 −25 −10
5
20 35 50 65 80 95 110 125
T
A
− Free-Air Temperature − °C
NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB.
Figure 34. Maximum Power Dissipation vs Free-Air Temperature
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ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢇ ꢀꢁꢂꢃ ꢄ ꢅ ꢈ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢃ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢉ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢊ ꢇ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢋ ꢇ ꢀꢁꢂ ꢃꢄ ꢅꢌ ꢍ
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ꢒ ꢘꢙꢛ ꢍꢀ ꢐꢒ ꢜꢍꢁ ꢍꢏ ꢘꢁ ꢐꢎ ꢐꢙ ꢛꢗ ꢟ ꢐꢀ ꢔ ꢗꢔꢝ ꢀꢚ ꢒ ꢟꢜ
SLOS245E − MARCH 2000 − REVISED JANUARY 2005
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using Microsim Parts Release 9.1, the model generation
software used with Microsim PSpice. The Boyle macromodel (see Note 2) and subcircuit in Figure 35 are
generated using TLV278x typical electrical and operating characteristics at T = 25°C. Using this information,
A
output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):
D
D
D
D
D
D
Maximum positive output voltage swing
Maximum negative output voltage swing
Slew rate
D
D
D
D
D
D
Unity-gain frequency
Common-mode rejection ratio
Phase margin
Quiescent power dissipation
Input bias current
DC output resistance
AC output resistance
Short-circuit output current limit
Open-loop voltage amplification
NOTE 2: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers,” IEEE Journal
of Solid-State Circuits, SC-9, 353 (1974).
3
99
V
DD
+
−
egnd
rd1
11
rd2
12
rss
ro2
css
fb
rp
c1
7
+
c2
vlim
−
8
1
2
+
−
r2
9
6
IN+
IN−
vc
D
S
D
S
+
vb
ga
G
G
−
ro1
gcm
ioff
53
OUT
dp
5
dlp
dln
91
90
92
10
−
+
−
+
−
iss
dc
vlp
hlim
vln
−
+
GND
+ 54
4
de
ve
* TLV2782_HVDD operational amplifier ”macromodel” subcircuit
* created using Model Editor release 9.1 on 03/3/00 at 9:47
* Model Editor is an OrCAD product.
*
ga
6
0
6
4
0
2
1
9
11 12 544.75E−6
10 99 1.1538E−9
dc 56.957E−6
vlim 1K
gcm
iss
0
10
90
11
12
6
hlim
j1
J2
r2
rd1
rd2
ro1
ro2
rp
rss
vb
vc
ve
vlim
vlp
vln
.model
.model dy
.model jx1
.model jx2
.ends
* connections: non−inverting input
10 jx1
*
| inverting input
| | positive power supply
| | | negative power supply
| | | | output
10 jx2
*
100.00E3
1.8357E3
1.8357E3
10
*
*
3
11
12
5
3
*
| | | | |
8
.subckt TLV2782_HVDD
*
1 2 3 4 5
7
99
4
10
3
2.1845E3
3.5114E6
dc 0
c1
11
6
12
49.58E−15
10
9
99
0
c2
7
10.200E−12
css
dc
de
dlp
dln
dp
egnd
fb
10
5
99
53
5
1.0000E−30
3
53
4
dc .81911
dc .81911
dc 0
dc 45.400
dc 45.400
dy
54
7
54
90
92
4
99
7
dy
8
91
90
3
dx
91
0
0
dx
92
dx
dx
D(Is=800.00E−18)
0
poly(2) (3,0) (4,0) 0 .5 .5
poly(5) vb vc ve vlp vln 0
41.096E6 −1E3 1E3 41E6
−41E6
D(Is=800.00E−18 Rs=1m Cjo=10p)
99
NJF(Is=500.00E−15 Beta=5.2102E−3 Vto=−1)
NJF(Is=500.00E−15 Beta=5.2102E−3 Vto=−1)
Figure 35. Boyle Macromodel and Subcircuit
PSpice and Parts are trademarks of MicroSim Corporation.
17
WWW.TI.COM
PACKAGE OPTION ADDENDUM
www.ti.com
22-Feb-2005
PACKAGING INFORMATION
Orderable Device
TLV2780AID
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
8
8
8
6
6
6
8
8
6
6
6
8
8
8
8
8
5
5
5
8
8
5
5
5
8
75
2500
75
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2780AIDR
TLV2780CD
SOIC
SOIC
D
D
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2780CDBVR
TLV2780CDBVT
TLV2780CDBVTG4
TLV2780CDR
TLV2780ID
SOT-23
SOT-23
SOT-23
SOIC
DBV
DBV
DBV
D
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
SOIC
D
75
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2780IDBVR
TLV2780IDBVRG4
TLV2780IDBVT
TLV2780IDR
SOT-23
SOT-23
SOT-23
SOIC
DBV
DBV
DBV
D
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2780IP
PDIP
P
50
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
TLV2781AID
SOIC
D
75
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2781AIDR
TLV2781CD
SOIC
D
2500
75
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
SOIC
D
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2781CDBVR
TLV2781CDBVRG4
TLV2781CDBVT
TLV2781CDR
TLV2781ID
SOT-23
SOT-23
SOT-23
SOIC
DBV
DBV
DBV
D
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
SOIC
D
75
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2781IDBVR
TLV2781IDBVRG4
TLV2781IDBVT
TLV2781IDR
SOT-23
SOT-23
SOT-23
SOIC
DBV
DBV
DBV
D
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
22-Feb-2005
Orderable Device
TLV2781IP
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
PDIP
P
8
8
8
8
50
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
TLV2782AID
TLV2782AIDR
TLV2782CD
SOIC
SOIC
SOIC
D
D
D
75
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
2500
75
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2782CDGK
TLV2782CDGKR
TLV2782CDR
ACTIVE
ACTIVE
ACTIVE
MSOP
MSOP
SOIC
DGK
DGK
D
8
8
8
80
None
None
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
2500
2500
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2782ID
ACTIVE
SOIC
D
8
75
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2782IDGK
TLV2782IDGKR
TLV2782IDR
ACTIVE
ACTIVE
ACTIVE
MSOP
MSOP
SOIC
DGK
DGK
D
8
8
8
80
None
None
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
2500
2500
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2782IP
TLV2783AID
TLV2783AIDR
TLV2783CD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PDIP
SOIC
SOIC
SOIC
P
D
D
D
8
50
50
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
14
14
14
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
2500
50
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2783CDGS
TLV2783CDGSR
TLV2783CDR
ACTIVE
ACTIVE
ACTIVE
MSOP
MSOP
SOIC
DGS
DGS
D
10
10
14
80
None
None
CU SNPB
CU SNPB
Level-1-220C-UNLIM
Level-1-220C-UNLIM
2500
2500
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2783ID
ACTIVE
SOIC
D
14
50
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2783IDGS
TLV2783IDGSR
TLV2783IDR
ACTIVE
ACTIVE
ACTIVE
MSOP
MSOP
SOIC
DGS
DGS
D
10
10
14
80
None
None
CU SNPB
CU SNPB
Level-1-220C-UNLIM
Level-1-220C-UNLIM
2500
2500
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2783IN
TLV2784AID
TLV2784AIDR
ACTIVE
ACTIVE
ACTIVE
PDIP
SOIC
SOIC
N
D
D
14
14
14
25
50
Pb-Free
(RoHS)
CU NIPD
Level-NC-NC-NC
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
2500
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2784AIPW
TLV2784AIPWR
TLV2784CD
ACTIVE
ACTIVE
ACTIVE
TSSOP
TSSOP
SOIC
PW
PW
D
14
14
14
90
2000
50
None
None
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2784CDR
TLV2784CPW
ACTIVE
ACTIVE
SOIC
D
14
14
2500
90
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TSSOP
PW
None
CU NIPDAU Level-1-220C-UNLIM
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
22-Feb-2005
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
TSSOP
SOIC
Drawing
TLV2784CPWR
TLV2784ID
ACTIVE
ACTIVE
PW
14
14
2000
50
None
CU NIPDAU Level-1-220C-UNLIM
D
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2784IDR
TLV2784IN
ACTIVE
ACTIVE
SOIC
PDIP
D
N
14
14
2500
25
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
Pb-Free
(RoHS)
CU NIPD
Level-NC-NC-NC
TLV2784IPW
TLV2784IPWR
TLV2785AID
ACTIVE
ACTIVE
ACTIVE
TSSOP
TSSOP
SOIC
PW
PW
D
14
14
16
90
2000
40
None
None
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2785AIDR
ACTIVE
SOIC
D
16
2500
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2785AIPW
TLV2785AIPWR
TLV2785CD
ACTIVE
ACTIVE
ACTIVE
TSSOP
TSSOP
SOIC
PW
PW
D
16
16
16
90
2000
40
None
None
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2785CDR
ACTIVE
SOIC
D
16
2500
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2785CPW
TLV2785CPWR
TLV2785ID
ACTIVE
ACTIVE
ACTIVE
TSSOP
TSSOP
SOIC
PW
PW
D
16
16
16
90
2000
40
None
None
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLV2785IDR
TLV2785IN
ACTIVE
ACTIVE
SOIC
PDIP
D
N
16
16
2500
25
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
TLV2785IPW
ACTIVE
ACTIVE
TSSOP
TSSOP
PW
PW
16
16
90
None
None
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
TLV2785IPWR
2000
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
22-Feb-2005
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 4
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.430 (10,92)
MAX
0.010 (0,25)
M
0.015 (0,38)
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process
in which TI products or services are used. Information published by TI regarding third-party products or services
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.
Use of such information may require a license from a third party under the patents or other intellectual property
of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for
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Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
product or service voids all express and any implied warranties for the associated TI product or service and
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Applications
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Amplifiers
amplifier.ti.com
www.ti.com/audio
Data Converters
dataconverter.ti.com
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www.ti.com/automotive
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dsp.ti.com
Broadband
Digital Control
Military
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/military
Interface
Logic
interface.ti.com
logic.ti.com
Power Mgmt
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power.ti.com
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www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
microcontroller.ti.com
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Video & Imaging
Wireless
www.ti.com/wireless
Mailing Address:
Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright 2005, Texas Instruments Incorporated
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