TLV27L1CDBVR [TI]
FAMILY OF MICROPOWER RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS; 系列微功耗轨到轨输出运算放大器
| 型号： | TLV27L1CDBVR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | FAMILY OF MICROPOWER RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS |
| 文件： | 总12页 (文件大小：273K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TLV27L1
TLV27L2
SLOS378A – SEPTEMBER 2001 – REVISED JULY 2003
FAMILY OF MICROPOWER RAIL-TO-RAIL OUTPUT
OPERATIONAL AMPLIFIERS
FEATURES
DESCRIPTION
D
D
D
D
D
D
D
D
BiMOS Rail-to-Rail Output
The TLV27Lx single supply operational amplifiers
Input Bias Current . . . 1 pA
provide rail-to-rail output capability. The TLV27Lx takes
the minimum operating supply voltage down to 2.7 V
over the extended industrial temperature range, while
adding the rail-to-rail output swing feature. The
TLV27Lx also provides 160-kHz bandwidth from only
7 µA. The maximum recommended supply voltage is
16 V, which allows the devices to be operated from
( 8-V supplies down to 1.35 V) two rechargeable cells.
High Wide Bandwidth . . . 160 kHz
High Slew Rate . . . 0.1 V/µs
Supply Current . . . 7 µA (per channel)
Input Noise Voltage . . . 89 nV/√Hz
Supply Voltage Range . . . 2.7 V to 16 V
Specified Temperature Range
– –40°C to 125°C . . . Industrial Grade
– 0°C to 70°C . . . Commercial Grade
Ultra-Small Packaging
– 5 Pin SOT-23 (TLV27L1)
The rail-to-rail outputs make the TLV27Lx good
upgrades for the TLC27Lx family—offering more
bandwidth at a lower quiescent current. The TLV27Lx
offset voltage is equal to that of the TLC27LxA variant.
Their cost effectiveness makes them a good alternative
to the TLC/V225x, where offset and noise are not of
premium importance.
D
APPLICATIONS
D
D
D
D
Portable Medical
The TLV27L1/2 are available in the commercial
temperature range to enable easy migration from the
equivalent TLC27Lx. The TLV27L1 is not available with
the power saving/performance boosting programmable
pin 8.
Power Monitoring
Low Power Security Detection Systems
Smoke Detectors
The TLV27L1 is available in the small SOT-23 package
—something the TLC27(L)1 was not—enabling
performance boosting in a smaller package. The
TLV27L2 is available in the 3mm x 5mm MSOP,
providing PCB area savings over the 8-pin SOIC and
8-pin TSSOP.
SELECTION GUIDE
V
[V]
I
/ch
V
ICR
[V]
V
[mV]
I
IB
[pA]
GBW
[MHz]
SLEW RATE
V , 1 kHz
n
[nV/√Hz]
S
Q
IO
DEVICE
[µA]
[V/µs]
TLV27Lx
TLV238x
TLC27Lx
OPAx349
OPAx347
TLC225x
2.7 to 16
2.7 to 16
4 to 16
11
–0.2 to V +1.2
5
60
0.18
0.18
0.06
0.06
0.03
0.02
0.01
0.02
89
S
10
–0.2 to V –0.2
4.5
60
90
S
17
–0.2 to V –1.5
10/5/2
10
60
0.085
0.070
0.35
68
S
1.8 to 5.5
2.3 to 5.5
2.7 to 16
2
–0.2 to V +0.2
10
300
60
S
34
–0.2 to V +0.2
6
10
S
62.5
0 to V –1.5
1.5/0.85
60
0.200
19
S
NOTE: All dc specs are maximums while ac specs are typicals.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 2001–2003, Texas Instruments Incorporated
1
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TLV27L1
TLV27L2
SLOS378A – SEPTEMBER 2001 – REVISED JULY 2003
PACKAGE/ORDERING INFORMATION
SPECIFIED
PACKAGE
CODE
PRODUCT
PACKAGE
SYMBOL
TEMPERATURE
RANGE
ORDER NUMBER TRANSPORT MEDIA
TLV27L1CD
TLV27L1CDR
TLV27L1CDBVR
TLV27L1CDBVT
TLV27L1ID
Tube
TLV27L1CD
TLV27L1CDBV
TLV27L1ID
SOIC-8
SOT-23
SOIC-8
SOT-23
SOIC-8
SOIC-8
D
27V1C
VBIC
Tape and Reel
0°C to 70°C
DBV
D
Tape and Reel
Tube
27V1I
VBII
TLV27L1IDR
TLV27L1IDBVR
TLV27L1IDBVT
TLV27L2CD
Tape and Reel
–40°C to 125°C
TLV27L1IDBV
TLV27L2CD
TLV27L2ID
DBV
D
Tape and Reel
Tube
27V2C
27V2I
0°C to 70°C
TLV27L2CDR
TLV27L2ID
Tape and Reel
Tube
D
–40°C to 125°C
TLV27L2IDR
Tape and Reel
†
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16.5 V
S
Input voltage, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
I
S
Output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
O
Differential input voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
ID
S
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Maximum junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
J
Operating free-air temperature range, T : C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
A
I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 125°C
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 125°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: Relative to GND pin.
DISSIPATION RATING TABLE
T ≤ 25°C
PACKAGE
θ
θ
JA
T = 85°C
A
JC
A
(°C/W)
38.3
55
(°C/W)
POWER RATING POWER RATING
D (8)
176
710 mW
385 mW
425 mW
370 mW
201 mW
221 mW
DBV (5)
DBV (6)
324.1
294.3
55
recommended operating conditions
MIN
1.35
2.7
MAX
8
UNIT
Dual supply
Supply voltage, (V )
S
V
V
Single supply
16
Input common-mode voltage range
–0.2 V –1.2
S
C-suffix
I-suffix
0
70
Operating free-air temperature, T
°C
A
–40
125
2
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TLV27L1
TLV27L2
SLOS378A – SEPTEMBER 2001 – REVISED JULY 2003
electrical characteristics at recommended operating conditions, V = 2.7 V, 5 V, and 10 V (unless
S
otherwise noted)
dc performance
†
PARAMETER
TEST CONDITIONS
T
A
MIN
TYP
MAX
UNIT
25°C
Full range
25°C
0.5
5
7
V
Input offset voltage
Offset voltage drift
mV
V
R
= V /2,
= 100 kΩ,
V
R
= V /2,
= 50 Ω
IO
IC
L
S
O
S
S
α
VIO
1.1
86
µV/°C
25°C
71
70
80
77
77
74
V
R
= 0 V to V –1.2 V,
= 50 Ω
S
IC
CMRR Common-mode rejection ratio
dB
dB
Full range
25°C
S
100
82
V
V
= 2.7 V,
5 V
S
Full range
25°C
Large-signal differential voltage
amplification
V
=V /2,
S
O(PP)
A
VD
R = 100 kΩ
L
=
5 V
S
Full range
†
Full range is –40°C to 125°C for I suffix.
input characteristics
PARAMETER
TEST CONDITIONS
T
MIN
TYP
MAX
60
UNIT
A
≤25°C
≤70°C
≤125°C
≤25°C
≤70°C
≤125°C
25°C
1
100
1000
60
I
I
Input offset current
pA
IO
IB
V
R
= V /2,
S
V
R
= V /2,
= 50 Ω
S
IC
L
O S
= 100 kΩ,
1
200
1000
Input bias current
pA
r
Differential input resistance
1000
8
GΩ
i(d)
C
Common-mode input capacitance
f = 1 kHz
25°C
pF
IC
power supply
†
PARAMETER
TEST CONDITIONS
T
A
MIN
TYP
MAX
11
UNIT
25°C
Full range
25°C
7
I
Q
Quiescent current (per channel)
V
= V /2
µA
S
O
16
74
70
82
V
V
= 2.7 V to 16 V,
= V /2 V
No load,
S
IC
PSRR
Power supply rejection ratio (∆V /∆V
IO
)
dB
S
Full range
S
†
Full range is –40°C to 125°C for I suffix.
3
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TLV27L1
TLV27L2
SLOS378A – SEPTEMBER 2001 – REVISED JULY 2003
electrical characteristics at recommended operating conditions, V = 2.7 V, 5 V, and 5 V (unless
S
otherwise noted) (continued)
output characteristics
†
PARAMETER
TEST CONDITIONS
T
A
MIN
200
220
120
200
120
150
800
900
400
500
TYP
MAX
UNIT
25°C
Full range
25°C
160
V
V
V
V
= 2.7 V
= 5 V
S
S
S
S
85
50
V
I
= V /2,
S
IC
OL
= 100 µA
Full range
25°C
V
O
Output voltage swing from rail
=
5 V
V
Full range
25°C
420
200
400
= 5 V
Full range
25°C
V
= V /2,
S
= 500 µA
IC
I
OL
V
V
=
5 V
S
Full range
25°C
I
O
Output current
V
O
= 0.5 V from rail
= 2.7 V
µA
S
†
Full range is –40°C to 125°C for I suffix.
dynamic performance
PARAMETER
Gain bandwidth product
TEST CONDITIONS
T
MIN
TYP
160
0.06
0.05
0.8
62
MAX
UNIT
A
GBP
SR
R
= 100 kΩ,
C
= 10 pF, f = 1 kHz
25°C
25°C
kHz
L
L
V
C
= 1 V,
R
= 100 kΩ,
L
O(pp)
–40°C
125°C
25°C
Slew rate at unity gain
V/µs
= 50 pF
L
φ
M
Phase margin
R
= 100 kΩ,
C = 50 pF
L
°
L
Rise
Fall
62
V
C
= 1 V, A = –1,
V
(STEP)pp
L
t
s
Settling time (0.1%)
25°C
µs
= 50 pF,
R = 100 kΩ
44
L
noise/distortion performance
PARAMETER
TEST CONDITIONS
T
MIN
TYP
89
MAX
UNIT
nV/√Hz
fA/√Hz
A
V
n
Equivalent input noise voltage
Equivalent input noise current
f = 1 kHz
f = 1 kHz
25°C
25°C
I
n
0.6
4
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TLV27L1
TLV27L2
SLOS378A – SEPTEMBER 2001 – REVISED JULY 2003
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
V
Input offset voltage
vs Common-mode input voltage
1, 2, 3
4
IO
/I
I
Input bias and offset current
High-level output voltage
Low-level output voltage
vs Free-air temperature
vs High-level output current
vs Low-level output current
vs Supply voltage
IB IO
V
5, 7, 9
6, 8, 10
11
OH
OL
V
I
Q
Quiescent current
vs Free-air temperature
12
Supply voltage and supply current ramp up
Differential voltage gain and phase shift
Gain-bandwidth product
13
A
vs Frequency
14
VD
GBP
vs Free-air temperature
vs Load capacitance
vs Frequency
15
φ
m
Phase margin
16
CMRR Common-mode rejection ratio
17
PSRR
Power supply rejection ratio
Input referred noise voltage
Slew rate
vs Frequency
18
vs Frequency
19
SR
vs Free-air temperature
vs Frequency
20
V
Peak-to-peak output voltage
Inverting small-signal response
Inverting large-signal response
Crosstalk
21
O(PP)
22
23
vs Frequency
24
INPUT OFFSET VOLTAGE
vs
INPUT OFFSET VOLTAGE
vs
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
COMMON-MODE INPUT VOLTAGE
COMMON-MODE INPUT VOLTAGE
2000
2000
2000
1500
1000
500
V
T
= 2.7 V
= 25°C
V
T
=
5 Vdc
V
T
= 2.7 V
= 25°C
S
A
S
A
S
A
1500
1500
= 25°C
1000
500
1000
500
0
0
–500
0
–500
–1000
–500
–1000
–1000
–1500
–2000
–1500
–2000
–1500
–2000
0
0.5
1
1.5
2
2.5
3
–5.2 –3.6
–2
–0.4
1.2
2.8
4.4
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
V
– Common-Mode Input Voltage – V
V
– Common-Mode Input Voltage – V
V
– Common-Mode Input Voltage – V
IC
IC
IC
Figure 2
Figure 3
Figure 1
5
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TLV27L1
TLV27L2
SLOS378A – SEPTEMBER 2001 – REVISED JULY 2003
TYPICAL CHARACTERISTICS
INPUT BIAS AND INPUT
OFFSET CURRENT
vs
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
FREE-AIR TEMPERATURE
5
5
4
3
100
V
= 5 V
V
= 5 V
S
S
V
V
V
= 5 V
= 2.5
= 2.5
4
3
S
90
125°C
–40°C
IC
O
80
70
60
50
40
30
20
10
0
0°C
25°C
25°C
2
1
2
1
70°C
25°C
0
–1
–2
0
–1
–2
–3
–4
–5
0°C
I
IB
125°C
–40°C
–3
I
IO
–4
–5
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
0
1
2 3 4 5 6 7 8 9 10 11 12 13 14 15
25
45
65
85
105
125
I – High-Level Output Current – mA
OH
I
– Low-Level Output Current – mA
T
A
– Free-Air Temperature – °C
OL
Figure 4
Figure 5
Figure 6
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
2.7
2.4
2.1
1.8
1.5
1.2
0.9
0.6
5
5
V
= 2.7 V
V = 5 V
S
S
V
= 5 V
S
4.5
4.5
4
–40°C
125°C
70°C
–40°C
4
0°C
0°C
3.5
3
3.5
25°C
70°C
25°C
25°C
0°C
3
70°C
2.5
2.5
2
1.5
1
2
1.5
1
125°C
125°C
–40°C
0.3
0
0.5
0.5
0
0
0
0.2
0.4 0.6
0.8
1
1.2 1.4
0
0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
I
– High-Level Output Current – mA
I
– Low-Level Output Current – mA
OH
I
– High-Level Output Current – mA
OL
OH
Figure 7
Figure 8
Figure 9
QUIESCENT CURRENT
vs
FREE-AIR TEMPERATURE
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
QUIESCENT CURRENT
vs
SUPPLY VOLTAGE
8
7
6
5
4
3
2
1
0
8
2.7
16 V
10 V
V
= 2.7 V
125°C
70°C
S
2.4
2.1
1.8
1.5
1.2
7
6
5 V
125°C
70°C
5
4
3
2
2.7 V
25°C
0°C
–40°C
25°C
0°C
0.9
0.6
0.3
0
–40°C
1
0
–40 –25 –10
5
20 35 50 65 80 95 110 125
0
0.2
0.4
0.6
0.8
1
1.2
1.4
0
2
4
6
8
10 12 14
16
T
A
– Free-Air Temperature – °C
I
– Low-Level Output Current – mA
V
– Supply Voltage – V
OL
S
Figure 10
Figure 11
Figure 12
6
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TLV27L1
TLV27L2
SLOS378A – SEPTEMBER 2001 – REVISED JULY 2003
TYPICAL CHARACTERISTICS
DIFFERENTIAL VOLTAGE GAIN
AND PHASE SHIFT
vs
SUPPLY VOLTAGE AND
FREQUENCY
SUPPLY CURRENT RAMP UP
40
15
120
100
80
V
= 5 V
S
V
S
R
C
T
= 100 kΩ
= 10 pF
= 25°C
L
L
A
10
5
0°
V
O
30°
0
V
R
C
= 0 to 15 V,
= 100 Ω,
= 10 pF,
= 25°C
S
L
L
60
60°
90°
40
T
A
15
10
I
Q
20
0
120°
150°
180°
5
0
–20
0
5
10
15
20
25
30
0.1
1
10
100
1 k 10 k 100 k 1 M
t – Time – ms
f – Frequency – Hz
Figure 14
Figure 13
COMMON-MODE REJECTION RATIO
vs
PHASE MARGIN
vs
LOAD CAPACITANCE
GAIN-BANDWIDTH PRODUCT
vs
FREE-AIR TEMPERATURE
FREQUENCY
120
80
170
160
V
R
T
A
= 5 V
= 100 kΩ
= 25°C
110
S
L
V
T
= 5 V
= 25°C
S
A
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
V
= 2.7 V
S
150
140
130
V
= 5 V
S
120
110
100
10
100
1 k
10 k
100 k
1 M
–40 –25 –10 5 20 35 50 65 80 95 110 125
10
100
1000
f – Frequency – Hz
C
– Load Capacitance – pF
T
A
– Free-Air Temperature – °C
L
Figure 15
Figure 16
Figure 17
SLEW RATE
vs
FREE-AIR TEMPERATURE
POWER SUPPLY REJECTION RATIO
INPUT REFERRED NOISE VOLTAGE
vs
vs
FREQUENCY
FREQUENCY
0.09
0.08
0.07
0.06
0.05
100
90
250
200
150
100
V
= 5 V,
S
V
= 2.5 V
= 25°C
S
SR+
G = 2,
= 100 kΩ
T
A
80
R
F
70
SR–
60
50
40
30
20
0.04
0.03
0.02
V = 5 V
S
Gain = 1
V
= 1
O
50
0
R
C
= 100 kΩ
= 50 pF
L
L
0.01
0
10
0
–40 –25 –10 5 20 35 50 65 80 95 110 125
10
100
1 k
10 k
100 k
1 M
1
10
100
1 k
10 k
100 k
T
A
– Free-air Temperature – °C
f – Frequency – Hz
f – Frequency – Hz
Figure 20
Figure 18
Figure 19
7
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TLV27L1
TLV27L2
SLOS378A – SEPTEMBER 2001 – REVISED JULY 2003
TYPICAL CHARACTERISTICS
PEAK-TO-PEAK OUTPUT VOLTAGE
vs
INVERTING SMALL-SIGNAL
RESPONSE
FREQUENCY
2
16
V = 3 V
I
PP
1.5
V
= 15 V
S
14
12
10
1
Gain = –1,
R
C
= 100 kΩ,
= 10 pF,
= 5 V,
L
L
0.5
R
C
= 100 kΩ,
= 10 pF,
THD+N <= 5%
L
L
V
V
S
O
0
–0.5
–1
= 3 V
,
PP
8
6
4
f = 1 kHz
V
= 5 V
S
V
–1.5
–2
V
= 3 V
PP
O
2
0
= 2.7 V
S
–100
0
100 200 300 400 500 600 700
10
100
1000
1 k
10 k
t – Time – µs
f – Frequency – Hz
Figure 22
Figure 21
CROSSTALK
vs
FREQUENCY
INVERTING LARGE-SIGNAL
RESPONSE
0.06
0.04
0.02
0
V
= 5 V
S
R
C
= 2 kΩ
= 10 pF
= 25°C
L
L
–20
V = 100 mV
I
PP
T
A
Gain = –1,
–40
–60
Channel 1 to 2
R
C
= 100 kΩ,
= 10 pF,
L
L
V
V
= 5 V,
= 100 mV
S
O
0
,
PP
–80
f = 1 kHz
–0.02
–0.04
–0.06
–100
–120
–140
V
= 100 mV
PP
O
–100
0
100 200 300 400 500 600 700
10
100
1 k
10 k
100 k
t – Time – µs
f – Frequency – Hz
Figure 23
Figure 24
8
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TLV27L1
TLV27L2
SLOS378A – SEPTEMBER 2001 – REVISED JULY 2003
APPLICATION INFORMATION
offset voltage
The output offset voltage (V ) is the sum of the input offset voltage (V ) and both input bias currents (I ) times the
OO
IO
IB
corresponding gains. The following schematic and formula can be used to calculate the output offset voltage:
R
F
I
IB–
R
G
+
–
+
R
R
F
F
V
I
V
+ V
1 ) ǒ Ǔ " I
R
1 ) ǒ Ǔ " I
R
V
O
ǒ Ǔ ǒ Ǔ
OO
IO
IB)
S
IB–
F
R
R
G
G
R
S
I
IB+
Figure 25. Output Offset Voltage Model
general configurations
When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is often required. The
simplest way to accomplish this is to place an RC filter at the noninverting terminal of the amplifier (see Figure 26).
R
R
F
G
V
R
R
O
F
1
ǒ
Ǔ
+
+
ǒ
1 )
Ǔ
V
1 ) sR1C1
I
G
V
DD
/2
–
1
V
O
f
+
–3dB
V
I
2pR1C1
R1
C1
Figure 26. Single-Pole Low-Pass Filter
If even more attenuation is needed, a multiple pole filter is required. The Sallen-Key filter can be used for this task.
For best results, the amplifier should have a bandwidth that is 8 to 10 times the filter frequency bandwidth. Failure
to do this can result in phase shift of the amplifier.
C1
R1 = R2 = R
C1 = C2 = C
Q = Peaking Factor
(Butterworth Q = 0.707)
+
_
V
I
1
R1
R2
f
+
–3dB
2pRC
C2
R
F
1
R
=
G
R
F
2 –
)
(
R
Q
G
V
DD
/2
Figure 27. 2-Pole Low-Pass Sallen-Key Filter
9
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TLV27L1
TLV27L2
SLOS378A – SEPTEMBER 2001 – REVISED JULY 2003
APPLICATION INFORMATION
circuit layout considerations
To achieve the levels of high performance of the TLV27Lx, follow proper printed-circuit board design techniques. A
general set of guidelines is given in the following.
D
Ground planes—It is highly recommended that a ground plane be used on the board to provide all
components with a low inductive ground connection. However, in the areas of the amplifier inputs and
output, the ground plane can be removed to minimize the stray capacitance.
D
Proper power supply decoupling—Use a 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramic
capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers
depending on the application, but a 0.1-µF ceramic capacitor should always be used on the supply terminal
of every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible to the supply
terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less
effective. The designer should strive for distances of less than 0.1 inches between the device power
terminals and the ceramic capacitors.
D
D
Sockets—Socketscanbeusedbutarenotrecommended. Theadditionalleadinductanceinthesocketpins
will often lead to stability problems. Surface-mount packages soldered directly to the printed-circuit board
is the best implementation.
Short trace runs/compact part placements—Optimum high performance is achieved when stray series
inductance has been minimized. To realize this, the circuit layout should be made as compact as possible,
thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting input of
the amplifier. Its length should be kept as short as possible. This will help to minimize stray capacitance at
the input of the amplifier.
D
Surface-mount passive components—Using surface-mount passive components is recommended for high
performance amplifier circuits for several reasons. First, because of the extremely low lead inductance of
surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small
size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray
inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be
kept as short as possible.
10
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TLV27L1
TLV27L2
SLOS378A – SEPTEMBER 2001 – REVISED JULY 2003
APPLICATION INFORMATION
general power dissipation considerations
For a given θ , the maximum power dissipation is shown in Figure 28 and is calculated by the following formula:
JA
T
–T
MAX
A
P
+
ǒ Ǔ
D
q
JA
Where:
P
= Maximum power dissipation of TLV27Lx IC (watts)
D
T
= Absolute maximum junction temperature (150°C)
= Free-ambient air temperature (°C)
MAX
T
A
θ
= θ + θ
JA
JC CA
θ
θ
= Thermal coefficient from junction to case
JC
= Thermal coefficient from case to ambient air (°C/W)
CA
MAXIMUM POWER DISSIPATION
vs
FREE-AIR TEMPERATURE
2
T
= 150°C
PDIP Package
J
Low-K Test PCB
1.75
1.5
1.25
1
θ
= 104°C/W
JA
MSOP Package
Low-K Test PCB
SOIC Package
Low-K Test PCB
θ
= 260°C/W
JA
θ
= 176°C/W
JA
0.75
0.5
SOT-23 Package
Low-K Test PCB
0.25
0
θ
= 324°C/W
JA
–55–40 –25 –10
5
20 35 50 65 80 95 110 125
T
A
– Free-Air Temperature – °C
NOTE A: Results are with no air flow and using JEDEC Standard Low-K test PCB.
Figure 28. Maximum Power Dissipation vs Free-Air Temperature
TLV27L1
D PACKAGE
(TOP VIEW)
TLV27L2
D PACKAGE
(TOP VIEW)
TLV27L1
DBV PACKAGE
(TOP VIEW)
NC
IN–
NC
1OUT
1IN–
1IN+
GND
V
DD
1
2
3
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
5
4
V
DD
OUT
GND
V
2OUT
2IN–
2IN+
DD
IN+
OUT
NC
GND
IN–
IN+
NC – No internal connection
11
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