TMC57750PM [TI]
336- 】 244-pixel ccd image sensor; 336- 】 244像素的CCD图像传感器型号: | TMC57750PM |
厂家: | TEXAS INSTRUMENTS |
描述: | 336- 】 244-pixel ccd image sensor |
文件: | 总18页 (文件大小:243K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TC255P
336- × 244-PIXEL CCD IMAGE SENSOR
SOCS057 – JUNE 1996
DUAL-IN-LINE PACKAGE
(TOP VIEW)
• Medium-Resolution, Solid-State Image
Sensor for Low-Cost B/W TV Applications
• 324(H) x 243(V) Active Elements in Image
IAG2
ADB
ABG
IAG1
1
2
3
4
8
7
6
5
Sensing Area
• 10-µm Square Pixels
• Fast Clear Capability
• Electronic Shutter Function From
1/60–1/50000 s
• Low Dark Current
SUB
OUT
SAG
SRG
• Electron-Hole Recombination Antiblooming
• Dynamic Range . . . 66 dB Typical
• High Sensitivity
• High Blue Response
• 8-Pin Dual-In-Line Plastic Package
• 4-mm Image-Area Diagonal
• Solid-State Reliability With No Image
Burn-In, Residual Imaging, Image
Distortion, Image Lag, or Microphonics
• High Photoresponse Uniformity
description
The TC255P is a frame-transfer charge-coupled device (CCD) designed for use in B/W NTSC TV and special-
purpose applications where low cost and small size are desired.
The image-sensing area of the TC255P is configured in 243 lines with 336 elements in each line. Twelve
elements are provided in each line for dark reference. The blooming-protection feature of the sensor is based
on recombining excess charge with charge of opposite polarity in the substrate. This antiblooming is activated
by supplying clocking pulses to the antiblooming gate, which is an integral part of each image-sensing element.
The sensor can be operated in a noninterlace mode as a 324(H) by 243(V) sensor with low dark current. The
device can also be operated in an interlace mode, electronically displacing the image-sensing elements during
the charge integration in alternate fields, and effectively increasing the vertical resolution and minimizing
aliasing.
One important aspect of this image sensor is its high-speed image-transfer capability. This capability allows for
an electronic-shutter function comparable to interline-transfer and frame-interline-transfer sensors without the
loss of sensitivity and resolution inherent in those technologies.
The charge is converted to signal voltage with a 12-µV per electron conversion factor by a high-performance
charge-detection structure with built-in automatic reset and a voltage-reference generator. The signal is
buffered by a low-noise two-stage source-follower amplifier to provide high output-drive capability.
The TC255P uses TI-proprietary virtual-phase technology, which provides devices with high blue response, low
dark signal, high photoresponse uniformity, and single-phase clocking. The TC255P is characterized for
operation from –10°C to 45°C.
This MOS device contains limited built-in gate protection. During storage or handling, the device leads should be shorted together
or the device should be placed in conductive foam. In a circuit, unused inputs should always be connected to SUB. Under no
circumstances should pin voltages exceed absolute maximum ratings. Avoid shorting OUTn to ADB during operation to prevent
damage to the amplifier. The device can also be damaged if the output terminals are reverse-biased and an excessive current is
allowed to flow. Specific guidelines for handling devices of this type are contained in the publication Guidelines for Handling
Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies available from Texas Instruments.
Copyright 1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TC255P
336- × 244-PIXEL CCD IMAGE SENSOR
SOCS057 – JUNE 1996
functional block diagram
8
7
Image Area With
Blooming Protection
ABG
IAG1
1
Dark-Reference Elements
IAG2
2
ADB
Clear Line
6
5
Storage Area
SAG
SRG
2 Dummy
Elements
Amplifier
Serial Register
4
OUT
3
SUB
Clearing Drain
2-2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TC255P
336- × 244-PIXEL CCD IMAGE SENSOR
SOCS057 – JUNE 1996
sensor topology diagram
324 Active Pixels
12
Buffer Column
Effective-Imaging Area
243 Lines
1 Dark Line
1 Clear Line
244 Lines
Storage Area
336 Pixels
Dummy Pixels
2
12
324
1
Dummy Pixel
Optical
Black
Active Pixels
(OPB)
Terminal Functions
TERMINAL
NAME NO.
I/O
DESCRIPTION
ABG
ADB
SUB
IAG1
IAG2
OUT
SAG
SRG
8
2
3
7
1
4
6
5
I
I
Antiblooming gate
Supply voltage for amplifier-drain bias
Substrate
I
I
Image-area gate 1
Image-area gate 2
Output
O
I
Storage-area gate
Serial-register gate
I
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TC255P
336- × 244-PIXEL CCD IMAGE SENSOR
SOCS057 – JUNE 1996
detailed description
The TC255P consists of five basic functional blocks: 1) the image-sensing area, 2) the image-clear line, 3) the
image-storage area, 4) the serial register, and 5) the charge-detection node and output amplifier.
image-sensing area
Cross sections with potential-well diagrams and top views of image-sensing and storage-area elements are
shown in Figure 1 and Figure 2. As light enters the silicon in the image-sensing area, free electrons are
generated and collected in the potential wells of the sensing elements. During this time, the antiblooming gate
is activated by the application of a burst of pulses every horizontal-blanking interval. This prevents blooming
caused by the spilling of charge from overexposed elements into neighboring elements. To generate the dark
referencethatisnecessaryinsubsequentvideo-processingcircuitsforrestorationofthevideo-blacklevel, there
are 12 columns of elements on the left edge of the image-sensing area shielded from light. There is also one
column of elements on the right side of the image-sensing area and one line between the image-sensing area
and the image-clear line.
10 µm
Light
Clocked Barrier
IAG
ABG
Virtual Barrier
Antiblooming
Clocking Levels
10 µm
Antiblooming Gate
Virtual Well
Clocked Well
Accumulated Charge
Figure 1. Charge-Accumulation Process
SAG
Clocked Phase
Virtual Phase
Channel Stops
Figure 2. Charge-Transfer Process
image-clear line
During start-up or electronic-shutter operations, it is necessary to clear the image area of charge without
transferring it to the storage area. In such situations, the two image-area gates are clocked 244 times without
clocking the storage-area gate. The charge in the image area is then cleared through the image-clear line.
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TC255P
336- × 244-PIXEL CCD IMAGE SENSOR
SOCS057 – JUNE 1996
image-storage area
After exposure, the image-area charge packets are transferred through the image-clear line to the storage area.
The stored charge is then transferred line by line into the serial register for readout. Figure 3 illustrates the timing
to (1) transfer the image to the storage area and (2) to transfer each line from the storage area to the serial
register.
serial register
After each line is clocked into the serial register, it is read out pixel by pixel. Figure 3 illustrates the serial-register
clock sequence.
244 Cycles
Composite
Blank
Integration Time
ABG
Electronic
Shutter
Operation
244 Clocks
244 Clocks
IAG1
IAG2
SAG
SRG
339 Cycles
t = 80 ns
SAG
SRG
IAG1
IAG2
1)
2)
3)
1) End of serial readout of line
2) Transfer of new line to serial register
3) Beginning of readout of new line
SAG
SRG
Expanded Section of Parallel Transfer
Figure 3. Timing Diagram
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TC255P
336- × 244-PIXEL CCD IMAGE SENSOR
SOCS057 – JUNE 1996
charge-detection node and output amplifier
The buffer amplifier converts charge into a video signal. Figure 4 shows the circuit diagram of the
charge-detection node and output amplifier. As charge is transferred into the detection node, the potential of
this node changes in proportion to the amount of signal received. This change is sensed by an MOS transistor
and, after proper buffering, the signal is supplied to the output terminal of the image sensor. After the potential
change is sensed, the node is reset to a reference voltage supplied by an on-chip reference generator. The reset
is accomplished by a reset gate that is connected internally to the serial register. The detection node and buffer
amplifier are located a short distance from the edge of the storage area; therefore, two dummy cells are used
to span this distance.
Reference
Generator
Q0
ADB
Q2
Q1
Q3
QR
Q5
SRG
Detection
Node
V
O
Q4
Q6
Figure 4. Buffer Amplifier and Charge-Detection Node
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TC255P
336- × 244-PIXEL CCD IMAGE SENSOR
SOCS057 – JUNE 1996
spurious-nonuniformity specification
The spurious-nonuniformity specification of the TC255P is based on several sensor characteristics:
•
•
Amplitude of the nonuniform pixel
Polarity of the nonuniform pixel
–
–
Black
White
•
Column amplitude
The CCD sensor is characterized in both an illuminated condition and a dark condition. In the dark condition,
the nonuniformity is specified in terms of absolute amplitude as shown in Figure 5. In the illuminated condition,
the nonuniformity is specified as a percentage of the total illumination as shown in Figure 6.
The specification for the TC255P is as follows:
†
WHITE SPOT
(DARK)
WHITE SPOT
(ILLUMINATED)
COLUMN
(DARK)
COLUMN
(ILLUMINATED)
BLACK SPOT
(ILLUMINATED)
WHITE/BLACK
PAIR
x < 15 mV
x < 15%
x < 0.5 mV
x < 1 mV
x < 15%
x < 9mV
†
A white/black pair nonuniformity will be no more than 2 pixels even for integration times of 1/60 second.
The conditions under which this specification is defined are as follows:
•
The integration time is 1/60 second except for illuminated white spots, illuminated black spots and
white/black pair nonuniformities; in these three cases, the integration time is 1/240 second.
•
•
The temperature is 45°C.
The CCD video-output signal is 60 mV ± 10 mV.
mV
%
Amplitude
% of Total
Illumination
t
t
Figure 5. Pixel Nonuniformity,
Dark Condition
Figure 6. Pixel Nonuniformity,
Illuminated Condition
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TC255P
336- × 244-PIXEL CCD IMAGE SENSOR
SOCS057 – JUNE 1996
†
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage range, V : ADB (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 15 V
CC
Input voltage range, V : ABG, IAG1, IAG2, SAG, SRG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –15 V to 15 V
I
Operating free-air temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –10°C to 45°C
A
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30°C to 85°C
STG
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltages are with respect to the substrate terminal.
recommended operating conditions
MIN NOM
MAX
UNIT
V
Supply voltage, V
CC
Substrate bias voltage
ADB
11
12
0
13
V
High level
Low level
1.5
–10.5
1.5
2
2.5
–9.5
2.5
IAG1, IAG2
SAG
–10
2
High level
Low level
–10.5
1.5
–10
2
–9.5
2.5
Input voltage, V
High level
Low level
V
I
SRG
–10.5
3.5
–10
4
–9.5
4.5
High level
Intermediate level
Low level
‡
ABG
–2.5
–7
–8
–6
12.5
25
ABG
6.25
IAG1, IAG2
SAG
Clock frequency, f
Load capacitive
MHz
clock
12.5
12.5
6
SRG
6.25
OUT
pF
J/cm•s•°C
°C
Plastic package thermal conductivity
Operating free-air temperature, T
0.008
–10
45
A
‡
Adjustment is required for optimum performance.
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TC255P
336- × 244-PIXEL CCD IMAGE SENSOR
SOCS057 – JUNE 1996
electrical characteristics over recommended operating ranges of supply voltage and operating
free-air temperature (unless otherwise noted)
†
PARAMETER
MIN
TYP
MAX
UNIT
dB
Dynamic range (see Note 2)
Charge-conversion factor
Antiblooming disabled (see Note 3)
66
12
11
13
µV/e
Charge-transfer efficiency (see Note 4)
0.9995 0.99999
20
Signal-response delay time, τ (see Note 5)
Gamma (see Note 6)
ns
0.97
13
0.98
350
62
0.99
Output resistance
Ω
Noise-equivalent signal without correlated double sampling
electrons
electrons
Noise-equivalent signal with correlated double sampling (see Note 7)
ADB (see Note 8)
31
15
18
10
Rejection ratio
SRG (see Note 9)
ABG (see Note 10)
50
dB
40
Supply current
5
mA
IAG1, IAG2
SRG
1000
22
Input capacitance, C
pF
i
ABG
850
2000
SAG
†
All typical values are at T = 25°C.
A
NOTES: 2. Dynamic range is –20 times the logarithm of the mean-noise signal divided by saturation-output signal.
3. For this test, the antiblooming gate must be biased at the intermediate level.
4. Charge-transfer efficiency is one minus the charge loss per transfer in the output register. The test is performed in the dark using
an electrical-input signal.
5. Signal-response delay time is the time between the falling edge of the SRG pulse and the output-signal valid state.
6. Gamma (γ) is the value of the exponent is the equation below for two points on the linear portion of the transfer-function curve (this
value represents points near saturation).
Exposure (2)
Exposure (1)
Output signal (2)
Output signal (1)
7. A three-level serial-gate clock is necessary to implement correlated double sampling.
8. ADB rejection ratio is –20 times the logarithm of the ac amplitude at the output divided by the ac amplitude at ADB (see Figure 11
for measured ADB rejection ratio as a function of frequency).
9. SRG rejection ratio is –20 times the logarithm of the ac amplitude at the output divided by the ac amplitude at SRG.
10. ABG rejection ratio is –20 times the logarithm of the ac amplitude at the output divided by the ac amplitude at ABG.
2-9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TC255P
336- × 244-PIXEL CCD IMAGE SENSOR
SOCS057 – JUNE 1996
optical characteristics, T = 40°C (unless otherwise noted)
A
PARAMETER
MIN
TYP
350
MAX
UNIT
No IR filter
Sensitivity
mV/lx
With IR filter
45
Saturation signal, V
(see Note 11)
Antiblooming disabled, Interlace off
Antiblooming enabled
600
200
750
mV
mV
sat
Maximum usable signal, V
250
use
Blooming-overload ratio (see Note 12)
Image-area well capacity
Smear (see Notes 13 and 14)
Dark current
100
200
50000
62500
0.00012
0.20
200
electrons
2
Interlace disabled,
T
A
= 21°C
nA/cm
Dark signal
µV
Pixel uniformity
Output signal = 60 mV ± 10 mV
Output signal = 60 mV ± 10 mV
15
mV
mV
%
Column uniformity
0.5
Shading
15
Electronic-shutter capability
1/15000
1/60
s
NOTES: 11. Saturation is the condition in which further increase in exposure does not lead to further increase in output signal.
12. Blooming is the condition in which charge is induced in an element by light incident on another element. Blooming-overload ratio
is the ratio of blooming exposure to saturation exposure.
13. Smearisameasureoftheerrorintroducedbytransferringchargethroughanilluminatedpixelinshutterlessoperation.Itisequivalent
to the ratio of the single-pixel transfer time to the exposure time using an illuminated section that is 1/10 of the image-area vertical
height with recommended clock frequencies.
14. The exposure time is 16.67 ms, the fast-dump clocking rate during vertical transfer is 12.5 MHz, and the illuminated section is 1/10
of the height of the image section.
timing requirements
MIN NOM
MAX
UNIT
ABG
10
10
10
10
10
10
10
10
10
10
40
10
20
20
40
40
10
20
20
40
IAG1, IAG2 (fast clear)
t
Rise time
Fall time
IAG1, IAG2 (image transfer)
ns
r
f
SAG
SRG
ABG
IAG1, IAG2 (fast clear)
t
IAG1, IAG2 (image transfer)
ns
SAG
SRG
2-10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TC255P
336- × 244-PIXEL CCD IMAGE SENSOR
SOCS057 – JUNE 1996
PARAMETER MEASUREMENT INFORMATION
Blooming Point
With Antiblooming
Enabled
V
O
Blooming Point
With Antiblooming
Disabled
Dependent on
Well Capacity
V
sat (min)
Level Dependent
Upon Antiblooming
Gate High Level
DR
V
use (max)
V
use (typ)
SNR
V
n
Lux
(light input)
V
sat
DR (dynamic range)
20 log
B
V
n
V
use
SNR (signal-to-noise-rate)
20 log
B
V
n
V
V
= noise-floor voltage
n
= minimum saturation voltage
= maximum usable voltage
sat (min)
V
use (max)
= typical user voltage (camera white clip)
V
use (typ)
NOTES: A.
V
is defined as the voltage determined to equal the camera white clip. This voltage must be less than V
use
use (typ)
.
(max)
B. A system trade-off is necessary to determine the system light sensitivity versus the signal/noise ratio. By lowering
the V
,
use(typ)
the light sensitivity of the camera is increased; however, this sacrifices the signal/noise ratio of the camera.
Figure 7. Typical V
V
Relationship
sat, use
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TC255P
336- × 244-PIXEL CCD IMAGE SENSOR
SOCS057 – JUNE 1996
PARAMETER MEASUREMENT INFORMATION
1.5 V to 2.5 V
SRG
OUT
– 8.5 V
– 8.5 V to –10 V
0%
90%
100%
10 ns
15 ns
CCD Delay
Sample
and
Hold
Figure 8. SRG and CCD Output Waveforms
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TC255P
336- × 244-PIXEL CCD IMAGE SENSOR
SOCS057 – JUNE 1996
TYPICAL CHARACTERISTICS
CCD SPECTRAL RESPONSIVITY
1
0.1
0.01
0.001
300
400
500
600
700
800
900 1000
Incident Wavelength – nm
Figure 9
CCD QUANTUM EFFICIENCY
1
0.1
0.01
0.001
300
400
500
600
700
800
900 1000
Incident Wavelength – nm
Figure 10
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TC255P
336- × 244-PIXEL CCD IMAGE SENSOR
SOCS057 – JUNE 1996
TYPICAL CHARACTERISTICS
20
18
16
14
12
10
8
6
4
2
0
0
5
10
15
20
25
f – Frequency – MHz
Figure 11. Measured ADB Rejection Ratio as a Function of Frequency
300
250
200
150
100
50
0
0
5
10
15
20
25
f – Frequency – MHz
Figure 12. Noise-Power Spectral Density
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TC255P
336- × 244-PIXEL CCD IMAGE SENSOR
SOCS057 – JUNE 1996
APPLICATION INFORMATION
TMC57253
V
V
CC
1
2
24
23
22
21
20
19
18
17
16
15
14
13
V
V
V
ABM
AB
AB
ABM
WIN
V
V
ABOUT
CC
CC
3
16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
GND
EN
V
V
ABL
ABL
GND
4
5
ABIN IA1OUT
6
ED
EU
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
ABMIN
V
V
ED
DSSEL
FSSEL
ABGSEL
ABG
IA
IA1IN IA2OUT
IA
7
EU
8
IA2IN
GND
TEST4
CBLK
9
CBLK
SAIN SAOUT
10
11
12
CSYNC
SRIN
SRMIN SROUT
GND
V
V
V
S
S
CSYNC
GND
ABM
V
CC
V
CC
CPOB1
V
SM
SM
CPOB1
CPOB2
SSEL1
IAG1
IAG2
TMC57750
SAG
V
V
GND
CC
CC
SRG
SSEL2
SSEL3
VR
SRM
TC255P
DLSEL
PHSEL2
PHSEL1
SRGSEL
8
7
6
5
1
2
3
4
HR
ABG
IAG2
ADB
SUB
OUT
ADB
SUB
SHTCOM
IAG1
SAG
SRG
V
ACT
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
Buffer
and
Preamp
V
CC
S/H
(see
NoteB)
CDS
4.7 µF
V
CC
V
CC
5 V
V
CC
OUT
GND
44 43 42 41 40 39 38 37 36 35 34
0.1 µF
0.1 µF
25 MHz
DC VOLTAGES
, V , V
1
33
32
31
100 µF
DATAIN
V
CC
VIDEO
V
V
12 V
5 V
IA
CC
M
S
2
3
S/HFB
SHP
75Ω
GND
ADB
SUB
22 V
10 V
7.5 V
1.9 V
1.2 V
1.2 V
1.0 V
4.0 V
S/H
4
30 CSYNC
29 CPOB1
28
SHD1
SHD2
GND
CSYNC
CLAMP
CHARAIN
0.1 µF
CDS
5
6
V
ABM
HICPLVL
SULVL
SN761210
7
27
V
AGCFIL
AGCLVL
AGCMAX
AGCOUT
AMPIN
V
CC
CC
8
26
25
24
23
YHIN
APOUT
APGAIN
APFIL
9
4.7 µF
SYNCLVL
CTRLVL
WIDLVL
AMPTUNE
10
11
Low-Pass
FIlter
1.0 V
14 V
3 V
V
AB
0.1 µF
V
ABL
12 13 14 15 16 17 18 19 20 21 22
AMPTUNE
WIN
CPOB1
NOTES: A. Decoupling capacitors are not shown.
B. TI recommends designing AC coupled systems.
0.1 µF
To Monitor
Figure 13. Typical Application Circuit Diagram
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TC255P
336- × 244-PIXEL CCD IMAGE SENSOR
SOCS057 – JUNE 1996
APPLICATION INFORMATION
SUPPORT CIRCUITS
APPLICATION
Timing generator
Driver
DEVICE
TMC57750PM
TMC57253DSB
PACKAGE
64 pin flatpack
FUNCTION
EIA-170 timing and CCD control signals
Driver for ABG, IAG1, IAG2, SAG, and SRG
24 pin small outline
SYNC, BLANK, AGC, IRIS, CLAMP, S/H, CDS, and
WINDOW
SN761210FR
44 pin flatpack
Video processor
Figure 13. Typical Application Circuit Diagram (Continued)
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TC255P
336- × 244-PIXEL CCD IMAGE SENSOR
SOCS057 – JUNE 1996
MECHANICAL DATA
The package for the TC255P consists of a plastic base, a glass window, and an 8-lead frame. The glass window is
sealed to the package by an epoxy adhesive. The package leads are configured in a dual in-line organization and
fit into mounting holes with 2,54 mm (0.1 in) center-to-center spacings.
TC255P (8 pin)
Package Center
10,05
9,95
2,67
2,53
9,00
8,90
0,80
0,70
Optical
Center
10,05
9,95
10,16
9,00
8,90
5,19
4,93
4,20
3,93
0,27
0,23
Chip Surface
0,64
0,50
1,10
1,20
3,50 1,27
1,50
1,40
0,46
0,30
2,54
6/96
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES
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