TMF3201J [TI]
Dual N-Channel Dual-Gate MOSFET; 双N沟道双栅MOSFET
| 型号： | TMF3201J |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Dual N-Channel Dual-Gate MOSFET |
| 文件： | 总8页 (文件大小：211K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Preliminary Specification
TMF3201J
Dual N-Channel Dual-Gate MOSFET
□ Description
Unit in mm
SOT363
The TMF3201J is an N-channel enhancement type, dual-insulated
gate, field-effect transistor that utilizes MOS construction.
It is consists of two equal dual gate MOSFET amplifiers with
shared source and gate2 leads. The source and substrate are
interconnected. Internal bias circuits enable DC stabilization and a
very good cross-modulation performance during AGC. Integrated
diodes between the gates and source protect against excessive
input voltage surges. The transistor has a SOT363 micro-
miniature plastic package.
□ Features
- Two AGC amplifiers in a single package
- Integrated gate protection diodes
- High AGC-range, high gain, low noise figure
□ Applications
1. GATE 1(1) 4. DRAIN (2)
2. GATE 2 5. SOURCE
3. GATE 1(2) 6. DRAIN (1)
-Two gain controlled input stage for UHF and VHF tuners
- Professional communications equipment
□ Absolute Maximum Ratings (Ta = 25 ℃)
Parameter
Per MOSFET ; unless otherwise specified
Drain-Source Voltage
Symbol
Ratings
Unit
DS
V
10
30
V
mA
mA
mW
Drain Current
ID
10
±
Gate 1 Current
IG1
200
-65 ~ 150
150
Total Power Dissipation
Storage Temperature
Ptot
stg
T
℃
℃
Tj
Operating Junction Temperature
Caution : Electro Static Discharge sensitive device, observe handling precaution
http://www.tachyonics.co.kr
January 2005.
Rev. 1.0
Page 1 of 8
Preliminary Specification
TMF3201J
□ DC Characteristics
( Tj = 25 ℃, per MOSFET, unless otherwise specified )
PARAMETER
SYMBOL
V(BR)DSS
CONDITION
MIN.
10
MAX.
-
UNIT
V
Drain-source breakdown voltage
VG1-S=VG2-S=0; ID=10㎂
Gate1-source breakdown voltage
Gate2-source breakdown voltage
V(BR)G1-SS
V(BR)G2-SS
VG2-S=VDS=0; IG1-S=10㎃
VG1-S=VDS=0; IG2-S=10㎃
6
6
10
10
V
V
Forward source-gate1 voltage
Forward source-gate2 voltage
Gate1-source threshold voltage
Gate2-source threshold voltage
V(F)S-G1
V(F)S-G2
VG1-S(th)
VG2-S(th)
VG2-S=VDS=0; IS-G1=10㎃
VG1-S=VDS=0; IS-G2=10㎃
VDS=5V; VG2-S=4V; ID=100㎂
VDS=5V; VG1-S=4V; ID=100㎂
0.5
0.5
0.3
0.3
1.5
1.5
1.0
1.2
V
V
V
V
Drain-source current
Gate1 cut-off current
Gate2 cut-off current
IDSX
VG2-S=4V; VDS=5V; RG=62㏀
VG1-S=5V; VG2-S=VDS=0
8
-
-
16
50
20
㎃
㎁
㎁
IG1-S
IG2-S
V
G2-S=5V; VG1-S=VDS=0
□ AC Characteristics
( Common source; Ta = 25 ℃, VG2-S = 4V, VDS =5V, ID =12mA ; per MOSFET ;unless otherwise specified )
PARAMETER
SYMBOL
IyFSI
CONDITIONS
MIN.
25
-
TYP.
30
MAX.
40
2.5
-
UNIT
mS
㎊
Forward transfer admittance
Input capacitance at gate1
Input capacitance at gate2
Output capacitance
Tj=25℃
f=1MHz
f=1MHz
f=1MHz
f=1MHz
Cig1-ss
Cig2-ss
Coss
1.9
3.3
1.4
20
-
㎊
-
-
㎊
Reverse transfer capacitance
Crss
-
-
fF
*
*
*
*
i
11
o
f=200MHz; Z = S , Z = S
22
30
31
-
㏈
Power gain
Noise figure
Gtr
NF
f=400MHz; Zi = S11*, Zo = S22
26
28
-
㏈
f=800MHz; Zi = S11*, Zo = S22
f=400MHz; Zi = S11 opt(NF)
f=800MHz; Zi = S11 opt(NF)
21
-
25
1.5
1.7
-
-
㏈
㏈
㏈
-
2.5
k=1%, fw=50MHz; funw=60MHz
AGC = 0dB
90
-
-
-
-
-
㏈㎶
㏈㎶
㏈㎶
k=1%, fw=50MHz; funw=60MHz
AGC = 10dB
Cross-modulation
X
92
mod
k=1%, fw=50MHz; funw=60MHz
AGC = 40dB
100
105
http://www.tachyonics.co.kr
January. 2005.
Rev. 1.0
Page 2 of 8
Preliminary Specification
TMF3201J
□ Equivalent circuit (Top view)
□ Making
6: D(1) 5: S
4: D(2)
6: D(1)
5: S
4: D(2)
DA1
1: G1(1) 2: G2 3: G1(2)
□ Pin Configuration
PIN NO
SYMBOL
G1(1)
G2
DESCRIPTION
Gate1_Amp1
Gate2
1: G1(1)
2: G2
3: G1(2)
1
2
3
4
5
6
G1(2)
D(2)
S
Gate1_Amp2
Drain_Amp2
Source
D(1)
Drain_Amp1
□ Test circuit
VAGC
R1
10 KOhm
C1
22 pF
C3
4.7 nF
RL
C2
L1
2.2 uH
50 Ohm
4.7 nF
RGEN
R2
C4
4.7 nF
RG1
50 Ohm
50 Ohm
VGG
VDS
Fig1. Test Cross-modulation test set-up (for one MOS-FET)
http://www.tachyonics.co.kr
January. 2005.
Rev. 1.0
Page 3 of 8
Scattering parameters
Preliminary Specification
TMF3201J
□ Graphs For One MOSFET
45
40
35
30
25
20
15
10
5
30
25
VG2=4V
3.5V
V G1-S : 1.5V
1.4V
3V
20
15
10
1.3V
1.2V
2.5V
2V
1.1V
1V
0.9V
1.5V
1V
5
0
0
0.00
0.50
1.00
1.50
2.00
2.50
VG1-S [V]
0
1
2
3
4
5
6
7
V DS [V ]
VDS =5V, T =
℃
VG2-S = 4V, T =
℃
25
25
j
j
Fig.2 Transfer characteristics
Fig3. Output characteristics
300
250
200
150
100
50
VG2=4V
40
35
30
25
20
15
10
5
3.5V
3V
4V
3.5V
3V
2.5V
2V
2.5V
1.5V
1V
V
= 2V
20
G2-S
0
0
0
4
8
12
16
0.00
0.50
1.00
1.50
2.00
2.50
ID [mA]
VG1-S [V]
VDS =5V, T =
℃
25
VDS =5V, T =
℃
25
j
j
Fig.4 Gate1 Current as a function of gate1 Voltage
Fig5. Forward transfer admittance as a function
of drain current
http://www.tachyonics.co.kr
Rev. 1.0
January. 2005.
Page 4 of 8
Preliminary Specification
TMF3201J
□ Graphs For One MOSFET
20
16
12
8
16
14
12
10
8
6
4
4
2
0
0
0
20
40
60
80
100
IG1 [uA]
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
VGG [V]
VDS= 5V, V G2-S = 4V, Tj = 25 ℃
VDS= 5V, V G2-S = 4V, RG1=62㏀, Tj = 25 ℃
Fig6. Drain current as a function of gate1 current
Fig7. Drain current as a function of gate1
supply voltage
14
12
10
8
20
RG1 = 33KΩ
39KΩ
VGG = 5V
18
16
4.5V
4V
14
12
10
8
51KΩ
3.5V
62KΩ
75KΩ
3V
92KΩ
6
100KΩ
4
6
4
2
2
0
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
VG2-S [V]
VGG=VDS [V]
V
G2-S = 4V, Tj = 25 ℃, RG1= (Connected to VGG)
VDS= 5V, Tj = 25 ℃, RG1=62㏀
Fig9. Drain current as a function of gate2 voltage
Fig8. Drain current as a function of gate1 and
drain supply voltage ; see Fig1
http://www.tachyonics.co.kr
Rev. 1.0
January. 2005.
Page 5 of 8
Preliminary Specification
TMF3201J
□ Graphs For One MOSFET
70
60
50
40
30
20
10
0
0
-10
-20
-30
-40
-50
VGG : 5V
4.5V
4V
3.5V
3V
0
1
2
3
4
0.00
1.00
2.00
3.00
4.00
5.00
6.00
VG2-S [V]
VAGC [V]
VDS= 5V, RG1= 62㏀, Tj = 25 ℃ ;Connected to VGG
f=50MHz, Pin=-30dBm, VDS= 5V, VGG= 5V, RG1=62㏀
Tj = 25 ℃
Fig10. Gate1 current as a function of gate2
voltage
Fig11. Typical Gain reduction as a function of
AGC Voltage ; see Fig1
14
12
10
8
6
4
2
0
0
10
20
30
40
50
gain reduction [dB]
f=50MHz, Pin=-30dBm, VDS= 5V, VGG= 5V, RG1=62㏀
Fig12. Drain current as a function of gain reduction
; see Fig1
http://www.tachyonics.co.kr
Rev. 1.0
January. 2005.
Page 6 of 8
Preliminary Specification
TMF3201J
□ Graphs For One MOSFET
-1000
1000
100
10
100
φrs
10
-100
bis
1
-10
|yrs|
gis
0
10
100
1000
f [MHz]
-1
1
1
10
100
1000
f [MHz]
VDS= 5V, V G2-S = 4V
VDS= 5V, V G2-S = 4V
Fig13. Input admittance as a function of
frequency
Fig14. Reverse transfer admittance and phase
as a function of frequency
10.00
-100
100
|yfs|
bos
1.00
-10
10
φfs
gos
0.10
0.01
-1
1
10
100
1000
f [MHz]
10
100
1000
f [MHz]
VDS= 5V, V G2-S = 4V
VDS= 5V, V G2-S = 4V
Fig15. Forward transfer admittance and
phase as a function of frequency
Fig16. Output admittance as a function of
frequency
http://www.tachyonics.co.kr
Rev. 1.0
January. 2005.
Page 7 of 8
Preliminary Specification
TMF3201J
Scattering parameters
□
(VG2-S = 4V, VDS =5V, ID =12mA, Τa = 25 ℃)
Reverse Transmission, dB
Input Reflection Coefficient
0
-20
-40
-60
-80
freq (10.00MHz to 1.000GHz)
1E7
1E8
1E9
Forward Transmission, dB
12
freq, Hz
Output Reflection Coefficient
10
8
6
4
2
0
1E7
1E8
1E9
freq (10.00MHz to 1.000GHz)
freq, Hz
S11
S21
S12
S22
f
Magnitude
(ratio)
0.972
0.969
0.963
0.943
0.914
0.889
0.850
0.828
0.791
Angle
Magnitude
(ratio)
3.366
3.301
3.172
3.056
2.862
2.711
2.540
2.391
2.220
Angle
(deg)
Magnitude
(ratio)
0.001
0.002
0.003
0.004
0.004
0.005
0.005
0.006
0.006
Angle
Magnitude
(ratio)
0.996
0.995
0.993
0.984
0.987
0.982
0.979
0.980
0.982
Angle
(MHz)
(deg)
(deg)
(deg)
50
-1.335
172.420
166.020
153.210
139.903
128.420
117.280
105.930
95.160
88.960
86.210
80.730
77.220
76.136
76.090
76.970
77.860
77.315
-2.468
-4.957
-9.935
-14.987
-19.550
-24.580
-28.830
-33.830
-38.460
100
200
300
400
500
600
700
800
-6.465
-16.725
-25.621
-33.060
-39.770
-46.540
-54.100
-61.560
84.550
http://www.tachyonics.co.kr
Page 8 of 8
January. 2005.
Rev. 1.0
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