TMP302CQDRLRQ1 [TI]
汽车类、引脚可选跳变点、1.4V 温度开关系列 | DRL | 6 | -40 to 125;
| 型号： | TMP302CQDRLRQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 汽车类、引脚可选跳变点、1.4V 温度开关系列 | DRL | 6 | -40 to 125 开关 光电二极管 |
| 文件： | 总20页 (文件大小：1370K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Support &
Community
Product
Folder
Order
Now
Tools &
Software
Technical
Documents
TMP302-Q1
ZHCSCZ4C –OCTOBER 2014–REVISED SEPTEMBER 2018
采用微封装的 TMP302-Q1 汽车级、简单易用型、低功耗
温度开关
1 特性
3 说明
1
•
符合汽车应用 要求
具有符合 AEC-Q100 标准的下列特性：
TMP302-Q1 系列器件是一款采用微封装 (SOT563) 的
温度开关。TMP302-Q1 系列器件可通过引脚来选择跳
闸点和迟滞，因而具有低功耗（最大 15μA）且简单易
用的特点。
•
–
器件温度 1 级：-40°C 至 125°C 的环境运行温
度范围
–
–
器件 HBM ESD 分类等级 2
器件 CDM ESD 分类等级 C6
这些器件运行时无需额外组件；其功能不受微处理器或
微控制器的影响。
•
•
•
低功耗：15μA（最大值）
TMP302-Q1 系列器件具有多种不同的版本，跳闸点为
50ºC 至 125ºC（以 5ºC 为递增单位）（参阅器件比较
表）。
SOT563 封装：1.6mm × 1.6mm × 0.6mm
跳闸点精度：在 40°C 至 125°C 温度范围内为 ±
0.2°C（典型值）
•
•
•
•
引脚可选跳变点
器件信息
开漏输出，低电平有效
可选滞后：5°C 或 10°C
低电源电压范围: 1.4V 至 3.6V
器件型号
TMP302-Q1
封装
SOT563 (6)
1.60mm x 1.20mm
1. 如需了解所有可用封装，请参阅数据表末尾的可订
购产品附录。
2 应用
•
•
•
•
•
•
•
•
信息娱乐
汽车空调
引擎控制单元
汽车黑匣子
车身控制模块
安全气囊控制单元
过热监控
电子保护系统
跳变阈值精度
40
35
30
25
20
15
10
5
0
Accuracy (°C)
1
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。 有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLOS889
TMP302-Q1
ZHCSCZ4C –OCTOBER 2014–REVISED SEPTEMBER 2018
www.ti.com.cn
目录
8.3 Feature Description................................................... 8
8.4 Device Functional Modes.......................................... 8
Application and Implementation .......................... 9
9.1 Application Information.............................................. 9
9.2 Typical Application ................................................... 9
1
2
3
4
5
6
7
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
器件比较表............................................................... 3
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
7.1 Absolute Maximum Ratings ...................................... 4
7.2 ESD Ratings.............................................................. 4
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information.................................................. 4
7.5 Electrical Characteristics........................................... 5
7.6 Typical Characteristics.............................................. 5
Detailed Description .............................................. 7
8.1 Overview ................................................................... 7
8.2 Functional Block Diagram ......................................... 7
9
10 Power Supply Recommendations ..................... 11
11 Layout................................................................... 11
11.1 Layout Guidelines ................................................. 11
11.2 Layout Example .................................................... 11
12 器件和文档支持 ..................................................... 12
12.1 接收文档更新通知 ................................................. 12
12.2 社区资源................................................................ 12
12.3 商标....................................................................... 12
12.4 静电放电警告......................................................... 12
12.5 术语表 ................................................................... 12
13 机械、封装和可订购信息....................................... 12
8
4 修订历史记录
Changes from Revision B (July 2015) to Revision C
Page
•
•
•
•
•
•
•
•
•
•
•
Changed the supply voltage maximum value from: 3.6 V to: 4 V .......................................................................................... 4
Changed the input pin supply voltage maximum value from: VS + 0.5 V to: VS + 0.3 and ≤ 4 V........................................... 4
Changed the output pin voltage maximum value from: 3.6 V to: 4 V..................................................................................... 4
Added the specified temperature to the Recommended Operating Conditions table ........................................................... 4
Updated junction-to-ambient thermal resistance from 200 to 210.3 ..................................................................................... 4
Updated junction-to-case (top) thermal resistance from 73.7 to 105.0 ................................................................................. 4
Updated junction-to-board thermal resistance from 34.4 to 87.5 .......................................................................................... 4
Updated junction-to-top characterization parameter from 3.1 to 6.1 ..................................................................................... 4
Updated junction-to-board characterization parameter from 34.2 to 87.0 ............................................................................. 4
Changed the Design Requirements section ........................................................................................................................ 10
添加了接收文档更新通知 部分.............................................................................................................................................. 12
Changes from Revision A (November 2014) to Revision B
Page
•
Changed the Handling Ratings table to ESD Ratings and moved storage temperature to the Absolute Maximum
Ratings table .......................................................................................................................................................................... 4
Changes from Original (October 2014) to Revision A
Page
•
将器件状态从“产品预览”更改为“生产” ..................................................................................................................................... 1
2
版权 © 2014–2018, Texas Instruments Incorporated
TMP302-Q1
www.ti.com.cn
ZHCSCZ4C –OCTOBER 2014–REVISED SEPTEMBER 2018
5 器件比较表
器件
可选跳闸点 (°C)(1)
50、55、60、65
TMP302A-Q1
TMP302B-Q1
TMP302C-Q1
TMP302D-Q1
70、75、80、85
90、95、100、105
110、115、120、125
(1) 如需了解其他可用跳闸点，请联系 TI 代表。
6 Pin Configuration and Functions
DRL Package
6-Pin SOT563
Top View
TRIPSET0
1
2
3
6
5
4
TRIPSET1
GND
OUT
V
S
HYSTSET
Pin Functions
PIN
TYPE
DESCRIPTION
NO.
1
NAME
TRIPSET0
GND
Digital Input Used in combination with TRIPSET1 to select the temperature at which the device trips
Ground Ground
2
3
OUT
Digital Output Open drain, active-low output
4
HYSTSET
Digital Input Used to set amount of thermal hysteresis
Power
5
6
VS
Power supply
Supply
TRIPSET1
Digital Input Used in combination with TRIPSET0 to select the temperature at which the device trips
Copyright © 2014–2018, Texas Instruments Incorporated
3
TMP302-Q1
ZHCSCZ4C –OCTOBER 2014–REVISED SEPTEMBER 2018
www.ti.com.cn
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
UNIT
Supply
4
–0.5
–0.5
VS + 0.3
and ≤ 4
Voltage
Input pin (TRIPSET0, TRIPSET1, HYSTSET)
V
Output pin (OUT)
Output pin (OUT)
Operating
4
Current
10
mA
°C
–55
–60
130
150
150
Temperature
Junction
Storage
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VALUE
±2000
±1000
UNIT
Human body model (HBM), per AEC Q100-002(1)
Charged device model (CDM), per AEC Q100-011
V(ESD)
Electrostatic discharge
V
(1) AEC Q100-002 indicates HBM stressing is done in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
1.4
10
NOM
MAX
3.6
UNIT
VS
Power supply voltage
3.3
V
Rpullup
TA
Pullup resistor connected fromOUT to VS
Specified temperature
100
125
kΩ
°C
–40
7.4 Thermal Information
TMP302-Q1
DRL (SOT563)
6 PINS
210.3
THERMAL METRIC(1)
UNIT
RθJA
RθJC(top)
RθJB
ψJT
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
105.0
87.5
Junction-to-top characterization parameter
Junction-to-board characterization parameter
6.1
ψJB
87.0
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report (SPRA953).
4
Copyright © 2014–2018, Texas Instruments Incorporated
TMP302-Q1
www.ti.com.cn
ZHCSCZ4C –OCTOBER 2014–REVISED SEPTEMBER 2018
7.5 Electrical Characteristics
At TA = –40°C to +125°C, and VS = 1.4 to 3.6 V (unless otherwise noted). 100% of all units are production tested at TA =
25°C; overtemperature specifications are specified by design.
PARAMETER
TEMPERATURE MEASUREMENT
Trip point accuracy
TEST CONDITIONS
MIN
TYP
MAX
UNIT
±0.2
±0.2
±2
°C
Trip point accuracy versus
supply
±0.5
°C/V
Trip point hysteresis
HYSTSET = GND
5
°C
°C
HYSTSET = VS
10
TEMPERATURE TRIP POINT SET
TRIPSET1 = GND, TRIPSET0 =
GND
Default
°C
TRIPSET1 = GND, TRIPSET0 = VS
TRIPSET1 = VS, TRIPSET0 = GND
TRIPSET1 = VS, TRIPSET0 = VS
Default + 5
Default + 10
Default + 15
°C
°C
°C
Temperature trip point set
HYSTERESIS SET INPUT
VIH
VIL
II
Input logic level high
Input logic level low
Input current
0.7 × VS
–0.5
VS
0.3 × VS
1
V
V
0 < VI < 3.6 V
µA
DIGITAL OUTPUT
VS > 2 V, IOL = 3 mA
VS < 2 V, IOL = 3 mA
0
0
0.4
V
V
VOL Output logic level low
0.2 × VS
POWER SUPPLY
Operating Supply Range
1.4
3.6
15
V
TA = –40°C to +125°C
8
7
µA
µA
IQ
Quiescent Current
VS = 3.3 V, TA = 50°C
7.6 Typical Characteristics
At TA = 25°C and VS = 3.3 V, unless otherwise noted.
2.0
1.5
1.0
0.5
0
16
14
12
10
8
VS = 3.6 V
VS = 3.3 V
VS = 1.4 V
-0.5
-1.0
-1.5
-2.0
6
4
2
0
40
50
60
70
80
90
100 110 120 130
-75
-50
-25
0
25
50
75
100 125 150
Temperature (°C)
Temperature (°C)
30 typical units
Figure 1. Trip Accuracy Error vs Temperature
Figure 2. Quiescent Current vs Temperature
Copyright © 2014–2018, Texas Instruments Incorporated
5
TMP302-Q1
ZHCSCZ4C –OCTOBER 2014–REVISED SEPTEMBER 2018
www.ti.com.cn
Typical Characteristics (continued)
At TA = 25°C and VS = 3.3 V, unless otherwise noted.
120
100
90
80
70
60
50
40
30
20
10
0
100
80
60
40
20
0
0
5
10
15
20
25
30
0
20
40
60
80 100 120 140 160 180 200
Time (s)
Time (s)
Figure 3. Temperature Step Response in Perfluorinated
Fluid at 100°C vs Time
Figure 4. Thermal Step Response in Air at 100°C vs Time
40
35
30
25
20
15
10
5
400
350
300
250
200
150
100
50
0
0
-75
-50
-25
0
25
50
75
100 125 150
Temperature (°C)
Accuracy (°C)
VS = 1.4 V
IOL = 2 mA
Figure 6. Output Logic-Level Low VOL vs Temperature
Figure 5. Trip Threshold Accuracy
OUT
VS
OUT
VS
Time (10 ms/div)
Time (8 µs/div)
TMP302A-Q1, TA = 55°C TRIPSET1 = TRIPSET0 = GND
Figure 8. Power-Up, Trip, and Power-Down Response
Figure 7. Power-Up and Power-Down Response
6
Copyright © 2014–2018, Texas Instruments Incorporated
TMP302-Q1
www.ti.com.cn
ZHCSCZ4C –OCTOBER 2014–REVISED SEPTEMBER 2018
8 Detailed Description
8.1 Overview
The TMP302-Q1 temperature switch is optimal for ultra low-power applications that require accurate trip
thresholds. A temperature switch is a device that issues an alert response when a temperature threshold is
reached or exceeded. The trip thresholds are programmable to four different settings using the TRIPSET1 and
TRIPSET0 pins. Table 1 lists the pin settings versus trip points.
Table 1. Trip Point versus TRIPSET1 and TRIPSET0
TRIPSET1
GND
GND
VS
TRIPSET0
GND
VS
TMP302A-Q1
50°C
TMP302B-Q1
70°C
TMP302C-Q1
90°C
TMP302D-Q1
110°C
55°C
75°C
95°C
115°C
GND
VS
60°C
80°C
100°C
120°C
VS
65°C
85°C
105°C
125°C
8.2 Functional Block Diagram
V
S
Bias
TRIPSET0
Temperature
Threshold and
Hysteresis
TRIPSET1
HYSTSET
Comparator
Alert
OUT
Temperature
Sensor
GROUND
Copyright © 2014–2018, Texas Instruments Incorporated
7
TMP302-Q1
ZHCSCZ4C –OCTOBER 2014–REVISED SEPTEMBER 2018
www.ti.com.cn
8.3 Feature Description
8.3.1 HYSTSET
If the temperature trip threshold is crossed, the open-drain, active low output (OUT) goes low and does not return
to the original high state (that is, VS) until the temperature returns to a value within a hysteresis window set by
the HYSTSET pin. The HYSTSET pin allows the user to choose between a 5°C and a 10°C hysteresis window.
Table 2 lists the hysteresis window that corresponds to the HYSTSET setting.
Table 2. HYSTSET Window
HYSTSET
GND
THRESHOLD HYSTERESIS
5°C
VS
10°C
For the specific case of the device, if the HYSTSET pin is set to 10°C (that is, connected to VS) and the device is
configured with a 60°C trip point (TRIPSET1 = VS, TRIPSET0 = GND), when this threshold is exceeded the
output does not return to the original high state until it reaches 50°C. This case is more clearly shown in Figure 9.
OUT
VS
T(TRIP)
50°C
60°C
Figure 9. TMP302A-Q1: HYSTSET = VS, TRIPSET1 = VS, TRIPSET0 = GND
8.4 Device Functional Modes
The TMP302-Q1 family of devices has a single functional mode. Normal operation for the TMP302-Q1 family of
devices occurs when the power-supply voltage applied between the VS pin and GND is within the specified
operating range of 1.4 to 3.6 V. The temperature threshold is selected by connecting the TRIPSET0 and
TRIPSET1 pins to either the GND or VS pins (see Table 1). Hysteresis is selected by connecting the HYSTSET
pin to either the GND or VS pins (see Table 2). The output pin, OUT, remains high when the temperature is
below the selected temperature threshold. The OUT pin remains low when the temperature is at or above the
selected temperature threshold. The OUT pin returns from a low state back to the high state based upon the
amount of selected hysteresis (see the HYSTSET section).
8
Copyright © 2014–2018, Texas Instruments Incorporated
TMP302-Q1
www.ti.com.cn
ZHCSCZ4C –OCTOBER 2014–REVISED SEPTEMBER 2018
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
9.1.1 Configuring the TMP302-Q1
The TMP302-Q1 family of devices is simple to configure. The only external components that the device requires
are a bypass capacitor and pullup resistor. Power-supply bypassing is strongly recommended. Use a 0.1-µF
capacitor placed as close as possible to the supply pin. To minimize the internal power dissipation of the
TMP302-Q1 family of devices, use a pullup resistor value greater than 10 kΩ from the OUT pin to the VS pin.
Refer to Table 1 for trip-point temperature configuration. The TRIPSET pins can be toggled dynamically;
however, the voltage of these pins must not exceed VS. To ensure a proper logic high, the voltage must not drop
below 0.7 V × VS.
9.2 Typical Application
Figure 10 shows the typical circuit configuration for the TMP302-Q1 family of devices. The TMP302-Q1 family of
devices is configured for the default temperature threshold by connecting the TRIPSET0 and TRIPSET1 pins
directly to ground. Connecting the HYSTSET pin to ground configures the device for 5°C of hysteresis. Place a
10-kΩ pullup resistor between the OUT and VS pins. Place a 0.1-µF bypass capacitor between the VS pin and
ground, close to the TMP302-Q1 device.
TMP302-Q1
TRIPSET0
GND
TRIPSET1
10 kꢀ
V
S
V
S
1.4 V to 3.6 V
OUTPUT
OUT
HYSTSET
0.1 µF
Figure 10. TMP302-Q1 Typical Application Schematic
Figure 11 shows the most generic implementation of the TMP302-Q1 family of devices. Switches are shown
connecting the TMPSET0, TMPSET1 and HYSTSET pins to either VS or ground. The use of switches is not
strictly required; the switches are shown only to illustrate the various pin connection combinations. In practice,
connecting the TMPSET0, TMPSET1 and HYSTSET pins to ground or directly to the VS pin is sufficient and
minimizes space and cost. If additional flexibility is desired, connections from the TMPSET0, TMPSET1 and
HYSTSET pins can be made through 0-Ω resistors which can be either populated or not populated depending
upon the desired connection.
Copyright © 2014–2018, Texas Instruments Incorporated
9
TMP302-Q1
ZHCSCZ4C –OCTOBER 2014–REVISED SEPTEMBER 2018
www.ti.com.cn
Typical Application (continued)
TMP302-Q1
10 kꢀ
TRIPSET0
TRIPSET1
GND
V
S
OUTPUT
OUT
HYSTSET
V
S
1.4 V to 3.6 V
0.1 µF
Figure 11. TMP302-Q1 Generic Application Schematic
9.2.1 Design Requirements
Designing with the TMP302-Q1 family of devices is simple. The TMP302-Q1 family of devices is a temperature
switch commonly used to signal a microprocessor in the event of an over temperature condition. The
temperature at which the TMP302-Q1 family of devices issues an active low alert is determined by the
configuration of the TRIPSET0 and TRIPSET1 pins. These two pins are digital inputs and must be tied either
high or low, according to Table 1. The TMP302-Q1 family of devices issues an active low alert when the
temperature threshold is exceeded. The device has built-in hysteresis to avoid the device from signaling the
microprocessor as soon as the temperature drops below the temperature threshold. The amount of hysteresis is
determined by the HYSTSET pin. This pin is a digital input and must be tied either high or low, according to
Table 2.
See Figure 10 and Figure 11 for typical circuit configurations.
9.2.2 Detailed Design Procedure
Determine the threshold temperature and hysteresis required for the application. Connect the TMPSET0,
TMPSET1, and HYSTSET pins according to the design requirements. Refer to Table 1 and Table 2. Use a 10-kΩ
pullup resistor from the OUT pin to the VS pin. To minimize power, a larger-value pullup resistor can be used but
must not exceed 100 kΩ. Place a 0.1-µF bypass capacitor close to the TMP302-Q1 device to reduce noise
coupled from the power supply.
9.2.3 Application Curves
Figure 12 and Figure 13 show the TMP302A-Q1 power-on response with the ambient temperature less than
50°C and greater than 50°C respectively. The TMP302A-Q1 was configured with trip point set to 50°C. The
TMP302B-Q1, TMP302C-Q1, and TMP302D-Q1 devices behave similarly with regards to power on response
with TA below or above the trip point. Note that the OUT signal typically requires 35 ms following power on to
become valid.
10
Copyright © 2014–2018, Texas Instruments Incorporated
TMP302-Q1
www.ti.com.cn
ZHCSCZ4C –OCTOBER 2014–REVISED SEPTEMBER 2018
Typical Application (continued)
OUT
VS
OUT
VS
Time (5 µs/div)
Time (10 ms/div)
Figure 12. TMP302A-Q1 Power-On Response,
Figure 13. TMP302A-Q1 Power-On Response,
TA Greater than 50°C
TA Less than 50°C
10 Power Supply Recommendations
The TMP302-Q1 family of devices is designed to operate from a single power supply within the range 1.4 V and
3.6 V. No specific power supply sequencing with respect to any of the input or output pins is required. The
TMP302-Q1 family of devices is fully functional within 35 ms of the voltage at the VS pin reaching or exceeding
1.4 V.
11 Layout
11.1 Layout Guidelines
Place the power supply bypass capacitor as close as possible to the VS and GND pins. The recommended value
for this bypass capacitor is 0.1-µF. Additional bypass capacitance can be added to compensate for noisy or high-
impedance power supplies. Place a 10-kΩ pullup resistor from the open drain OUT pin to the power supply pin
VS.
11.2 Layout Example
VIA to Power Ground Plane
0.1 µF
TRIPSET0
GND
TRIPSET1
VS
Supply Voltage
OUT
HYSTSET
Ground Plane for
Thermal
10 kꢀ
Coupling to Heat
Source
Output
Heat Source
Figure 14. Layout Example
版权 © 2014–2018, Texas Instruments Incorporated
11
TMP302-Q1
ZHCSCZ4C –OCTOBER 2014–REVISED SEPTEMBER 2018
www.ti.com.cn
12 器件和文档支持
12.1 接收文档更新通知
要接收文档更新通知，请导航至 TI.com.cn 上的器件产品文件夹。单击右上角的通知我进行注册，即可每周接收产
品信息更改摘要。有关更改的详细信息，请查阅已修订文档中包含的修订历史记录。
12.2 社区资源
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范，
并且不一定反映 TI 的观点；请参阅 TI 的 《使用条款》。
TI E2E™ 在线社区 TI 的工程师对工程师 (E2E) 社区。此社区的创建目的在于促进工程师之间的协作。在
e2e.ti.com 中，您可以咨询问题、分享知识、拓展思路并与同行工程师一道帮助解决问题。
设计支持
TI 参考设计支持 可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。
12.3 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
12.4 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
12.5 术语表
SLYZ022 — TI 术语表。
这份术语表列出并解释术语、缩写和定义。
13 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知，且
不会对此文档进行修订。如需获取此数据表的浏览器版本，请查阅左侧的导航栏。
12
版权 © 2014–2018, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TMP302AQDRLRQ1
TMP302BQDRLRQ1
TMP302CQDRLRQ1
TMP302DQDRLRQ1
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOT-5X3
SOT-5X3
SOT-5X3
SOT-5X3
DRL
DRL
DRL
DRL
6
6
6
6
4000 RoHS & Green
4000 RoHS & Green
4000 RoHS & Green
4000 RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-40 to 125
-40 to 125
-40 to 125
-40 to 125
SHQ
SHR
SHS
SHT
NIPDAUAG
NIPDAUAG
NIPDAUAG
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
21-Dec-2018
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TMP302AQDRLRQ1
TMP302BQDRLRQ1
TMP302CQDRLRQ1
TMP302DQDRLRQ1
SOT-5X3
SOT-5X3
SOT-5X3
SOT-5X3
DRL
DRL
DRL
DRL
6
6
6
6
4000
4000
4000
4000
180.0
180.0
180.0
180.0
8.4
8.4
8.4
8.4
1.98
1.98
1.98
1.98
1.78
1.78
1.78
1.78
0.69
0.69
0.69
0.69
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
21-Dec-2018
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TMP302AQDRLRQ1
TMP302BQDRLRQ1
TMP302CQDRLRQ1
TMP302DQDRLRQ1
SOT-5X3
SOT-5X3
SOT-5X3
SOT-5X3
DRL
DRL
DRL
DRL
6
6
6
6
4000
4000
4000
4000
223.0
223.0
223.0
223.0
270.0
270.0
270.0
270.0
35.0
35.0
35.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
DRL0006A
SOT - 0.6 mm max height
S
C
A
L
E
8
.
0
0
0
PLASTIC SMALL OUTLINE
1.7
1.5
PIN 1
ID AREA
A
1
6
4X 0.5
1.7
1.5
2X 1
NOTE 3
4
3
1.3
1.1
0.3
6X
0.05
TYP
0.00
B
0.1
0.6 MAX
C
SEATING PLANE
0.05 C
0.18
0.08
6X
SYMM
SYMM
0.27
0.15
6X
0.1
0.05
C A B
0.4
0.2
6X
4223266/C 12/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. Reference JEDEC registration MO-293 Variation UAAD
www.ti.com
EXAMPLE BOARD LAYOUT
DRL0006A
SOT - 0.6 mm max height
PLASTIC SMALL OUTLINE
6X (0.67)
SYMM
1
6
6X (0.3)
SYMM
4X (0.5)
4
3
(R0.05) TYP
(1.48)
LAND PATTERN EXAMPLE
SCALE:30X
0.05 MIN
AROUND
0.05 MAX
AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDERMASK DETAILS
4223266/C 12/2021
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
7. Land pattern design aligns to IPC-610, Bottom Termination Component (BTC) solder joint inspection criteria.
www.ti.com
EXAMPLE STENCIL DESIGN
DRL0006A
SOT - 0.6 mm max height
PLASTIC SMALL OUTLINE
6X (0.67)
SYMM
1
6
6X (0.3)
SYMM
4X (0.5)
4
3
(R0.05) TYP
(1.48)
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE:30X
4223266/C 12/2021
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
重要声明和免责声明
TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，
不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担
保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验
证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。
您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成
本、损失和债务，TI 对此概不负责。
TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改
TI 针对 TI 产品发布的适用的担保或担保免责声明。
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE
邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2022，德州仪器 (TI) 公司
相关型号：
©2020 ICPDF网 联系我们和版权申明