TMP320C50KGD_14 [TI]
DIGITAL SIGNAL PROCESSOR KNOWN GOOD DIE;
| 型号： | TMP320C50KGD_14 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | DIGITAL SIGNAL PROCESSOR KNOWN GOOD DIE |
| 文件： | 总6页 (文件大小：83K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TMP320C50KGD, TMP320LC50KGD
DIGITAL SIGNAL PROCESSOR
KNOWN GOOD DIE
SGZS008B – JULY 1996 – REVISED JUNE 1999
35-ns and 50-ns Single-Cycle Instruction
Execution Time for 5 V Operation
16-Bit Parallel Logic Unit (PLU)
16 × 16-Bit Multiplier, 32-Bit Product
Eleven Context Switch Registers
50-ns Single-Cycle Instruction Execution
Time for 3.3 V Operation
Two Buffers for Circular Addressing
Full-Duplex Synchronous Serial Port
Time-Division Multiplexed Serial Port (TDM)
Timer With Control and Counter Registers
Source-Code Compatible With All ’C1x and
’C2x Devices
RAM-Based Operation
– 9K-Words × 16-Bit Single-Access
On-Chip Program/Data RAM
– 1056-Word × 16-Bit Dual-Access On-Chip
Data RAM
16 Software Programmable Wait-State
Generators
Divide-By-1 Clock Option
2K-Word × 16-Bit On-Chip Boot ROM
†
IEEE Standard 1149.1 Test Access Port
224K-Word × 16-Bit Maximum Addressable
External Memory Space (64K-Word
Program, 64K-Word Data, 64K-Word I/O,
and 32K-Word Global)
Operations are Fully Static
Fabricated Using the Texas Instruments
Enhanced Performance Implanted CMOS
(EPIC ) 0.72-µm Technology
32-Bit Arithmetic Logic Unit (ALU)
– 32-Bit Accumulator (ACC)
– 32-Bit Accumulator Buffer (ACCB)
description
The TMP320C50KGD digital signal processor (DSP) is a high performance, 16-bit, fixed-point processor
manufactured in 0.72-µm double-level metal CMOS technology. The TMP320LC50KGD has the same
functionality as the ’C50KGD except for operation at 3.3 V instead of 5 V.
Texas Instruments Military Products currently employs three primary processes for the development of a known
good die (KGD), one of which is applied to the TMP320C50 and TMP320LC50 devices. This process, known
as hot-chuck-probe, uses a standard probed product that is tested again, this time at full data sheet
specifications, in wafer form at speed and elevated temperature (85°C). Each individual die then is sawed,
inspected, and packed for shipment. This flow produces a bare die that has been temperature-tested at speed
and is known to be good, without having to use a temporary package.
A number of enhancements to the basic ’C2x architecture give the ’C5x a minimum 2x performance over the
previous generation. A four-deep instruction pipeline, incorporating delayed branching, delayed call to
subroutine, and delayed return from subroutine, allows the ’C5x to perform instructions in fewer cycles. The
addition of a PLU gives the ’C5x a method of manipulating bits in data memory without using the accumulator
and ALU. The ’C5x has additional shifting and scaling capability for proper alignment of multiplicands or storage
of values to data memory.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
†
IEEE Standard 1149.1–1990, IEEE Standard Test-Access Port and Boundary-Scan Architecture
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
TMP320C50KGD, TMP320LC50KGD
DIGITAL SIGNAL PROCESSOR
KNOWN GOOD DIE
SGZS008B – JULY 1996 – REVISED JUNE 1999
description (continued)
With the addition of the IDLE2 instruction, the ’C5x achieves low-power consumption. IDLE2 removes the
functional clock from the internal hardware of the ’C5x that puts it into a total-sleep mode using only 5 µA.
A low-logic level on an external interrupt with chip duration of at least five clock cycles ends the IDLE2 mode.
TMP Product Flow; 40 and 57 MHz
Multiprobe
Visual
dc test @ 25°C
40x
Test conditions
DC test
Per commercial data sheet
Hot chuck probe @ 85°C
Hot chuck probe @ 85°C @ Speed
Datasheet upon shipment, 1 year
AC test
Warranty
For electrical and timing specifications, see the TMS320C5x, TMS320LC5x Digital Signal Processors data
sheet, literature number SPRS030.
Specific Die-Related Information
Die Size (approximate)
391 mils x 421 mils
Die Thickness
15.5 mils
SIO2
1 mil
Backside Surface Finish
Die Backside Potential
Floating
175°C
Max Allowable Die Junction Operating Temperature
Glassivation Material and Thickness
Recommended Packing
3KAOX/9KACN
GEL PAK
SILVER GLASS
1.25 AL
Die Attach Information
Suggested Bond Wire Size
Suggested Bonding Method
ESD Sensitivity
WEDGE
Class II
Max Allowable Process Temperature for Die Attach
450°C
2
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
TMP320C50KGD, TMP320LC50KGD
DIGITAL SIGNAL PROCESSOR
KNOWN GOOD DIE
SGZS008B – JULY 1996 – REVISED JUNE 1999
TMP320C50/LC50 Pad Information
PAD XCENTER YCENTER PAD NAME
PAD XCENTER YCENTER PAD NAME
TOP
1
2
5347.4
5161.8
4908.6
4773.6
4573.4
4139.3
3851.3
3515.3
3272.3
3024.8
2777.3
2421.0
2121.1
1702.6
1567.6
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
9670.8
9670.8
9670.8
9670.8
9670.8
9670.8
9670.8
9670.8
9670.8
9670.8
9670.8
9670.8
9670.8
9670.8
9670.8
8552.8
8417.8
7859.8
7616.8
7321.3
7096.3
6871.3
6646.3
6323.9
6098.9
5818.7
5498.0
5363.0
4942.2
4764.3
4601.2
4466.2
4041.0
3789.2
3537.4
3201.4
2949.6
2697.8
2445.9
2035.1
IAQ
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
106.3
106.3
1783.3
1353.6
1218.6
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
106.3
1253.8
1388.8
1902.2
2236.6
2524.8
2882.6
3168.8
3365.0
3625.7
CLKR
TRST
V
DD5
V
DD6
V
SS7
V
SS8
3
V
106.3
SS1
SS2
4
V
BOTTOM
1513.4
1648.4
2128.3
2403.3
2637.3
2912.2
3132.7
3407.7
3628.2
3903.1
4123.6
4398.6
4569.6
4704.6
4896.7
5319.8
5454.8
5646.0
5886.6
6161.6
6527.3
6802.3
7036.3
7311.2
8202.2
8337.2
8649.0
9195.5
10274.3
10274.3
10274.3
10274.3
10274.3
10274.3
10274.3
10274.3
10274.3
5
MP/MC
D15
D14
D13
D12
D11
D10
D9
6
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
7
8
9
10
11
12
13
14
15
D8
V
DD1
V
DD2
V
SS3
V
SS4
LEFT 16
17
V
V
DD7
DD8
18
D7
D6
D5
D4
D3
D2
D1
D0
TMS
TDI
19
V
SS9
20
V
SS10
21
CLKMOD1
A10
22
23
A11
24
A12
25
A13
26
A14
27
V
V
A15
DD3
28
V
V
DD4
DD9
29
TCK
NC
DD10
30
RD
31
V
V
WE
SS5
32
RIGHT
V
V
SS6
SS11
33
INT1
INT2
INT3
INT4
NMI
DR
SS12
34
DS
35
IS
36
PS
37
RW
STRB
BR
38
39
TDR
FSR
40
NC
3
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
TMP320C50KGD, TMP320LC50KGD
DIGITAL SIGNAL PROCESSOR
KNOWN GOOD DIE
SGZS008B – JULY 1996 – REVISED JUNE 1999
TMP320C50/LC50 Pad Information (Continued)
PAD XCENTER YCENTER PAD NAME
81
10274.3
10274.3
10274.3
10274.3
10274.3
10274.3
10274.3
10274.3
10274.3
10274.3
10274.3
10274.3
10274.3
10274.3
10274.3
10274.3
10274.3
10274.3
10274.3
10274.3
10274.3
10274.3
9201.4
3795.5
3950.6
4126.6
4296.2
4459.4
4594.4
4766.7
5085.1
5220.1
5375.3
5579.4
5866.1
6086.8
6379.1
6599.8
6820.5
7180.3
7558.5
8089.5
8224.5
8724.3
8859.3
9670.8
9670.8
9670.8
9670.8
9670.8
9670.8
9670.8
9670.8
9670.8
9670.8
9670.8
9670.8
CLKIN2
X2/CLKIN
X1
82
83
84
NC
85
V
DD11
DD12
86
V
87
TDO
88
V
V
SS13
89
SS14
90
CLKMD2
FSX
91
92
TFSX/TFRM
DX
93
94
TDX
95
HOLDA
XF
96
97
CLKOUT1
IACK
98
99
V
V
DD13
100
DD14
101
NC
102
NC
TOP-R 103
104
EMU0
EMU1/OFF
8796.6
105
8540.1
V
V
SS15
106
8405.1
SS16
107
7927.9
TOUT
108
7690.0
TCLKX
CLKX
109
7456.5
110
7133.8
TFSR/TADD
TCLKR
RS
111
6956.1
112
6771.8
113
6587.5
READY
HOLD
114
6403.1
115
116
117
6016.9
5780.7
5645.7
9670.8
9670.8
9670.8
BIO
V
V
DD15
DD16
4
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
TMP320C50KGD, TMP320LC50KGD
DIGITAL SIGNAL PROCESSOR
KNOWN GOOD DIE
SGZS008B – JULY 1996 – REVISED JUNE 1999
MECHANICAL DATA
MOUNT AND BOND
TMS320C50BS
5
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443
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pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
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DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
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party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1999, Texas Instruments Incorporated
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