TMUX7212-Q1 [TI]
TMUX7212-Q1 44 V, Low-RON, 1:1 (SPST), 4-Channel Precision Switches with Latch-Up Immunity and 1.8-V Logic;
| 型号： | TMUX7212-Q1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | TMUX7212-Q1 44 V, Low-RON, 1:1 (SPST), 4-Channel Precision Switches with Latch-Up Immunity and 1.8-V Logic |
| 文件： | 总42页 (文件大小：2832K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
TMUX721x 44 V, Low-RON, 1:1 (SPST), 4-Channel Precision Switches with Latch-Up
Immunity and 1.8-V Logic
1 Features
3 Description
•
•
•
•
•
Latch-Up Immune
The TMUX7211, TMUX7212, and TMUX7213 are
complementary metal-oxide semiconductor (CMOS)
switches with four independently selectable 1:1,
single-pole, single-throw (SPST) switch channels. The
devices work with a single supply (4.5 V to 44 V), dual
supplies (±4.5 V to ±22 V), or asymmetric supplies
(such as VDD = 12 V, VSS = –5 V). The TMUX721x
supports bidirectional analog and digital signals on the
source (Sx) and drain (Dx) pins ranging from VSS to
Dual Supply Range: ±4.5 V to ±22 V
Single Supply Range: 4.5 V to 44 V
Low On-Resistance: 2 Ω
High Current Support: 330 mA (Maximum)
(WQFN)
High Current Support: 220 mA (Maximum)
(TSSOP)
–40°C to +125°C Operating Temperature
1.8 V Logic Compatible
•
•
•
•
•
•
VDD
.
Fail-Safe Logic
Rail-to-Rail Operation
Bidirectional Operation
The switches of the TMUX721x are controlled with
appropriate logic control inputs on the SELx pins. The
TMUX721x are part of the precision switches and
multiplexers family of devices and have very low on
and off leakage currents allowing them to be used in
high precision measurement applications.
2 Applications
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Sample-and-Hold Circuits
Feedback Gain Switching
Signal Isolation
The TMUX721x family provides latch-up immunity,
preventing undesirable high current events between
parasitic structures within the device typically caused
by overvoltage events. A latch-up condition typically
continues until the power supply rails are turned off
and can lead to device failure. The latch-up immunity
feature allows the TMUX721x family of switches and
multiplexers to be used in harsh environments.
Field Transmitters
Programmable Logic Controllers (PLC)
Factory Automation and Control
Ultrasound Scanners
Patient Monitoring and Diagnostics
Electrocardiogram (ECG)
Data Acquisition Systems (DAQ)
Semiconductor Test Equipment
LCD Test
Device Information(1)
PART NUMBER
TMUX7211
PACKAGE
BODY SIZE (NOM)
Instrumentation: Lab, Analytical, Portable
Ultrasonic Smart Meters: Water and Gas
Optical Networking
TSSOP (16) (PW)
5.00 mm × 4.40 mm
TMUX7212
WQFN (16) (RUM)
4.00 mm × 4.00 mm
Optical Test Equipment
TMUX7213
(1) See the package option addendum at the end of the data
sheet for all available packages.
VDD
SW
VSS
VDD
SW
VSS
VDD
VSS
SW
S1
S2
S3
S4
D1
D2
D3
D4
S1
S2
S3
S4
D1
D2
D3
D4
S1
S2
S3
S4
D1
D2
D3
D4
SW
SW
SW
SW
SW
SW
SW
SW
SW
SEL1
SEL2
SEL3
SEL4
SEL1
SEL2
SEL3
SEL4
SEL1
SEL2
SEL3
SEL4
TMUX7211
(SELx = Logic 1)
TMUX7212
TMUX7213
(SELx = Logic 1)
(SELx = Logic 1)
TMUX721x Block Diagrams
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
Table of Contents
1 Features............................................................................1
2 Applications.....................................................................1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Device Comparison Table...............................................3
6 Pin Configuration and Functions...................................4
7 Specifications.................................................................. 5
7.1 Absolute Maximum Ratings ....................................... 5
7.2 ESD Ratings .............................................................. 5
7.3 Thermal Information ...................................................6
7.4 Recommended Operating Conditions ........................6
7.5 Source or Drain Continuous Current ..........................6
7.6 ±15 V Dual Supply: Electrical Characteristics ...........7
7.7 ±15 V Dual Supply: Switching Characteristics ..........8
7.8 ±20 V Dual Supply: Electrical Characteristics ............9
7.9 ±20 V Dual Supply: Switching Characteristics .........10
7.10 44 V Single Supply: Electrical Characteristics ...... 11
7.11 44 V Single Supply: Switching Characteristics ......12
7.12 12 V Single Supply: Electrical Characteristics ...... 13
7.13 12 V Single Supply: Switching Characteristics ..... 14
7.14 Typical Characteristics............................................15
8 Parameter Measurement Information..........................20
8.1 On-Resistance.......................................................... 20
8.2 Off-Leakage Current................................................. 20
8.3 On-Leakage Current................................................. 21
8.4 tON and tOFF Time......................................................21
8.5 tON (VDD) Time............................................................22
8.6 Propagation Delay.................................................... 22
8.7 Charge Injection........................................................23
8.8 Off Isolation...............................................................23
8.9 Channel-to-Channel Crosstalk..................................24
8.10 Bandwidth............................................................... 24
8.11 THD + Noise............................................................25
8.12 Power Supply Rejection Ratio (PSRR)...................25
9 Detailed Description......................................................26
9.1 Overview...................................................................26
9.2 Functional Block Diagram.........................................26
9.3 Feature Description...................................................26
9.4 Device Functional Modes..........................................28
9.5 Truth Tables.............................................................. 28
10 Application and Implementation................................29
10.1 Application Information........................................... 29
10.2 Typical Application ................................................. 29
11 Power Supply Recommendations..............................31
12 Layout...........................................................................32
12.1 Layout Guidelines................................................... 32
12.2 Layout Example...................................................... 32
13 Device and Documentation Support..........................33
13.1 Documentation Support.......................................... 33
13.2 Receiving Notification of Documentation Updates..33
13.3 Support Resources................................................. 33
13.4 Trademarks.............................................................33
13.5 Electrostatic Discharge Caution..............................33
13.6 Glossary..................................................................33
14 Mechanical, Packaging, and Orderable
Information.................................................................... 33
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision A (March 2021) to Revision B (April 2021)
Page
•
•
Included Break-before-make time delay for TMUX7213 ...................................................................................8
Updated the Charge Injection Compensation figure.........................................................................................27
Changes from Revision * (December 2020) to Revision A (March 2021)
Page
•
•
•
•
•
•
•
Added high current support for WQFN in Features section................................................................................1
Added thermal information for QFN package..................................................................................................... 6
Updated IDC specs for TSSOP package in Source or Drain Continuous Current table .....................................6
Added IDC specs for QFN package in Source or Drain Continuous Current table .............................................6
Updated VDD rise time value from 100ns to 1µs in TON(VDD) test condition........................................................ 8
Updated CL value from 1nF to 100pF in Charge Injection test condition............................................................8
Updated Figure 7-10 Leakage Current vs Temperature .................................................................................. 15
Copyright © 2021 Texas Instruments Incorporated
2
Submit Document Feedback
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
5 Device Comparison Table
PRODUCT
TMUX7211
TMUX7212
DESCRIPTION
Low-Leakage-Current, Precision, 4-Channel, 1:1 (SPST) Switches (Logic Low)
Low-Leakage-Current, Precision, 4-Channel, 1:1 (SPST) Switches (Logic High)
TMUX7213
Low-Leakage-Current, Precision, 4-Channel, 1:1 (SPST) Switches (Logic Low + Logic High)
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
3
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
6 Pin Configuration and Functions
Figure 6-1. PW Package
16-Pin TSSOP
Figure 6-2. RUM Package
16-Pin WQFN
Top View
Top View
Table 6-1. Pin Functions
PIN
TYPE(1)
DESCRIPTION(2)
NAME
D1
TSSOP
WQFN
2
15
10
7
16
13
8
I/O
I/O
I/O
I/O
P
Drain pin 1. Can be an input or output.
Drain pin 2. Can be an input or output.
Drain pin 3. Can be an input or output.
Drain pin 4. Can be an input or output.
Ground (0 V) reference
D2
D3
D4
5
GND
N.C.
S1
5
3
12
3
10
1
—
No internal connection. Can be shorted to GND or left floating.
Source pin 1. Can be an input or output.
I/O
I/O
I/O
I/O
S2
14
11
6
12
9
Source pin 2. Can be an input or output.
S3
Source pin 3. Can be an input or output.
S4
4
Source pin 4. Can be an input or output.
Logic control input 1, has internal pull-down resistor. Controls channel 1 state as shown in Section
9.5.
SEL1
SEL2
SEL3
SEL4
VDD
1
16
9
15
14
7
I
I
Logic control input 2, has internal pull-down resistor. Controls channel 2 state as shown in Section
9.5.
Logic control input 3, has internal pull-down resistor. Controls channel 3 state as shown in Section
9.5.
I
Logic control input 4, has internal pull-down resistor. Controls channel 4 state as shown in Section
9.5.
8
6
I
Positive power supply. This pin is the most positive power-supply potential. For reliable operation,
connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VDD and GND.
13
11
P
Negative power supply. This pin is the most negative power-supply potential. In single-supply
applications, this pin can be connected to ground. For reliable operation, connect a decoupling
capacitor ranging from 0.1 μF to 10 μF between VSS and GND.
VSS
4
2
P
The thermal pad is not connected internally. No requirement to solder this pad, if connected it is
recommended that the pad be left floating or tied to GND
Thermal Pad
—
(1) I = input, O = output, I/O = input and output, P = power.
(2) Refer to Section 9.4 for what to do with unused pins.
Copyright © 2021 Texas Instruments Incorporated
4
Submit Document Feedback
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1) (2)
MIN
MAX
UNIT
V
VDD – VSS
48
VDD
Supply voltage
–0.5
–48
48
V
VSS
0.5
V
VSEL or VEN
ISEL or IEN
VS or VD
IIK
Logic control input pin voltage (SELx)
Logic control input pin current (SELx)
Source or drain voltage (Sx, Dx)
Diode clamp current(3)
–0.5
48
30
V
–30
mA
V
VSS–0.5
–30
VDD+0.5
30
mA
mA
°C
°C
°C
mW
mW
IS or ID (CONT)
TA
Source or drain continuous current (Sx, Dx)
Ambient temperature
IDC + 10 %(4)
–55
–65
150
Tstg
Storage temperature
150
TJ
Junction temperature
150
Total power dissipation (QFN)(5)
Total power dissipation (TSSOP)(5)
1650
Ptot
700
(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress
ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated
under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
(2) All voltages are with respect to ground, unless otherwise specified.
(3) Pins are diode-clamped to the power-supply rails. Over voltage signals must be voltage and current limited to maximum ratings.
(4) Refer to Source or Drain Continuous Current table for IDC specifications.
(5) For QFN package: Ptot derates linearily above TA = 70°C by 24.2mW/°C.
For TSSOP package: Ptot = 700 mW (max) and derates linearily above TA = 70°C by 10.7mW/°C.
7.2 ESD Ratings
VALUE
UNIT
Human body model (HBM), per ANSI/ESDA/
JEDEC JS-001, all pins(1)
±1500
V(ESD)
Electrostatic discharge
V
Charged device model (CDM), per JEDEC
specification JESD22-C101, all pins(2)
±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
5
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
www.ti.com
UNIT
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
7.3 Thermal Information
TMUX721x
THERMAL METRIC(1)
PW (TSSOP)
16 PINS
94.5
RUM (WQFN)
16 PINS
41.5
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
25.5
25.1
41.1
16.5
ΨJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
1.1
0.3
ΨJB
40.4
16.4
RθJC(bot)
N/A
2.9
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
7.4 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
4.5
4.5
VSS
0
NOM
MAX
44
UNIT
V
(1)
VDD – VSS
VDD
Power supply voltage differential
Positive power supply voltage
44
V
VS or VD
Signal path input/output voltage (source or drain pin) (Sx, D)
Address or enable pin voltage
VDD
44
V
VSEL or VEN
V
(2)
IS or ID (CONT) Source or drain continuous current (Sx, D)
TA Ambient temperature
IDC
mA
°C
–40
125
(1) VDD and VSS can be any value as long as 4.5 V ≤ (VDD – VSS) ≤ 44 V, and the minimum VDD is met.
(2) Refer to Source or Drain Continuous Current table for IDC specifications.
7.5 Source or Drain Continuous Current
at supply voltage of VDD ± 10%, VSS ± 10 % (unless otherwise noted)
(2)
CONTINUOUS CURRENT PER CHANNEL (IDC
PACKAGE TEST CONDITIONS
+44 V Dual Supply(1)
)
TA = 25°C
TA = 85°C
160
TA = 125°C
UNIT
220
100
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
±15 V Dual Supply
+12 V Single Supply
±5 V Dual Supply
220
190
170
130
330
330
260
240
180
160
130
120
90
100
90
PW (TSSOP)
RUM (WQFN)
80
+5 V Single Supply
+44 V Single Supply(1)
±15 V Dual Supply
+12 V Single Supply
±5 V Dual Supply
60
220
220
180
160
120
120
120
110
100
80
+5 V Single Supply
(1) Specified for nominal supply voltage only.
(2) Refer to Total power dissipation (Ptot) limits in Absolute Maximum Ratings table that must be followed with max continuous current
specification.
Copyright © 2021 Texas Instruments Incorporated
6
Submit Document Feedback
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
7.6 ±15 V Dual Supply: Electrical Characteristics
VDD = +15 V ± 10%, VSS = –15 V ±10%, GND = 0 V (unless otherwise noted)
Typical at VDD = +15 V, VSS = –15 V, TA = 25℃ (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX UNIT
ANALOG SWITCH
25°C
2
2.7
3.4
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
VS = –10 V to +10 V
ID = –10 mA
Refer to On-Resistance
RON
On-resistance
–40°C to +85°C
–40°C to +125°C
25°C
4
0.1
0.2
0.18
0.19
0.21
0.46
0.65
0.7
VS = –10 V to +10 V
ID = –10 mA
Refer to On-Resistance
On-resistance mismatch between
channels
ΔRON
–40°C to +85°C
–40°C to +125°C
25°C
VS = –10 V to +10 V
IS = –10 mA
Refer to On-Resistance
RON FLAT On-resistance flatness
RON DRIFT On-resistance drift
–40°C to +85°C
–40°C to +125°C
VS = 0 V, IS = –10 mA
Refer to On-Resistance
–40°C to +125°C
0.008
0.05
Ω/°C
VDD = 16.5 V, VSS = –16.5 V
Switch state is off
VS = +10 V / –10 V
25°C
–0.25
–3
0.25
3
nA
nA
–40°C to +85°C
IS(OFF)
Source off leakage current(1)
VD = –10 V / + 10 V
Refer to Off-Leakage Current
–40°C to +125°C
–20
20
nA
VDD = 16.5 V, VSS = –16.5 V
Switch state is off
VS = +10 V / –10 V
VD = –10 V / + 10 V
Refer to Off-Leakage Current
25°C
–0.25
–3
0.05
0.1
0.25
3
nA
nA
–40°C to +85°C
ID(OFF)
Drain off leakage current(1)
–40°C to +125°C
–20
20
nA
VDD = 16.5 V, VSS = –16.5 V
Switch state is on
VS = VD = ±10 V
25°C
–0.4
–1
0.4
1
nA
nA
nA
IS(ON)
ID(ON)
Channel on leakage current(2)
–40°C to +85°C
–40°C to +125°C
–3
3
Refer to On-Leakage Current
LOGIC INPUTS (SEL / EN pins)
VIH
VIL
IIH
Logic voltage high
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
1.3
0
44
0.8
1.2
V
Logic voltage low
V
Input leakage current
Input leakage current
Logic input capacitance
0.4
µA
µA
pF
IIL
–0.1 –0.005
3.5
CIN
POWER SUPPLY
25°C
35
5
56
65
80
20
24
35
µA
µA
µA
µA
µA
µA
VDD = 16.5 V, VSS = –16.5 V
Logic inputs = 0 V, 5 V, or VDD
IDD
VDD supply current
–40°C to +85°C
–40°C to +125°C
25°C
VDD = 16.5 V, VSS = –16.5 V
Logic inputs = 0 V, 5 V, or VDD
ISS
VSS supply current
–40°C to +85°C
–40°C to +125°C
(1) When VS is positive, VD is negative, or when VS is negative, VD is positive.
(2) When VS is at a voltage potential, VD is floating, or when VD is at a voltage potential, VS is floating.
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
7
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
7.7 ±15 V Dual Supply: Switching Characteristics
VDD = +15 V ± 10%, VSS = –15 V ± 10%, GND = 0 V (unless otherwise noted)
Typical at VDD = +15 V, VSS = –15 V, TA = 25℃ (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX UNIT
VS = 10 V
25°C
100
175
205
225
205
225
240
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ms
ms
RL = 300 Ω, CL = 35 pF
Refer to Turn-on and Turn-off
Time
–40°C to +85°C
–40°C to +125°C
25°C
tON
Turn-on time from control input
VS = 10 V
80
27
RL = 300 Ω, CL = 35 pF
Refer to Turn-on and Turn-off
Time
–40°C to +85°C
–40°C to +125°C
25°C
tOFF
Turn-off time from control input
Break-before-make time delay
(TMUX7213 Only)
VS = 10 V,
RL = 300 Ω, CL = 35 pF
tBBM
–40°C to +85°C
–40°C to +125°C
25°C
5
5
0.17
0.18
0.18
VDD rise time = 1 µs
RL = 300 Ω, CL = 35 pF
Refer to Turn-on (VDD) Time
Device turn on time
(VDD to output)
tON (VDD)
–40°C to +85°C
–40°C to +125°C
RL = 50 Ω , CL = 5 pF
Refer to Propagation Delay
tPD
Propagation delay
Charge injection
25°C
25°C
260
60
ps
VS = 0 V, CL = 100 pF
Refer to Charge Injection
QINJ
pC
RL = 50 Ω , CL = 5 pF
VS = 0 V, f = 100 kHz
Refer to Off Isolation
OISO
Off-isolation
Off-isolation
Crosstalk
25°C
25°C
25°C
25°C
–70
–50
dB
dB
dB
dB
RL = 50 Ω , CL = 5 pF
VS = 0 V, f = 1 MHz
Refer to Off Isolation
OISO
RL = 50 Ω , CL = 5 pF
VS = 0 V, f = 100 kHz
Refer to Crosstalk
XTALK
–114
–93
RL = 50 Ω , CL = 5 pF
VS = 0 V, f = 1MHz
Refer to Crosstalk
XTALK
Crosstalk
RL = 50 Ω , CL = 5 pF
VS = 0 V
Refer to Bandwidth
BW
IL
–3dB Bandwidth
Insertion loss
25°C
25°C
56
MHz
dB
RL = 50 Ω , CL = 5 pF
VS = 0 V, f = 1 MHz
–0.15
VPP = 0.62 V on VDD and VSS
RL = 50 Ω , CL = 5 pF,
f = 1 MHz
ACPSRR AC Power Supply Rejection Ratio
25°C
25°C
–68
dB
%
Refer to ACPSRR
VPP = 15 V, VBIAS = 0 V
RL = 10 kΩ , CL = 5 pF,
f = 20 Hz to 20 kHz
THD+N
Total Harmonic Distortion + Noise
0.0004
Refer to THD + Noise
CS(OFF)
CD(OFF)
Source off capacitance
Drain off capacitance
VS = 0 V, f = 1 MHz
VS = 0 V, f = 1 MHz
25°C
25°C
28
45
pF
pF
CS(ON),
CD(ON)
On capacitance
VS = 0 V, f = 1 MHz
25°C
145
pF
Copyright © 2021 Texas Instruments Incorporated
8
Submit Document Feedback
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
7.8 ±20 V Dual Supply: Electrical Characteristics
VDD = +20 V ± 10%, VSS = –20 V ±10%, GND = 0 V (unless otherwise noted)
Typical at VDD = +20 V, VSS = –20 V, TA = 25℃ (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX UNIT
ANALOG SWITCH
25°C
1.7
2.5
3
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
VS = –15 V to +15 V
ID = –10 mA
Refer to On-Resistance
RON
On-resistance
–40°C to +85°C
–40°C to +125°C
25°C
3.6
0.1
0.3
0.18
0.19
0.21
0.6
VS = –15 V to +15 V
ID = –10 mA
Refer to On-Resistance
On-resistance mismatch between
channels
ΔRON
–40°C to +85°C
–40°C to +125°C
25°C
VS = –15 V to +15 V
IS = –10 mA
Refer to On-Resistance
RON FLAT On-resistance flatness
RON DRIFT On-resistance drift
–40°C to +85°C
–40°C to +125°C
0.8
0.95
VS = 0 V, IS = –10 mA
Refer to On-Resistance
–40°C to +125°C
0.008
0.05
Ω/°C
VDD = 22 V, VSS = –22 V
Switch state is off
VS = +15 V / –15 V
25°C
–1
1
nA
nA
–40°C to +85°C
–4.5
4.5
IS(OFF)
Source off leakage current(1)
VD = –15 V / + 15 V
Refer to Off-Leakage Current
–40°C to +125°C
–33
33
nA
VDD = 22 V, VSS = –22 V
Switch state is off
VS = +15 V / –15 V
VD = –15 V / + 15 V
Refer to Off-Leakage Current
25°C
–1
0.1
0.1
1
nA
nA
–40°C to +85°C
–4.5
4.5
ID(OFF)
Drain off leakage current(1)
–40°C to +125°C
–33
33
nA
VDD = 22 V, VSS = –22 V
Switch state is on
VS = VD = ±15 V
25°C
–1
–1.5
–8
1
1.5
8
nA
nA
nA
IS(ON)
ID(ON)
Channel on leakage current(2)
–40°C to +85°C
–40°C to +125°C
Refer to On-Leakage Current
LOGIC INPUTS (SEL / EN pins)
VIH
VIL
IIH
Logic voltage high
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
1.3
0
44
0.8
1.2
V
Logic voltage low
V
Input leakage current
Input leakage current
Logic input capacitance
0.4
µA
µA
pF
IIL
–0.1 –0.005
3.5
CIN
POWER SUPPLY
25°C
33
7
65
74
90
26
30
45
µA
µA
µA
µA
µA
µA
VDD = 22 V, VSS = –22 V
Logic inputs = 0 V, 5 V, or VDD
IDD
VDD supply current
–40°C to +85°C
–40°C to +125°C
25°C
VDD = 22 V, VSS = –22 V
Logic inputs = 0 V, 5 V, or VDD
ISS
VSS supply current
–40°C to +85°C
–40°C to +125°C
(1) When VS is positive, VD is negative, or when VS is negative, VD is positive.
(2) When VS is at a voltage potential, VD is floating, or when VD is at a voltage potential, VS is floating.
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
9
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
7.9 ±20 V Dual Supply: Switching Characteristics
VDD = +20 V ± 10%, VSS = –20 V ±10%, GND = 0 V (unless otherwise noted)
Typical at VDD = +20 V, VSS = –20 V, TA = 25℃ (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX UNIT
VS = 10 V
25°C
100
185
210
230
210
225
235
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ms
ms
RL = 300 Ω, CL = 35 pF
Refer to Turn-on and Turn-off
Time
–40°C to +85°C
–40°C to +125°C
25°C
tON
Turn-on time from control input
VS = 10 V
90
28
RL = 300 Ω, CL = 35 pF
Refer to Turn-on and Turn-off
Time
–40°C to +85°C
–40°C to +125°C
25°C
tOFF
Turn-off time from control input
Break-before-make time delay
(TMUX7213 Only)
VS = 10 V,
RL = 300 Ω, CL = 35 pF
tBBM
–40°C to +85°C
–40°C to +125°C
25°C
10
10
0.17
0.18
0.18
VDD rise time = 1 µs
RL = 300 Ω, CL = 35 pF
Refer to Turn-on (VDD) Time
Device turn on time
(VDD to output)
tON (VDD)
–40°C to +85°C
–40°C to +125°C
RL = 50 Ω , CL = 5 pF
Refer to Propagation Delay
tPD
Propagation delay
Charge injection
25°C
25°C
260
92
ps
VS = 0 V, CL = 100 pF
Refer to Charge Injection
QINJ
pC
RL = 50 Ω , CL = 5 pF
VS = 0 V, f = 100 kHz
Refer to Off Isolation
OISO
Off-isolation
Off-isolation
Crosstalk
25°C
25°C
25°C
25°C
–70
–50
dB
dB
dB
dB
RL = 50 Ω , CL = 5 pF
VS = 0 V, f = 1 MHz
Refer to Off Isolation
OISO
RL = 50 Ω , CL = 5 pF
VS = 0 V, f = 100 kHz
Refer to Crosstalk
XTALK
–112
–93
RL = 50 Ω , CL = 5 pF
VS = 0 V, f = 1MHz
Refer to Crosstalk
XTALK
Crosstalk
RL = 50 Ω , CL = 5 pF
VS = 0 V
Refer to Bandwidth
BW
IL
–3dB Bandwidth
Insertion loss
25°C
25°C
48
MHz
dB
RL = 50 Ω , CL = 5 pF
VS = 0 V, f = 1 MHz
–0.14
VPP = 0.62 V on VDD and VSS
RL = 50 Ω , CL = 5 pF,
f = 1 MHz
ACPSRR AC Power Supply Rejection Ratio
25°C
25°C
–68
dB
%
Refer to ACPSRR
VPP = 20 V, VBIAS = 0 V
RL = 10 kΩ , CL = 5 pF,
f = 20 Hz to 20 kHz
THD+N
Total Harmonic Distortion + Noise
0.0003
Refer to THD + Noise
CS(OFF)
CD(OFF)
Source off capacitance
Drain off capacitance
VS = 0 V, f = 1 MHz
VS = 0 V, f = 1 MHz
25°C
25°C
28
45
pF
pF
CS(ON),
CD(ON)
On capacitance
VS = 0 V, f = 1 MHz
25°C
145
pF
Copyright © 2021 Texas Instruments Incorporated
10
Submit Document Feedback
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
7.10 44 V Single Supply: Electrical Characteristics
VDD = +44 V, VSS = 0 V, GND = 0 V (unless otherwise noted)
Typical at VDD = +44 V, VSS = 0 V, TA = 25℃ (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX UNIT
ANALOG SWITCH
25°C
2
2.4
3.2
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
VS = 0 V to 40 V
ID = –10 mA
Refer to On-Resistance
RON
On-resistance
–40°C to +85°C
–40°C to +125°C
25°C
3.8
0.1
0.18
0.19
0.21
0.8
VS = 0 V to 40 V
ID = –10 mA
Refer to On-Resistance
On-resistance mismatch between
channels
ΔRON
–40°C to +85°C
–40°C to +125°C
25°C
0.65
VS = 0 V to 40 V
ID = –10 mA
Refer to On-Resistance
RON FLAT On-resistance flatness
RON DRIFT On-resistance drift
–40°C to +85°C
–40°C to +125°C
1.1
1.2
VS = 22 V, IS = –10 mA
Refer to On-Resistance
–40°C to +125°C
0.007
0.05
Ω/°C
VDD = 44 V, VSS = 0 V
Switch state is off
VS = 40 V / 1 V
25°C
–1
–7
1
7
nA
nA
–40°C to +85°C
IS(OFF)
Source off leakage current(1)
VD = 1 V / 40 V
Refer to Off-Leakage Current
–40°C to +125°C
–50
50
nA
VDD = 44 V, VSS = 0 V
Switch state is off
VS = 40 V / 1 V
VD = 1 V / 40 V
Refer to Off-Leakage Current
25°C
–1
–7
0.05
0.05
1
7
nA
nA
–40°C to +85°C
ID(OFF)
Drain off leakage current(1)
–40°C to +125°C
–50
50
nA
VDD = 44 V, VSS = 0 V
Switch state is on
VS = VD = 40 V or 1 V
Refer to On-Leakage Current
25°C
–1
–3.5
–5
1
3.5
5
nA
nA
nA
IS(ON)
ID(ON)
Channel on leakage current(2)
–40°C to +85°C
–40°C to +125°C
LOGIC INPUTS (SEL / EN pins)
VIH
VIL
IIH
Logic voltage high
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
1.3
0
44
0.8
1.2
V
Logic voltage low
V
Input leakage current
Input leakage current
Logic input capacitance
0.6
µA
µA
pF
IIL
–0.1 –0.005
3.5
CIN
POWER SUPPLY
25°C
44
79
88
µA
µA
µA
VDD = 44 V, VSS = 0 V
Logic inputs = 0 V, 5 V, or VDD
IDD
VDD supply current
–40°C to +85°C
–40°C to +125°C
105
(1) When VS is positive, VD is negative, or when VS is negative, VD is positive.
(2) When VS is at a voltage potential, VD is floating, or when VD is at a voltage potential, VS is floating.
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
11
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
7.11 44 V Single Supply: Switching Characteristics
VDD = +44 V, VSS = 0 V, GND = 0 V (unless otherwise noted)
Typical at VDD = +44 V, VSS = 0 V, TA = 25℃ (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX UNIT
VS = 18 V
25°C
80
185
205
225
205
220
228
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ms
ms
RL = 300 Ω, CL = 35 pF
Refer to Turn-on and Turn-off
Time
–40°C to +85°C
–40°C to +125°C
25°C
tON
Turn-on time from control input
VS = 18 V
90
27
RL = 300 Ω, CL = 35 pF
Refer to Turn-on and Turn-off
Time
–40°C to +85°C
–40°C to +125°C
25°C
tOFF
Turn-off time from control input
Break-before-make time delay
(TMUX7213 Only)
VS = 18 V,
RL = 300 Ω, CL = 35 pF
tBBM
–40°C to +85°C
–40°C to +125°C
25°C
10
10
0.14
0.15
0.15
VDD rise time = 1 µs
RL = 300 Ω, CL = 35 pF
Refer to Turn-on (VDD) Time
Device turn on time
(VDD to output)
tON (VDD)
–40°C to +85°C
–40°C to +125°C
RL = 50 Ω , CL = 5 pF
Refer to Propagation Delay
tPD
Propagation delay
Charge injection
25°C
25°C
270
104
ps
VS = 22 V, CL = 100 pF
Refer to Charge Injection
QINJ
pC
RL = 50 Ω , CL = 5 pF
VS = 6 V, f = 100 kHz
Refer to Off Isolation
OISO
Off-isolation
Off-isolation
Crosstalk
25°C
25°C
25°C
25°C
–70
–50
dB
dB
dB
dB
RL = 50 Ω , CL = 5 pF
VS = 6 V, f = 1 MHz
Refer to Off Isolation
OISO
RL = 50 Ω , CL = 5 pF
VS = 6 V, f = 100 kHz
Refer to Crosstalk
XTALK
–112
–93
RL = 50 Ω , CL = 5 pF
VS = 6 V, f = 1MHz
Refer to Crosstalk
XTALK
Crosstalk
RL = 50 Ω , CL = 5 pF
VS = 6 V
Refer to Bandwidth
BW
IL
–3dB Bandwidth
Insertion loss
25°C
25°C
46
MHz
dB
RL = 50 Ω , CL = 5 pF
VS = 6 V, f = 1 MHz
–0.15
VPP = 0.62 V on VDD and VSS
RL = 50 Ω , CL = 5 pF,
f = 1 MHz
ACPSRR AC Power Supply Rejection Ratio
25°C
25°C
–66
dB
%
Refer to ACPSRR
VPP = 22 V, VBIAS = 22 V
RL = 10 kΩ , CL = 5 pF,
f = 20 Hz to 20 kHz
THD+N
Total Harmonic Distortion + Noise
0.0003
Refer to THD + Noise
CS(OFF)
CD(OFF)
Source off capacitance
Drain off capacitance
VS = 22 V, f = 1 MHz
VS = 22 V, f = 1 MHz
25°C
25°C
28
45
pF
pF
CS(ON),
CD(ON)
On capacitance
VS = 22 V, f = 1 MHz
25°C
145
pF
Copyright © 2021 Texas Instruments Incorporated
12
Submit Document Feedback
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
7.12 12 V Single Supply: Electrical Characteristics
VDD = +12 V ± 10%, VSS = 0 V, GND = 0 V (unless otherwise noted)
Typical at VDD = +12 V, VSS = 0 V, TA = 25℃ (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX UNIT
ANALOG SWITCH
25°C
2.8
5.4
6.8
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
VS = 0 V to 10 V
ID = –10 mA
Refer to On-Resistance
RON
On-resistance
–40°C to +85°C
–40°C to +125°C
25°C
7.4
0.13
1
0.21
0.23
0.25
1.7
VS = 0 V to 10 V
ID = –10 mA
Refer to On-Resistance
On-resistance mismatch between
channels
ΔRON
–40°C to +85°C
–40°C to +125°C
25°C
VS = 0 V to 10 V
IS = –10 mA
Refer to On-Resistance
RON FLAT On-resistance flatness
RON DRIFT On-resistance drift
–40°C to +85°C
–40°C to +125°C
1.9
2
VS = 6 V, IS = –10 mA
Refer to On-Resistance
–40°C to +125°C
0.015
0.01
Ω/°C
VDD = 13.2 V, VSS = 0 V
Switch state is off
VS = 10 V / 1 V
25°C
–0.25
–2
0.25
2
nA
nA
–40°C to +85°C
IS(OFF)
Source off leakage current(1)
VD = 1 V / 10 V
Refer to Off-Leakage Current
–40°C to +125°C
–16
16
nA
VDD = 13.2 V, VSS = 0 V
Switch state is off
VS = 10 V / 1 V
VD = 1 V / 10 V
Refer to Off-Leakage Current
25°C
–0.25
–2
0.05
0.05
0.25
2
nA
nA
–40°C to +85°C
ID(OFF)
Drain off leakage current(1)
–40°C to +125°C
–16
16
nA
VDD = 13.2 V, VSS = 0 V
Switch state is on
VS = VD = 10 V or 1 V
Refer to On-Leakage Current
25°C
–0.5
–1
0.5
1
nA
nA
nA
IS(ON)
ID(ON)
Channel on leakage current(2)
–40°C to +85°C
–40°C to +125°C
–3
3
LOGIC INPUTS (SEL / EN pins)
VIH
VIL
IIH
Logic voltage high
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
1.3
0
44
0.8
1.2
V
Logic voltage low
V
Input leakage current
Input leakage current
Logic input capacitance
0.4
µA
µA
pF
IIL
–0.1 –0.005
3.5
CIN
POWER SUPPLY
25°C
30
44
52
62
µA
µA
µA
VDD = 13.2 V, VSS = 0 V
Logic inputs = 0 V, 5 V, or VDD
IDD
VDD supply current
–40°C to +85°C
–40°C to +125°C
(1) When VS is positive, VD is negative, or when VS is negative, VD is positive.
(2) When VS is at a voltage potential, VD is floating, or when VD is at a voltage potential, VS is floating.
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
13
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
7.13 12 V Single Supply: Switching Characteristics
VDD = +12 V ± 10%, VSS = 0 V, GND = 0 V (unless otherwise noted)
Typical at VDD = +12 V, VSS = 0 V, TA = 25℃ (unless otherwise noted)
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX UNIT
VS = 8 V
25°C
170
225
276
315
248
285
310
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ms
ms
RL = 300 Ω, CL = 35 pF
Refer to Turn-on and Turn-off
Time
–40°C to +85°C
–40°C to +125°C
25°C
tON
Turn-on time from control input
VS = 8 V
75
30
RL = 300 Ω, CL = 35 pF
Refer to Turn-on and Turn-off
Time
–40°C to +85°C
–40°C to +125°C
25°C
tOFF
Turn-off time from control input
Break-before-make time delay
(TMUX7213 Only)
VS = 8 V,
RL = 300 Ω, CL = 35 pF
tBBM
–40°C to +85°C
–40°C to +125°C
25°C
13
13
0.17
0.18
0.18
VDD rise time = 1 µs
RL = 300 Ω, CL = 35 pF
Refer to Turn-on (VDD) Time
Device turn on time
(VDD to output)
tON (VDD)
–40°C to +85°C
–40°C to +125°C
RL = 50 Ω , CL = 5 pF
Refer to Propagation Delay
tPD
Propagation delay
Charge injection
25°C
25°C
270
12
ps
VS = 6 V, CL = 100 pF
Refer to Charge Injection
QINJ
pC
RL = 50 Ω , CL = 5 pF
VS = 6 V, f = 100 kHz
Refer to Off Isolation
OISO
Off-isolation
Off-isolation
Crosstalk
25°C
25°C
25°C
25°C
–70
–50
dB
dB
dB
dB
RL = 50 Ω , CL = 5 pF
VS = 6 V, f = 1 MHz
Refer to Off Isolation
OISO
RL = 50 Ω , CL = 5 pF
VS = 6 V, f = 100 kHz
Refer to Crosstalk
XTALK
–112
–93
RL = 50 Ω , CL = 5 pF
VS = 6 V, f = 1MHz
Refer to Crosstalk
XTALK
Crosstalk
RL = 50 Ω , CL = 5 pF
VS = 6 V
Refer to Bandwidth
BW
IL
–3dB Bandwidth
Insertion loss
25°C
25°C
125
MHz
dB
RL = 50 Ω , CL = 5 pF
VS = 6 V, f = 1 MHz
–0.25
VPP = 0.62 V on VDD and VSS
RL = 50 Ω , CL = 5 pF,
f = 1 MHz
ACPSRR AC Power Supply Rejection Ratio
25°C
25°C
–70
dB
%
Refer to ACPSRR
VPP = 6 V, VBIAS = 6 V
RL = 10 kΩ , CL = 5 pF,
f = 20 Hz to 20 kHz
THD+N
Total Harmonic Distortion + Noise
0.0001
Refer to THD + Noise
CS(OFF)
CD(OFF)
CS(ON)
CD(ON)
Source off capacitance
Drain off capacitance
VS = 6 V, f = 1 MHz
VS = 6 V, f = 1 MHz
25°C
25°C
35
50
pF
pF
,
On capacitance
VS = 6 V, f = 1 MHz
25°C
145
pF
Copyright © 2021 Texas Instruments Incorporated
14
Submit Document Feedback
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
7.14 Typical Characteristics
at TA = 25°C (unless otherwise noted)
.
.
Figure 7-1. On-Resistance vs Source or Drain Voltage - Dual
Supply
Figure 7-2. On-Resistance vs Source or Drain Voltage - Dual
Supply
.
.
Figure 7-3. On-Resistance vs Source or Drain Voltage - Single
Supply
Figure 7-4. On-Resistance vs Source or Drain Voltage - Single
Supply
VDD = 15 V, VSS = -15 V
VDD = 20 V, VSS = -20V
Figure 7-5. On-Resistance vs Temperature
Figure 7-6. On-Resistance vs Temperature
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
15
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
7.14 Typical Characteristics (continued)
at TA = 25°C (unless otherwise noted)
VDD = 12 V, VSS = 0 V
VDD = 36 V, VSS = 0 V
Figure 7-7. On-Resistance vs Temperature
Figure 7-8. On-Resistance vs Temperature
15
ID(OFF) VS/VD= –10V/10V
ID(OFF) VS/VD = 10V/–10V
I(ON) Vs/Vd = –10V/–10V
I(ON) Vs/Vd = 10V/10V
IS(OFF) Vs/Vd = –10V/10V
IS(OFF) Vs/Vd = 10V/–10V
10
5
0
-5
-10
-15
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
VDD = 20 V, VSS = -20V
VDD = 15 V, VSS = -15 V
Figure 7-9. Leakage Current vs Temperature
Figure 7-10. Leakage Current vs Temperature
30
ID(OFF) Vs/Vd = 1V/30V
ID(OFF) Vs/Vd = 30V/1V
25
20
15
10
5
I(ON) Vs/Vd = 1V/1V
I(ON) Vs/Vd = 30V/30V
IS(OFF) Vs/Vd = 1V/30V
IS(OFF) Vs/Vd = 30V/1V
0
-5
-10
-15
-20
-25
-30
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
VDD = 36 V, VSS = 0 V
VDD = 12 V, VSS = 0 V
Figure 7-11. Leakage Current vs Temperature
Figure 7-12. Leakage Current vs Temperature
Copyright © 2021 Texas Instruments Incorporated
16
Submit Document Feedback
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
7.14 Typical Characteristics (continued)
at TA = 25°C (unless otherwise noted)
.
.
Figure 7-13. Supply Current vs Logic Voltage
Figure 7-14. Charge Injection vs Source Voltage - Dual Supply
.
.
Figure 7-15. Charge Injection vs Drain Voltage - Dual Supply
Figure 7-16. Charge Injection vs Source Voltage - Single Supply
.
VDD = 15 V, VSS = -15 V
Figure 7-17. Charge Injection vs Drain Voltage - Single Supply
Figure 7-18. TON and TOFF vs Temperature
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
17
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
7.14 Typical Characteristics (continued)
at TA = 25°C (unless otherwise noted)
.
VDD = 36 V, VSS = 0 V
Figure 7-20. Off-Isolation vs Frequency
Figure 7-19. TON and TOFF vs Temperature
.
VDD = +15 V, VSS = -15 V
Figure 7-21. Off-Isolation vs Frequency
Figure 7-22. Crosstalk vs Frequency
.
.
Figure 7-23. THD+N vs Frequency (Dual Supplies)
Figure 7-24. THD+N vs Frequency (Single Supplies)
Copyright © 2021 Texas Instruments Incorporated
18
Submit Document Feedback
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
7.14 Typical Characteristics (continued)
at TA = 25°C (unless otherwise noted)
VDD = +15 V, VSS = -15 V
VDD = +15 V, VSS = -15 V
Figure 7-26. ACPSRR vs Frequency
Figure 7-25. On Response vs Frequency
VDD = +15 V, VSS = -15 V
VDD = 12 V, VSS = 0 V
Figure 7-27. Capacitance vs Source Voltage or Drain Voltage
Figure 7-28. Capacitance vs Source Voltage or Drain Voltage
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
19
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
8 Parameter Measurement Information
8.1 On-Resistance
The on-resistance of a device is the ohmic resistance between the source (Sx) and drain (Dx) pins of the
device. The on-resistance varies with input voltage and supply voltage. The symbol RON is used to denote
on-resistance. The measurement setup used to measure RON is shown in Figure 8-1. Voltage (V) and current
(ISD) are measured using this setup, and RON is computed with RON = V / ISD
:
V
ISD
Sx
Dx
VS
Figure 8-1. On-Resistance Measurement Setup
8.2 Off-Leakage Current
There are two types of leakage currents associated with a switch during the off state:
1. Source off-leakage current.
2. Drain off-leakage current.
Source leakage current is defined as the leakage current flowing into or out of the source pin when the switch is
off. This current is denoted by the symbol IS(OFF)
Drain leakage current is defined as the leakage current flowing into or out of the drain pin when the switch is off.
This current is denoted by the symbol ID(OFF)
The setup used to measure both off-leakage currents is shown in Figure 8-2.
.
.
VDD
VSS
VDD
VSS
Is (OFF)
ID (OFF)
S1
D1
D1
S1
A
A
VD
VD
VS
VS
Is (OFF)
ID (OFF)
D4
S4
S4
D4
A
A
GND
GND
VS
VS
VD
VD
IS(OFF)
ID(OFF)
Figure 8-2. Off-Leakage Measurement Setup
Copyright © 2021 Texas Instruments Incorporated
20
Submit Document Feedback
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
8.3 On-Leakage Current
Source on-leakage current is defined as the leakage current flowing into or out of the source pin when the switch
is on. This current is denoted by the symbol IS(ON)
.
Drain on-leakage current is defined as the leakage current flowing into or out of the drain pin when the switch is
on. This current is denoted by the symbol ID(ON)
.
Either the source pin or drain pin is left floating during the measurement. Figure 8-3 shows the circuit used for
measuring the on-leakage current, denoted by IS(ON) or ID(ON)
.
VDD
VSS
VDD
VSS
Is (ON)
ID (ON)
S1
D1
D1
S1
N.C.
N.C.
A
A
VD
VS
Is (ON)
ID (ON)
D4
S4
S4
D4
A
N.C.
N.C.
A
GND
GND
VS
VD
IS(ON)
ID(ON)
Figure 8-3. On-Leakage Measurement Setup
8.4 tON and tOFF Time
Turn-on time is defined as the time taken by the output of the device to rise to 90% after the enable has risen
past the logic threshold. The 90% measurement is utilized to provide the timing of the device. System level
timing can then account for the time constant added from the load resistance and load capacitance. Figure 8-4
shows the setup used to measure turn-on time, denoted by the symbol tON
.
Turn-off time is defined as the time taken by the output of the device to fall to 10% after the enable has fallen
past the logic threshold. The 10% measurement is utilized to provide the timing of the device. System level
timing can then account for the time constant added from the load resistance and load capacitance. Figure 8-4
shows the setup used to measure turn-off time, denoted by the symbol tOFF
.
VDD
VSS
0.1 µF
0.1 µF
3 V
0 V
VDD
VSS
VEN
tr < 20 ns
tf < 20 ns
50%
50%
Sx
Dx
Output
tON
tOFF
90%
RL
CL
Output
10%
GND
VSELx
0 V
Figure 8-4. Turn-On and Turn-Off Time Measurement Setup
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
21
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
8.5 tON (VDD) Time
The tON (VDD) time is defined as the time taken by the output of the device to rise to 90% after the supply has
risen past the supply threshold. The 90% measurement is used to provide the timing of the device turning on in
the system. Figure 8-5 shows the setup used to measure turn on time, denoted by the symbol tON (VDD)
.
VSS
0.1 µF
VDD
Supply
Ramp
VDD
VDD
VSS
tr = 10 µs
4.5 V
VS
D1
D4
Output
CL
S1
S4
0 V
tON
RL
Output
CL
VS
90%
Output
0 V
3 V
SELx
GND
Figure 8-5. tON (VDD) Time Measurement Setup
8.6 Propagation Delay
Propagation delay is defined as the time taken by the output of the device to rise or fall 50% after the input signal
has risen or fallen past the 50% threshold. Figure 8-6 shows the setup used to measure propagation delay,
denoted by the symbol tPD
.
VDD
VSS
0.1 µF
0.1 µF
250 mV
Input
(VS)
VDD
S1
VSS
50%
50%
tr < 40ps
tf < 40ps
50 ꢀ
50 ꢀ
Output
CL
D1
D4
VS
0 V
tPD
1
tPD 2
RL
S4
Output
VS
Output
0 V
50%
50%
RL
CL
GND
tProp Delay = max ( tPD 1, tPD 2)
Figure 8-6. Propagation Delay Measurement Setup
Copyright © 2021 Texas Instruments Incorporated
22
Submit Document Feedback
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
8.7 Charge Injection
The TMUX721x devices have a transmission-gate topology. Any mismatch in capacitance between the NMOS
and PMOS transistors results in a charge injected into the drain or source during the falling or rising edge of the
gate signal. The amount of charge injected into the source or drain of the device is known as charge injection,
and is denoted by the symbol QC. Figure 8-7 shows the setup used to measure charge injection from source
(Sx) to drain (Dx).
VDD
VSS
0.1 µF
0.1 µF
3 V
VSEL
VDD
VSS
tr < 20 ns
tf < 20 ns
S1
S4
Output
CL
D1
D4
0 V
Output
CL
Output
VS
VOUT
SELx
QINJ = CL ×
VOUT
VSEL
GND
Figure 8-7. Charge-Injection Measurement Setup
8.8 Off Isolation
Off isolation is defined as the ratio of the signal at the drain pin (Dx) of the device when a signal is applied to
the source pin (Sx) of an off-channel. The characteristic impedance, Z0, for the measurement is 50 Ω. Figure 8-8
shows the setup used to measure off isolation. Use off isolation equation to compute off isolation.
VDD
VSS
0.1 µF
0.1 µF
VDD
VSS
Network Analyzer
VS
S1
D1
50Ω
VOUT
VSIG
50Ω
Sx/Dx
50Ω
GND
8176
1BB +OKH=PEKJ = 20 × .KC
8
5
Figure 8-8. Off Isolation Measurement Setup
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
23
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
8.9 Channel-to-Channel Crosstalk
Crosstalk is defined as the ratio of the signal at the drain pin (Dx) of a different channel, when a signal is applied
at the source pin (Sx) of an on-channel. The characteristic impedance, Z0, for the measurement is 50 Ω. Figure
8-9 shows the setup used to measure, and the equation used to compute crosstalk.
VDD
VSS
0.1 µF
0.1 µF
VDD
VSS
Network Analyzer
VOUT
S1
D1
50Ω
50Ω
Vs
S2
D2
50Ω
50Ω
Sx/Dx
GND
VSIG
50Ω
8176
%NKOOP=HG = 20 × .KC
8
5
Figure 8-9. Channel-to-Channel Crosstalk Measurement Setup
8.10 Bandwidth
Bandwidth is defined as the range of frequencies that are attenuated by less than 3 dB when the input is applied
to the source pin (Sx) of an on-channel, and the output is measured at the drain pin (Dx) of the device. The
characteristic impedance, Z0, for the measurement is 50 Ω. Figure 8-10 shows the setup used to measure
bandwidth.
VDD
VSS
0.1 µF
0.1 µF
VDD
VSS
Network Analyzer
VS
Sx
Dx
50Ω
VOUT
VSIG
50Ω
GND
8176
$=J@SE@PD = 20 × .KC
8
5
Figure 8-10. Bandwidth Measurement Setup
Copyright © 2021 Texas Instruments Incorporated
24
Submit Document Feedback
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
8.11 THD + Noise
The total harmonic distortion (THD) of a signal is a measurement of the harmonic distortion, and is defined as
the ratio of the sum of the powers of all harmonic components to the power of the fundamental frequency at the
mux output. The on-resistance of the device varies with the amplitude of the input signal and results in distortion
when the drain pin is connected to a low-impedance load. Total harmonic distortion plus noise is denoted as
THD + N.
VDD
VSS
0.1 µF
0.1 µF
VDD
VSS
Audio Precision
SX
40 Ω
Dx
VOUT
VS
RL
GND
Figure 8-11. THD + N Measurement Setup
8.12 Power Supply Rejection Ratio (PSRR)
PSRR measures the ability of a device to prevent noise and spurious signals that appear on the supply voltage
pin from coupling to the output of the switch. The DC voltage on the device supply is modulated by a sine wave
of 100 mVPP. The ratio of the amplitude of signal on the output to the amplitude of the modulated signal is the
AC PSRR.
VDD
Network Analyzer
VSS
DC Bias
Injector
With & Without
Capacitor
50 Ω
0.1 µF
0.1 µF
VSS
VDD
S1
620 mVPP
VIN
VBIAS
Other Sx/
Dx pins
50 Ω
50 Ω
VOUT
D1
GND
RL
CL
8176
2544 = 20 × .KC
8
+0
Figure 8-12. AC PSRR Measurement Setup
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
25
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
9 Detailed Description
9.1 Overview
The TMUX7211, TMUX7212, and TMUX7213 are 1:1 (SPST), 4-Channel switches. The devices have four
independently selectable single-pole, single-throw switches that are turned-on or turned-off based on the state of
the corresponding select pin.
9.2 Functional Block Diagram
VDD
VSS
VDD
SW
VSS
VDD
SW
VSS
SW
S1
S2
S3
S4
D1
D2
D3
D4
S1
S2
S3
S4
D1
D2
D3
D4
S1
S2
S3
S4
D1
D2
D3
D4
SW
SW
SW
SW
SW
SW
SW
SW
SW
SEL1
SEL2
SEL3
SEL4
SEL1
SEL2
SEL3
SEL4
SEL1
SEL2
SEL3
SEL4
TMUX7211
(SELx = Logic 1)
TMUX7212
TMUX7213
(SELx = Logic 1)
(SELx = Logic 1)
Figure 9-1. TMUX721x Functional Block Diagram
9.3 Feature Description
9.3.1 Bidirectional Operation
The TMUX721x conducts equally well from source (Sx) to drain (Dx) or from drain (Dx) to source (Sx). Each
channel has similar characteristics in both directions and supports both analog and digital signals.
9.3.2 Rail-to-Rail Operation
The valid signal path input and output voltage for TMUX721x ranges from VSS to VDD
.
9.3.3 1.8 V Logic Compatible Inputs
The TMUX721x devices have 1.8-V logic compatible control for all logic control inputs. 1.8-V logic level inputs
allows the TMUX721x to interface with processors that have lower logic I/O rails and eliminates the need for an
external translator, which saves both space and BOM cost. For more information on 1.8 V logic implementations
refer to Simplifying Design with 1.8 V logic Muxes and Switches.
9.3.4 Fail-Safe Logic
The TMUX721x supports Fail-Safe Logic on the control input pins (SEL1, SEL2, SEL3, and SEL4) allowing for
operation up to 44 V, regardless of the state of the supply pin. This feature allows voltages on the control pins
to be applied before the supply pin, protecting the device from potential damage. Fail-Safe Logic minimizes
system complexity by removing the need for power supply sequencing on the logic control pins. For example,
the Fail-Safe Logic feature allows the select pins of the TMUX721x to be ramped to 44 V while VDD and VSS = 0
V. The logic control inputs are protected against positive faults of up to 44 V in powered-off condition, but do not
offer protection against negative overvoltage conditions.
Copyright © 2021 Texas Instruments Incorporated
26
Submit Document Feedback
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
9.3.5 Latch-Up Immune
Latch-up is a condition where a low impedance path is created between a supply pin and ground. This condition
is caused by a trigger (current injection or overvoltage), but once activated, the low impedance path remains
even after the trigger is no longer present. This low impedance path may cause system upset or catastrophic
damage due to excessive current levels. The latch-up condition typically requires a power cycle to eliminate the
low impedance path.
The TMUX721x family of devices are constructed on silicon on insulator (SOI) based process where an oxide
layer is added between the PMOS and NMOS transistor of each CMOS switch to prevent parasitic structures
from forming. The oxide layer is also known as an insulating trench and prevents triggering of latch up events
due to overvoltage or current injections. The latch-up immunity feature allows the TMUX721x family of switches
and multiplexers to be used in harsh environments. For more information on latch-up immunity refer to Using
Latch Up Immune Multiplexers to Help Improve System Reliability.
9.3.6 Ultra-Low Charge Injection
The TMUX721x devices have a transmission gate topology, as shown in Figure 9-2. Any mismatch in the stray
capacitance associated with the NMOS and PMOS causes an output level change whenever the switch is
opened or closed.
OFF ON
CGDN
CGSN
D
S
CGSP
CGDP
OFF ON
Figure 9-2. Transmission Gate Topology
The TMUX721x contains specialized architecture to reduce charge injection on the Drain (Dx). To further reduce
charge injection in a sensitive application, a compensation capacitor (Cp) can be added on the Source (Sx). This
will ensure that excess charge from the switch transition will be pushed into the compensation capacitor on the
Source (Sx) instead of the Drain (Dx). As a general rule of thumb, Cp should be 20x larger than the equivalent
load capacitance on the Drain (Dx). Figure 9-3 shows charge injection variation with source voltage with different
compensation capacitors on the Source (Sx) side.
Figure 9-3. Charge Injection Compensation
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
27
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
9.4 Device Functional Modes
The TMUX721x devices have four independently selectable single-pole, single-throw switches that are turned-on
or turned-off based on the state of the corresponding select pin. The control pins can be as high as 44 V.
The TMUX721x devices can be operated without any external components except for the supply decoupling
capacitors. The SELx pins have internal pull-down resistors of 4 MΩ. If unused, SELx pin must be tied to GND in
order to ensure the device does not consume additional current as highlighted in Implications of Slow or Floating
CMOS Inputs. Unused signal path inputs (Sx or Dx) should be connected to GND.
9.5 Truth Tables
Table 9-1, Table 9-2, and Table 9-3 show the truth tables for the TMUX7211, TMUX7212, and TMUX7213,
respectively.
Table 9-1. TMUX7211 Truth Table
SEL x (1)
CHANNEL x
Channel x ON
Channel x OFF
0
1
Table 9-2. TMUX7212 Truth Table
SEL x (1)
CHANNEL x
Channel x OFF
Channel x ON
0
1
Table 9-3. TMUX7213 Truth Table
SEL1
SEL2
SEL3
SEL4
ON / OFF CHANNELS(2)
CHANNEL 1 OFF
CHANNEL 1 ON
CHANNEL 2 ON
CHANNEL 2 OFF
CHANNEL 3 ON
CHANNEL 3 OFF
CHANNEL 4 OFF
CHANNEL 4 ON
0
1
X
X
0
X
X
X
X
0
X
X
X
X
X
X
0
X
X
X
X
X
X
1
X
X
X
X
1
X
X
1
(1) x denotes 1, 2, 3, or 4 for the corresponding channel.
(2) X = do not care.
Copyright © 2021 Texas Instruments Incorporated
28
Submit Document Feedback
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
10 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
10.1 Application Information
The TMUX721x is part of the precision switches and multiplexers family of devices. These devices operate with
dual supplies (±4.5 V to ±22 V), a single supply (4.5 V to 44 V), or asymmetric supplies (such as VDD = 12 V,
VSS = –5 V), and offer true rail-to-rail input and output.The TMUX721x offers low RON, low on and off leakage
currents and ultra-low charge injection performance. These features makes the TMUX721x a family of precision,
robust, high-performance analog multiplexer for high-voltage, industrial applications.
10.2 Typical Application
One example to take advantage of TMUX721x precision performance is the implementation of parametric
measurement unit (PMU) in the semiconductor automatic test equipment (ATE) application.
In Automated Test Equipment (ATE) systems, the Parametric Measurement Unit (PMU) is tasked to measure
device (DUT) parametric information in terms of voltage and current. When measuring voltage, current is applied
at the DUT pin, and current range adjustment can be done through changing the value of the internal sense
resistor. There is sometimes a need, depending on the DUT, to use even higher testing current than natively
supported by the system. A 4 channel SPST switch, together with external higher current amplifier and resistor,
can be used to achieve the flexibility. The PMU operating voltage is typically in mid voltage (up to 20 V). An
appropriate switch like the TMUX721x with low leakage current (0.05 nA typical) works well in these applications
to ensure measurement accuracy and low RON and flat RON_FLATNESS allows the current range to be controlled
more precisely. Figure 10-1 shows simplified diagram of such implementations in memory and semiconductor
test equipment.
Figure 10-1. High Current Range Selection Using External Resistor
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
29
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
10.2.1 Design Requirements
For this design example, use the parameters listed in Table 10-1.
Table 10-1. Design Parameters
PARAMETERS
VALUES
20 V
Supply (VDD
)
Supply (VSS
)
- 10 V
Input / Output signal range
Control logic thresholds
-10 V to 20 V (Rail-to-Rail)
1.8 V compatible
10.2.2 Detailed Design Procedure
The application shown in High Current Range Selection Using External Resistor demonstrates how the
TMUX721x can be used in semiconductor test equipment for high-precision, high-voltage, multi-channel
measurement applications. The TMUX721x can support 1.8-V logic signals on the control input, allowing the
device to interface with low logic controls of an FPGA or MCU. The TMUX721x can be operated without any
external components except for the supply decoupling capacitors. The select pins have an internal pull-down
resistor to prevent floating input logic. All inputs to the switch must fall within the recommend operating
conditions of the TMUX721x including signal range and continuous current. For this design with a positive
supply of 20 V on VDD, and negative supply of -10 V on VSS, the signal range can be 20 V to -10 V. The max
continuous current (IDC) can be up to 370 mA as shown in the Recommended Operating Conditions table for
wide-range current measurement.
10.2.3 Application Curve
The TMUX721x have excellent charge injection performance and ultra-low leakage current, making them ideal
choices to minimize sampling error for the sample and hold application.
15
ID(OFF) VS/VD= –10V/10V
ID(OFF) VS/VD = 10V/–10V
I(ON) Vs/Vd = –10V/–10V
I(ON) Vs/Vd = 10V/10V
IS(OFF) Vs/Vd = –10V/10V
IS(OFF) Vs/Vd = 10V/–10V
10
5
0
-5
-10
-15
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (°C)
TA = 25°C
VDD = 15 V, VDD = -15 V
Figure 10-2. Charge Injection vs Drain Voltage
Figure 10-3. On-Leakage vs Source or Drain
Voltage
Copyright © 2021 Texas Instruments Incorporated
30
Submit Document Feedback
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
11 Power Supply Recommendations
The TMUX721x device operates across a wide supply range of of ±4.5 V to ±22 V (4.5 V to 44 V in single-supply
mode). The device also perform well with asymmetrical supplies such as VDD = 12 V and VSS = –5 V.
Power-supply bypassing improves noise margin and prevents switching noise propagation from the supply
rails to other components. Good power-supply decoupling is important to achieve optimum performance. For
improved supply noise immunity, use a supply decoupling capacitor ranging from 0.1 μF to 10 μF at both the VDD
and VSS pins to ground. Place the bypass capacitors as close to the power supply pins of the device as possible
using low-impedance connections. TI recommends using multi-layer ceramic chip capacitors (MLCCs) that
offer low equivalent series resistance (ESR) and inductance (ESL) characteristics for power-supply decoupling
purposes. For very sensitive systems, or for systems in harsh noise environments, avoiding the use of vias
for connecting the capacitors to the device pins may offer superior noise immunity. The use of multiple vias
in parallel lowers the overall inductance and is beneficial for connections to ground and power planes. Always
ensure the ground (GND) connection is established before supplies are ramped.
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
31
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
12 Layout
12.1 Layout Guidelines
When a PCB trace turns a corner at a 90° angle, a reflection can occur. A reflection occurs primarily because of
the change of width of the trace. At the apex of the turn, the trace width increases to 1.414 times the width. This
increase upsets the transmission-line characteristics, especially the distributed capacitance and self–inductance
of the trace which results in the reflection. Not all PCB traces can be straight and therefore some traces must
turn corners. Figure 12-1 shows progressively better techniques of rounding corners. Only the last example
(BEST) maintains constant trace width and minimizes reflections.
WORST
BETTER
BEST
2W
1W min.
W
Figure 12-1. Trace Example
Route high-speed signals using a minimum of vias and corners which reduces signal reflections and impedance
changes. When a via must be used, increase the clearance size around it to minimize its capacitance.
Each via introduces discontinuities in the signal’s transmission line and increases the chance of picking up
interference from the other layers of the board. Be careful when designing test points, through-hole pins are not
recommended at high frequencies.
Some key considerations are:
•
Decouple the supply pins with a 0.1-µF and 1 µF capacitor, placed lowest value capacitor as close to the pin
as possible. Make sure that the capacitor voltage rating is sufficient for the supply voltage.
Keep the input lines as short as possible.
Use a solid ground plane to help reduce electromagnetic interference (EMI) noise pickup.
Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if
possible, and only make perpendicular crossings when necessary.
•
•
•
•
Using multiple vias in parallel will lower the overall inductance and is beneficial for connection to ground
planes.
12.2 Layout Example
SEL1
D1
SEL2
Wide (low inductance)
trace for power
D2
S2
Wide (low inductance)
trace for power
S1
VDD
VSS
GND
S4
TMUX721x
N.C.
S3
D3
D4
SEL3
SEL4
Via to ground plane
Figure 12-2. TMUX721x Layout Example
Copyright © 2021 Texas Instruments Incorporated
32
Submit Document Feedback
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
TMUX7211, TMUX7212, TMUX7213
SCDS416B – OCTOBER 2020 – REVISED APRIL 2021
www.ti.com
13 Device and Documentation Support
13.1 Documentation Support
13.1.1 Related Documentation
•
•
•
•
•
•
•
Texas Instruments, Using Latch Up Immune Multiplexers to Help Improve System Reliability application note
Texas Instruments, Improve Stability Issues with Low CON Multiplexers application brief
Texas Instruments, Improving Signal Measurement Accuracy in Automated Test Equipment application brief
Texas Instruments, Sample & Hold Glitch Reduction for Precision Outputs Reference Design reference guide
Texas Instruments, Simplifying Design with 1.8 V logic Muxes and Switches application brief
Texas Instruments, System-Level Protection for High-Voltage Analog Multiplexers application note
Texas Instruments, True Differential, 4 x 2 MUX, Analog Front End, Simultaneous-Sampling ADC Circuit
application note
•
•
Texas Instruments, QFN/SON PCB Attachment application note
Texas Instruments, Quad Flatpack No-Lead Logic Packages application note
13.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
13.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
13.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
13.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
13.6 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2021 Texas Instruments Incorporated
Submit Document Feedback
33
Product Folder Links: TMUX7211 TMUX7212 TMUX7213
PACKAGE OPTION ADDENDUM
www.ti.com
2-Apr-2021
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
PTMUX7212RUMR
ACTIVE
WQFN
RUM
16
3000
Non-RoHS &
Non-Green
Call TI
Call TI
-40 to 125
TMUX7211PWR
TMUX7211RUMR
TMUX7212PWR
PREVIEW
PREVIEW
ACTIVE
TSSOP
WQFN
TSSOP
PW
RUM
PW
16
16
16
2000 RoHS & Green
3000 TBD
2000 RoHS & Green
NIPDAU
Call TI
Level-1-260C-UNLIM
Call TI
-40 to 125
-40 to 125
-40 to 125
X211
X212
NIPDAU
Level-1-260C-UNLIM
TMUX7212RUMR
PREVIEW
WQFN
RUM
16
3000
Non-RoHS &
Non-Green
Call TI
Call TI
-40 to 125
TMUX7213PWR
TMUX7213RUMR
PREVIEW
PREVIEW
TSSOP
WQFN
PW
16
16
2000 RoHS & Green
NIPDAU
Call TI
Level-1-260C-UNLIM
Call TI
-40 to 125
-40 to 125
X213
RUM
3000
Non-RoHS &
Non-Green
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
2-Apr-2021
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Mar-2021
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TMUX7212PWR
TSSOP
PW
16
2000
330.0
12.4
6.9
5.6
1.6
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Mar-2021
*All dimensions are nominal
Device
Package Type Package Drawing Pins
TSSOP PW 16
SPQ
Length (mm) Width (mm) Height (mm)
853.0 449.0 35.0
TMUX7212PWR
2000
Pack Materials-Page 2
PACKAGE OUTLINE
PW0016A
TSSOP - 1.2 mm max height
S
C
A
L
E
2
.
5
0
0
SMALL OUTLINE PACKAGE
SEATING
PLANE
C
6.6
6.2
TYP
A
0.1 C
PIN 1 INDEX AREA
14X 0.65
16
1
2X
5.1
4.9
4.55
NOTE 3
8
9
0.30
16X
4.5
4.3
NOTE 4
1.2 MAX
0.19
B
0.1
C A B
(0.15) TYP
SEE DETAIL A
0.25
GAGE PLANE
0.15
0.05
0.75
0.50
A
20
0 -8
DETAIL A
TYPICAL
4220204/A 02/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.
5. Reference JEDEC registration MO-153.
www.ti.com
EXAMPLE BOARD LAYOUT
PW0016A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
SYMM
16X (1.5)
(R0.05) TYP
16
1
16X (0.45)
SYMM
14X (0.65)
8
9
(5.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 10X
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL
EXPOSED METAL
EXPOSED METAL
0.05 MAX
ALL AROUND
0.05 MIN
ALL AROUND
NON-SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
15.000
(PREFERRED)
SOLDER MASK DETAILS
4220204/A 02/2017
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
PW0016A
TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
16X (1.5)
SYMM
(R0.05) TYP
16
1
16X (0.45)
SYMM
14X (0.65)
8
9
(5.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE: 10X
4220204/A 02/2017
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you
permission to use these resources only for development of an application that uses the TI products described in the resource. Other
reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party
intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages,
costs, losses, and liabilities arising out of your use of these resources.
TI’s products are provided subject to TI’s Terms of Sale (https:www.ti.com/legal/termsofsale.html) or other applicable terms available either
on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s
applicable warranties or warranty disclaimers for TI products.IMPORTANT NOTICE
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2021, Texas Instruments Incorporated
相关型号：
TMUX7212PWR
TMUX721x 44 V, Low-RON, 1:1 (SPST), 4-Channel Precision Switches with Latch-Up Immunity and 1.8-V LogicWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TMUX7212RUMR
TMUX721x 44 V, Low-RON, 1:1 (SPST), 4-Channel Precision Switches with Latch-Up Immunity and 1.8-V LogicWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TMUX7213
TMUX721x 44 V, Low-RON, 1:1 (SPST), 4-Channel Precision Switches with Latch-Up Immunity and 1.8-V LogicWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TMUX7213PWR
TMUX721x 44 V, Low-RON, 1:1 (SPST), 4-Channel Precision Switches with Latch-Up Immunity and 1.8-V LogicWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TMUX7213RUMR
TMUX721x 44 V, Low-RON, 1:1 (SPST), 4-Channel Precision Switches with Latch-Up Immunity and 1.8-V LogicWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TMUX7219
具有 1.8V 逻辑的 44V、抗锁存、2:1 (SPDT) 精密开关Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TMUX7219-Q1
具有 1.8V 逻辑的汽车类 44V、低 Ron、2:1 (SPDT) 开关Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TMUX7219DGKR
具有 1.8V 逻辑的 44V、抗锁存、2:1 (SPDT) 精密开关 | DGK | 8 | -40 to 125Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TMUX7219DGKRQ1
具有 1.8V 逻辑的汽车类 44V、低 Ron、2:1 (SPDT) 开关 | DGK | 8 | -40 to 125Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TMUX7219M
具有 1.8V 逻辑扩展温度的 44V、低 Ron、2:1、1 通道闩锁效应抑制精密多路复用器Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TMUX7219MDGKR
具有 1.8V 逻辑扩展温度的 44V、低 Ron、2:1、1 通道闩锁效应抑制精密多路复用器 | DGK | 8 | -55 to 125Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
TMUX7219RQXR
具有 1.8V 逻辑的 44V、抗锁存、2:1 (SPDT) 精密开关 | RQX | 8 | -40 to 125Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
TI
©2020 ICPDF网 联系我们和版权申明