TPA2005D1TDGNRQ1 [TI]
汽车类 1.4W 单声道、模拟输入 D 类音频放大器 | DGN | 8 | -40 to 105;
| 型号： | TPA2005D1TDGNRQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 汽车类 1.4W 单声道、模拟输入 D 类音频放大器 | DGN | 8 | -40 to 105 放大器 消费电路 音频放大器 视频放大器 |
| 文件： | 总24页 (文件大小：868K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPA2005D1-Q1
www.ti.com
SLOS474–AUGUST 2005
1.4-W MONO FILTER-FREE CLASS-D AUDIO POWER AMPLIFIER
FEATURES
•
Space Saving Package
(1)
•
•
•
Qualification in Accordance With AEC-Q100
– 3 mm x 3 mm QFN package (DRB)
Qualified for Automotive Applications
– 2,5 mm x 2,5 mm MicroStar Junior™
BGA Package (ZQY)
Customer-Specific Configuration Control Can
Be Supported Along With Major-Change
Approval
– 3 mm x 5 mm MSOP PowerPAD™ Package
(DGN)
•
•
1.4 W Into 8 Ω From a 5-V Supply at
THD = 10% (Typ)
– TPA2010D1 Available in 1,45 mm x 1,45 mm
WCSP (YZF)
Maximum Battery Life and Minimum Heat
– Efficiency With an 8-Ω Speaker:
• 84% at 400 mW
APPLICATIONS
•
Ideal for Wireless or Cellular Handsets and
PDAs
• 79% at 100 mW
– 2.8-mA Quiescent Current
– 0.5-µA Shutdown Current
Only Three External Components
DESCRIPTION
The TPA2005D1 is a 1.4-W high-efficiency filter-free
class-D audio power amplifier in a MicroStar Junior™
BGA, QFN, or MSOP package that requires only
three external components.
•
– Optimized PWM Output Stage Eliminates LC
Output Filter
Features like 84% efficiency, -71-dB PSRR at
217 Hz, improved RF-rectification immunity, and
15-mm2 total PCB area make the TPA2005D1 ideal
for cellular handsets. A fast start-up time of 9 ms with
minimal pop makes the TPA2005D1 ideal for PDA
applications.
– Internally Generated 250-kHz Switching
Frequency Eliminates Capacitor and
Resistor
– Improved PSRR (-71 dB at 217 Hz) and
Wide Supply Voltage (2.5 V to 5.5 V)
Eliminates Need for a Voltage Regulator
In cellular handsets, the earpiece, speaker phone,
and melody ringer can each be driven by the
TPA2005D1. The device allows independent gain
control by summing the signals from each function,
– Fully Differential Design Reduces RF
Rectification and Eliminates Bypass
Capacitor
while minimizing noise to only 48 µVRMS
.
– Improved CMRR Eliminates Two Input
Coupling Capacitors
(1) Contact factory for details. Q100 qualification data available
on request.
APPLICATION CIRCUIT
To Battery
Internal
Oscillator
Actual Solution Size
(MicroStar Junior BGA)
V
DD
C
S
R
R
I
+
–
IN–
IN+
C
S
V
O+
PWM
H–
Bridge
_
+
Differential
Input
V
O–
I
2.5 mm
R
R
I
GND
I
Bias
Circuitry
SHUTDOWN
6 mm
TPA2005D1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
MicroStar Junior, PowerPAD are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TPA2005D1-Q1
www.ti.com
SLOS474–AUGUST 2005
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
TA
PACKAGE
PART NUMBER
TPA2005D1GQYR(1)
TPA2005D1ZQYR(1)
SYMBOL
PREVIEW
PREVIEW
BIQ
MicroStar Junior™ (GQY)
MicroStar Junior™ (ZQY)(2)
8-pin QFN (DRB)
-40°C to 85°C
(1)
TPA2005D1DRBR
8-pin MSOP (DGN)
TPA2005D1DGN(R)
PREVIEW
(1) The GQY, ZQY, and DRB packages are only available taped and reeled. An R at the end of the part number indicates the devices are
taped and reeled.
(2) The GQY is the standard MicroStar Junior™ package. The ZQY is lead-free option, and is qualified for 260° lead-free assembly.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)
UNIT
In active mode
-0.3 V to 6 V
-0.3 V to 7 V
VDD Supply voltage(2)
In SHUTDOWN mode
VI
Input voltage
-0.3 V to VDD + 0.3 V
See Dissipation Rating Table
-40°C to 85°C
Continuous total power dissipation
Operating free-air temperature
TA
TJ
Operating junction temperature
-40°C to 150°C
-65°C to 85°C
Tstg
Storage temperature
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) For the MSOP (DGN) package option, the maximum VDD should be limited to 5 V if short-circuit protection is desired.
RECOMMENDED OPERATING CONDITIONS
MIN NOM
MAX UNIT
VDD Supply voltage
2.5
2
5.5
VDD
0.7
V
V
VIH
VIL
RI
High-level input voltage
SHUTDOWN
Low-level input voltage
Input resistor
SHUTDOWN
0
V
Gain ≤ 20 V/V (26 dB)
15
0.5
-40
kΩ
V
VIC
TA
Common-mode input voltage range VDD = 2.5 V, 5.5 V, CMRR ≤ -49 dB
VDD-0.8
85
Operating free-air temperature
°C
DISSIPATION RATINGS
DERATING
FACTOR
T
A ≤ 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
PACKAGE
POWER RATING
GQY, ZQY
DRB
16 mW/°C
2 W
1.28 W
1.7 W
1.04 W
1.4 W
21.8 mW/°C
17.1 mW/°C
2.7 W
DGN
2.13 W
1.36 W
1.11 W
2
TPA2005D1-Q1
www.ti.com
SLOS474–AUGUST 2005
ELECTRICAL CHARACTERISTICS
TA = -40°C to 85°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
Output offset voltage
(measured differentially)
|VOS
|
VI = 0 V, AV = 2 V/V, VDD = 2.5 V to 5.5 V
VDD = 2.5 V to 5.5 V
25
mV
dB
PSRR
Power-supply rejection ratio
-75
-68
-55
-49
VDD = 2.5 V to 5.5 V,
VIC = VDD/2 to 0.5 V,
VIC = VDD/2 to VDD - 0.8 V
TA = 25°C
CMRR Common-mode rejection ratio
dB
TA = -40°C to 85°C
-35
|IIH
|
High-level input current
Low-level input current
VDD = 5.5 V, VI = 5.8 V
VDD = 5.5 V, VI = 0.3 V
VDD = 5.5 V, no load
VDD = 3.6 V, no load
VDD = 2.5 V, no load
50
4
µA
µA
|IIL|
3.4
2.8
4.5
I(Q)
Quiescent current
Shutdown current
mA
µA
2.2
3.2
2
I(SD)
V(SHUTDOWN) = 0.8 V, VDD = 2.5 V to 5.5 V
0.5
VDD = 2.5 V
VDD = 3.6 V
VDD = 5.5 V
770
590
500
Static drain-source
on-state resistance
rDS(on)
mΩ
Output impedance in
SHUTDOWN
V(SHUTDOWN) = 0.8 V
VDD = 2.5 V to 5.5 V
>1
kΩ
f(sw)
Switching frequency
200
250
300
kHz
150 kW
RI
158 kW
RI
142 kW
RI
V
V
Gain
2
2
2
OPERATING CHARACTERISTICS
TA = 25°C, Gain = 2 V/V, RL = 8 Ω (unless otherwise noted)
PARAMETER
TEST CONDITIOINS
VDD = 5 V
MIN
TYP
MAX UNIT
1.18
0.58
0.26
1.45
0.75
0.35
THD + N= 1%, f = 1 kHz,
VDD = 3.6 V
VDD = 2.5 V
VDD = 5 V
W
RL = 8 Ω
PO
Output power
THD + N= 10%, f = 1 kHz,
VDD = 3.6 V
VDD = 2.5 V
VDD = 5 V
W
RL = 8 Ω
PO = 1 W, f = 1 kHz, RL = 8 Ω
PO = 0.5 W, f = 1 kHz, RL = 8 Ω
PO = 200 mW, f = 1 kHz, RL = 8 Ω
0.18%
0.19%
0.20%
Total harmonic distortion plus
noise
THD+N
VDD = 3.6 V
VDD = 2.5 V
f = 217 Hz, V(RIPPLE) = 200 mVpp
Inputs ac-grounded with Ci = 2 µF
,
kSVR
SNR
Supply ripple rejection ratio
Signal-to-noise ratio
VDD = 3.6 V
-71
dB
dB
PO= 1 W, RL = 8 Ω
VDD = 5 V
97
48
No weighting
A weighting
VDD = 3.6 V
VDD = 3.6 V, f = 20 Hz to 20 kHz,
Inputs ac-grounded with Ci = 2 µF
Vn
Output voltage noise
µVRMS
36
CMRR Common-mode rejection ratio
VIC = 1 Vpp , f = 217 Hz
-63
150
9
dB
ZI
Input impedance
142
158
kΩ
Start-up time from shutdown
VDD = 3.6 V
ms
3
TPA2005D1-Q1
www.ti.com
SLOS474–AUGUST 2005
PIN ASSIGNMENTS
8-PIN QFN (DRB) PACKAGE
(TOP VIEW)
8-PIN MSOP (DGN) PACKAGE
(TOP VIEW)
MicroStar Junior (GQY) PACKAGE
(TOP VIEW)
(A1)
(B1)
(C1)
(D1)
(A4)
(B4)
(C4)
(D4)
SHUTDOWN
V
V
V
O−
DD
DD
SHUTDOWN
1
2
3
4
8
7
6
5
8
7
6
5
V
O−
1
2
3
4
SHUTDOWN
V
O−
NC
IN+
NC
IN+
IN−
GND
NC
IN+
IN−
GND
V
DD
V
O+
IN−
V
O+
V
DD
V
O+
(SIDE VIEW)
GND
NC − No internal connection
A. The shaded terminals are used for electrical and thermal connections to the ground plane. All of the shaded terminals
must be electrically connected to ground. No connect (NC) terminals still need a pad and trace.
B. The thermal pad of the DRB and DGN packages must be electrically and thermally connected to a ground plane.
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
IN-
ZQY, GQY
D1
DRB, DGN
4
3
6
5
I
I
Negative differential input
Positive differential input
Power supply
IN+
C1
VDD
VO+
B4, C4
D4
I
O
Positive BTL output
A2, A3, B3,
C2, C3, D2,
D3
GND
7
I
High-current ground
VO-
A4
A1
B1
8
1
2
O
I
Negative BTL output
SHUTDOWN
NC
Shutdown terminal (active low logic)
No internal connection
Thermal Pad
Must be soldered to a grounded pad on the PCB.
FUNCTIONAL BLOCK DIAGRAM
Gain = 2 V/V
V
DD
B4, C4
V
DD
+
Gate
Drive
Deglitch
Logic
150 kΩ
D1
C1
A1
A4
IN−
_
V
O−
_
_
+
+
_
+
_
+
IN+
D4
150 kΩ
+
_
V
O+
Gate
Drive
Deglitch
Logic
TTL
SD Input
Buffer
SHUTDOWN
Startup
Short
Circuit
Detect
†
& Thermal
Protection
Logic
Biases
and
References
Ramp
Generator
GND
†
A2, A3, B3, C2, C3, D2, D3
(terminal labels for MicroStar Junior package)
4
TPA2005D1-Q1
www.ti.com
SLOS474–AUGUST 2005
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
Efficiency
vs Output power
1, 2
PD
Power dissipation
vs Output power
3
Supply current
vs Output power
4, 5
I(Q)
Quiescent current
Shutdown current
vs Supply voltage
vs Shutdown voltage
vs Supply voltage
vs Load resistance
vs Output power
6
I(SD)
7
8
PO
Output power
9, 10
11, 12
THD+N Total harmonic distortion plus noise
vs Frequency
13, 14, 15, 16
vs Common-mode input voltage
vs Frequency
17
18, 19, 20
kSVR
Supply-voltage rejection ratio
GSM power-supply rejection
vs Common-mode input voltage
vs Time
21
22
23
24
25
vs Frequency
vs Frequency
CMRR Common-mode rejection ratio
vs Common-mode input voltage
TEST SET-UP FOR GRAPHS
C
TPA2005D1
I
R
R
I
+
IN+
OUT+
+
30 kHz
Low Pass
Filter
Measurement
Output
Measurement
Input
−
Load
C
I
I
IN−
−
OUT−
GND
V
DD
1 µF
+
−
V
DD
A. CI was shorted for any common-mode input voltage measurement.
B. A 33-µH inductor was placed in series with the load resistor to emulate a small speaker for efficiency measurements.
C. The 30-kHz low-pass filter is required, even if the analyzer has a low-pass filter. An RC filter (100 Ω, 47 nF) is used
on each output for the data sheet graphs.
5
TPA2005D1-Q1
www.ti.com
SLOS474–AUGUST 2005
EFFICIENCY
EFFICIENCY
vs
OUTPUT POWER
POWER DISSIPATION
vs
vs
OUTPUT POWER
OUTPUT POWER
90
80
70
60
50
40
30
20
10
0
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
100
90
80
70
60
50
40
30
20
10
0
Class-AB, V = 5 V, R = 8 Ω
DD
L
R
L
= 32 Ω, 33 µH
V
R
= 5 V,
DD
= 8 Ω, 33 µH
L
R
= 8 Ω, 33 µH
V
= 2.5 V,
L
DD
R = 8 Ω, 33 µH
Class-AB,
L
R
L
= 16 Ω, 33 µH
V
R
= 3.6 V,
DD
= 8 Ω
L
Class-AB,
= 5 V,
V
R
= 3.6 V,
V
R
DD
= 8 Ω, 33 µH
DD
= 8 Ω
Class-AB,
= 8 Ω
L
L
R
L
V
= 5 V,
DD
V
= 3.6
0.5
DD
R
L
= 8 Ω, 33 µH
0
0.2
0.4
0.6
0.8
1
1.2
0
0.1
0.2
0.3
0.4
0.6
0
0.2
0.4
0.6
0.8
1
1.2
5.5
32
P
- Output Power - W
P
- Output Power - W
O
P
- Output Power - W
O
O
Figure 1.
Figure 2.
Figure 3.
SUPPLY CURRENT
vs
OUTPUT POWER
SUPPLY CURRENT
vs
OUTPUT POWER
QUIESCENT CURRENT
vs
SUPPLY VOLTAGE
300
250
200
150
100
3.8
3.6
3.4
3.2
250
200
150
V
= 3.6 V
DD
R
= 8 Ω, 33 µH
L
R
L
= 8 Ω, 33 µH
3
V
R
= 5 V,
= 8 Ω, 33 µH
DD
2.8
L
100
No Load
2.6
2.4
V
= 3.6 V,
DD
R
L
= 8 Ω, 33 µH
50
0
50
0
V
R
= 2.5 V,
DD
2.2
2
= 8 Ω, 33 µH
L
R
L
= 32 Ω, 33 µH
0
0.2
0.4
0.6
0.8
1
1.2
2.5
3
3.5
4
4.5
5
0
0.1
0.2
0.3
0.4
0.5
0.6
P
- Output Power - W
O
V
− Supply Voltage − V
P
- Output Power - W
DD
O
Figure 4.
Figure 5.
Figure 6.
SHUTDOWN CURRENT
vs
SHUTDOWN VOLTAGE
OUTPUT POWER
vs
SUPPLY VOLTAGE
OUTPUT POWER
vs
LOAD RESISTANCE
1.6
1.4
1
1.4
R
L
= 8 Ω
f = 1 kHz
Gain = 2 V/V
f = 1 kHz
THD+N = 1%
Gain = 2 V/V
0.9
1.2
1
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
V
= 5 V
V
DD
1.2
= 3.6 V
1
DD
THD+N = 10%
0.8
0.6
0.4
V
= 2.5 V
DD
0.8
V
= 2.5 V
DD
V
= 3.6 V
= 5 V
DD
V
0.6
0.4
THD+N = 1%
DD
0.2
0
0.2
0
2.5
3
3.5
4
4.5
5
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
8
12
16
20
24
28
V
- Supply Voltage - V
DD
Shutdown Voltage - V
R
- Load Resistance - Ω
L
Figure 7.
Figure 8.
Figure 9.
6
TPA2005D1-Q1
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SLOS474–AUGUST 2005
OUTPUT POWER
vs
LOAD RESISTANCE
TOTAL HARMONIC DISTORTION +
TOTAL HARMONIC DISTORTION +
NOISE
vs
NOISE
vs
OUTPUT POWER
OUTPUT POWER
1.6
1.4
1.2
30
20
30
20
f = 1 kHz
THD+N = 10%
Gain = 2 V/V
R
= 8 Ω,
R = 16 Ω,
L
f = 1 kHz,
Gain = 2 V/V
L
f = 1 kHz,
Gain = 2 V/V
10
5
10
5
V
= 5 V
DD
1
0.8
0.6
0.4
V
= 3.6 V
DD
2.5 V
3.6 V
5 V
2.5 V
2
1
2
1
V
= 2.5 V
DD
3.6 V
5 V
0.5
0.5
0.2
0
0.2
0.1
0.2
0.1
8
12
16
20
24
28
32
0.01
0.1
1
2
0.01
0.1
1
2
R
- Load Resistance - Ω
L
P
− Output Power − W
P
− Output Power − W
O
O
Figure 10.
Figure 11.
Figure 12.
TOTAL HARMONIC DISTORTION +
TOTAL HARMONIC DISTORTION +
TOTAL HARMONIC DISTORTION +
NOISE
vs
NOISE
vs
NOISE
vs
FREQUENCY
FREQUENCY
FREQUENCY
10
5
10
5
10
5
V
= 3.6 V
DD
C = 2 µF
V
= 5 V
V
= 2.5 V
DD
C = 2 µF
DD
C = 2 µF
I
I
I
R
= 8 Ω
L
R
= 8 Ω
R = 8 Ω
L
Gain = 2 V/V
15 mW
75 mW
L
2
1
2
1
Gain = 2 V/V
2
1
Gain = 2 V/V
0.5
0.5
0.5
0.2
0.2
0.1
0.2
0.1
50 mW
1 W
500 mW
25 mW
0.1
200 mW
0.05
0.05
0.05
125 mW
0.02
0.01
0.02
250 mW
0.02
0.01
0.008
20
100
1 k
20 k
20
100
1 k
20 k
20
100
1 k
20 k
f − Frequency − Hz
f − Frequency − Hz
f − Frequency − Hz
Figure 13.
Figure 14.
Figure 15.
TOTAL HARMONIC DISTORTION +
TOTAL HARMONIC DISTORTION +
SUPPLY-VOLTAGE REJECTION
NOISE
vs
NOISE
RATIO
vs
vs
FREQUENCY
COMMON MODE INPUT VOLTAGE
FREQUENCY
0
−10
−20
−30
−40
−50
−60
−70
−80
10
10
5
f = 1 kHz
C = 2 µF
V
= 3.6 V
I
DD
C = 2 µF
P
= 200 mW
R
V
= 8 Ω
O
L
I
= 200 mV
R
= 16 Ω
p-p
L
2
1
Inputs ac-Grounded
Gain = 2 V/V
Gain = 2 V/V
0.5
1
V
= 3.6 V
DD
0.2
0.1
V
= 2.5 V
DD
15 mW
75 mW
V
=2. 5 V
DD
0.05
0.02
0.01
V
= 3.6 V
DD
V
= 5 V
DD
200 mW
0.1
20
100
1 k
20 k
20
100
1 k
20 k
0
0.5
1
1.5
2
2.5
3
3.5
V
- Common Mode Input Voltage - V
f − Frequency − Hz
f − Frequency − Hz
IC
Figure 16.
Figure 17.
Figure 18.
7
TPA2005D1-Q1
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SLOS474–AUGUST 2005
SUPPLY-VOLTAGE REJECTION
SUPPLY-VOLTAGE REJECTION
SUPPLY-VOLTAGE REJECTION
RATIO
vs
RATIO
vs
RATIO
vs
FREQUENCY
FREQUENCY
COMMON-MODE INPUT VOLTAGE
0
−10
−20
−30
−40
−50
−60
−70
−80
0
0
−10
−20
−30
−40
−50
−60
−70
−80
−90
−100
Gain = 5 V/V
C = 2 µF
f = 217 Hz
C = 2 µF
I
-10
-20
-30
-40
-50
-60
-70
I
R
L
= 8 Ω
R
L
= 8 Ω
R
L
= 8 Ω
Gain = 2 V/V
Inputs Floating
Gain = 2 V/V
V
= 200 mV
p-p
Inputs ac-Grounded
V
= 2. 5 V
DD
V
= 2.5 V
DD
V
= 3.6 V
DD
V
= 5 V
V
= 3.6 V
DD
DD
-80
-90
V
= 5 V
DD
V
= 3.6 V
DD
20
100
1 k
20 k
20
100
1 k
20 k
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5 5
f − Frequency − Hz
f − Frequency − Hz
V
- Common Mode Input Voltage - V
IC
Figure 19.
Figure 20.
Figure 21.
GSM POWER-SUPPLY REJECTION
GSM POWER-SUPPLY REJECTION
vs
vs
TIME
FREQUENCY
0
C1 - Duty
12.6%
V
-50
DD
C1 -
Frequency
216.7448 Hz
-100
0
V
Shown in Figure 22
DD
-150
C1 - Amplitude
512 mV
C = 2 µF,
I
Inputs ac-grounded
Gain = 2V/V
-50
C1 - High
3.544 V
V
OUT
-100
-150
0
400
800
1200
1600
2000
t - Time - ms
f - Frequency - Hz
Figure 22.
Figure 23.
COMMON-MODE REJECTION RATIO
COMMON-MODE REJECTION RATIO
vs
COMMON-MODE INPUT VOLTAGE
vs
FREQUENCY
0
0
V
V
R
= 2.5 V to 5 V
R
= 8 Ω
DD
L
-10
-20
-30
-40
-50
-60
-70
-80
-90
−10
−20
= 1 V
Gain = 2 V/V
IC
p−p
= 8 Ω
L
Gain = 2 V/V
V
= 2.5 V
V
= 3.6 V
DD
DD
−30
−40
−50
−60
−70
V
= 5 V
DD
-100
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
20
100
1 k
20 k
f − Frequency − Hz
V
- Common Mode Input Voltage - V
IC
Figure 24.
Figure 25.
8
TPA2005D1-Q1
www.ti.com
SLOS474–AUGUST 2005
APPLICATION INFORMATION
FULLY DIFFERENTIAL AMPLIFIER
The TPA2005D1 is a fully differential amplifier with differential inputs and outputs. The fully differential amplifier
consists of a differential amplifier and a common-mode amplifier. The differential amplifier ensures that the
amplifier outputs a differential voltage on the output that is equal to the differential input times the gain. The
common-mode feedback ensures that the common-mode voltage at the output is biased around VDD/2,
regardless of the common-mode voltage at the input. The fully differential TPA2005D1 can still be used with a
single-ended input; however, the TPA2005D1 should be used with differential inputs when in a noisy
environment, like a wireless handset, to ensure maximum noise rejection.
Advantages of Fully Differential Amplifiers
•
Input-coupling capacitors not required:
– The fully differential amplifier allows the inputs to be biased at a voltage other than midsupply. For
example, if a codec has a midsupply lower than the midsupply of the TPA2005D1, the common-mode
feedback circuit adjusts, and the TPA2005D1 outputs still is biased at midsupply of the TPA2005D1. The
inputs of the TPA2005D1 can be biased from 0.5 V to VDD - 0.8 V. If the inputs are biased outside of that
range, input-coupling capacitors are required.
•
•
Midsupply bypass capacitor, C(BYPASS), not required:
– The fully differential amplifier does not require a bypass capacitor. This is because any shift in the
midsupply affects both positive and negative channels equally and cancels at the differential output.
Better RF-immunity:
– GSM handsets save power by turning on and shutting off the RF transmitter at a rate of 217 Hz. The
transmitted signal is picked-up on input and output traces. The fully differential amplifier cancels the signal
much better than the typical audio amplifier.
COMPONENT SELECTION
Figure 26 shows the TPA2005D1 typical schematic with differential inputs, and Figure 27 shows the TPA2005D1
with differential inputs and input capacitors, and Figure 28 shows the TPA2005D1 with single-ended inputs.
Differential inputs should be used whenever possible, because the single-ended inputs are much more
susceptible to noise.
Table 1. Typical Component Values
REF DES
RI
VALUE
EIA SIZE
0402
MANUFACTURER
Panasonic
Murata
PART NUMBER
ERJ2RHD154V
150 kΩ (±0.5%)
1 µF (+22%, -80%)
3.3 nF (±10%)
CS
CI(1)
0402
GRP155F50J105Z
GRP033B10J332K
0201
Murata
(1) CI is needed only for single-ended input or if VICM is not between 0.5 V and VDD - 0.8 V. CI = 3.3 nF (with RI = 150 kΩ) gives a
high-pass corner frequency of 321 Hz.
To Battery
Internal
V
DD
Oscillator
C
S
R
R
I
+
–
IN–
IN+
V
O+
PWM
H–
Bridge
_
+
Differential
Input
V
O–
I
GND
Bias
Circuitry
SHUTDOWN
TPA2005D1
Filter-Free Class D
Figure 26. Typical TPA2005D1 Application Schematic With Differential Input for a Wireless Phone
9
TPA2005D1-Q1
www.ti.com
SLOS474–AUGUST 2005
To Battery
Internal
V
DD
Oscillator
C
S
C
C
I
R
R
I
IN–
IN+
V
O+
PWM
H–
Bridge
_
+
Differential
Input
V
O–
I
I
GND
Bias
Circuitry
SHUTDOWN
TPA2005D1
Filter-Free Class D
Figure 27. TPA2005D1 Application Schematic With Differential Input and Input Capacitors
To Battery
Internal
V
DD
Oscillator
C
S
C
I
R
R
I
IN–
IN+
Single-ended
Input
V
O+
PWM
H–
Bridge
_
+
V
O–
I
C
I
GND
Bias
Circuitry
SHUTDOWN
TPA2005D1
Filter-Free Class D
Figure 28. TPA2005D1 Application Schematic With Single-Ended Input
10
TPA2005D1-Q1
www.ti.com
SLOS474–AUGUST 2005
Input Resistors (RI)
The input resistors (RI) set the gain of the amplifier according to equation Equation 1.
150 kW
Gain + 2
R
I
(1)
Resistor matching is very important in fully differential amplifiers. The balance of the output on the
reference voltage depends on matched ratios of the resistors. CMRR, PSRR, and cancellation of the second
harmonic distortion diminish if resistor mismatch occurs. Therefore, it is recommended to use 1% tolerance
resistors, or better, to keep the performance optimized. Matching is more important than overall tolerance.
Resistor arrays with 1% matching can be used with a tolerance greater than 1%.
Place the input resistors very close to the TPA2005D1 to limit noise injection on the high-impedance nodes.
For optimal performance, the gain should be set to 2 V/V or lower. Lower gain allows the TPA2005D1 to operate
at its best and keeps a high voltage at the input, making the inputs less susceptible to noise.
Decoupling Capacitor (CS)
The TPA2005D1 is a high-performance class-D audio amplifier that requires adequate power-supply decoupling
to ensure the efficiency is high and total harmonic distortion (THD) is low. For higher frequency transients,
spikes, or digital hash on the line, a good low equivalent-series-resistance (ESR) ceramic capacitor, typically
1 µF, placed as close as possible to the device VDD lead, works best. Placing this decoupling capacitor close to
the TPA2005D1 is very important for the efficiency of the class-D amplifier, because any resistance or
inductance in the trace between the device and the capacitor can cause a loss in efficiency. For filtering
lower-frequency noise signals, a 10-µF, or greater, capacitor placed near the audio power amplifier also helps,
but it is not required in most applications because of the high PSRR of this device.
Input Capacitors (CI)
The TPA2005D1 does not require input coupling capacitors if the design uses a differential source that is biased
from 0.5 V to VDD - 0.8 V (shown in Figure 26). If the input signal is not biased within the recommended
common-mode input range, if needing to use the input as a high pass filter (shown in Figure 27), or if using a
single-ended source (shown in Figure 28), input coupling capacitors are required.
The input capacitors and input resistors form a high-pass filter with the corner frequency, fc, determined in
Equation 2.
1
f +
c
ǒ
Ǔ
2p R C
I I
(2)
The value of the input capacitor is important to consider, as it directly affects the bass (low frequency)
performance of the circuit. Speakers in wireless phones usually cannot respond well to low frequencies, so the
corner frequency can be set to block low frequencies in this application.
Equation 3 is reconfigured to solve for the input coupling capacitance.
1
C +
I
ǒ
cǓ
2p R f
I
(3)
If the corner frequency is within the audio band, the capacitors should have a tolerance of ±10% or better,
because any mismatch in capacitance causes an impedance mismatch at the corner frequency and below.
For a flat low-frequency response, use large input coupling capacitors (1 µF). However, in a GSM phone the
ground signal is fluctuating at 217 Hz, but the signal from the codec does not have the same 217-Hz fluctuation.
The difference between the two signals is amplified, sent to the speaker, and heard as a 217-Hz hum.
SUMMING INPUT SIGNALS WITH THE TPA2005D1
Most wireless phones or PDAs need to sum signals at the audio power amplifier or just have two signal sources
that need separate gain. The TPA2005D1 makes it easy to sum signals or use separate signal sources with
different gains. Many phones now use the same speaker for the earpiece and ringer, where the wireless phone
would require a much lower gain for the phone earpiece than for the ringer. PDAs and phones that have stereo
headphones require summing of the right and left channels to output the stereo signal to the mono speaker.
11
TPA2005D1-Q1
www.ti.com
SLOS474–AUGUST 2005
Summing Two Differential Input Signals
Two extra resistors are needed for summing differential signals (a total of 5 components). The gain for each input
source can be set independently (see Equation 4 and Equation 5 and Figure 29).
V
O
I1
150 kW
V
V
ǒ Ǔ
Gain 1 +
+ 2
V
R
I1
(4)
(5)
V
V
O
I2
150 kW
V
V
ǒ Ǔ
Gain 2 +
+ 2
R
I2
If summing left and right inputs with a gain of 1 V/V, use RI1= RI2= 300 kΩ.
If summing a ring tone and a phone signal, set the ring-tone gain to gain 2 = 2 V/V, and the phone gain to
gain 1 = 0.1 V/V. The resistor values are:
•
RI1 = 3 MΩ and RI2 = 150 kΩ.
R
R
I1
+
Differential
Input 1
To Battery
I1
–
Internal
V
DD
Oscillator
C
S
R
I2
+
IN–
IN+
V
O+
PWM
H–
_
+
Differential
Input 2
Bridge
V
O–
R
I2
–
GND
Bias
Circuitry
SHUTDOWN
Filter-Free Class D
Figure 29. Application Schematic With TPA2005D1 Summing Two Differential Inputs
Summing a Differential Input Signal and a Single-Ended Input Signal
Figure 30 shows how to sum a differential input signal and a single-ended input signal. Ground noise can couple
in through IN+ with this method. It is better to use differential inputs. The corner frequency of the single-ended
input is set by CI2, shown in Equation 8. To ensure that each input is balanced, the single-ended input must be
driven by a low-impedance source even if the input is not in use.
V
O
I1
150 kW
V
V
ǒ Ǔ
Gain 1 +
+ 2
V
R
I1
(6)
V
V
O
150 kW
V
V
ǒ Ǔ
Gain 2 +
+ 2
R
I2
1
I2
(7)
(8)
+ ǒ2p R c2Ǔ
C
I2
f
I2
12
TPA2005D1-Q1
www.ti.com
SLOS474–AUGUST 2005
If summing a ring tone and a phone signal, the phone signal should use a differential input signal while the ring
tone might be limited to a single-ended signal. If phone gain is set at gain 1 = 0.1 V/V, and the ring-tone gain is
set to gain 2 = 2 V/V, the resistor values are:
•
RI1 = 3 MΩ and RI2 = 150 kΩ.
The high-pass corner frequency of the single-ended input is set by CI2. If the desired corner frequency is less
than 20 Hz, then:
1
C
u
I2
ǒ
Ǔ
2p 150kW 20Hz
(9)
C
53pF
I2
(10)
R
R
I1
Differential
Input 1
To Battery
I1
Internal
V
DD
Oscillator
C
S
C
I2
R
I2
Single-Ended
Input 2
IN–
IN+
V
O+
PWM
H–
Bridge
_
+
V
O–
R
I2
C
I2
GND
Bias
Circuitry
SHUTDOWN
Filter-Free Class D
Figure 30. Application Schematic With TPA2005D1 Summing Differential Input and
Single-Ended Input Signals
Summing Two Single-Ended Input Signals
Four resistors and three capacitors are needed for summing single-ended input signals. The gain and corner
frequencies (fc1 and fc2) for each input source can be set independently (see Equation 11 through Equation 14
and Figure 31). Resistor, RP, and capacitor, CP, are needed on the IN+ terminal to match the impedance on the
IN- terminal. The single-ended inputs must be driven by low-impedance sources, even if one of the inputs is not
outputting an ac signal.
13
TPA2005D1-Q1
www.ti.com
SLOS474–AUGUST 2005
V
O
150 kW
V
V
ǒ Ǔ
Gain 1 +
Gain 2 +
+ 2
+ 2
V
R
I1
I1
(11)
(12)
(13)
V
V
O
150 kW
V
ǒ Ǔ
R
V
I2
I2
1
C
+ ǒ2p R c1Ǔ
I1
f
I1
1
C
+ ǒ2p R c2Ǔ
I2
f
I2
(14)
(15)
C
+ C ) C
P
I1
I2
R
+ ǒR
R
I1
I1
I2
I2
R
P
Ǔ
) R
(16)
C
C
I1
R
R
I1
Single-Ended
Input 1
To Battery
Internal
Oscillator
V
DD
C
S
I2
I2
Single-Ended
Input 2
IN–
IN+
V
O+
PWM
H–
Bridge
_
+
V
O–
R
P
C
P
GND
Bias
Circuitry
SHUTDOWN
Filter-Free Class D
Figure 31. Application Schematic With TPA2005D1 Summing Two Single-Ended Inputs
EFFICIENCY AND THERMAL INFORMATION
The maximum ambient temperature depends on the heat-sinking ability of the PCB system. The derating factor
for the 2,5-mm x 2,5-mm MicroStar Junior package is shown in the dissipation rating table. Converting this to θJA:
1
1
q
+
+
+ 62.5°CńW
JA
0.016
Derating Factor
(17)
Given θJA of 62.5°C/W, the maximum allowable junction temperature of 150°C, and the maximum internal
dissipation of 0.2 W (worst case 5-V supply), the maximum ambient temperature can be calculated with equation
Equation 18.
T Max
T Max
q
P
150
62.5 (0.2)
137.5°C
A
J
JA Dmax
(18)
Equation 18 shows that the calculated maximum ambient temperature is 137.5°C at maximum power dissipation
with a 5-V supply; however, the maximum ambient temperature of the package is limited to 85°C. Because of the
efficiency of the TPA2005D1, it can be operated under all conditions to an ambient temperature of 85°C. The
TPA2005D1 is designed with thermal protection that turns the device off when the junction temperature
surpasses 150°C to prevent damage to the IC. Also, using speakers more resistive than 8 Ω dramatically
increases the thermal performance by reducing the output current and increasing the efficiency of the amplifier.
14
TPA2005D1-Q1
www.ti.com
SLOS474–AUGUST 2005
BOARD LAYOUT
Component Location
Place all the external components very close to the TPA2005D1. The input resistors need to be very close to the
TPA2005D1 input pins so noise does not couple on the high-impedance nodes between the input resistors and
the input amplifier of the TPA2005D1. Placing the decoupling capacitor, CS, close to the TPA2005D1 is important
for the efficiency of the class-D amplifier. Any resistance or inductance in the trace between the device and the
capacitor can cause a loss in efficiency.
Trace Width
Make the high current traces going to pins VDD, GND, VO+ and VO- of the TPA2005D1 have a minimum width of
0,7 mm. If these traces are too thin, the TPA2005D1 performance and output power will decrease. The input
traces do not need to be wide, but do need to run side-by-side to enable common-mode noise cancellation.
MicroStar Junior™ BGA Layout
Use the following MicroStar Junior BGA ball diameters:
•
•
•
0,25 mm diameter solder mask
0,28 mm diameter solder paste mask/stencil
0,38 mm diameter copper trace
Figure 32 shows how to lay out a board for the TPA2005D1 MicroStar Junior BGA.
0,28
mm
SD
NC
IN+
GND
GND
GND
GND
Vo−
VDD
VDD
0,38
mm
0,25
mm
GND
GND
IN−
GND
Vo+
Solder Mask
Paste Mask
Copper Trace
Figure 32. TPA2005D1 MicroStar Junior BGA Board Layout (Top View)
8-Pin QFN (DRB) Layout
Use the following land pattern for board layout with the 8-pin QFN (DRB) package. Note that the solder paste
should use a hatch pattern to fill solder paste at 50% to ensure that there is not too much solder paste under the
package.
15
TPA2005D1-Q1
www.ti.com
SLOS474–AUGUST 2005
0,7 mm
0,33 mm plugged vias (5 places)
1,4 mm
0,38 mm
0,65 mm
1,95 mm
Solder Mask: 1,4 mm x 1,85 mm centered in package
Make solder paste a hatch pattern to fill 50%
3,3 mm
Figure 33. TPA2005D1 8-Pin QFN (DRB) Board Layout (Top View)
ELIMINATING THE OUTPUT FILTER WITH THE TPA2005D1
This section focuses on why the user can eliminate the output filter with the TPA2005D1.
Effect on Audio
The class-D amplifier outputs a pulse-width modulated (PWM) square wave, which is the sum of the switching
waveform and the amplified input audio signal. The human ear acts as a band-pass filter such that only the
frequencies between approximately 20 Hz and 20 kHz are passed. The switching frequency components are
much greater than 20 kHz, so the only signal heard is the amplified input audio signal.
Traditional Class-D Modulation Scheme
The traditional class-D modulation scheme, which is used in the TPA005Dxx family, has a differential output in
which each output is 180 degrees out of phase and changes from ground to the supply voltage, VDD. Therefore,
the differential pre-filtered output varies between positive and negative VDD, where filtered 50% duty cycle yields
0 V across the load. The traditional class-D modulation scheme with voltage and current waveforms is shown in
Figure 34. Note that, even at an average of 0 V across the load (50% duty cycle), the current to the load is high,
causing a high loss and thus causing a high supply current.
16
TPA2005D1-Q1
www.ti.com
SLOS474–AUGUST 2005
OUT+
OUT–
+5 V
0 V
Differential Voltage
Across Load
–5 V
Current
Figure 34. Traditional Class-D Modulation Scheme Output Voltage and Current Waveforms Into an
Inductive Load With No Input
TPA2005D1 Modulation Scheme
The TPA2005D1 uses a modulation scheme that still has each output switching from 0 to the supply voltage.
However, OUT+ and OUT- are now in phase with each other, with no input. The duty cycle of OUT+ is greater
than 50% and OUT- is less than 50% for positive voltages. The duty cycle of OUT+ is less than 50% and OUT- is
greater than 50% for negative voltages. The voltage across the load remains at 0 V throughout most of the
switching period, greatly reducing the switching current, which reduces any I2R losses in the load.
OUT+
OUT–
Output = 0 V
Differential
+5 V
Voltage
0 V
Across
–5 V
Load
Current
OUT+
OUT–
Output > 0 V
Differential
Voltage
Across
Load
+5 V
0 V
–5 V
Current
Figure 35. The TPA2005D1 Output Voltage and Current Waveforms Into an Inductive Load
17
TPA2005D1-Q1
www.ti.com
SLOS474–AUGUST 2005
Efficiency: Why You Must Use a Filter With the Traditional Class-D Modulation Scheme
The main reason that the traditional class-D amplifier needs an output filter is that the switching waveform results
in maximum current flow. This causes more loss in the load, which causes lower efficiency. The ripple current is
large for the traditional modulation scheme because the ripple current is proportional to voltage multiplied by the
time at that voltage. The differential voltage swing is 2 × VDD, and the time at each voltage is one-half the period
for the traditional modulation scheme. An ideal LC filter is needed to store the ripple current from each half-cycle
for the next half-cycle, while any resistance causes power dissipation. The speaker is both resistive and reactive,
whereas an LC filter is almost purely reactive.
The TPA2005D1 modulation scheme has very little loss in the load without a filter because the pulses are very
short and the change in voltage is VDD instead of 2 × VDD. As the output power increases, the pulses widen,
making the ripple current larger. Ripple current could be filtered with an LC filter for increased efficiency, but for
most applications the filter is not needed.
An LC filter with a cutoff frequency less than the class-D switching frequency allows the switching current to flow
through the filter instead of the load. The filter has less resistance than the speaker, resulting in less power
dissipation, which increases efficiency.
Effects of Applying a Square Wave Into a Speaker
If the amplitude of a square wave is high enough and the frequency of the square wave is within the bandwidth
of the speaker, a square wave could cause the voice coil to jump out of the air gap and/or scar the voice coil. A
250-kHz switching frequency, however, is not significant because the speaker cone movement is proportional to
1/f2 for frequencies beyond the audio band. Therefore, the amount of cone movement at the switching frequency
is very small. However, damage could occur to the speaker if the voice coil is not designed to handle the
additional power. To size the speaker for added power, the ripple current dissipated in the load must be
calculated by subtracting the theoretical supplied power, PSUP THEORETICAL, from the actual supply power, PSUP, at
maximum output power, POUT. The switching power dissipated in the speaker is the inverse of the measured
efficiency,ηMEASURED, minus the theoretical efficiency,ηTHEORETICAL
.
P
P
–P
(at max output power)
SPKR
SUP SUP THEORETICAL
(19)
P
P
P
SUP
OUT
SUP THEORETICAL
P
+
–
(at max output power)
SPKR
P
OUT
(20)
(21)
1
1
ǒ
Ǔ(at max output power)
P
+ P
*
h
h
SPKR
OUT
MEASURED
THEORETICAL
R
L
hTHEORETICAL +
(at max output power)
R
) 2r
L
DS(on)
(22)
The maximum efficiency of the TPA2005D1 with a 3.6-V supply and an 8-Ω load is 86% from Equation 22. Using
Equation 21 with the efficiency at maximum power (84%), we see that there is an additional 17 mW dissipated in
the speaker. The added power dissipated in the speaker is not an issue as long as it is taken into account when
choosing the speaker.
When to Use an Output Filter
Design the TPA2005D1 without an output filter if the traces from amplifier to speaker are short. The TPA2005D1
passed FCC and CE radiated emissions with no shielding and with speaker trace wires 100 mm long or less.
Wireless handsets and PDAs are great applications for class-D without a filter.
A ferrite bead filter often can be used if the design is failing radiated emissions without an LC filter, and the
frequency-sensitive circuit is greater than 1 MHz. This is good for circuits that just have to pass FCC and CE
because FCC and CE only test radiated emissions greater than 30 MHz. If choosing a ferrite bead, choose one
with high impedance at high frequencies, but very low impedance at low frequencies.
Use an LC output filter if there are low-frequency (< 1 MHz) EMI-sensitive circuits and/or there are long leads
from amplifier to speaker.
Figure 36 and Figure 37 show typical ferrite bead and LC output filters.
18
TPA2005D1-Q1
www.ti.com
SLOS474–AUGUST 2005
Ferrite
Chip Bead
OUTP
OUTN
1 nF
1 nF
Ferrite
Chip Bead
Figure 36. Typical Ferrite Chip Bead Filter (Chip bead example: NEC/Tokin: N2012ZPS121)
33 µH
OUTP
1 µF
33 µH
OUTN
1 µF
Figure 37. Typical LC Output Filter, Cut-Off Frequency of 27 kHz
19
PACKAGE OPTION ADDENDUM
www.ti.com
18-Apr-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TPA2005D1DRBQ1
ACTIVE
SON
DRB
8
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
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Addendum-Page 1
IMPORTANT NOTICE
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