TPA2013D1_16 [TI]
Constant Output Power Class-D Audio Amplifier;型号: | TPA2013D1_16 |
厂家: | TEXAS INSTRUMENTS |
描述: | Constant Output Power Class-D Audio Amplifier |
文件: | 总30页 (文件大小:1022K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TPA2013D1
www.ti.com
SLOS520–AUGUST 2007
2.7-W CONSTANT OUTPUT POWER CLASS-D AUDIO AMPLIFIER WITH INTEGRATED
BOOST CONVERTER
1
FEATURES
APPLICATIONS
•
•
•
•
Cell Phones
PDA
GPS
•
High Efficiency Integrated Boost Converter
(Over 90% Efficiency)
•
•
•
•
•
2.2-W into an 8-Ω Load from a 3.6-V Supply
2.7-W into an 4-Ω Load from a 3.6-V Supply
Operates from 1.8 V to 5.5 V
Portable Electronics
DESCRIPTION
Efficient Class-D Prolongs Battery Life
The TPA2013D1 is a high efficiency Class-D audio
power amplifier with an integrated boost converter. It
drives up to 2.7 W (10% THD+N) into a 4 Ω speaker.
With 85% typical efficiency, the TPA2013D1 helps
extend battery life when playing audio.
Independent Shutdown for Boost Converter
and Class-D Amplifier
•
•
Differential Inputs Reduce RF Common Noise
Built-in INPUT Low Pass Filter Decreases RF
and Out of Band Noise Sensitivity
The built-in boost converter generates the voltage rail
for the Class-D amplifier. This provides a louder
audio output than a stand-alone amplifier connected
directly to the battery. It also maintains a consistent
loudness, regardless of battery voltage. Additionally,
the boost converter can be used to supply external
devices.
•
Synchronized Boost and Class-D Eliminates
Beat Frequencies
•
•
Thermal and Short-Circuit Protection
Available in 2.275 mm x 2.275 mm 16-ball
WCSP and 4 mm x 4 mm 20-Lead QFN
Packages
The TPA2013D1 has an integrated low pass filter to
improve RF rejection and reduce out-of-band noise,
increasing the signal to noise ratio (SNR). A built-in
PLL synchronizes the boost converter and Class-D
switching frequencies, thus eliminating beat
frequencies and improving audio quality. All outputs
are fully protected against shorts to ground, power
supply, and output-to-output shorts.
•
3 Selectable Gain Settings of 2 V/V, 6 V/V, and
10 V/V
R1
50 kΩ
R2
500 kΩ
22 mF
1 mF
2.2 to 6.2 mH
To Battery
10 mF
VDD
SW VCCFB VCCOUT VCCIN
CIN
1 mF
CIN
IN–
Differential
Input
VOUT+
IN+
TPA2013D1
VOUT–
Gain (VCC/Float/GND)
GAIN
ShutDown Boost
SDb
SDd
GPIO
ShutDown ClassD
AGND
PGND
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007, Texas Instruments Incorporated
TPA2013D1
www.ti.com
SLOS520–AUGUST 2007
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DEVICE INFORMATION
RGP (QFN) Package
(Top View)
YZH (WCSP) Package
(Top View)
VCCIN
A1
VCCOUT
A2
SW
A3
PGND
A4
20 19 18 17 16
VCCFB
B3
VDD
B4
VDD
VOUT+
B1
GAIN
B2
1
2
3
4
5
15
14
13
12
11
VOUT+
VOUT+
VOUT+
VOUT–
VOUT–
VCCFB
GAIN
AGND
SDd
VOUT–
C1
PGND
C2
SDd
C3
AGND
C4
PGND
D1
IN+
D2
IN–
D3
SDb
D4
6
7
8
9
10
TPA2013D1YZH
TPA2013D1RGP
BOOST CONVERTER TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
IN+
QFN
WCSP
8
D2
D3
I
I
Positive audio input
Negative audio input
Positive audio output
Negative audio output
IN–
7
VOUT+
VOUT–
SDb
13, 14, 15
B1
O
O
I
11, 12
C1
6
D4
Shutdown terminal for the Boost Converter
Shutdown terminal for the Class D Amplifier
Boost and rectifying switch input
SDd
5
C3
I
SW
18, 19
A3
–
–
I
VCCOUT
GAIN
VCCIN
VCCFB
VDD
17
A2
Boost converter output - connect to VCCIN
Gain selection pin
3
B2
16
A1
–
I
Class-D audio power amplifier voltage supply - connect to VCCOUT
Voltage feedback
2
B3
1
4
B4
–
–
–
Supply voltage
AGND
PGND
C4
Analog ground - connect all GND pins together
Power ground - connect all GND pins together
9, 10, 20
D1, C2, A4
Thermal
Pad
Solder the thermal pad on the bottom of the QFN package to the GND plane of the PCB.
It is required for mechanical stability and will enhance thermal performance.
Die Pad
N/A
P
2
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SLOS520–AUGUST 2007
Functional Block Diagram
SW
BG Control
VCCOUT
Anti-
Ringing
VDD
VCCOUT
Vmax
Gate
Control
PGND
Control
VCCFB
Regulator
Vref
SDb
SDd
Biases, Control,
and
References
Internal
Oscillator
AGND
VCCIN
GAIN
VOUT+
PWM
and
Level
Shifter
IN–
IN+
Res.
Array
H-Bridge
VOUT–
PGND
AGND
AGND
PGND
Table 1. BOOST CONVERTER MODE CONDITION
CASE
OUTPUT CURRENT
MODE OF OPERATION
VDD < VCC
VDD < VCC
VDD ≥ VCC
VDD ≥ VCC
Low
High
Low
High
Continuous (fixed frequency)
Continuous (fixed frequency)
Discontinuous (variable frequency)
Discontinuous (variable frequency)
Table 2. DEVICE CONFIGURATION
Boost
Converter
Class D
Amplifier
SDb
SDd
Comments
low
low
low
high
low
OFF
OFF
ON
OFF
Device is in shutdown mode Iq ≤ 1 μA
Boost converter is off. Class-D Audio Power Amplifier (APA) can be driven by an
external pass transistor connected to the battery.
ON
high
OFF
Class-D APA is off. Boost Converter is on and can be used to drive an external device.
Boost converter and Class-D APA are on. Normal operation. Boost converter can be
used to drive an external device in parallel to the Class-D APA within the limits of the
boost converter output current.
high
high
ON
ON
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SLOS520–AUGUST 2007
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE
–0.3 to 6
UNIT
VDD
VI
Supply voltage
V
V
Input voltage, Vi: SDb, SDd, IN+, IN–, VCCFB
Continuous total power dissipation
Operating free-air temperature range
Operating junction temperature range
Storage temperature range
–0.3 to VDD + 0.3
See Dissipation Rating Table
–40 to 85
TA
°C
°C
°C
TJ
–40 to 150
Tstg
–65 to 150
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operations of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATINGS
PACKAGE
16 ball WCSP
20 pin QFN
TA ≤ 25°C
1.5 W
DERATING FACTOR(1)
12.4 mW/°C
TA = 70°C
1 W
TA = 85°C
0.8 W
2.5 W
20.1 mW/°C
1.6 W
1.3 W
(1) Derating factor measured with JEDEC High K board.
AVAILABLE OPTIONS
TA
PACKAGED DEVICES(1)
16-ball, 2.275 mm × 2.275 mm WCSP
PART NUMBER
TPA2013D1YZH
TPA2013D1RGP(2)
SYMBOL
BTH
(± 0.05mm tolerance)
–40°C TO 85°C
20-pin, 4 mm × 4 mm QFN
BTI
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) The RGP package is only available taped and reeled. To order, add suffix R to the end of the part number for a reel of 3000 (e.g.,
TPA2013D1RGPR).
RECOMMENDED OPERATING CONDITIONS
MIN
1.8
MAX
UNIT
V
VDD
VIH
VIL
Supply voltage
5.5
High-level input voltage
Low-level input voltage
High-level input current
Low-level input current
Operating free-air temperature
SDb, SDd
1.3
V
SDb, SDd
0.35
1
V
| IIH
| IIL|
TA
|
SDb = SDd = 5.8 V, VDD = 5.5 V, VCC = 5.5 V
SDb = SDd = -0.3 V, VDD = 5.5 V, VCC = 5.5 V
μA
μA
°C
20
85
–40
4
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SLOS520–AUGUST 2007
DC CHARACTERISTICS
TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
Class-D audio power amplifier
voltage supply range, VCCIN
VCC
3
5.5
V
SDd = SDb = 0 V, VDD = 1.8 V, RL = 8 Ω
SDd = SDb = 0 V, VDD = 3.6 V, RL = 8 Ω
SDd = SDb = 0 V, VDD = 4.5 V, RL = 8 Ω
SDd = SDb = 0.35 V, VDD = 1.8 V, RL = 8 Ω
SDd = SDb = 0.35 V, VDD = 3.6 V, RL = 8 Ω
SDd = SDb = 0.35 V, VDD = 4.5 V, RL = 8 Ω
0.04
0.04
0.02
0.03
0.03
0.02
1.3
1.5
1.5
1.5
1.5
1.5
1.5
ISD
Shutdown quiescent current
μA
Boost converter quiescent
current
SDd = 0 V, SDb = 1.3 V, VDD = 3.6 V, VCC = 5.5 V, No
Load, No Filter
IDD
ICC
mA
mA
VDD = 3.6, Vcc = 5.5 V, No Load, No Filter
VDD = 4.5, Vcc = 5.5 V, No Load, No Filter
4.3
3.6
6
6
Class D amplifier quiescent
current
SDd = SDb = 1.3V, VDD = 3.6, Vcc = 5.5 V, No Load, No
Filter
16.5
23
Boost converter and audio
power amplifier quiescent
current, Class D(1)
IDD
mA
SDd = SDb = 1.3V, VDD = 4.5, Vcc = 5.5 V, No Load, No
Filter
11
600
300
18.5
700
Boost converter switching
frequency
500
250
kHz
f
Class D switching frequency
Under voltage lockout
Gain input low level
350
1.7
0.35
1
kHz
V
UVLO
Gain = 2 V/V (6dB)
0
V
GAIN
Gain input mid level
Gain = 6 V/V (15.5 dB) (floating input)
Gain = 10 V/V (20 dB)
0.7
0.8
V
Gain input high level
1.35
V
Class D Power on reset ON
threshold
2.8
V
PORD
(1) IDD is calculated using IDD = (ICC× VCC)/(VDD×η), where ICC is the class D amplifier quiescent current; η = 40%, which is the boost
converter efficiency when class D amplifier has no load. To achieve the minimal 40% η, it is recommended to use the suggested
inductors in table 4 and to follow the layout guidelines.
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SLOS520–AUGUST 2007
BOOST CONVERTER DC CHARACTERISTICS
TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
3.0
TYP
MAX
5.5
UNIT
VCC
Output voltage range
Feedback voltage
V
VFB
490
500
1500
220
510
mV
mA
mΩ
mΩ
IOL
Output current limit, Boost_max
PMOS switch resistance
NMOS resistance
1300
1700
RON_PB
RON_NB
170
No Load, 1.8 V < VDD < 5.2
V, VCC = 5.5 V
Line regulation
3
mV/V
VDD = 3.6 V, 0 < IL < 500 mA,
VCC = 5.5 V
Load regulation
30
mV/A
mA
IL
Start up current limit, Boost
0.4×IBoost
CLASS D AMPLIFIER DC CHARACTERISTICS
TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
2.2
UNIT
Vin = ±100 mV, VDD = 1.8 V, VCC = 3 V, RL = 8 Ω
Vin = ±100 mV, VDD = 2.5 V, VCC = 3.6 V, RL = 8 Ω
Vin = ±100 mV, VDD = 3.6 V, VCC = 5.5 V, RL = 8 Ω
0.5
0.5
0.5
CMR
Input common mode range
2.8
V
4.7
RL = 8 Ω, Vicm = 0.5 and Vicm = VCC – 0.8, differential
inputs shorted
CMRR
Input common mode rejection
–75
dB
VCC = 3.6 V, Av = 2 V/V, IN+ = IN– = Vref, RL = 8 Ω
VCC= 3.6 V, Av = 6 V/V, IN+ = IN– = Vref, RL = 8 Ω
VCC= 3.6 V, Av = 10 V/V, IN+ = IN– = Vref, RL = 8 Ω
VCC = 5.5 V, Av = 2 V/V, IN+ = IN– = Vref, RL = 8 Ω
Gain = 2 V/V (6 dB)
1
1
6
6
6
6
Output offset voltage
Class-D
VOO
mV
1
1
32
15
9.5
Rin
Input Impedance
Gain = 6 V/V (15.5 dB)
kΩ
Gain = 10 V/V (20 dB)
OUTP High-side FET On-state
series resistance
0.36
0.36
0.36
0.36
RDS(on)
OUTP Low-side FET On-state
series resistance
IOUTx = –300 mA; VCC = 3.6 V
Ω
OUTN High-side FET On-state
series resistance
RDS(on)
OUTN Low-side FET On-state
series resistance
Low Gain
Mid Gain
High Gain
GAIN ≤ 0.35 V
GAIN = 0.8 V
GAIN ≥ 1.35 V
1.8
5.7
9.5
2
6
2.2
6.3
V/V
V/V
V/V
AV
10
10.5
AC CHARACTERISTICS
TA = 25°C, VDD = 3.6V, RL = 8 Ω, L = 4.7μH (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
tSTART
Start up time
1.8 V ≤ VDD ≤ 5.5 V, CIN ≤ 1 μF
7.5
ms
THD+N = 1%, VCC = 5.5 V, VDD = 3.6 V,
RL= 8 Ω, Pout = 1.7 W, Cboost= 47μF
85%
η
Efficiency
THD+N = 1%, VCC = 5.5 V, VDD = 4.2 V,
87.5%
150
RL = 8 Ω, Pout = 1.7 W
Thermal Shutdown
Threshold
°C
6
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SLOS520–AUGUST 2007
CLASS D AMPLIFIER AC CHARACTERISTICS
TA = 25°C, VDD = 3.6V, RL = 8 Ω, L = 4.7μH (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
KSVR
Class-D
Output referred power supply
rejection ratio
VDD = 3.6 V, VCC = 5.5V, 200 mVPP ripple, f = 217
Hz
–95
dB
f = 1 kHz, Po = 1.7 W, VCC = 5.5 V
f = 1 kHz, Po = 1.2 W, VCC = 4.5 V
f = 1 kHz, Po = 2.2 W, VCC = 5.5 V
f = 1 kHz, Po = 1 W, VCC = 5.5 V
Av = 6 dB (2V/V)
1%
1%
THD+N
Class-D
Total harmonic distortion + noise
Output integrated noise floor
10%
0.1%
31
Vn
Class-D
μVrms
Output integrated noise floor
A-weighted
Av = 6 dB (2V/V)
23
THD+N = 10%, VCC = 5.5V, VDD = 3.6V , RL = 8 Ω
THD+N = 1%, VCC = 5.5V, VDD = 3.6V , RL = 8 Ω
THD+N = 1%, VCC = 4.5V, VDD = 3.6V , RL = 8 Ω
THD+N = 10%, VCC = 5.5V, VDD = 3.6V , RL = 4 Ω
THD+N = 1%, VCC = 5.5V, VDD = 3.6V , RL = 4 Ω
THD+N = 1%, VCC = 4.5V, VDD = 3.6V , RL = 4 Ω
2.2
1.7
1.2
2.7
2.2
1.9
PO
Maximum output power
W
TEST SET-UP FOR GRAPHS
TPA2013D1
CI
+
+
IN+
OUT+
30 kHz
Low-Pass
Filter
Measurement
CI
Measurement
Input
Load
Output
–
–
IN
OUT–
GND
VDD
1 mF
+
–
VDD
(1) CI was shorted for any common-mode input voltage measurement. All other measurements were taken with a 1-μF CI
(unless otherwise noted).
(2) A 33-μH inductor was placed in series with the load resistor to emulate a small speaker for efficiency measurements.
(3) The 30-kHz low-pass filter is required, even if the analyzer has an internal low-pass filter. An RC low-pass filter
(100Ω, 47-nF) is used on each output for the data sheet graphs.
(4) L = 4.7μH is used for the boost converter unless otherwise noted.
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SLOS520–AUGUST 2007
TYPICAL CHARACTERISTICS
EFFICIENCY
vs
OUTPUT POWER
EFFICIENCY
vs
OUTPUT POWER
100
80
100
80
60
60
V
= 3.6 V
V
= 2.5 V
DD
DD
V
= 3.6 V
V
= 2.5 V
DD
DD
V
DD
= 4.2 V
V
DD
= 1.8 V
V
DD
= 4.2 V
V
DD
= 1.8 V
40
20
0
40
20
0
Gain = 2 V/V
Gain = 2 V/V
R
L
= 8 Ω + 33 µH
= 4.5 V
R
L
= 8 Ω + 33 µH
= 5.5 V
V
CC
V
CC
0.0
0.5
1.0
1.5
0.0
0.0
0.0
0.5
1.0
1.5
2.0
P
O
− Output Power − W
P
− Output Power − W
O
G001
G002
Figure 1.
Figure 2.
POWER DISSIPATION
vs
OUTPUT POWER
POWER DISSIPATION
vs
OUTPUT POWER
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0.6
0.5
0.4
0.3
0.2
0.1
0.0
Gain = 2 V/V
Gain = 2 V/V
V
= 3.6 V
DD
R
L
= 8 Ω + 33 µH
R
= 8 Ω + 33 µH
= 5.5 V
L
V
CC
= 4.5 V
V
CC
V
DD
= 3.6 V
V
DD
= 2.5 V
V
DD
= 2.5 V
V
= 1.8 V
DD
V
DD
= 1.8 V
V
= 4.2 V
DD
V
= 4.2 V
DD
0.0
0.5
1.0
1.5
0.5
1.0
1.5
2.0
P
O
− Output Power − W
P
O
− Output Power − W
G003
G004
Figure 3.
Figure 4.
SUPPLY CURRENT
vs
OUTPUT POWER
SUPPLY CURRENT
vs
OUTPUT POWER
1.0
0.8
0.6
0.4
0.2
0.0
1.2
1.0
0.8
0.6
0.4
0.2
0.0
Gain = 2 V/V
Gain = 2 V/V
V
= 3.6 V
DD
V
DD
= 3.6 V
R
L
= 8 Ω + 33 µH
R
L
= 8 Ω + 33 µH
= 5.5 V
V
CC
= 4.5 V
V
CC
V
= 2.5 V
DD
V
DD
= 2.5 V
V
= 1.8 V
DD
V
DD
= 1.8 V
V
= 4.2 V
DD
V
= 4.2 V
DD
0.0
0.5
1.0
1.5
0.5
1.0
1.5
2.0
P
O
− Output Power − W
P
O
− Output Power − W
G005
G006
Figure 5.
Figure 6.
8
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TYPICAL CHARACTERISTICS (continued)
OUTPUT POWER
OUTPUT POWER
vs
SUPPLY VOLTAGE
vs
SUPPLY VOLTAGE
2.5
2.0
1.5
1.0
0.5
2.5
2.0
1.5
1.0
0.5
0.0
Gain = 2 V/V
= 8 Ω + 33 µH
R
L
L = 6.2 µH
THD = 1%
= 4.5 V
V
CC
L = 6.2 µH
L = 3.3 µH
L = 3.3 µH
L = 4.7 µH
Gain = 2 V/V
= 8 Ω + 33 µH
L = 4.7 µH
L = 2.2 µH
R
L
THD = 1%
= 5.5 V
V
CC
0.0
1.8
2.2
2.6
V
3.0
3.4
3.8
4.2
4.6
1.8
1.8
4
2.2
2.6
3.0
3.4
3.8
4.2
4.6
5.0
5.4
− Supply Voltage − V
V
DD
− Supply Voltage − V
DD
G007
G008
Figure 7.
Figure 8.
OUTPUT POWER
vs
SUPPLY VOLTAGE
OUTPUT POWER
vs
SUPPLY VOLTAGE
2.5
2.0
1.5
1.0
0.5
2.5
2.0
1.5
1.0
0.5
0.0
L = 6.2 µH
L = 3.3 µH
L = 6.2 µH
L = 3.3 µH
L = 4.7 µH
L = 2.2 µH
Gain = 2 V/V
= 8 Ω + 33 µH
Gain = 2 V/V
R = 8 Ω + 33 µH
L
THD = 10%
V = 5.5 V
CC
L = 4.7 µH
R
L
THD = 10%
V
CC
= 4.5 V
0.0
1.8
2.2
2.6
3.0
3.4
3.8
4.2
4.6
2.2
2.6
3.0
3.4
3.8
4.2
4.6
5.0
5.4
V
− Supply Voltage − V
V
DD
− Supply Voltage − V
DD
G009
G010
Figure 9.
Figure 10.
OUTPUT POWER
OUTPUT POWER
vs
LOAD
vs
LOAD
3.0
2.5
2.0
1.5
1.0
0.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
f = 1 kHz
Gain = 2 V/V
f = 1 kHz
Gain = 2 V/V
V
CC
= 4.5 V
V
CC
= 5.5 V
THD = 10%
THD = 10%
THD = 1%
THD = 1%
12
0.0
4
8
16
20
24
28
32
8
12
R
16
20
24
28
32
R
− Load Resistance − Ω
− Load Resistance − Ω
L
L
G011
G012
Figure 11.
Figure 12.
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TYPICAL CHARACTERISTICS (continued)
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
OUTPUT POWER
OUTPUT POWER
100
10
100
10
Gain = 2 V/V
Gain = 2 V/V
R
V
= 8 Ω + 33 µH
= 4.5 V
R = 8 Ω + 33 µH
L
L
V
= 1.8 V
= 2.5 V
V = 5.5 V
CC
DD
CC
V
= 1.8 V
DD
V
V
DD
= 3.6 V
= 4.2 V
V
DD
= 2.5 V
DD
V
DD
1
1
V
DD
= 3.6 V
0.1
0.01
0.1
0.01
V
DD
= 4.2 V
1
0.01
0.1
3
0.01
0.1
1
3
P
O
− Output Power − W
P
O
− Output Power − W
G013
G014
Figure 13.
Figure 14.
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
OUTPUT POWER
FREQUENCY
100
10
10
1
Gain = 2 V/V
Gain = 2 V/V
R
L
= 4 Ω + 33 µH
R
L
= 8 Ω + 33 µH
P
O
= 0.2 W
V
CC
= 5.5 V
V
CC
V
DD
= 4.5 V
= 1.8 V
V
= 1.8 V
= 2.5 V
DD
V
DD
DD
V
= 3.6 V
= 4.2 V
1
0.1
V
DD
0.1
0.01
0.01
0.001
P
O
= 0.075 W
P
O
= 0.025 W
0.01
0.1
1
5
20
100
1k
10k 20k
P
O
− Output Power − W
f − Frequency − Hz
G015
G016
Figure 15.
Figure 16.
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
FREQUENCY
FREQUENCY
10
1
10
1
Gain = 2 V/V
Gain = 2 V/V
R
L
= 8 Ω + 33 µH
R
L
= 8 Ω + 33 µH
P
O
= 1 W
V
CC
V
DD
= 4.5 V
= 3.6 V
V
CC
V
DD
= 5.5 V
= 1.8 V
P
O
= 0.025 W
0.1
0.1
0.01
0.001
0.01
0.001
P = 0.075 W
O
P
O
= 0.05 W
P
O
= 0.2 W
P
O
= 0.25 W
20
100
1k
10k 20k
20
100
1k
10k 20k
f − Frequency − Hz
f − Frequency − Hz
G017
G018
Figure 17.
Figure 18.
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TYPICAL CHARACTERISTICS (continued)
TOTAL HARMONIC DISTORTION + NOISE
TOTAL HARMONIC DISTORTION + NOISE
vs
vs
FREQUENCY
FREQUENCY
10
1
10
1
Gain = 2 V/V
Gain = 2 V/V
R
L
= 8 Ω + 33 µH
P
O
= 250 mW
= 4 Ω + 33 µH
= 4.5 V
V
CC
V
DD
= 5.5 V
= 3.6 V
R
V
L
P
O
= 1 W
V
DD
= 1.8 V
CC
V
DD
= 3.6 V
0.1
0.1
V = 2.5 V
DD
0.01
0.001
0.01
0.001
P
O
= 0.05 W
P
O
= 0.25 W
1k
V
DD
= 4.2 V
100
20
100
10k 20k
20
20
20
1k
10k 20k
f − Frequency − Hz
f − Frequency − Hz
G019
G020
Figure 19.
Figure 20.
TOTAL HARMONIC DISTORTION + NOISE
POWER SUPPLY REJECTION RATIO
vs
vs
FREQUENCY
FREQUENCY
10
1
0
−20
Gain = 2 V/V
Gain = 2 V/V
P
O
= 250 mW
R
V
= 8 Ω + 33 µH
L
R
L
= 4 Ω + 33 µH
= 4.5 V
CC
V
CC
= 5.5 V
−40
V
DD
= 3.6 V
V
DD
= 1.8 V
V
= 4.2 V
V
DD
= 4.2 V
DD
0.1
0.01
−60
V
DD
= 3.6 V
−80
V
DD
= 2.5 V
−100
−120
V
DD
= 1.8 V
V
DD
= 2.5 V
0.001
20
100
1k
10k 20k
100
1k
10k 20k
f − Frequency − Hz
f − Frequency − Hz
G021
G022
Figure 21.
Figure 22.
POWER SUPPLY REJECTION RATIO
COMMON-MODE REJECTION RATIO
vs
vs
FREQUENCY
FREQUENCY
0
−20
0
−20
Gain = 2 V/V
Gain = 2 V/V
R = 8 Ω
L
R
L
= 8 Ω + 33 µH
V
CC
= 5.5 V
V
CC
= 4.5 V
−40
−40
V
DD
= 1.8 V
V
DD
= 1.8 V
V
DD
= 2.5 V
−60
−60
V
DD
= 2.5 V
V
DD
= 3.6 V
−80
−80
V
= 4.2 V
−100
−120
−100
−120
DD
V
DD
= 3.6 V
V
DD
= 4.2 V
20
100
1k
10k 20k
100
1k
10k 20k
f − Frequency − Hz
f − Frequency − Hz
G023
G024
Figure 23.
Figure 24.
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TYPICAL CHARACTERISTICS (continued)
COMMON-MODE REJECTION RATIO
BOOST EFFICIENCY
vs
OUTPUT CURRENT
vs
FREQUENCY
100
95
90
85
80
75
70
65
60
55
50
0
−10
−20
−30
−40
−50
−60
−70
−80
−90
Gain = 2 V/V
R
V
= 8 Ω
L
= 5.5 V
CC
V
DD
= 3.6 V
V
DD
= 4.2 V
V
= 2.5 V
V
DD
= 3.6 V
DD
V
= 2.5 V
DD
V
DD
= 1.8 V
V
= 1.8 V
DD
V
DD
= 4.2 V
V
= 4.5 V
CC
0.01
0.1
1
20
100
1k
10k 20k
I
O
− Output Current − A
f − Frequency − Hz
G026
G025
Figure 25.
Figure 26.
BOOST EFFICIENCY
vs
OUTPUT CURRENT
BOOST EFFICIENCY
vs
SUPPLY VOLTAGE
100
95
90
85
80
75
70
65
60
55
50
100
90
80
70
60
50
V
= 4.5 V
CC
V
CC
= 5.5 V
V
DD
= 3.6 V
V
DD
= 4.2 V
V
= 2.5 V
DD
V
= 1.8 V
DD
I
= 250 mA
CC
L = 4.7 µH
V
= 5.5 V
CC
0.01
0.1
1
1.8
2.2
2.6
3.0
3.4
3.8
4.2
I
O
− Output Current − A
V
DD
− Supply Voltage − V
G027
G028
Figure 27.
Figure 28.
MAXIMUM CONTINUOUS OUTPUT CURRENT
vs
SUPPLY VOLTAGE (BOOST)
Start-Up Time
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
6
5
4
3
2
1
0
L = 4.7 µH
V
CC
SDb, SDd
V
CC
= 4.5 V
V
CC
= 5.5 V
OUT
Start Time 7.5 ms
−1
−2
1.8
2.2
2.6
3.0
3.4
3.8
4.2
0
2
4
6
8
10
12
14
16
18
20
t − Time − ms
V
DD
− Supply Voltage (Boost) − V
G029
G030
Figure 29.
Figure 30.
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APPLICATION INFORMATION
FULLY DIFFERENTIAL AMPLIFIER
The TPA2013D1 is a fully differential amplifier with differential inputs and outputs. The fully differential amplifier
consists of a differential amplifier with common-mode feedback. The differential amplifier ensures that the
amplifier outputs a differential voltage on the output that is equal to the differential input times the gain. The
common-mode feedback ensures that the common-mode voltage at the output is biased around VCC/2 regardless
of the common-mode voltage at the input. The fully differential TPA2013D1 can still be used with a single-ended
input; however, the TPA2013D1 should be used with differential inputs when in a noisy environment, like a
wireless handset, to ensure maximum noise rejection.
Advantages of Fully Differential Amplifiers
•
Input-coupling capacitors not required:
–
The fully differential amplifier allows the inputs to be biased at voltage other than mid-supply. The inputs of
the TPA2013D1 can be biased anywhere within the common mode input voltage range listed in the
Recommended Operating Conditions table. If the inputs are biased outside of that range, input-coupling
capacitors are required.
•
•
Midsupply bypass capacitor, C(BYPASS), not required:
–
The fully differential amplifier does not require a bypass capacitor. Any shift in the midsupply affects both
positive and negative channels equally and cancels at the differential output.
Better RF-immunity:
–
GSM handsets save power by turning on and shutting off the RF transmitter at a rate of 217 Hz. The
transmitted signal is picked-up on input and output traces. The fully differential amplifier cancels the signal
better than the typical audio amplifier.
BOOST CONVERTER
The TPA2013D1 consists of a boost converter and a Class-D amplifier. The boost converter takes a low supply
voltage, VDD, and increases it to a higher output voltage, VCC. VCC is the power supply for the Class-D amplifier.
The two main passive components necessary for the boost converter are the boost inductor and the boost
capacitor. The boost inductor stores current, and the boost capacitor stores charge. As the Class-D amplifier
depletes the charge in the boost capacitor, the boost inductor charges it back up with the stored current. The
cycle of charge/discharge occurs at a frequency of fboost
.
The TPA2013D1 allows a range of VCC voltages, including setting VCC lower than VDD
.
Boost Terms
The following is a list of terms and definitions used in the boost equations found later in this document.
C
Minimum boost capacitance required for a given ripple voltage on VCC
.
L
Boost inductor
fboost
Switching frequency of the boost converter.
Current pulled by the Class-D amplifier from the boost converter.
Average current through the boost inductor.
Resistors used to set the boost voltage.
ICC
IL
R1 and R2
VCC
Boost voltage. Generated by the boost converter. Voltage supply for the Class-D
amplifier.
VDD
ΔIL
ΔV
Supply voltage to the IC.
Ripple current through the inductor.
Ripple voltage on VCC due to capacitance.
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SETTING THE BOOST VOLTAGE
Use Equation 1 to determine the value of R1 for a given VCC. The maximum recommended value for VCC is
5.5 V. The typical value of the VCCFB pin is 500 mV. The current through the resistor divider should be about 100
times greater than the current into the VCCFB pin, typically 0.01 μA. Based on those two values, the
recommended value of R2 is 500 kΩ. VCC must be greater than 3 V and less than or equal to 5.5 V.
0.5 ´ (R1 + R2)
æ
ö
V
=
CC
ç
÷
R1
è
ø
(1)
INDUCTOR SELECTION
SURFACE MOUNT INDUCTORS
Working inductance decreases as inductor current increases. If the drop in working inductance is severe enough,
it may cause the boost converter to become unstable, or cause the TPA2013D1 to reach its current limit at a
lower output power than expected. Inductor vendors specify currents at which inductor values decrease by a
specific percentage. This can vary by 10% to 35%. Inductance is also affected by dc current and temperature.
TPA2013D1 INDUCTOR EQUATIONS
Inductor current rating is determined by the requirements of the load. The inductance is determined by two
factors: the minimum value required for stability and the maximum ripple current permitted in the application.
Use Equation 2 to determine the required current rating. Equation 2 shows the approximate relationship between
the average inductor current, IL, to the load current, load voltage, and input voltage (ICC, VCC, and VDD
,
respectively). Insert ICC, VCC, and VDD into Equation 2 to solve for IL. The inductor must maintain at least 90% of
its initial inductance value at this current.
æ
ç
è
ö
÷
ø
V
CC
I = I
L
´
CC
V
´ 0.8
DD
(2)
The minimum working inductance is 2.2 μH. A lower value may cause instability.
Ripple current, ΔIL, is peak-to-peak variation in inductor current. Smaller ripple current reduces core losses in the
inductor as well as the potential for EMI. Use Equation 3 to determine the value of the inductor, L. Equation 3
shows the relationship between inductance L, VDD, VCC, the switching frequency, fboost, and ΔIL. Insert the
maximum acceptable ripple current into Equation 3 to solve for L.
V
´ (V
- V )
DD
DD
DI ´ f
CC
L =
´ V
CC
L
boost
(3)
ΔIL is inversely proportional to L. Minimize ΔIL as much as is necessary for a specific application. Increase the
inductance to reduce the ripple current. Note that making the inductance too large will prevent the boost
converter from responding to fast load changes properly. Typical inductor values for the TPA2013D1 are 4.7 μH
to 6.8 μH.
Select an inductor with a small dc resistance, DCR. DCR reduces the output power due to the voltage drop
across the inductor.
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CAPACITOR SELECTION
SURFACE MOUNT CAPACITORS
Temperature and applied dc voltage influence the actual capacitance of high-K materials.
Table 3 shows the relationship between the different types of high-K materials and their associated tolerances,
temperature coefficients, and temperature ranges. Notice that a capacitor made with X5R material can lose up to
15% of its capacitance within its working temperature range.
High-K material is very sensitive to applied dc voltage. X5R capacitors can have losses ranging from 15 to 45%
of their initial capacitance with only half of their dc rated voltage applied. For example, if 5 Vdc is applied to a 10
V, 1 μF X5R capacitor, the measured capacitance at that point may show 0.85 μF, 0.55 μF, or somewhere in
between. Y5V capacitors have losses that can reach or exceed 50% to 75% of their rated value.
In an application, the working capacitance of components made with high-K materials is generally much lower
than nominal capacitance. A worst case result with a typical X5R material might be –10% tolerance, –15%
temperature effect, and –45% dc voltage effect at 50% of the rated voltage. This particular case would result in a
working capacitance of 42% (0.9 × 0.85 × 0.55) of the nominal value.
Select high-K ceramic capacitors according to the following rules:
1. Use capacitors made of materials with temperature coefficients of X5R, X7R, or better.
2. Use capacitors with dc voltage ratings of at least twice the application voltage. Use minimum 10 V capacitors
for the TPA2013D1.
3. Choose a capacitance value at least twice the nominal value calculated for the application. Multiply the
nominal value by a factor of 2 for safety. If a 10 μF capacitor is required, use 20 μF.
The preceding rules and recommendations apply to capacitors used in connection with the TPA2013D1. The
TPA2013D1 cannot meet its performance specifications if the rules and recommendations are not followed.
Table 3. Typical tolerance and temperature coefficient of capacitance by material
Material
COG/NPO
±5%
X7R
±10%
X5R
Typical Tolerance
80/–20%
22/–82%
-30/85°C
Temperature Coefficient
Temperature Range, °C
±30ppm
–55/125°C
±15%
–55/125°C
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TPA2013D1 CAPACITOR EQUATIONS
The value of the boost capacitor is determined by the minimum value of working capacitance required for stability
and the maximum voltage ripple allowed on VCC in the application. The minimum value of working capacitance is
10 μF. Do not use any component with a working capacitance less than 10 μF.
For X5R or X7R ceramic capacitors, Equation 4 shows the relationship between the boost capacitance, C, to
load current, load voltage, ripple voltage, input voltage, and switching frequency (ICC, VCC, ΔV, VDD, fboost
respectively). Insert the maximum allowed ripple voltage into Equation 4 to solve for C. A factor of 2 is included
to implement the rules and specifications listed earlier.
I
´
V
- V
CC DD
(
DV ´ f
boost
)
CC
C = 2 ´
´ V
CC
(4)
For aluminum or tantalum capacitors, Equation 5 shows the relationship between he boost capacitance, C, to
load current, load voltage, ripple voltage, input voltage, and switching frequency (ICC, VCC, ΔV, VDD, fboost
respectively). Insert the maximum allowed ripple voltage into Equation 5 to solve for C. Solve this equation
assuming ESR is zero.
I
´
V
- V
CC DD
(
DV ´ f
boost
)
CC
C =
´ V
CC
(5)
Capacitance of aluminum and tantalum capacitors is normally not sensitive to applied voltage so there is no
factor of 2 included in Equation 5. However, the ESR in aluminum and tantalum capacitors can be significant.
Choose an aluminum or tantalum capacitor with ESR around 30 mΩ. For best perfornamce using of tantalum
capacitor, use at least a 10 V rating. Note that tantalum capacitors must generally be used at voltages of half
their ratings or less.
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RECOMMENDED INDUCTOR AND CAPACITOR VALUES BY APPLICATION
Use Table 4 as a guide for determining the proper inductor and capacitor values.
Table 4. Recommended Values
Class-D
Class-D Minimum Required
Max
ΔV
(mVpp)
Output
Power
(W)(1)
Max IL
(A)
L
(μH)
Inductor Vendor
Part Numbers
C(2)
(μF)
Capacitor Vendor
Part Numbers
Load
VDD
(V)
VCC
(V)
(Ω)
3.3
10
Toko DE2812C
Coilcraft DO3314
Murata LQH3NPN3R3NG0
Kemet C1206C106K8PACTU
Murata GRM32ER61A106KA01B
Taiyo Yuden LMK316BJ106ML-T
1
8
8
3
3
4.3
5.5
0.70
1.13
30
30
4.7
22
Murata LQH32PN4R7NN0
Toko DE4514C
Coilcraft LPS4018-472
1.6
Murata GRM32ER71A226KE20L
Taiyo Yuden LMK316BJ226ML-T
3.3
33
47
2
4
4
3
4.6
5.5
1.53
2
30
30
Murata LQH55PN3R3NR0
Toko DE4514C
TDK C4532X5R1A336M
6.2
2.3
1.8
Sumida
Murata GRM32ER61A476KE20L
Taiyo Yuden LMK325BJ476MM-T
CDRH5D28NP-6R2NC
(1) All power levels are calculated at 1% THD unless otherwise noted
(2) All values listed are for ceramic capacitors. The correction factor of 2 is included in the values.
CLASS-D REQUIREMENTS
DECOUPLING CAPACITORS
The TPA2013D1 is a high-performance Class-D audio amplifier that requires adequate power supply decoupling
to ensure the efficiency is high and total harmonic distortion (THD) is low. Place low
a
equivalent-series-resistance (ESR) ceramic capacitor, typically 1 μF as close as possible to the device VDD lead.
This choice of capacitor and placement helps with higher frequency transients, spikes, or digital hash on the line.
Additionally, placing this decoupling capacitor close to the TPA2013D1 is important for the efficiency of the
Class-D amplifier, because any resistance or inductance in the trace between the device and the capacitor can
cause a loss in efficiency. Place a capacitor of 10 μF or greater between the power supply and the boost
inductor. The capacitor filters out high frequency noise. More importantly, it acts as a charge reservoir, providing
energy more quickly than the board supply, thus helping to prevent any droop.
INPUT CAPACITORS
The TPA2013D1 does not require input coupling capacitors if the design uses a differential source that is biased
within the common mode input range. Use input coupling capacitors if the input signal is not biased within the
recommended common-mode input range, if high pass filtering is needed, or if using a single-ended source.
The input capacitors and input resistors form a high-pass filter with the corner frequency, fc, determined in
Equation 6.
1
f
=
c
(2 ´ p ´ R C )
I I
(6)
The value of the input capacitor is important to consider as it directly affects the bass (low frequency)
performance of the circuit. Speakers in wireless phones cannot usually respond well to low frequencies, so the
corner frequency can be set to block low frequencies in this application. Not using input capacitors can increase
output offset.
Use Equation 7 to find the required the input coupling capacitance.
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1
C =
I
(2 ´ p ´ f ´ R )
I
c
(7)
Any mismatch in capacitance between the two inputs inputs will cause a mismatch in the corner frequencies.
Choose capacitors with a tolerance of ±10% or better.
FILTER FREE OPERATION AND FERRITE BEAD FILTERS
A ferrite bead filter can often be used if the design is failing radiated emissions without an LC filter and the
frequency sensitive circuit is greater than 1 MHz. This filter functions well for circuits that just have to pass FCC
and CE because FCC and CE only test radiated emissions greater than 30 MHz. When choosing a ferrite bead,
choose one with high impedance at high frequencies, and very low impedance at low frequencies. In addition,
select a ferrite bead with adequate current rating to prevent distortion of the output signal.
Use an LC output filter if there are low frequency (< 1 MHz) EMI sensitive circuits and/or there are long leads
from amplifier to speaker.
Figure 31 shows a typical ferrite bead output filters.
Ferrite
Chip Bead
OUTP
1 nF
Ferrite
Chip Bead
OUTN
1 nF
Figure 31. Typical Ferrite Chip Bead Filter
Suggested Chip Ferrite Bead
Load
8 Ω
Vendor
Murata
TDK
Part Number
BLM18EG121SN1
MPZ2012S101A
Size
0603
0805
4 Ω
OPERATION WITH DACs AND CODECs
When using switching amplifiers with CODECs and DACs, sometimes there is an increase in the output noise
floor from the audio amplifier. This occurs when mixing of the output frequencies of the CODEC/DAC with the
switching frequencies of the audio amplifier input stage. The noise increase can be solved by placing a low-pass
filter between the CODEC/DAC and audio amplifier. This filters off the high frequencies that cause the problem
and allow proper performance.
The TPA2013D1 has a two pole low pass filter at the inputs. The cutoff frequency of the filter is set to
approximately 100kHz. The integrated low pass filter of the TPA2013D1 eliminates the need for additional
external filtering components. A properly designed additional low pass filter may be added without altering the
performance of the device.
STEREO OPERATION APPLICATION
Use the boost converter of the TPA2013D1 to supply the power for another audio amplifier when stereo
operation is required. Ensure the gains of the amplifiers match each other. This prevents one channel from
sounding louder than the other. Use Equation 1 through Equation 5 to determine R1, R2, boost inductor, and the
boost capacitor values. Figure 32 is an example schematic. The TPA2032D1 is a good choice for this
application; the gain is internally set to 2 V/V, the power supply is compatible with VCCOUT of the TPA2013D1,
and the output power of the TPA2032D1 is on par with the TPA2013D1.
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R1
62.5 kΩ
R2
500 kΩ
47 mF
1 mF
4.7 mH
To Battery
22 mF
VDD
SW VCCFB VCCOUT VCCIN
CIN
1 mF
CIN
IN–
Left
Channel
Input
VOUT+
IN+
TPA2013D1
VOUT–
GAIN
CI
VDD
VO+
ShutDown Boost
ShutDown ClassD
SDb
SDd
GPIO
IN–
AGND
PGND
Right
Channel
Input
1 mF
CI
TPA2032D1
VO–
IN+
GND
SHUTDOWN
Figure 32. TPA2013D1 in Stereo With the TPA2032D1
LED DRIVER FOR DIGITAL STILL CAMERAS
Use the boost converter of the TPA2013D1 as a power supply for the flash LED of a digital still camera. Use a
microprocessor or other device or synchronize the flash to shutter sound that typically comes from the speaker of
a digital still camera. Figure 33 shows a typical circuit for this application. LEDs, switches, and other components
will vary by application.
R1
50 kΩ
R2
500 kΩ
100 mF
1 mF
6.2 mH
LXCL-PWF3
To Battery
CKG57NX5R1C107M
SW VCCFB VCCOUT VCCIN
22 mF
VDD
1 W
CIN
IN–
Differential
Input
1 mF
VOUT+
IN+
TPA2013D1
CIN
VOUT–
Gain
GAIN
NDS355N
ShutDown Boost
ShutDown ClassD
SDb
SDd
GPIO
GPIO
AGND
PGND
Figure 33. LED Driver
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TPA2013D1
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SLOS520–AUGUST 2007
BYPASSING THE BOOST CONVERTER
Bypass the boost converter to drive the Class-D amplifier directly from the battery. Place a Shottky diode
between the SW pin and the VCCIN pin. Select a diode that has an average forward current rating of at least 1A,
reverse breakdown voltage of 10 V or greater, and a forward voltage as small as possible. See Figure 34 for an
example of a circuit designed to bypass the boost converter.
Do not configure the circuit to bypass the boost converter if VDD is higher than VCC when the boost converter is
enabled (SDb ≥ 1.3 V); VDD must be lower than VCC for proper operation. VDD may be set to any voltage within
the recommended operating range when the boost converter is disabled (SDb ≤ 0.3V).
Place a logic high on SDb to place the TPA2013D1 in boost mode. Place a logic low on SDb to place the
TPA2013D1 in bypass mode.
Toshiba CRS 06
Schottky Diode
R1
50 kΩ
R2
500 kΩ
22 mF
1 mF
4.7 mH
Toko
1098AS-4R7M
To Battery
22 mF
VDD
SW VCCFB VCCOUT VCCIN
CIN
1 mF
CIN
IN–
Left
Channel
Input
VOUT+
IN+
TPA2013D1
VOUT–
GAIN
GND = Bypass
VDD = Boost Mode
SDb
SDd
GPIO
AGND
PGND
Figure 34. Bypass Circuit
EFFICIENCY AND THERMAL INFORMATION
The maximum ambient temperature depends on the heat-sinking ability of the PCB system. The derating factors
for the YZH and RGP packages are shown in the dissipation rating table. Apply the same principles to both
packages. Using the YZH package, and converting this to θJA:
1
1
q
=
=
= 80.64°C/W
JA
Derating Factor
0.0124
(8)
Given θJA of 80.64°C/W, the maximum allowable junction temperature of 150°C, and the maximum internal
dissipation of 0.317 W (VDD = 3.6 V, PO = 1.7 W), the maximum ambient temperature is calculated with the
following equation:
20
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Product Folder Link(s): TPA2013D1
TPA2013D1
SLOS520–AUGUST 2007
(9)
www.ti.com
T Max = T Max - q
J
P
JA Dmax
= 150 - 80.64 (0.317) = 124°C
A
Equation 9 shows that the calculated maximum ambient temperature is 124°C at maximum power dissipation
under the above conditions. The TPA2013D1 is designed with thermal protection that turns the device off when
the junction temperature surpasses 150°C to prevent damage to the IC. Also, using speakers more resistive than
4-Ω dramatically increases the thermal performance by reducing the output current and increasing the efficiency
of the amplifier.
BOARD LAYOUT
In making the pad size for the WCSP balls, use nonsolder mask defined (NSMD) land. With this method, the
solder mask opening is made larger than the desired land area, and the opening size is defined by the copper
pad width. Figure 35 and Table 5 show the appropriate diameters for a WCSP layout.
Copper Trace Width
Solder Pad Width
Solder Mask Opening
Solder Mask Thickness
Copper Trace Thickness
Figure 35. Land Pattern Dimensions
Table 5. Land Pattern Dimensions
SOLDER PAD
DEFINITIONS
SOLDER MASK
OPENING
COPPER
THICKNESS
STENCIL
OPENING
STENCIL
THICKNESS
COPPER PAD
Nonsolder mask
defined (NSMD)
275 μm
(+0.0, –25 μm)
375 μm
(+0.0, –25 μm)
1 oz max (32 μm)
275 μm x 275 μm Sq.
(rounded corners)
125 μm thick
NOTES:
1. Circuit traces from NSMD defined PWB lands should be 75 μm to 100 μm wide in the exposed area inside
the solder mask opening. Wider trace widths reduce device stand off and impact reliability.
2. Recommend solder paste is Type 3 or Type 4.
3. Best reliability results are achieved when the PWB laminate glass transition temperature is above the
operating the range of the intended application.
4. For a PWB using a Ni/Au surface finish, the gold thickness should be less 0.5 mm to avoid a reduction in
thermal fatigue performance.
5. Solder mask thickness should be less than 20 μm on top of the copper circuit pattern.
6. Best solder stencil performance is achieved using laser cut stencils with electro polishing. Use of chemically
etched stencils results in inferior solder paste volume control.
7. Trace routing away from WCSP device should be balanced in X and Y directions to avoid unintentional
component movement due to solder wetting forces.
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SLOS520–AUGUST 2007
Trace Width
Recommended trace width at the solder balls is 75 μm to 100 μm to prevent solder wicking onto wider PCB
traces.
For high current pins (SW, PGND, VOUT+, VOUT–, VCCIN, and VCCOUT) of the TPA2013D1, use 100 μm trace
widths at the solder balls and at least 500 μm PCB traces to ensure proper performance and output power for
the device.
For low current pins (IN–, IN+, SDd, SDb, GAIN, VCCFB, VDD) of the TPA2013D1, use 75 μm to 100 μm trace
widths at the solder balls. Run IN- and IN+ traces side-by-side to maximize common-mode noise cancellation.
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Product Folder Link(s): TPA2013D1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Oct-2007
PACKAGING INFORMATION
Orderable Device
TPA2013D1RGPR
TPA2013D1YZHR
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
QFN
RGP
20
3000 Green (RoHS & CU NIPDAU Level-3-260C-168 HR
no Sb/Br)
DSBGA
YZH
16
3000 Green (RoHS &
no Sb/Br)
Call TI
Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
1-Nov-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
330
(mm)
12
TPA2013D1RGPR
TPA2013D1YZHR
RGP
YZH
20
16
SITE 41
SITE 3
4.3
4.3
1.5
8
4
12
8
Q2
Q1
178
8
2.35
2.35
0.81
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
1-Nov-2007
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
TPA2013D1RGPR
TPA2013D1YZHR
RGP
YZH
20
16
SITE 41
SITE 3
346.0
217.0
346.0
193.0
29.0
35.0
Pack Materials-Page 2
X: Max = 2330 µm, Min = 2230 µm
Y: Max = 2330 µm, Min = 2230 µm
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TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
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Products
Amplifiers
Data Converters
DSP
Applications
Audio
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/audio
Automotive
Broadband
Digital Control
Military
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/military
Interface
interface.ti.com
logic.ti.com
Logic
Power Mgmt
Microcontrollers
RFID
power.ti.com
Optical Networking
Security
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/lpw
Telephony
Low Power
Wireless
Video & Imaging
Wireless
www.ti.com/wireless
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2007, Texas Instruments Incorporated
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