TPA2015D1_10 [TI]
2 W Constant Output Power Class-D Audio Amplifier With Adaptive Boost Converter and Battery Tracking SpeakerGuard™ AGC; 2 W恒定输出功率D类音频放大器，具有自适应升压转换器和电池跟踪SpeakerGuard ™ AGC
| 型号： | TPA2015D1_10 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 2 W Constant Output Power Class-D Audio Amplifier With Adaptive Boost Converter and Battery Tracking SpeakerGuard™ AGC |
| 文件： | 总27页 (文件大小：1021K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPA2015D1
www.ti.com
SLOS638 –MAY 2010
2 W Constant Output Power Class-D Audio Amplifier With Adaptive Boost Converter and
Battery Tracking SpeakerGuard™ AGC
Check for Samples: TPA2015D1
1
FEATURES
DESCRIPTION
•
Built-In SpeakerGuardTM Automatic Gain
2
Control (AGC) with Enhanced Battery Tracking
The TPA2015D1 is a high efficiency Class-D audio
power amplifier with battery-tracking SpeakerGuard™
AGC technology and an integrated adaptive boost
converter that enhances efficiency at low output
power. It drives up to 2 W into an 8 Ω speaker (6%
THD). With 85% typical efficiency, the TPA2015D1
helps extend battery life when playing audio.
–
–
Limits Battery Current Consumption
Prevents Audio Clipping
•
•
2 W into 8 Ω Load From 3.6 V Supply (6% THD)
Integrated Adaptive Boost Converter
–
Increases Efficiency at Low Output Power
The built-in boost converter generates a 5.5 V supply
voltage for the Class-D amplifier. This provides a
louder audio output than a stand-alone amplifier
•
•
•
Low Quiescent Current of 1.7 mA from 3.6 V
Operates From 2.5 V to 5.2 V
Thermal and Short-Circuit Protection with
Auto Recovery
directly
connected
to
the
battery.
The
SpeakerGuardTM AGC adjusts the Class-D gain to
limit battery current and prevent heavy clipping.
•
•
•
•
Three Gain Settings: 6 dB, 15.5 dB, and 20 dB
Independent Control for Boost and Class-D
Pin-to-Pin Compatible with TPA2013D1
The TPA2015D1 has an integrated low-pass filter to
improve the RF rejection and reduce DAC
out-of-band noise, increasing the signal to noise ratio
(SNR).
Available in 1.954 mm × 1.954 mm 16-ball
WCSP Package
The TPA2015D1 is available in a space saving
1.954 mm × 1.954 mm, 0.5 mm pitch WCSP package
(YZH).
•
Portable Electronics and Speakers
SIMPLIFIED APPLICATION DIAGRAM
2.2 mH
Connected to Supply
6.8 mF - 22 mF
VBAT
IN-
SW PVOUT PVDD
2.2 mF - 10 mF
Differential
Audio Inputs
IN+
OUT+
OUT-
GAIN
AGC
ENB
END
Gain Control
AGC Control
TPA2015D1
Boost Enable
Class-D Enable
GND
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
SpeakerGuard is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010, Texas Instruments Incorporated
TPA2015D1
SLOS638 –MAY 2010
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
FUNCTIONAL BLOCK DIAGRAM
VBAT
SW
Boost
Converter
PVOUT
PVDD
ENB
END
AGC
Bias &
Control
Battery
Monitor
Oscillator
PWM
PVDD
Gain
Select:
OUT+
OUT-
IN+
IN-
+
H-
Bridge
AGC
+20 dB
+15.5 dB
+6 dB
–
AGND
GND
GAIN
GND
DEVICE PINOUT
WCSP (YZH) PACKAGE
(TOP VIEW)
Symbol Side
PVDD
A1
PVOUT
A2
SW
A3
GND
A4
GAIN
B2
AGC
B3
VBAT
B4
OUT+
B1
OUT-
C1
GND
C2
END
C3
GND
C4
GND
D1
IN+
D2
IN-
D3
ENB
D4
2
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NAME
SLOS638 –MAY 2010
PIN FUNCTIONS
PIN
INPUT/ OUTPUT/
POWER
DESCRIPTION
WCSP
(I/O/P)
PVDD
PVOUT
SW
A1
A2
A3
I
O
I
Class-D power stage supply voltage.
Boost converter output.
Boost and rectifying switch input.
GND
OUT+
GAIN
AGC
VBAT
OUT–
END
IN+
A4, C2, C4, D1
P
O
I
Ground; all ground balls must be connected for proper functionality.
Positive audio output.
B1
B2
B3
B4
C1
C3
D2
D3
D4
Gain selection pin.
I
Enable and select AGC.
P
O
I
Supply voltage.
Negative audio output.
Enable for the Class-D amplifier; set to logic high to enable.
Positive audio input.
I
IN–
I
Negative audio input.
ENB
I
Enable for the boost converter; set to logic high to enable.
ORDERING INFORMATION
TA
–40°C to 85°C
PACKAGED DEVICES(1)
PART NUMBER(2)
TPA2015D1YZHR
TPA2015D1YZHT
SYMBOL
OEN
16-ball, 1.954mm × 1.954 mm WSCP
16-ball, 1.954 mm × 1.954 mm WSCP
OEN
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
(2) The YZH package is only available taped and reeled. The suffix “R” indicates a reel of 3000, the suffix “T” indicates a reel of 250.
ABSOLUTE MAXIMUM RATINGS
Over operating free–air temperature range, TA= 25°C (unless otherwise noted)(1)
MIN
MAX
6 V
Supply voltage
VBAT
–0.3 V
–0.3 V
Input Voltage, VI
IN+, IN–
VBAT + 0.3 V
Output continuous total power dissipation
Operating free-air temperature range, TA
Operating junction temperature range, TJ
Storage temperature range, TSTG
Minimum load impedance
See the Thermal Information Table
–40°C
–40°C
–65°C
6 Ω
85°C
150°C
150°C
HBM
2000 V
500 V
100 V
ESD Protection
CDM
MM
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
Copyright © 2010, Texas Instruments Incorporated
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UNITS
THERMAL INFORMATION
TPA2015D1
THERMAL METRIC(1)
YZH
16 PINS
75
qJA
Junction-to-ambient thermal resistance(2)
Junction-to-case(top) thermal resistance
(3)
qJC(top)
qJB
22
(4)
Junction-to-board thermal resistance
26
°C/W
(5)
yJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
0.5
(6)
(7)
yJB
25
qJC(bottom)
Junction-to-case(bottom) thermal resistance
n/a
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific
JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter, yJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining qJA, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, yJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining qJA , using a procedure described in JESD51-2a (sections 6 and 7).
(7) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
RECOMMENDED OPERATING CONDITIONS
MIN
2.5
MAX
UNIT
V
Supply voltage, VBAT
5.2
VIH
VIL
TA
TJ
High–level input voltage, END, ENB
Low–level input voltage, END, ENB
Operating free-air temperature
Operating junction temperature
1.3
V
0.6
85
V
–40
–40
°C
°C
150
ELECTRICAL CHARACTERISTICS
VBAT= 3.6 V, Gain = 6 dB, RAGC = Float, TA = 25°C, RL = 8 Ω + 33 mH (unless otherwise noted)
PARAMETER
TEST CONDITIONS
END = 0 V, ENB = VBAT
MIN
2.5
2.5
2.8
5.2
3.1
TYP
MAX UNIT
5.2
V
VBAT supply voltage range END = VBAT, ENB = VBAT, AGC options 1, 2, and 3
END = VBAT, ENB = VBAT, AGC option 0
5.2
5.2
Class-D supply voltage
range
END = ENB = VBAT, boost converter active
END = VBAT, ENB = 0 V
5.8
V
V
5.25
VBAT = 2.5 V to 5.2 V, END = ENB = VBAT
85
75
Power supply ripple
rejection
dB
VBAT = 2.5 V to 5.2 V, END = VBAT, ENB = 0 V
(pass through mode)
END = 0 V, ENB = VBAT
0.5
1.7
mA
mA
Operating quiescent
current
END = ENB = VBAT
2.2
3
Shutdown quiescent
current
VBAT = 2.5 V to 5.2 V, END = ENB = GND
0.2
mA
Gain = 6 dB (connect to GND)
Gain = 15.5 dB (float)
0
0.4 × VBAT
0.75 × VBAT
0.25 × VBAT
0.6 × VBAT
Gain control pin voltage
V
Gain = 20 dB (connect to VBAT)
4
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SLOS638 –MAY 2010
ELECTRICAL CHARACTERISTICS (continued)
VBAT= 3.6 V, Gain = 6 dB, RAGC = Float, TA = 25°C, RL = 8 Ω + 33 mH (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
2
TYP
MAX UNIT
AGC with no inflection point, RAGC = Open
AGC option 1 (inflection = 3.55 V), RAGC = 39 kΩ (±5%)
AGC option 2 (inflection = 3.78 V) , RAGC = 27 kΩ (±5%)
AGC option 3 (inflection = 3.96 V) , RAGC = 18 kΩ (±5%)
1.36
0.94
0
1.75
V
AGC control pin voltage
1.2
0.825
AGC control pin output
current
37.6
0.6
40
42.4
1.3
mA
Input common-mode
voltage range
IN+, IN–
V
Boost converter followed by Class-D amplifier
Boost converter only
6
1
5
10
4
Start-up time
ms
Class-D amplifier only
6
OPERATING CHARACTERISTICS
VBAT= 3.6 V, TA = 25°C, RL = 8 Ω + 33 mH (unless otherwise noted)
PARAMETER
BOOST CONVERTER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Boost converter output voltage range,
PVOUT
IBOOST = 700 mA
5.2
5.8
V
Boost converter input current limit
Boost converter start-up current limit
Boost converter efficiency
Power supply current
1500
450
88%
1.2
mA
mA
IL
h
END = 0 V, IPVOUT = 100 mA constant
fBOOST
Boost converter frequency
MHz
CLASS-D AMPLIFIER
THD = 1%, VBAT = 2.5 V, f = 1 kHz
THD = 1%, VBAT = 3 V, f = 1 kHz
THD = 1%, VBAT = 3.6 V, f = 1 kHz
1200
1500
1700
PO
VO
AV
Output power
mW
V
THD = 1%, VBAT = 3 V, f = 1 kHz,
6 dB crest factor sine burst, no clipping
Output peak voltage
5.2
GAIN < 0.25 × VBAT
6
15.5
20
Closed-loop voltage gain
0.4 × VBAT < GAIN < 0.6 × VBAT (or float)
GAIN > 0.75 × VBAT
dB
ΔAV
Gain accuracy
–0.5
0.5
10
dB
VOOS
Output offset voltage
mV
AV = 6 dB
27.8
14.9
10.1
Input impedance (per input pin)
AV = 15.5 dB
AV = 20 dB
kΩ
RIN
Input impedance in shutdown (per input
pin)
END = 0 V
END = 0 V
88.4
kΩ
ZO
Output impedance in shutdown
Switching frequency
2
600
kΩ
fCLASS-D
560
640
kHz
A-weighted, GAIN = 6 dB
A-weighted, GAIN = 15.5 dB
A-weighted, GAIN = 20 dB
PO = 100 mW, f = 1 kHz
PO = 500 mW, f = 1 kHz
200 mVPP ripple, f = 217 Hz
200 mVPP ripple, f = 4 kHz
24.8
33.4
42.4
0.06%
0.07%
75
EN
Noise output voltage
mVRMS
THD+N
Total harmonic distortion plus noise(1)
AC-Power supply ripple rejection (output
referred)
AC PSRR
dB
70
(1) A-weighted
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OPERATING CHARACTERISTICS (continued)
VBAT= 3.6 V, TA = 25°C, RL = 8 Ω + 33 mH (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
–0.2
–0.2
TYP
–0.1
–0.1
MAX
UNIT
fAUDIO = 20 Hz, CIN = 1 mF
fAUDIO = 16 kHz, CIN = 1 mF
0
0
Audio frequency passband ripple
dB
AUTOMATIC GAIN CONTROL
AGC gain range
0
20
dB
dB
AGC gain step size
0.5
0.026
1600
6.15
3
AGC attack time (gain decrease)
AGC release time (gain increase)
Limiter threshold voltage
VBAT vs. Limiter slope
ms/dB
ms/dB
V
VBAT > inflection point
VBAT < inflection point
V/V
AGC option 1, RAGC = 39 kΩ (±5%)
AGC option 2, RAGC = 27 kΩ (±5%)
AGC option 3, RAGC = 18 kΩ (±5%)
3.55
3.78
3.96
AGC inflection point
V
TEST SET-UP FOR GRAPHS
TPA2015D1
1 mF
+
Measurement
Output
+
–
IN+
OUT+
OUT–
30 kHz
Low-Pass
Filter
Measurement
Input
Load
–
IN–
1 mF
SW
PVDD
PVOUT
VBAT
GND
22 mF
2.2 mH
10 mF
+
Supply
–
(1) The 1 µF input capacitors (CI) were shorted for input common-mode voltage measurements.
(2) A 33 mH inductor was placed in series with the load resistor to emulate a small speaker for efficiency measurements.
(3) The 30 kHz low-pass filter is required even if the analyzer has an internal low-pass filter. An R-C low pass filter
(100 Ω, 47 nF) is used on each output for the data sheet graphs.
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SLOS638 –MAY 2010
TYPICAL CHARACTERISTICS
VBAT = 3.6 V, Gain = 6 dB, CI = 1 µF, CBOOST = 22 µF, LBOOST = 2.2 µH, AGC = Float, ENB = END = VBAT, and Load = 8 Ω + 33 µH unless
otherwise specified.
SPACER
10m
8m
6m
4m
2m
0
−80
−90
Gain = 20 dB
AGC = Float
RL = 8 Ω + 33 µH
Gain = 20 dB
AGC = Float
RL = 8 Ω + 33 µH
No Input Signal
−100
−110
−120
−130
−140
−150
2.3
2.6
2.9
3.2
3.5
3.8
4.1
4.4
4.7
5.0
0
2k 4k 6k 8k 10k 12k 14k 16k 18k 20k 22k 24k
Frequency − Hz
VBAT − V
Figure 1. QUIESCENT SUPPLY CURRENT vs SUPPLY
VOLTAGE
Figure 2. A-WEIGHTED OUTPUT NOISE vs FREQUENCY
1.0
6
Gain = 20 dB
RL = 8 Ω + 33 µH
Gain = 20 dB
RL = 8 Ω + 33 µH
RAGC = 27 kΩ
5
4
3
2
1
0
f = 1 kHz
RAGC = Float
0.8
0.6
0.4
VBAT = 2.5 V
VBAT = 2.7 V
VBAT = 3.0 V
VBAT = 3.3 V
VBAT = 3.6 V
VBAT = 4.2 V
VBAT = 5.0 V
0.2
VBAT = 3.0 V
VBAT = 3.6 V
VBAT = 4.2 V
0.0
0.0
0.5
1.0
1.5
2.0 2.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
PO − Output Power − W
VIN − Input Voltage − Vp
Figure 3. SUPPLY CURRENT vs OUTPUT POWER
Figure 4. PEAK OUTPUT VOLTAGE vs PEAK INPUT
VOLTAGE
100
100
10
VBAT = 2.8 V
VBAT = 3.0 V
VBAT = 3.6 V
VBAT = 4.2 V
VBAT = 5.0 V
RL = 8 Ω + 33 µH
RAGC = Float, Boost Enabled
Gain = 6 dB, f = 1 kHz
80
60
40
20
0
Auto Pass Through
Boosted
1
VBAT = 2.7 V
0.1
VBAT = 3.0 V
VBAT = 3.6 V
VBAT = 4.2 V
VBAT = 5.0 V
Gain = 20 dB
RL = 8 W + 33 mH
f = 1 kHz
0.01
0.01
0.1
1
2
1m
10m
100m
PO − Output Power − W
1
4
PO – Output Power – W
Figure 5. TOTAL EFFICIENCY vs OUTPUT POWER
Figure 6. TOTAL HARMONIC DISTORTION + NOISE vs
OUTPUT POWER
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TYPICAL CHARACTERISTICS (continued)
VBAT = 3.6 V, Gain = 6 dB, CI = 1 µF, CBOOST = 22 µF, LBOOST = 2.2 µH, AGC = Float, ENB = END = VBAT, and
Load = 8 Ω + 33 µH unless otherwise specified.
SPACER
6.0
5.0
4.0
3.0
2.0
1.0
10
1
VBAT = 2.5 V
RL = 8 Ω + 33 µH
RAGC = Float
Gain = 6 dB
Po = 25 mW
Po = 125 mW
Po = 200 mW
RL = 8 Ω + 33 µH
VIN = 0.45 VRMS
f = 1 kHz
0.1
Gain = 20 dB
0.01
0.001
RAGC = Float
RAGC = 39 kΩ
RAGC = 27 kΩ
RAGC = 18 kΩ
2.3
2.6
2.9
3.2
3.5
3.8
4.1
4.4
4.7
5.0
20
100
1k
10k 20k
VBAT − Supply Voltage − V
f − Frequency − Hz
Figure 7. MAXIMUM OUTPUT VOLTAGE vs SUPPLY
VOLTAGE
Figure 8. TOTAL HARMONIC DISTORTION + NOISE vs
FREQUENCY
2.5
10
VBAT = 3.6 V
RL = 8 Ω + 33 µH
RAGC = Float
Gain = 6 dB
Po = 50 mW
Po = 250 mW
Po = 500 mW
2.0
1.5
1.0
0.5
0.0
1
0.1
RL = 8 Ω + 33 µH
VIN = 0.45 VRMS
f = 1 kHz
Gain = 20 dB
0.01
0.001
RAGC = Float
RAGC = 39 kΩ
RAGC = 27 kΩ
RAGC = 18 kΩ
2.3
2.6
2.9
3.2
3.5
3.8
4.1
4.4
4.7
5.0
20
100
1k
10k 20k
VBAT − Supply Voltage − V
f − Frequency − Hz
Figure 9. OUTPUT POWER vs SUPPLY VOLTAGE
Figure 10. TOTAL HARMONIC DISTORTION + NOISE vs
FREQUENCY
1.0
0.8
0.6
0.4
0.2
0.0
10
RL = 8 Ω + 33 µH
VIN = 0.45 VRMS
f = 1 kHz
VBAT = 4.2 V
RL = 8 Ω + 33 µH
RAGC = Float
Gain = 6 dB
Po = 100 mW
Po = 500 mW
Po = 1W
Gain = 20 dB
1
0.1
0.01
0.001
RAGC = Float
RAGC = 39 kΩ
RAGC = 27 kΩ
RAGC = 18 kΩ
2.3
2.6
2.9
3.2
3.5
3.8
4.1
4.4
4.7
5.0
20
100
1k
10k 20k
VBAT − Supply Voltage − V
f − Frequency − Hz
Figure 11. SUPPLY CURRENT vs SUPPLY VOLTAGE
Figure 12. TOTAL HARMONIC DISTORTION + NOISE vs
FREQUENCY
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SLOS638 –MAY 2010
TYPICAL CHARACTERISTICS (continued)
VBAT = 3.6 V, Gain = 6 dB, CI = 1 µF, CBOOST = 22 µF, LBOOST = 2.2 µH, AGC = Float, ENB = END = VBAT, and
Load = 8 Ω + 33 µH unless otherwise specified.
SPACER
0
40k
35k
30k
25k
20k
15k
10k
5k
RL = 8 Ω + 33 µH
Input Level = 0.2 VPP
Gain = 6 dB
Output Referred
VBAT = 2.5 V
VBAT = 3.6 V
VBAT = 4.2 V
VBAT = 5.0 V
RL = 8 Ω + 33 µH
−20
−40
−60
−80
−100
20
100
1k
10k 20k
0
2
4
6
8
10
12
14
16
18
20
f − Frequency − Hz
Gain − dB
Figure 13. SUPPLY RIPPLE REJECTION vs FREQUENCY
Figure 14. INPUT IMPEDANCE (PER INPUT) vs GAIN
6
6
VBAT = 3.6 V
Gain = 6 dB
VBAT = 3.6 V
Gain = 6 dB
ENB and END
OUT+ − VOUT−
ENB and END
VOUT+ − VOUT−
V
POUT = 100mW @ 1kHz
POUT = 100 mW @ 1kHz
RL = 8 Ω + 33 µH
RL = 8 Ω + 33 µH
4
2
4
2
0
0
−2
−2
0
5m
10m
15m
20m
0
2m
4m
6m
8m
10m
t − Time − s
t − Time − s
Figure 15. STARTUP TIMING
Figure 16. SHUTDOWN TIMING
Figure 17. EMC PERFORMANCE
Figure 18. EMC PERFORMANCE
PO = 50 mW with 2 INCH SPEAKER CABLE
PO = 750 mW with 2 INCH SPEAKER CABLE
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APPLICATION INFORMATION
APPLICATION CIRCUIT
2.2 mH
Connected to Supply
6.8 mF - 22 mF
VBAT
IN-
SW PVOUT PVDD
2.2 mF - 10 mF
Differential
Audio Inputs
IN+
OUT+
OUT-
Gain Control
AGC Control
Boost Enable
GAIN
AGC
ENB
END
TPA2015D1
Class-D Enable
GND
Figure 19. Typical Application Schematic with Differential Input Signals
2.2 mH
Connected to Supply
6.8 mF - 22 mF
VDD
IN-
SW PVOUT PVDD
Single-Ended
Audio Inputs
2.2 mF - 10 mF
IN+
OUT+
OUT-
GAIN
AGC
ENB
END
TPA2015D1
Gain Control
AGC Control
Boost Enable
Class-D Enable
GND
Figure 20. Typical Application Schematic with Single-Ended Input Signals
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GLOSSARY
The application section uses the following terms:
Limiter level
The maximum output voltage allowed before amplifier gain is automatically reduced.
TI's trademark name for the automatic gain control technology. It protects speakers by
SpeakerGuard™
limiting maximum output power.
Inflection point
Battery track
The battery voltage threshold for reducing the limiter level. If the battery voltage drops
below the inflection point, the limiter level automatically reduces. Although it lowers the
maximum output power, it prevents high battery currents at end-of-charge low battery
voltages.
The name for the continuous limiter level reduction at battery voltages below the inflection
point.
AGC
Automatic gain control.
VBAT
The battery supply voltage to the TPA2015D1. The VBAT pin is the input to the boost
converter.
Fixed-gain
The nominal audio gain as set by the GAIN pin. If the audio output voltage remains below
the limiter level, the amplifier gain will return to the fixed-gain.
Attack time
The rate of AGC gain decrease. The attack time is constant at 0.026 ms/dB.
The rate of AGC gain increase. The release time is constant at 1600 ms/dB.
Release time
SPEAKERGUARD™ THEORY OF OPERATION
SpeakerGuard™ protects speakers, improves loudness, and limits peak supply current. If the output audio signal
exceeds the limiter level, then SpeakerGuard™ decreases amplifier gain. The rate of gain decrease, the attack
time, is fixed at 0.026 ms/dB. SpeakerGuard™ increases the gain once the output audio signal is below the
limiter level. The rate of gain increase, the release time, is fixed at 1600 ms/dB. Figure 21 shows this
relationship.
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INPUT
SIGNAL
Release Time
Attack Time
Gain Step
GAIN
LIMITER
LEVEL
OUTPUT
SIGNAL
Figure 21. SpeakerGuard Attack and Release Times
BATTERY TRACKING SPEAKERGUARD™
The TPA2015D1 monitors the battery voltage and the audio signal, automatically decreasing gain when battery
voltage is low and audio output power is high. It finds the optimal gain to maximize loudness and minimize
battery current, providing louder audio and preventing early shutdown at end-of-charge battery voltages.
SpeakerGuard decreases amplifier gain when the audio signal exceeds the limiter level. The limiter level
automatically decreases when the supply voltage (VBAT) is below the inflection point. Figure 22 shows a plot of
the limiter level as a function of the supply voltage.
Limiter Level (VBAT > inflection point)
Inflection point
Limiter Level (VBAT = inflection point)
Supply Voltage
Figure 22. Limiter Level vs Supply Voltage
The limiter level decreases within 60 µs of the supply voltage dropping below the inflection point. Although this is
slightly slower than the 26 µs/dB SpeakerGuard attack time, the difference is audibly imperceptible.
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Connect a resistor between the AGC pin and ground to set the inflection point, as shown in Table 1. Leave the
AGC pin floating to disable the inflection point, keeping the limiter level constant over all supply voltages.
The maximum limiter level is fixed, as is the slope of the limiter level versus supply voltage. If different values for
maximum limiter level and slope are required, contact your local Texas Instruments representative.
Table 1. AGC Function Table
Function
Resistor on AGC pin
Inflection Point
disabled
3.55 V
Constant limiter level; battery track OFF
AGC battery track option 1
AGC battery track option 2
AGC battery track option 3
Floating or connected to VBAT
39 kΩ
27 kΩ
18 kΩ
3.78 V
3.96 V
The audio signal is not affected by the SpeakerGuard™ function unless the peak audio output voltage exceeds
the limiter level. Figure 23 shows the relationship between the audio signal, the limiter level, the supply voltage,
and the supply current.
When VBAT is greater than the inflection point, the limiter level allows the output signal to slightly clip to roughly
6% THD at 2 W into 8 Ω. This is an acceptable peak distortion level for most small-sized portable speakers,
while ensuring maximum loudness from the speaker.
Battery Tracking SpeakerGuard™ Example
Phase 1
Battery discharging normally; supply voltage is above inflection point; audio output remains
below limiter level.
The limiter level remains constant because the supply voltage is greater than the inflection point.
Amplifier gain is constant at fixed-gain as set by the GAIN pin. The audio output remains at a
constant loudness. The boost converter allows the audio output to swing above the battery supply
voltage. Battery supply current increases as supply voltage decreases.
Phase 2
Battery continues to discharge normally; supply voltage decreases below inflection point;
limiter level decreases below audio output.
The limiter level decreases as the battery supply voltage continues to decrease. SpeakerGuard™
lowers amplifier gain, reducing the audio output below the new limiter level. The supply current
decreases due to reduced output power.
Phase 3
Phase 4
Battery supply voltage is constant; audio output remains below limiter level.
The audio output, limiter level, and supply current remain constant as well.
Phone plugged in and battery re-charges; supply voltage increases.
The limiter level increases as the supply voltage increases. SpeakerGuard™ increases amplifier
gain slowly, increasing audio output. Because the TPA2015D1 supply current is proportional to the
PVOUT-to-VBAT ratio, the supply current decreases as battery supply voltage increases.
Phase 5
Phase 6
Battery supply voltage is constant; audio output is below limiter level.
SpeakerGuard™ continues to increase amplifier gain to the fixed-gain as set by the GAIN pin. The
audio output signal increases (slowly due to release time) to original value.
Battery supply voltage is constant; audio output remains below limiter level.
Amplifier gain equal to fixed-gain as set by the GAIN pin. Audio output signal does not change.
Supply current remains constant.
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Supply Current
Limiter Level
Class-D Voltage
Supply Voltage
Audio Signal
Phase 1
Phase 2
Inflection point
Phase 3
Phase 5
Phase 4
Phase 6
Figure 23. Relationship Between Supply Voltage, Current, Limiter Level, and Output Audio Signal
SpeakerGuard with Varying Input Levels
SpeakerGuard protects speakers by decreasing gain during large output transients. Figure 24 shows the
maximum output voltage at different input voltage levels. The load is 8 Ω and the gain is 15.5 dB (6 V/V).
6.0
RL = 8 Ω + 33 µH
RAGC = 27 kΩ
f = 1 kHz
Gain = 15.5 dB
5.0
4.0
3.0
2.0
VIN = 0.707 VRMS
VIN = 0.564 VRMS
VIN = 0.475 VRMS
1.0
2.3
2.6
2.9
3.2
3.5
3.8
4.1
4.4 4.7 5.0
VBAT − Supply Voltage − V
Figure 24. MAXIMUM OUTPUT VOLTAGE vs SUPPLY VOLTAGE
A 0.707 VRMS sine-wave input signal forces the output voltage to 4.242 VRMS, or 6.0 VPEAK. Above 3.9 V supply,
the boost converter voltage sags due to high output current, resulting in a peak Class-D output voltage of about
5.4 V. As the supply voltage decreases below 3.9 V, the limiter level decreases. This causes the gain to
decrease, and the peak Class-D output voltage lowers.
With a 0.564 VRMS input signal, the peak Class-D output voltage is 4.78 V. When the supply voltage is above
3.45 V, the output voltage remains below the limiter level, and the gain stays at 15.5 dB. Once the supply drops
below 3.45 V, the limiter level decreases below 4.78 V, and SpeakerGuard decreases the gain.
The same rationale applies to the 0.475 VRMS input signal. Although the supply voltage may be below the
inflection point, audio gain does not decrease until the Class-D output voltage is above the limiter level.
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SPEAKER LOAD LIMITATION
Speakers are non-linear loads with varying impedance (magnitude and phase) over the audio frequency. A
portion of speaker load current can flow back into the boost converter output via the Class-D output H-bridge
high-side device. This is dependent on the speaker's phase change over frequency, and the audio signal
amplitude and frequency content.
Most portable speakers have limited phase change at the resonant frequency, typically no more than 40 or 50
degrees. To avoid excess flow-back current, use speakers with limited phase change. Otherwise, flow-back
current could exceed the 10 mA rating of the boost converter voltage clamp and drive the PVOUT voltage above
the absolute maximum recommended operational voltage.
Confirm proper operation by connecting the speaker to the TPA2015D1 and driving it at maximum output swing.
Observe the PVOUT voltage with an oscilloscope. In the unlikely event the PVOUT voltage exceeds 6.5 V, add a
6.8 V Zener diode between PVOUT and ground to ensure the TPA2015D1 operates properly.
The amplifier has thermal overload protection and decatives if the die temperature exceeds 150°C. It
automatically reactivates once die temperature returns below 150°C. Built-in output over-current protection
deactivates the amplifier if the speaker load becomes short-circuited. The amplifier automatically restarts within
200 ms after the over-current event. Although the TPA2015D1 Class-D output can withstand a short between
OUT+ and OUT-, do not connect either output directly to GND, PVDD, or VBAT as this could damage the device.
WARNING
Do not connect OUT+ or OUT- directly to GND, PVDD, or VBAT as this could
damage the Class-D output stage.
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FULLY DIFFERENTIAL CLASS-D AMPLIFIER
The TPA2015D1 uses a fully differential amplifier with differential inputs and outputs. The differential output
voltage equals the differential input multiplied by the amplifier gain. The TPA2015D1 can also be used with a
single-ended input. However, using differential input signals when in a noisy environment, like a wireless
handset, ensures maximum system noise rejection.
Advantages of Fully Differential Amplifiers
•
Mid-supply bypass capacitor, CBYPASS, not required:
–
The fully differential amplifier does not require a mid-supply bypass capacitor. Any shift in the mid-supply
affects both positive and negative channels equally and cancels at the differential output.
•
Improved RF-immunity:
–
GSM handsets save power by turning on and shutting off the RF transmitter at a rate of 217 Hz. This
217 Hz burst often couples to audio amplifier input and output traces causing frame-rate noise. Fully
differential amplifiers cancel frame-rate noise better than non-differential amplifiers.
•
Input-coupling capacitors not required, but recommended:
–
The fully differential amplifier allows the inputs to be biased at voltages other than mid-supply (PVDD/2).
The TPA2015D1 inputs can be biased anywhere within the common mode input voltage range, as listed in
the OPERATING CHARACTERISTICS table. If the inputs are biased outside of that range, then
input-coupling capacitors are required.
–
Note that without input coupling capacitors, any dc offset from the audio source will be modulated by the
AGC. This could cause artifacts in the audio output signal. Perform listening tests to determine if direct
input coupling is acceptable.
The TPA2015D1 has 3 selectable fixed-gains: 6 dB, 15.5 dB, and 20 dB. Connect the GAIN pin as shown in
Table 2.
Table 2. Amplifier Fixed-Gain
Connect GAIN Pin to
GND
Amplifier Gain
6 dB
No Connection (Floating)
VBAT
15.5 dB
20 dB
Improved Class-D Efficiency
The TPA2015D1 output stage uses a modulation technique that modulates the PWM output only on one side of
the differential output, leaving the other side held at ground. Although the differential output voltage is
undistorted, each output appears as a half-wave rectified signal.
This technique reduces output switching losses and improves overall amplifier efficiency. Figure 25 shows how
OUT+, OUT-, and the differential output voltages appear on an oscilloscope.
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FILTERED OUTPUT WAVEFORMS
Figure 25.
ADAPTIVE BOOST CONVERTER
The TPA2015D1 consists of an adaptive boost converter and a Class-D amplifier. The boost converter takes the
supply voltage, VBAT, and increases it to a higher output voltage, PVOUT. PVOUT drives the supply voltage of
the Class-D amplifier, PVDD. This improves loudness over non-boosted solutions.
The boost converter is adaptive and activates automatically depending on the output audio signal amplitude.
When the peak output audio signal exceeds a preset voltage threshold, the boost converter is enabled, and the
voltage at PVOUT is 5.5 V. When the audio output voltage is lower than the threshold voltage, the boost
deactivates automatically. The boost activation threshold voltage is not user programmable. It is optimized to
prevent clipping while maximizing system efficiency.
The boost converter can be forcibly deactivated by setting the ENB pin to logic-low. When the boost is
deactivated, PVOUT is equal to the supply voltage (VBAT) minus the I x R drop across the inductor and boost
converter pass transistor.
A timer prevents the input signal from modulating the PVOUT voltage within the audio frequency range,
eliminating the potential for audible artifacts on the Class-D output.
Figure 26 shows how the adaptive boost modulates with a typical audio signal. By automatically deactivating the
boost converter and passing VBAT to PVOUT, the TPA2015D1 efficiency is improved at low output power.
12
VBAT = 3.6 V
10 Gain = 20 dB
AGC = Float
PVOUT
OUT+ − VOUT−
V
RL = 8 Ω + 33 µH
8
6
4
2
0
−2
−4
−6
0.0
0.5
1.0
1.5
2.0
t − Time − s
Figure 26. ADAPTIVE BOOST CONVERTER with TYPICAL MUSIC PLAYBACK
The primary external components for the boost converter are the inductor and the boost capacitor. The inductor
stores current, and the boost capacitor stores charge. As the Class-D amplifier depletes the charge in the boost
capacitor, the boost inductor replenishes charge with its stored current. The cycle of charge and discharge
occurs frequently enough to keep PVOUT within its minimum and maximum voltage specification.
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The boost converter design is optimized for driving the integrated Class-D amplifier only. It lacks protection
circuitry recommended for driving loads other than the integrated Class-D amplifier.
Boost Converter Overvoltage Protection
The TPA2015D1 internal boost converter operates in a discontinuous mode to improve the efficiency at light
loads. The boost converter has overvoltage protection that disables the boost converter if the output voltage
exceeds 5.8 V. If current is forced into the PVOUT terminal, the voltage clamp will sink up to 10 mA. If more than
10 mA is forced into PVOUT, then the PVOUT voltage will increase. Refer to the SPEAKER LOAD LIMITATION
section for details.
Boost Converter Component Section
Boost Terms
The following is a list of terms and definitions used in the boost equations found later in this document.
C
Minimum boost capacitance required for a given ripple voltage on PVOUT.
Boost inductor.
L
fBOOST
IPVDD
IL
Switching frequency of the boost converter.
Current pulled by the Class-D amplifier from the boost converter.
Average current through the boost inductor.
PVDD
Supply voltage for the Class-D amplifier. (Voltage generated by the boost converter output.)
(PVOUT)
VBAT
ΔIL
Supply voltage to the IC.
Ripple current through the inductor.
Ripple voltage on PVOUT.
ΔV
Boost Converter Inductor Selection
Working inductance decreases as inductor current and temperature increases. If the drop in working inductance
is severe enough, it may cause the boost converter to become unstable, or cause the TPA2015D1 to reach its
current limit at a lower output voltage than expected. Inductor vendors specify currents at which inductor values
decrease by a specific percentage. This can vary by 10% to 35%. Inductance is also affected by dc current and
temperature.
Inductor Equations
Inductor current rating is determined by the requirements of the load. The inductance is determined by two
factors: the minimum value required for stability and the maximum ripple current permitted in the application.
Use Equation 1 to determine the required current rating. Equation 1 shows the approximate relationship between
the average inductor current, IL, to the load current, load voltage, and input voltage (IPVDD, PVDD, and VBAT,
respectively). Insert IPVDD, PVDD, and VBAT into Equation 1 and solve for IL. The inductor must maintain at least
90% of its initial inductance value at this current.
PVDD
æ
ç
è
ö
÷
ø
IL = IPVDD
´
VBAT ´ 0.8
(1)
WARNING
Use a minimum working inductance of 1.3 mH. Lower values may damage the
inductor.
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Ripple current, ΔIL, is peak-to-peak variation in inductor current. Smaller ripple current reduces core losses in the
inductor and reduces the potential for EMI. Use Equation 2 to determine the value of the inductor, L. Equation 2
shows the relationship between inductance L, VBAT, PVDD, the switching frequency, fBOOST, and ΔIL. Insert the
maximum acceptable ripple current into Equation 2 and solve for L.
VBAT ´ (PVDD - VBAT)
L =
DIL ´ ¦BOOST ´ PVDD
(2)
ΔIL is inversely proportional to L. Minimize ΔIL as much as is necessary for a specific application. Increase the
inductance to reduce the ripple current. Do not use greater than 4.7 mH, as this prevents the boost converter
from responding to fast output current changes properly. If using above 3.3 µH, then use at least 10 µF
capacitance on PVOUT to ensure boost converter stability.
The typical inductor value range for the TPA2015D1 is 2.2 mH to 3.3 µH. Select an inductor with less than 0.5 Ω
dc resistance, DCR. Higher DCR reduces total efficiency due to an increase in voltage drop across the inductor.
Table 3. Sample Inductors
L
(mH)
SUPPLIER
COMPONENT CODE
SIZE
(L×W×H mm)
DCR TYP
(mΩ)
ISAT MAX
(A)
C RANGE
2.2
Chilisin
CLCN252012T-2R2M-N
2.5 x 2.0 x 1.2
105
1.2
Electronics Corp.
4.7 – 22 µF / 16 V
6.8 – 22 µF / 10 V
2.2
2.2
3.3
3.3
Toko
Coilcraft
Toko
1239AS-H-2R2N=P2
XFL4020-222MEC
1239AS-H-3R3N=P2
XFL4020-332MEC
2.5 × 2.0 × 1.2
4.0 x 4.0 x 2.15
2.5 × 2.0 × 1.2
4.0 x 4.0 x 2.15
96
22
2.3
3.5
2.0
2.8
160
35
10 – 22 µF / 10 V
Coilcraft
Boost Converter Capacitor Selection
The value of the boost capacitor is determined by the minimum value of working capacitance required for stability
and the maximum voltage ripple allowed on PVDD in the application. Working capacitance refers to the available
capacitance after derating the capacitor value for DC bias, temperature, and aging.
Do not use any component with a working capacitance less than 4.7 mF. This corresponds to a 4.7 µF / 16 V
capacitor, or a 6.8 µF / 10 V capacitor. Do not use above 22 µF capacitance as it will reduce the boost converter
response time to large output current transients.
Equation 3 shows the relationship between the boost capacitance, C, to load current, load voltage, ripple voltage,
input voltage, and switching frequency (IPVDD, PVDD, ΔV, VBAT, and fBOOST respectively).
Insert the maximum allowed ripple voltage into Equation 3 and solve for C. The 1.5 multiplier accounts for
capacitance loss due to applied dc voltage and temperature for X5R and X7R ceramic capacitors.
I
´ (PVDD - VBAT)
PVDD
C = 1.5 ´
DV ´ ¦
´ PVDD
BOOST
(3)
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COMPONENTS LOCATION AND SELECTION
Decoupling Capacitors
The TPA2015D1 is a high-performance Class-D audio amplifier that requires adequate power supply decoupling.
Adequate power supply decoupling to ensures that the efficiency is high and total harmonic distortion (THD) is
low.
Place a low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 mF, within 2 mm of the VBAT ball.
This choice of capacitor and placement helps with higher frequency transients, spikes, or digital hash on the line.
Additionally, placing this decoupling capacitor close to the TPA2015D1 is important, as any parasitic resistance
or inductance between the device and the capacitor causes efficiency loss. In addition to the 0.1 µF ceramic
capacitor, place a 2.2 mF to 10 mF capacitor on the VBAT supply trace. This larger capacitor acts as a charge
reservoir, providing energy faster than the board supply, thus helping to prevent any droop in the supply voltage.
Input Capacitors
Input audio DC decoupling capacitors are recommended. The input audio DC decoupling capacitors prevents the
AGC from changing the gain due to audio DAC output offset. The input capacitors and TPA2015D1 input
impedance form a high-pass filter with the corner frequency, fC, determined in Equation 4.
Any mismatch in capacitance between the two inputs will cause a mismatch in the corner frequencies. Severe
mismatch may also cause turn-on pop noise. Choose capacitors with a tolerance of ±10% or better.
1
fc =
2 x p x R C
I
(
)
I
(4)
EFFICIENCY AND THERMAL INFORMATION
It is important to operate the TPA2015D1 at temperatures lower than its maximum operating temperature. The
maximum ambient temperature depends on the heat-sinking ability of the PCB system. The derating factor for
the package is shown in the dissipation rating table. Converting this to qJA for the WCSP package:
1
1
θJA
=
=
= 153°C/W
Derating Factor
0.0065
(5)
Given qJA of 153°C/W, the maximum allowable junction temperature of 150°C, and the internal dissipation of
0.34 W for 1.7 W, 8 Ω load, 3.6 V supply, the maximum ambient temperature is calculated as:
qJAMAX = TJMAX = qJAPDmax = 150 - 153(0.34) = 97.98°C
(6)
Equation 6 shows that the calculated maximum ambient temperature is 98°C at maximum power dissipation with
at 3.6 V supply and 8 Ω a load. The TPA2015D3 is designed with thermal protection that turns the device off
when the junction temperature surpasses 150°C to prevent damage to the IC.
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OPERATION WITH DACS AND CODECS
Large ripple voltages can be present at the output of ΔΣ DACs and CODECs, just above the audio frequency
(e.g: 80 kHz with a 300 mVPP). This out-of-band noise is due to the noise shaping of the delta-sigma modulator in
the DAC.
Some Class-D amplifiers have higher output noise when used in combination with these DACs and CODECs.
This is because out-of-band noise from the CODEC/DAC mixes with the Class-D switching frequencies in the
audio amplifier input stage.
The TPA2015D1 has a built-in low-pass filter that reduces the out-of-band noise and RF noise, filtering
out-of-band frequencies that could degrade in-band noise performance. This built-in filter also prevents AGC
errors due to out-of-band noise. The TPA2015D1 AGC calculates gain based on input signal amplitude only.
If driving the TPA2015D1 input with 4th-order or higher ΔΣ DACs or CODECs, add an R-C low pass filter at each
of the audio inputs (IN+ and IN-) of the TPA2015D1 to ensure best performance. The recommended resistor
value is 100 Ω and the capacitor value of 47 nF.
Connected to Supply
2.2 mH
2.2 mF – 10 mF
6.8 mF – 22 mF
VDD
IN-
SW PVOUT PVDD
Differential
Audio Inputs
100 W
IN+
OUT+
Gain Control
AGC Control
GAIN
AGC
ENB
END
47 nF
TPA2015D1
OUT-
Boost Enable
Class-D Enable
GND
Figure 27. Reducing Out-of-Band DAC Noise with External Input Filter
FILTER FREE OPERATION AND FERRITE BEAD FILTERS
The TPA2015D1 is designed to minimize RF emissions. For more information about RF emissions and filtering
requirements, See SLOA145 for further information.
PACKAGE DIMENSIONS
The TPA2015D1 uses a 16-ball, 0.5 mm pitch WCSP package. The die length (D) and width (E) correspond to
the package mechanical drawing at the end of the datasheet.
Table 4. Package Dimensions
Dimension
Max
D
E
1984 µm
1954 µm
1924 µm
1984 µm
1954 µm
1924 µm
Typ
Min
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BOARD LAYOUT
In making the pad size for the WCSP balls, it is recommended that the layout use nonsolder mask defined
(NSMD) land.
With this method, the solder mask opening is made larger than the desired land area, and the opening size is
defined by the copper pad width. Figure 28 and Table 5 show the appropriate diameters for a WCSP layout.
Copper
Trace Width
Solder
Pad Width
Solder Mask
Opening
Copper Trace
Thickness
Solder Mask
Thickness
Figure 28. Land Pattern Dimensions
Table 5. Land Pattern Dimensions(1) (2) (3) (4)
(5)
(6) (7)
SOLDER PAD
DEFINITIONS
COPPER
PAD
SOLDER MASK
OPENING
COPPER
THICKNESS
STENCIL
OPENING
STENCIL
THICKNESS
Nonsolder mask
defined (NSMD)
275 mm
(+0.0, -25 mm)
275 mm x 275 mm Sq.
(rounded corners)
375 mm (+0.0, -25 mm)
1 oz max (32 mm)
125 mm thick
(1) Circuit traces from NSMD defined PWB lands should be 75 mm to 100 mm wide in the exposed area inside the solder mask opening.
Wider trace widths reduce device stand off and impact reliability.
(2) Best reliability results are achieved when the PWB laminate glass transition temperature is above the operating the range of the
intended application.
(3) Recommend solder paste is Type 3 or Type 4.
(4) For a PWB using a Ni/Au surface finish, the gold thickness should be less 0.5 mm to avoid a reduction in thermal fatigue performance.
(5) Solder mask thickness should be less than 20 mm on top of the copper circuit pattern
(6) Best solder stencil performance is achieved using laser cut stencils with electro polishing. Use of chemically etched stencils results in
inferior solder paste volume control.
(7) Trace routing away from WCSP device should be balanced in X and Y directions to avoid unintentional component movement due to
solder wetting forces.
TRACE WIDTH
Recommended trace width at the solder balls is 75 mm to 100 mm to prevent solder wicking onto wider PCB
traces. For high current pins (SW, GND, OUT+, OUT–, PVOUT, and PVDD) of the TPA2015D1, use 100 mm
trace widths at the solder balls and at least 500 mm PCB traces to ensure proper performance and output power
for the device. For low current pins (IN–, IN+, END, ENB, GAIN, AGC, VBAT) of the TPA2015D1, use 75 mm to
100 mm trace widths at the solder balls. Run IN- and IN+ traces side-by-side (and if possible, same length) to
maximize common-mode noise cancellation.
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PACKAGE OPTION ADDENDUM
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10-Jun-2010
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
TPA2015D1YZHR
TPA2015D1YZHT
ACTIVE
ACTIVE
DSBGA
DSBGA
YZH
YZH
16
16
3000
250
Green (RoHS
& no Sb/Br)
SNAGCU Level-1-260C-UNLIM
Request Free Samples
Green (RoHS
& no Sb/Br)
SNAGCU Level-1-260C-UNLIM
Purchase Samples
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Oct-2010
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPA2015D1YZHR
TPA2015D1YZHT
DSBGA
DSBGA
YZH
YZH
16
16
3000
250
180.0
180.0
8.4
8.4
2.07
2.07
2.07
2.07
0.81
0.81
4.0
4.0
8.0
8.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Oct-2010
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPA2015D1YZHR
TPA2015D1YZHT
DSBGA
DSBGA
YZH
YZH
16
16
3000
250
190.5
190.5
212.7
212.7
31.8
31.8
Pack Materials-Page 2
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