TPA6047A4RHBR [TI]

具有 4.75V LDO、使能端高电平有效的 2W、立体声 AB 类扬声器和耳机放大器 | RHB | 32 | -40 to 85;
TPA6047A4RHBR
型号: TPA6047A4RHBR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

具有 4.75V LDO、使能端高电平有效的 2W、立体声 AB 类扬声器和耳机放大器 | RHB | 32 | -40 to 85

放大器 消费电路 商用集成电路 音频放大器 视频放大器
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TPA6045A4C  
www.ti.com.............................................................................................................................................................................................. SLOS614OCTOBER 2008  
2-W STEREO AUDIO POWER AMPLIFIER  
WITH DirectPath™ STEREO HEADPHONE DRIVE AND REGULATOR  
1
FEATURES  
DESCRIPTION  
23  
Microsoft™ Windows Vista™ Compliant  
Fully Differential Architecture and High PSRR  
Provide Excellent RF Rectification Immunity  
The TPA6045A4C is a stereo audio power amplifier  
and DirectPath™ headphone amplifier in a thermally  
enhanced, space-saving, 32-pin QFN package. The  
speaker amplifier is capable of driving 2.1 W per  
channel continuously into 4-loads at 5 V. The  
headphone amplifier achieves a minimum of 85 mW  
at 1% THD+N from a 5-V supply. A built-in internal  
4-step gain control for the speaker amplifier and a  
fixed –1.5 V/V gain for the headphone amplifier  
minimizes external components needed.  
2.1-W, 1% THD+N Into 4-Speakers and  
85-mW, 1% THD+N Into 16-Headphones  
From 5-V Supply  
DirectPath™ Headphone Amplifier Eliminates  
(1)  
Output Capacitors  
Internal 4-Step Speaker Gain Control: 10, 12,  
15.6, 21.6 dB and Fixed –1.5-V/V Headphone  
Independent shutdown control and dedicated inputs  
for the speaker and headphone allow the  
3.3-V Low Dropout Regulator for CODEC  
Independent Shutdown Controls for Speaker,  
Headphone Amplifier, and Low Dropout  
Regulator (LDO)  
TPA6045A4C  
to  
simultaneously  
drive  
both  
headphones and internal speakers. Differential inputs  
to the speaker amplifiers offer superior power-supply  
and common-mode noise rejection.  
Output Short-Circuit and Thermal Protection  
APPLICATIONS  
Notebook Computers  
Portable DVD  
SIMPLIFIED APPLICATION CIRCUIT  
TPA6045A4C  
Speaker  
LDO (V)  
4.75  
3.3  
Gain (dB)  
Enable  
CODEC  
ROUT+  
ROUT–  
SPKR_RIN+  
SPKR_RIN–  
SPKR  
HPR  
6, 10, 15.6,  
21.6  
TPA6040A4  
TPA6041A4  
TPA6043A4  
TPA6045A4C  
TPA6047A4  
Active Low  
LOUT+  
LOUT–  
HPL  
10, 12, 15.6,  
21.6  
SPKR_LIN+  
SPKR_LIN–  
SPKL  
Active Low  
Active Low  
Active High  
Active High  
VDD  
SPVDD  
SPGND  
4.5 V – 5.5 V  
6, 10, 15.6,  
21.6  
BYPASS  
3.3  
GAIN0  
GAIN1  
Gain  
Control  
HP_EN  
10, 12, 15.6,  
21.6  
Shutdown  
Control  
3.3  
SPKR_EN  
OUTL  
OUTR  
10, 12, 15.6,  
21.6  
HP_INR  
SGND  
4.75  
HPVSS  
CPVSS  
HP_INL  
HPVDD  
CPVDD  
VDD  
3 V – 5.5 V  
CPGND  
C1P  
C1N  
4.5 V – 5.5 V  
Regulator Enable  
REG_EN  
REG_OUT  
3.3 V (To CODEC)  
(1) US Patent Number 5289137  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
3
DirectPath, PowerPAD are trademarks of Texas Instruments.  
Microsoft, Windows Vista are trademarks of Microsoft Corporation.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2008, Texas Instruments Incorporated  
TPA6045A4C  
SLOS614OCTOBER 2008.............................................................................................................................................................................................. www.ti.com  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
Functional Block Diagram  
REG_EN  
BYPASS  
(3.3-V Output)  
REG_OUT  
SPKR_EN  
Bias Control  
LDO  
0.47 mF  
1 mF  
HP_EN  
VDD  
1 mF  
SPVDD  
ROUT+  
SPKR_RIN+  
SPKR_RIN–  
+
1 mF  
1 mF  
+
ROUT–  
GAIN0  
GAIN1  
SPGND  
SPVDD  
Gain Control  
SPKR_LIN+  
SPKR_LIN–  
LOUT+  
LOUT–  
1 mF  
1 mF  
+
+
4.5 V – 5.5 V  
SPVDD  
HP_INL  
SPGND  
1 mF  
HPVDD  
HP_OUTL  
HP_OUTR  
1 mF  
+
HPVSS  
+
HP_INR  
HPVDD  
1 mF  
HPVDD  
3 V – 5.5 V  
CPVDD  
CPGND  
Charge Pump  
1 mF  
C1P  
C1N  
CPVSS  
GND  
HPVSS  
SPGND  
1 mF  
1 mF  
2
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Copyright © 2008, Texas Instruments Incorporated  
Product Folder Link(s): TPA6045A4C  
TPA6045A4C  
www.ti.com.............................................................................................................................................................................................. SLOS614OCTOBER 2008  
AVAILABLE PACKAGE OPTIONS  
TA  
PACKAGED DEVICE(1)(2)  
32-Pin QFN (RHB)  
–40°C to 85°C  
TPA6045A4CRHB  
(1) The RHB package is available taped and reeled. To order a taped and reeled part, add the suffix R to  
the part number (e.g., TPA6045A4CRHBR).  
(2) For the most current package and ordering information, see the Package Option Addendum at the end  
of this document, or see the TI website at www.ti.com.  
TPA6045A4CRHB  
(TOP VIEW)  
32 31 30 29 28 27 26 25  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
SPKR_RIN–  
BYPASS  
SPKR_EN  
HP_EN  
SPGND  
ROUT+  
ROUT–  
SPVDD  
HPVDD  
SPKR_RIN+  
SPKR_LIN+  
SPKR_LIN–  
SPGND  
LOUT+  
Thermal  
Pad  
LOUT–  
SPVDD  
9
10 11 12 13 14 15 16  
TERMINAL FUNCTIONS  
TERMINAL  
NAME  
I/O/P  
DESCRIPTION  
NO.  
1
SPKR_RIN–  
SPKR_RIN+  
SPKR_LIN+  
SPKR_LIN–  
SPGND  
LOUT+  
I
I
Right-channel negative differential audio input for speaker amplifier  
Right-channel positive differential audio input for speaker amplifier  
Left-channel positive differential audio input for speaker amplifier  
Left-channel negative differential audio input for speaker amplifier  
Speaker power ground  
2
3
I
4
I
5, 21  
6
P
O
O
P
P
Left-channel positive audio output  
LOUT–  
7
Left-channel negative audio output  
SPVDD  
8, 18  
9
Supply voltage terminal for speaker amplifier  
CPVDD  
Charge pump positive supply, connect to HPVDD via star connection  
C1P  
10  
11  
12  
13  
14  
15  
16  
17  
I/O Charge pump flying capacitor positive terminal  
Charge pump ground  
I/O Charge pump flying capacitor negative terminal  
CPGND  
C1N  
P
CPVSS  
P
P
O
O
P
Charge pump output (negative supply for headphone amplifier), connect to HPVSS  
Headphone amplifier negative supply, connect to CPVSS  
Right-channel capacitor-free headphone output  
HPVSS  
HP_OUTR  
HP_OUTL  
HPVDD  
Left-channel capacitor-free headphone output  
Headphone amplifier supply voltage, connect to CPVDD  
Copyright © 2008, Texas Instruments Incorporated  
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TPA6045A4C  
SLOS614OCTOBER 2008.............................................................................................................................................................................................. www.ti.com  
TERMINAL FUNCTIONS (continued)  
TERMINAL  
I/O/P  
DESCRIPTION  
NAME  
NO.  
19  
20  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
ROUT–  
ROUT+  
HP_EN  
SPKR_EN  
BYPASS  
REG_EN  
HP_INR  
HP_INL  
SGND  
O
O
I
Right-channel negative audio output  
Right-channel positive audio output  
Headphone channel enable logic input; active high enable. HIGH=ENABLE.  
Speaker channel enable logic input; active high enable. HIGH=ENABLE.  
Common-mode bias voltage for speaker preamplifiers  
Enable pin for turning on/off LDO. HIGH=ENABLE  
Headphone right-channel audio input  
I
P
I
I
I
Headphone left-channel audio input  
P
O
P
I
Signal ground, connect to CPGND and SPGND  
Regulated 3.3-V output  
REG_OUT  
VDD  
Positive power supply  
GAIN0  
Bit 0, MSB, of gain select bits  
GAIN1  
I
Bit 1, LSB, of gain select bits  
Solder the thermal pad on the bottom of the QFN package to the GND plane of the PCB. It is required for  
mechanical stability and will enhance thermal performance.  
Thermal Pad Die Pad  
P
ABSOLUTE MAXIMUM RATINGS  
over operating free-air temperature range (unless otherwise noted)(1)  
VALUE  
–0.3 to 6  
–0.3 to 6.3  
UNIT  
Supply voltage  
Input voltage  
HPVDD, VDD, SPVDD, CPVDD  
V
SPKR_LIN+, SPKR_LIN-, SPKR_RIN+, SPKR_RIN-,  
HP_EN,GAIN0, GAIN1, SPK_EN, REG_EN  
VI  
V
HP_INL, HP_INR HP Enabled  
–3.5 to 3.5  
HP_INL, HP_INR HP not Enabled  
–0.3 to 3.5  
Continuous total power dissipation  
Operating free-air temperature range  
Operating junction temperature range  
Storage temperature range  
See Dissipation Rating Table  
TA  
–40 to 85  
°C  
°C  
°C  
kV  
V
TJ  
–40 to 150  
Tstg  
–65 to 150  
Electrostatic discharge  
HBM for HP_OUTL and HP_OUTR  
8
500  
2
CDM  
HBM  
Electrostatic discharge,  
all other pins  
kV  
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings  
only, and functional operations of the device at these or any other conditions beyond those indicated under recommended operating  
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
DISSIPATION RATINGS  
PACKAGE(1)  
TA 25°C  
DERATING FACTOR  
TA = 70°C  
TA = 85°C  
RHB  
5.06 W  
40 mW/°C  
4.04 W  
3.23 W  
(1) The PowerPAD™ must be soldered to a thermal land on the printed-circuit board. Refer to the Texas Instruments document,  
PowerPAD™ Thermally Enhanced Package application report (literature number SLMA002) for more information regarding the  
PowerPAD™ package.  
RECOMMENDED OPERATING CONDITIONS  
MIN  
4.5  
3
MAX  
5.5  
UNIT  
V
Supply voltage  
Supply voltage  
VDD, SPVDD  
HPVDD, CPVDD  
5.5  
V
4
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Product Folder Link(s): TPA6045A4C  
TPA6045A4C  
www.ti.com.............................................................................................................................................................................................. SLOS614OCTOBER 2008  
RECOMMENDED OPERATING CONDITIONS (continued)  
MIN  
MAX  
UNIT  
V
VIH  
VIL  
TA  
High-level input voltage  
Low-level input voltage  
SPKR_EN, HP_EN, GAIN0, GAIN1, REG_EN  
SPKR_EN, HP_EN, GAIN0, GAIN1, REG_EN  
2
0.8  
85  
V
Operating free-air temperature  
–40  
°C  
GENERAL DC ELECTRICAL CHARACTERISTICS  
TA = 25°C, VDD = SPVDD = HPVDD = CPVDD = 5 V (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
SPKR_EN, HP_EN, GAIN0, GAIN1,  
REG_EN = VDD  
IIH  
High-level input current  
0.02  
1
µA  
SPKR_EN, HP_EN, GAIN0, GAIN1,  
REG_EN = 0 V  
IIL  
Low-level input current  
0.02  
5
1
12  
14  
µA  
mA  
mA  
Supply current, speaker amplifier  
ONLY enabled  
IDD(Speaker)  
IDD(HP)  
IDD(REG)  
IDD(SD)  
SPKR_EN = 2 V, HP_EN = REG_EN = 0 V  
HP_EN = 2 V, SPKR_EN = REG_EN = 0 V  
Supply current, headphone  
amplifier ONLY enabled  
7.5  
Supply current, regulator ONLY  
enabled  
REG_EN = 2 V, SPKR_EN = HP_EN = 0 V  
SPKR_EN = HP_EN = REG_EN = 0 V  
0.65  
2.5  
1
5
mA  
Supply current, shutdown mode  
µA  
SPEAKER AMPLIFIER DC CHARACTERISTICS  
TA = 25°C, VDD = SPVDD = 5 V, RL = 4 , Gain = 10 dB (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX UNIT  
| VOO  
|
Output offset voltage (measured differentially)  
Inputs AC-coupled to GND, Gain = 10  
dB  
0.5  
10  
mV  
PSRR  
Power supply rejection ratio  
VDD = SPVDD = 4.5 V to 5.5 V  
-60  
–74  
dB  
SPEAKER AMPLIFIER AC CHARACTERISTICS  
TA = 25°C, VDD = SPVDD = 5 V, RL = 4 , Gain = 10 dB (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
THD+N = 1%, f = 1 kHz, RL = 8  
THD+N = 10%, f = 1 kHz, RL = 8 Ω  
THD+N = 1%, f = 1 kHz, RL = 4 Ω  
THD+N = 10%, f = 1 kHz, RL = 4 Ω  
PO = 1 W, RL = 8 , f = 20 Hz to 20 kHz  
PO = 1 W, RL = 4 , f = 20 Hz to 20 kHz  
MIN  
TYP  
1.3  
MAX  
UNIT  
1.6  
PO  
Output power  
2.1  
W
2.6  
0.06%  
0.1%  
THD+N  
Total harmonic distortion plus noise  
f = 1 kHz, CBYPASS = 0.47 µF, RL = 8 Ω  
VRIPPLE = 200 mVPP  
kSVR  
SNR  
Supply ripple rejection ratio  
Signal-to-noise rejection ratio  
–53  
90  
dB  
dB  
Maximum output at THD+N <1%, f = 1 kHz,  
Gain = 10 dB  
f = 1 kHz, Po = 1 W, Gain = 10 dB  
f = 10 kHz, Po = 1 W, Gain = 10 dB  
–110  
–100  
dB  
dB  
Crosstalk (Left-Right; Right-Left)  
CBYPASS = 0.47 µF, f = 20 Hz to 20 kHz,  
Gain = 10 dB, No weighting  
Vn  
ZI  
Noise output voltage  
Input Impedance  
21  
µVrms  
kΩ  
Gain = 21.6 dB  
15  
9.4  
11.4  
15  
20  
10  
GAIN0, GAIN1 = 0.8 V  
GAIN0 = 0.8 V; GAIN1 = 2 V  
GAIN0 = 2 V, GAIN1 = 0.8 V  
GAIN0, GAIN1 = 2 V  
Channel-to Channel  
10.6  
12.6  
16.2  
22.2  
12  
G
Gain  
dB  
dB  
15.6  
21.6  
0.01  
21  
Gain Matching  
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SLOS614OCTOBER 2008.............................................................................................................................................................................................. www.ti.com  
SPEAKER AMPLIFIER AC CHARACTERISTICS (continued)  
TA = 25°C, VDD = SPVDD = 5 V, RL = 4 , Gain = 10 dB (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
CBYPASS = 0.47 µF  
MIN  
TYP  
MAX  
UNIT  
Start-up time from shutdown  
25  
ms  
HEADPHONE AMPLIFIER DC ELECTRICAL CHARACTERISTICS  
TA = 25°C, HPVDD = CPVDD = VDD = 5 V, RL = 16 (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
Inputs grounded  
HPVDD = 4.5 V to 5.5 V  
MIN  
TYP  
1
MAX  
UNIT  
mV  
| VOS  
|
Output offset voltage  
Power supply rejection ratio  
3
PSRR  
–75  
–100  
dB  
HEADPHONE AMPLIFIER AC CHARACTERISTICS  
TA = 25°C, HPVDD = 5 V, RL = 16 (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
200  
100  
MAX  
UNIT  
THD+N = 10%, RL = 16 , f = 1 kHz  
THD+N = 10%, RL = 32 , f = 1 kHz  
PO  
Output power (outputs in phase)  
mW  
PO = 85 mW, f = 20 Hz to 20 kHz,  
RL = 16 Ω  
0.03%  
0.04%  
THD+N  
Total harmonic distortion plus noise  
PO = 50 mW, f = 20 Hz to 20 kHz,  
RL = 32 Ω  
Dynamic Range with Signal Present  
Supply ripple rejection ratio  
Crosstalk  
A-Weighted, f = 20 Hz to 20 kHz  
f = 1 kHz, 200-mVPP ripple  
–100  
-60  
-80  
95  
dB FS  
dB  
kSVR  
Po = 35 mW, f = 20 Hz to 20 kHz  
Maximum output at THD+N 1%, f = 1 kHz  
f = 20 Hz to 20 kHz, No weighting  
dB  
SNR  
Vn  
Signal-to-noise ratio  
dB  
Noise output voltage  
20  
µVrms  
kΩ  
ZI  
Input Impedance  
15  
20  
Gain  
Closed-loop voltage gain  
Start-up time from shutdown  
RL = 16 Ω  
–1.45  
–1.5  
7.5  
–1.55  
V/V  
ms  
LDO CHARACTERISTICS  
TA = 25°C, VDD = 5 V (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
4.5  
TYP  
MAX  
UNIT  
V
VI  
Input voltage  
VDD  
5.5  
IO  
Continuous output current  
Output voltage  
120  
3.2  
mA  
V
VO  
0 < IO < 120 mA; 4.9 V < Vin < 5.5 V  
IL = 5 mA; 4.9 V < Vin < 5.5 V  
IL = 0 – 120 mA, Vin = 5 V  
3.3  
1.8  
3.4  
10  
Line regulation  
mV  
Load regulation  
0.13  
-46  
0.23 mV/ mA  
dB  
Power supply ripple rejection  
VDD = 4.9 V, IL = 10 mA  
f = 100 Hz  
6
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TPA6045A4C  
www.ti.com.............................................................................................................................................................................................. SLOS614OCTOBER 2008  
TYPICAL CHARACTERISTICS  
Default graph conditions: VCC = 5 V, Freq = 1 kHz, AES17 Filter.  
TOTAL HARMONIC DISTORTION + NOISE (SP)  
TOTAL HARMONIC DISTORTION + NOISE (SP)  
vs  
vs  
FREQUENCY  
FREQUENCY  
1
1
Gain = 10 dB,  
Gain = 10 dB,  
R
V
= 8 W,  
P
= 0.1 W  
L
R
V
= 4 W,  
O
L
= 5 V  
DD  
= 5 V  
P
= 1 W  
DD  
O
P
= 0.25 W  
O
0.1  
P
= 0.25 W  
O
0.1  
0.01  
P
= 1 W  
O
P
= 1.5 W  
O
0.01  
0.001  
0.0001  
0.001  
10  
100  
1 k  
f - Frequency - Hz  
10 k  
100 k  
10  
100  
1 k  
f - Frequency - Hz  
10 k  
100 k  
Figure 1.  
Figure 2.  
TOTAL HARMONIC DISTORTION + NOISE (HP)  
TOTAL HARMONIC DISTORTION + NOISE (HP)  
vs  
vs  
FREQUENCY  
FREQUENCY  
1
1
Gain = 3.5 dB  
Gain = 3.5 dB  
R
= 16  
= 5 V  
R
= 32  
= 5 V  
L
L
V
DD  
V
DD  
0.1  
0.1  
P
O
= 50 mW  
P
O
= 2.8 mW  
P
O
= 100 mW  
P
O
= 1.4 mW  
P
O
= 25 mW  
P
O
= 50 mW  
0.01  
0.01  
0.001  
0.001  
10  
10  
100  
1k  
10k  
100k  
100  
1k  
10k  
100k  
f − Frequency − Hz  
f − Frequency − Hz  
G003  
G004  
Figure 3.  
Figure 4.  
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TYPICAL CHARACTERISTICS (continued)  
TOTAL HARMONIC DISTORTION + NOISE (SP)  
TOTAL HARMONIC DISTORTION + NOISE (SP)  
vs  
vs  
OUTPUT POWER  
OUTPUT POWER  
100  
10  
1
100  
10  
Gain = 10 dB,  
= 4 W  
Gain = 10 dB,  
= 8 W  
R
R
L
L
V
= 4.5 V  
DD  
V
= 4.5 V  
= 5 V  
DD  
V
= 5 V  
DD  
V
DD  
V
= 5.5 V  
DD  
1
V
= 5.5 V  
DD  
0.1  
0.1  
0.01  
0.01  
0.01  
0.1  
P
O
1
- Output Power - W  
10  
0.01  
0.1  
P
O
1
- Output Power - W  
10  
Figure 5.  
Figure 6.  
TOTAL HARMONIC DISTORTION + NOISE (HP)  
TOTAL HARMONIC DISTORTION + NOISE (HP)  
vs  
vs  
OUTPUT POWER  
OUTPUT POWER  
10  
1
10  
1
Gain = 3.5 dB  
Gain = 3.5 dB  
R
L
= 16  
= 5 V  
R
L
= 32  
= 5 V  
V
DD  
V
DD  
0.1  
0.1  
V
DD  
= 5 V  
In Phase  
In Phase  
0.01  
0.001  
0.01  
0.001  
V
DD  
= 5 V  
100µ  
1m  
10m  
100m  
1
100µ  
1m  
10m  
100m  
1
P
O
− Output Power − W  
P
O
− Output Power − W  
G007  
G008  
Figure 7.  
Figure 8.  
8
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TYPICAL CHARACTERISTICS (continued)  
CROSSTALK (SP)  
vs  
FREQUENCY  
CROSSTALK (SP)  
vs  
FREQUENCY  
0
-10  
-20  
0
Gain = 10 dB,  
Power = 1 W,  
-10  
Gain = 10 dB,  
P
= 1 W,  
= 8 W,  
= 5 V  
O
R
V
= 4 W,  
-20  
L
R
V
L
= 5 V  
DD  
-30  
-40  
-50  
-30  
-40  
-50  
DD  
-60  
-70  
-60  
-70  
-80  
-90  
-80  
-90  
L to R  
L to R  
-100  
-110  
-100  
-110  
R to L  
-120  
-130  
-140  
-120  
-130  
-140  
R to L  
10 k  
10  
100  
1 k  
f - Frequency - Hz  
10 k  
100 k  
10  
100  
1 k  
100 k  
f - Frequency - Hz  
Figure 9.  
Figure 10.  
CROSSTALK (LDO)  
vs  
CROSSTALK (HP)  
vs  
FREQUENCY  
FREQUENCY  
0
-10  
-20  
-30  
-40  
-50  
-60  
0
Gain = 10 dB,  
Gain = 3.5 dB,  
-10  
-20  
P
= 2 W,  
= 4 W,  
= 5 V  
P
= 2.8 m W,  
= 16 W,  
= 5 V  
O
O
R
V
R
V
L
L
DD  
DD  
-30  
-40  
-50  
-60  
-70  
-80  
L to LDO  
-70  
-90  
R to L  
-80  
-100  
-110  
R to LDO  
-90  
L to R  
-100  
-110  
-120  
-120  
-130  
-140  
10  
100  
1 k  
10 k  
100 k  
10  
100  
1 k  
f - Frequency - Hz  
10 k  
100 k  
f - Frequency - Hz  
Figure 11.  
Figure 12.  
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TYPICAL CHARACTERISTICS (continued)  
CROSSTALK (HP)  
vs  
FREQUENCY  
CROSSTALK (HP)  
vs  
FREQUENCY  
0
−10  
−20  
−30  
−40  
−50  
−60  
−70  
−80  
−90  
−100  
−110  
−120  
0
Gain = 3.5 dB  
PO = 2.8 mW  
Gain = 3.5 dB  
–10  
P
= 35 mW  
= 16  
O
RL = 32 W  
R
–20  
–30  
L
VDD = 5 V  
V
DD  
= 5 V  
–40  
–50  
–60  
–70  
R to L  
–80  
–90  
–100  
L to R  
–110  
–120  
10  
100  
1k  
10k  
100k  
10  
100  
1k  
f – Frequency – Hz  
10k  
100k  
f − Frequency − Hz  
G012  
Figure 13.  
Figure 14.  
CROSSTALK (HP)  
vs  
FREQUENCY  
OUTPUT POWER (SP)  
vs  
SUPPLY VOLTAGE  
0
−10  
−20  
−30  
−40  
−50  
−60  
−70  
−80  
−90  
−100  
−110  
−120  
3.2  
Gain = 10 dB,  
= 4 W  
3.1  
3
Gain = 3.5 dB  
R
L
P
= 35 mW  
= 32  
O
R
L
2.9  
THD+N = 10%  
V
DD  
= 5 V  
2.8  
2.7  
2.6  
2.5  
2.4  
2.3  
2.2  
2.1  
THD+N = 1%  
R to L  
2
1.9  
1.8  
1.7  
L to R  
1.6  
10  
100  
1k  
10k  
100k  
4.5 4.6 4.7 4.8 4.9  
V
5 5.1 5.2 5.3 5.4 5.5  
- Supply Voltage - V  
f − Frequency − Hz  
DD  
G013  
Figure 15.  
Figure 16.  
10  
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TYPICAL CHARACTERISTICS (continued)  
OUTPUT POWER (SP)  
vs  
SUPPLY VOLTAGE  
OUTPUT POWER (HP)  
vs  
SUPPLY VOLTAGE  
0.30  
0.25  
0.20  
0.15  
0.10  
0.05  
0.00  
2.05  
1.95  
Gain = 10 dB,  
= 8 W  
THD+N = 10%  
R
L
THD+N = 10%  
1.85  
1.75  
1.65  
1.55  
1.45  
1.35  
THD+N = 1%  
THD+N = 1%  
1.25  
Gain = 3.5 dB  
= 16  
1.15  
1.05  
R
L
4.5 4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5.5  
4.5 4.6 4.7 4.8 4.9  
5
5.1 5.2 5.3 5.4 5.5  
V
- Supply Voltage - V  
V
− Supply Voltage − V  
DD  
DD  
Figure 17.  
Figure 18.  
SUPPLY CURRENT (SP)  
vs  
TOTAL OUTPUT POWER  
SUPPLY CURRENT (SP)  
vs  
TOTAL OUTPUT POWER  
1.6  
1.4  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
V
= 5 V  
DD  
V
= 5 V  
Gain = 10 dB,  
= 8 W  
DD  
V = 4.5 V  
DD  
Gain = 10 dB,  
= 4 W  
R
V
= 4.5 V  
L
DD  
R
L
V = 5.5 V  
DD  
1.2  
1
V
= 5.5 V  
DD  
0.8  
0.6  
0.4  
0.2  
0
0
0.4 0.8 1.2 1.6  
2
2.4 2.8 3.2 3.6  
4
0
1
2
3
4
5
6
P
- Output Power - W  
P
- Output Power - W  
O
O
Figure 19.  
Figure 20.  
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TYPICAL CHARACTERISTICS (continued)  
POWER DISSIPATION (SP)  
vs  
TOTAL OUTPUT POWER  
POWER DISSIPATION (SP)  
vs  
TOTAL OUTPUT POWER  
3.2  
3
1.6  
1.4  
1.2  
2.8  
2.6  
V
= 5.5 V  
DD  
2.4  
2.2  
2
V
= 5 V  
DD  
V
= 5.5 V  
DD  
1
0.8  
0.6  
0.4  
1.8  
1.6  
V
= 5 V  
V
= 4.5 V  
DD  
DD  
V
= 4.5 V  
DD  
1.4  
1.2  
1
0.8  
0.6  
0.4  
Gain = 10 dB,  
= 8 W  
0.2  
0
Gain = 10 dB,  
= 4 W  
R
L
R
0.2  
0
L
0
0.5  
1
1.5  
2
2.5  
- Output Power - W  
3
3.5  
4
0
1
2
3
4
- Output Power - W  
5
6
P
P
O
O
Figure 21.  
Figure 22.  
REGULATOR OUTPUT VOLTAGE (LDO)  
SUPPLY VOLTAGE (LDO)  
vs  
vs  
SUPPLY VOLTAGE  
LOAD CURRENT  
3.40  
3.36  
3.32  
3.40  
3.38  
3.36  
3.34  
V
= 5 V  
DD  
V
= 5.5 V  
DD  
3.28  
I
= -10 mA  
I
= -1 mA  
L
L
V
= 4.5 V  
DD  
3.24  
3.20  
3.16  
3.12  
3.08  
3.32  
3.30  
3.28  
3.26  
I
= -50 mA  
L
I
= -120 mA  
L
3.24  
3.04  
3
3.22  
3.20  
0
0.025 0.05 0.075 0.1 0.125 0.15 0.175 0.2  
4.5 4.6 4.7 4.8 4.9  
5
5.1 5.2 5.3 5.4 5.5  
- V  
V
I
- Load Current - A  
DD  
L
Figure 23.  
Figure 24.  
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TYPICAL CHARACTERISTICS (continued)  
COMMON-MODE REJECTION RATIO (SP)  
COMMON-MODE REJECTION RATIO (SP)  
vs  
vs  
FREQUENCY  
FREQUENCY  
0
-10  
-20  
0
-10  
-20  
-30  
-40  
Gain = 10 dB,  
Input Level = 0.2 V  
Gain = 10 dB,  
Input Level = 0.2 V  
,
PP  
,
PP  
R
V
= 4 W,  
L
R
V
= 8 W,  
L
= 5 V  
DD  
= 5 V  
DD  
-30  
-40  
-50  
-60  
-70  
-80  
-50  
-60  
-70  
-80  
-90  
-90  
-100  
-100  
10  
100  
1 k  
f - Frequency - Hz  
10 k  
100 k  
10  
100  
1 k  
f - Frequency - Hz  
10 k  
100 k  
Figure 25.  
Figure 26.  
POWER SUPPLY REJECTION RATIO (LDO)  
POWER SUPPLY REJECTION RATIO (SP)  
vs  
vs  
FREQUENCY  
FREQUENCY  
0
-10  
-20  
-30  
-40  
-50  
0
Gain = 10 dB,  
I
= 10 mA,  
O
R
V
= 8 W,  
L
-10  
V
V
= 0.20 V  
,
PP  
ripple  
= 5 V  
= 5 V  
DD  
DD  
-20  
-30  
-40  
-50  
-60  
-60  
-70  
-80  
-70  
-80  
10  
100  
1 k  
10 k  
100 k  
10  
100  
1 k  
f - Frequency - Hz  
10 k  
100 k  
f - Frequency - Hz  
Figure 27.  
Figure 28.  
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TYPICAL CHARACTERISTICS (continued)  
POWER SUPPLY REJECTION RATIO (HP)  
OUTPUT POWER (HP)  
vs  
LOAD RESISTANCE  
vs  
FREQUENCY  
0
−10  
−20  
−30  
−40  
−50  
−60  
−70  
−80  
−90  
−100  
500  
450  
400  
350  
300  
250  
200  
150  
100  
50  
f
= 1 kHz  
IN  
Gain = 3.5 dB  
Gain = 3.5 dB  
= 5 V  
R
= 16  
= 5 V  
L
V
DD  
V
DD  
THD+N = 10%  
THD+N = 1%  
0
10  
10  
100  
1k  
10k  
100k  
100  
1k  
f − Frequency − Hz  
R − Load Resistance −  
L
G028  
G029  
Figure 29.  
Figure 30.  
OUTPUT POWER (SP)  
vs  
LOAD RESISTANCE  
2.6  
2.4  
2.2  
2
f = 1 kHz  
I
Gain = 10 dB,  
= 5 V  
V
DD  
1.8  
1.6  
1.4  
1.2  
1
THD+N = 10%  
0.8  
0.6  
0.4  
THD+N = 1%  
4
6
8
10 12 14 16 18 20 22 24 26 28 30  
R
- Load Resistance - W  
L
Figure 31.  
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TYPICAL CHARACTERISTICS (continued)  
SPEAKER SHUTDOWN - 8 - 10 dB  
SPEAKER STARTUP - 8 - 10 dB  
Figure 32.  
Figure 33.  
LDO SHUTDOWN - 120 mA  
LDO STARTUP - 120 mA  
Figure 34.  
Figure 35.  
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TYPICAL CHARACTERISTICS (continued)  
HP SHUTDOWN - 32 Ω  
HP STARTUP - 32 Ω  
Figure 36.  
Figure 37.  
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APPLICATION INFORMATION  
3.3 V  
(Output)  
4.5 V - 5.5 V  
mF  
0.1  
HP Left Input  
mF  
2.2  
HP Right Input  
mF  
1
1 mF  
1 mF  
4-Step  
Gain Control  
Regulator Enable  
{
mF  
0.47  
SPKR_RIN–  
SPKR_RIN+  
SPKR_LIN+  
BYPASS  
0.47 mF  
SPKR Right Input  
SPKR Left Input  
SPKR_EN  
HP_EN  
Speaker Enable  
0.47 mF  
0.47 mF  
Headphone Enable  
SPKR_LIN–  
SPGND  
ROUT+  
0.47 mF  
TPA6045A4C  
SPGND  
LOUT+  
Right  
Speaker  
ROUT-  
Left  
Speaker  
SPVDD  
4.5 V - 5.5 V  
3 V - 5.5 V  
LOUT-  
HPVDD  
SPVDD  
4.5 V - 5.5 V  
1 mF  
3 V - 5.5 V  
10 mF  
1 mF  
1 mF  
1 mF  
Headphone  
Output  
Figure 38. Single-Ended Input Application Circuit  
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3.3 V  
(Output)  
4.5 V - 5.5 V  
mF  
0.1  
HP Left Input  
mF  
2.2  
HP Right Input  
mF  
1
1 mF  
1 mF  
4-Step  
Gain Control  
Regulator Enable  
{
mF  
0.47  
SPKR_RIN–  
SPKR_RIN+  
SPKR_LIN+  
SPKR Right (–) Input  
SPKR Right (+) Input  
SPKR Left (+) Input  
SPKR Left (–) Input  
BYPASS  
0.47 mF  
0.47 mF  
0.47 mF  
0.47 mF  
SPKR_EN  
HP_EN  
Speaker Enable  
Headphone Enable  
SPKR_LIN–  
SPGND  
ROUT+  
TPA6045A4C  
SPGND  
LOUT+  
Right  
Speaker  
ROUT-  
Left  
Speaker  
SPVDD  
LOUT-  
HPVDD  
3 V - 5.5 V  
SPVDD  
4.5 V - 5.5 V  
1 mF  
10 mF  
1 mF  
1 mF  
1 mF  
Headphone  
Output  
Figure 39. Differential Input Application Circuit  
Power Enable Modes  
The TPA6045A4C allows disable of any or all of the main circuit blocks when not in use in order to reduce  
operating power to an absolute minimum. The SPKR_EN control can be used to disable the speaker amplifier  
while the HP_EN can be used separately to turn off the headphone amplifier. The LDO also has an independent  
power control, REG_EN. With all circuit blocks disabled, the supply current in shutdown mode is only 5 µA. See  
the General DC Electrical Characteristics for operating currents with each circuit block operating independently.  
Speaker Amplifier Description  
The speaker amplifier is capable of driving 2.1 W/ch of continuous RMS power into a 4-load at 5 V. An internal  
4-step control allows variation of the gain from 10 dB to 21.6 dB.  
Fully Differential Amplifier  
The TPA6045A4C speaker amplifier is a fully differential amplifier with differential inputs and outputs. The fully  
differential architecture consist of a differential amplifier and a common mode amplifier. The differential amplifier  
ensures that the amplifier outputs a differential voltage that is equal to the differential input times the gain. The  
common-mode voltage at the output is biased around VDD/2 regardless of the common-mode voltage at the  
input.  
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One of the primary advantages of the fully differential amplifier is improved RF immunity. GSM handsets save  
power by turning on and off the RF transmitter at a rate of 217 Hz. The transmitted signal is picked up on input  
and output traces. The fully differential amplifier cancels the signal and others of this type much better than  
typical audio amplifiers.  
Gain Setting via GAIN0 and GAIN1 Inputs  
The gain of the TPA6045A4C is set by two terminals, GAIN0 and GAIN1. The gains listed in Table 1 are realized  
by changing the taps on the input resistors and feedback resistors inside the amplifier. This causes the input  
impedance (ZI) to vary as a function of the gain setting.  
Gain Setting  
AMPLIFIER GAIN  
INPUT IMPEDANCE (k)  
(dB)  
TYPICAL  
10  
GAIN1  
GAIN0  
TYPICAL  
0
0
1
1
0
1
0
1
78  
65  
46  
20  
12  
15.6  
21.6  
Input Capacitor, CI  
The input capacitor allows the amplifier to bias the input signal to the proper dc level for proper operation. In this  
case, the input capacitor, CI, and the input impedance of the amplifier, RI, form a high-pass filter with the corner  
frequency determined in Equation 1. Figure 40 shows how the input capacitor and the input resistor within the  
amplifier interact.  
Figure 40. Input Resistor and Input Capacitor  
(1)  
The value of CI is important to consider as it directly affects the low-frequency, or bass, performance of the  
circuit. Furthermore, the input impedance changes with a change in volume. The higher the volume, the lower  
the input impedance is. To determine the appropriate capacitor value, reconfigure Equation 1 into Equation 2.  
The value of the input resistor, RI, can be determined from Equation 2.  
1
CI +  
2pRI fc  
(2)  
Low-leakage tantalum or ceramic capacitors are recommended. When polarized capacitors are used, the positive  
side of the capacitor should face the amplifier input in most applications as the dc level there is held at VCC/2,  
which is likely higher than the source dc level. Note that it is important to confirm the capacitor polarity in each  
specific application. Recommended capacitor values are between 0.1 µF and 1 µF.  
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Windows Vista™ Premium Mobile Mode Specifications  
Windows Premium Mobile Vista  
Device Type  
Requirement  
TPA6045A4C Typical Performance  
–88 dB FS[20 Hz, 20 kHz]  
–88 dB FS A-Weight  
Specifications  
THD+N  
–65 dB FS [20 Hz, 20 kHz]  
Analog Speaker Line Jack  
(RL = 10 k, FS = 0.707  
Vrms)  
Dynamic Range with Signal  
Present  
–80 dB FS A-Weight  
Line Output Crosstalk  
THD+N  
–60 dB [20 Hz, 20 kHz]  
–105 dB [20 Hz, 20 kHz]  
–88 dB FS [20 Hz, 20 kHz]  
–45 dB FS [20 Hz, 20 kHz]  
Analog Headphone Out Jack  
(RL = 32, FS = 0.300  
Vrms)  
Dynamic Range with Signal  
Present  
–80 dB FS A-Weight  
–89 dB FS A-Weight  
Headphone Output Crosstalk  
–60 dB [20 Hz, 20 kHz]  
–100 dB [20 Hz, 20 kHz]  
Bridge-Tied Load Versus Single-Ended Mode  
Figure 41 shows a Class-AB audio power amplifier (APA) in a bridge-tied-load (BTL) configuration. The  
TPA6045A4C speaker amplifier consists of two Class-AB differential amplifiers per channel driving the positive  
and negative terminals of the load. Specifically, differential drive means that as one side of the amplifier (the  
positive terminal, for example) is slewing up, the other side is slewing down, and vice versa. This doubles the  
voltage swing across the load as opposed to a ground-referenced load, or a single-ended load. Power is  
proportional to the square of the voltage. Plugging 2x VO(PP) into the power equation yields 4X the output power  
from the same supply rail and load impedance as would have been obtained with a ground-referenced load (see  
Equation 3).  
V
O(PP)  
V
+
(RMS)  
Ǹ
2 2  
2
V
(RMS)  
Power +  
R
L
(3)  
V
DD  
V
O(PP)  
2x V  
O(PP)  
R
L
V
DD  
−V  
O(PP)  
Figure 41. Differential Output Configuration  
VDD  
–3 dB  
VO(PP)  
CC  
VO(PP)  
RL  
fc  
Figure 42. Single-Ended Configuration and Frequency Response  
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Bridge-tying the outputs in a typical computer audio, LCD TV, or multimedia LCD monitor application drastically  
increases output power. For example, if an amplifier in a single-ended configuration was capable of outputting a  
maximum of 250 mW for a given load with a supply voltage of 12 V, then that same amplifier would be able to  
output 1 W of power in a BTL configuration with the same supply voltage and load. In addition to the increase in  
output power, the BTL configuration does not suffer from the same low-frequency issues that plague the  
single-ended configuration. In a BTL configuration, there is no need for an output capacitor to block dc, so no  
unwanted filtering occurs. In addition, the BTL configuration saves money and space, as the dc-blocking  
capacitors needed for single-ended operation are large and expensive. For example, with an 8-load in SE  
operation, the user needs a 1000-µF capacitor to obtain a cutoff frequency below 20 Hz. This capacitor is  
expensive and large.  
Headphone Amplifier Description  
The headphone amplifier has a fixed gain of –1.5 V/V. It uses single-ended (SE) inputs. The DirectPath™  
amplifier architecture operates from a single supply but makes use of an internal charge pump to provide a  
negative voltage rail. Combining the user-provided positive rail and the negative rail generated by the IC, the  
device operates in what is effectively a split supply mode. The output voltages are now centered at zero volts  
with the capability to swing to the positive rail or negative rail. The DirectPath™ amplifier requires no output dc  
blocking capacitors and does not place any voltage on the sleeve. The block diagram and waveform of Figure 43  
illustrate the ground-referenced headphone architecture. This is the architecture of the TPA6045A4C.  
Single-supply headphone amplifiers typically require dc-blocking capacitors. The capacitors are required because  
most headphone amplifiers have a dc bias on the outputs pin. If the dc bias is not removed, the output signal is  
severely clipped, and large amounts of dc current rush through the headphones, potentially damaging them. The  
left-side drawing in Figure 43 illustrates the conventional headphone amplifier connection to the headphone jack  
and output signal.  
DC blocking capacitors are often large in value. The headphone speakers (typical resistive values of 16 or  
32 ) combine with the dc blocking capacitors to form a high-pass filter. Equation 4 shows the relationship  
between the load impedance (RL), the capacitor (CO), and the cutoff frequency (fC).  
1
fc +  
2pRLCO  
(4)  
CO can be determined using Equation 5, where the load impedance and the cutoff frequency are known.  
1
CO  
+
2pRLfc  
(5)  
If fc is low, the capacitor must then have a large value because the load resistance is small. Large capacitance  
values require large package sizes. Large package sizes consume PCB area, stand high above the PCB,  
increase cost of assembly, and can reduce the fidelity of the audio output signal.  
Two different headphone amplifier applications are available that allow for the removal of the output dc blocking  
capacitors. The capacitor-less amplifier architecture is implemented in the same manner as the conventional  
amplifier with the exception of the headphone jack shield pin. This amplifier provides a reference voltage, which  
is connected to the headphone jack shield pin. This is the voltage on which the audio output signals are  
centered. This voltage reference is half of the amplifier power supply to allow symmetrical swing of the output  
voltages. Do not connect the shield to any GND reference, or large currents will result. The scenario can happen  
if, for example, an accessory other than a floating GND headphone is plugged into the headphone connector.  
See the second block diagram and waveform in Figure 43.  
Copyright © 2008, Texas Instruments Incorporated  
Submit Documentation Feedback  
21  
Product Folder Link(s): TPA6045A4C  
 
 
TPA6045A4C  
SLOS614OCTOBER 2008.............................................................................................................................................................................................. www.ti.com  
Conventional  
VDD  
CO  
VOUT  
GND  
VDD/2  
CO  
Capacitor-Less  
VDD  
VOUT  
GND  
VBIAS  
VBIAS  
DirectPathTM  
VDD  
GND  
VSS  
Figure 43. Amplifier Applications  
Input-Blocking Capacitors  
DC input-blocking capacitors block the dc portion of the audio source and allow the inputs to properly bias.  
Maximum performance is achieved when the inputs of the TPA6045A4C are properly biased. Performance  
issues such as pop are optimized with proper input capacitors.  
The dc input-blocking capacitors can be removed, provided the inputs are connected differentially and within the  
input common-mode range of the amplifier, the audio signal does not exceed ±3 V, and pop performance is  
sufficient.  
CIN is a theoretical capacitor used for mathematical calculations only. Its value is the series combination of the dc  
input-blocking capacitors, C(DCINPUT-BLOCKING). Use Equation 6 to determine the value of C(DCINPUT-BLOCKING). For  
example, if CIN is equal to 0.22 µF, then C(DCINPUT-BLOCKING) is equal to about 0.47 µF.  
1
2
C
C
=
(DCINPUT-BLOCKING)  
IN  
(6)  
The two C(DCINPUT-BLOCKING) capacitors form a high-pass filter with the input impedance of the TPA6045A4C. Use  
Equation 6 to calculate CIN, then calculate the cutoff frequency using CIN and the differential input impedance of  
the TPA6045A4C, RIN, using Equation 7. Note that the differential input impedance changes with gain. See  
Figure 39 for input impedance values. The frequency and/or capacitance can be determined when one of the two  
values are given.  
22  
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Copyright © 2008, Texas Instruments Incorporated  
Product Folder Link(s): TPA6045A4C  
 
TPA6045A4C  
www.ti.com.............................................................................................................................................................................................. SLOS614OCTOBER 2008  
1
1
fcIN  
+
CIN  
+
or  
2p RIN CIN  
2p fcIN RIN  
(7)  
If a high-pass filter with a -3-dB point of no more than 20 Hz is desired over all gain settings, the minimum  
impedance would be used in the Equation 7. The minimum input impedance for TPA6045A4C is 20 k. The  
capacitor value by Equation 7 would be 0.399 µF. However, this is CIN, and the desired value is for  
C(DCINPUT-BLOCKING). Multiplying CIN by 2 yields 0.80 µF, which is close to the standard capacitor value of 1 µF.  
Place 1-µF capacitors at each input terminal of the TPA6045A4C to complete the filter.  
Charge Pump Flying Capacitor and CPVSS Capacitor  
The charge pump flying capacitor serves to transfer charge during the generation of the negative supply voltage.  
The CPVSS capacitor must be at least equal to the flying capacitor in order to allow maximum charge transfer.  
Low ESR capacitors are an ideal selection, and a value of 1 µF is typical.  
Decoupling Capacitors  
The TPA6045A4C is a DirectPath™ headphone amplifier that requires adequate power supply decoupling to  
ensure that the noise and total harmonic distortion (THD) are as low as possible. To filter high-frequency  
transients, spikes, and digital hash on the power line, use good low equivalent-series-resistance (ESR) ceramic  
capacitors, typically 1 µF. Find the smallest package possible, and place as close as possible to the device VDD  
lead. Placing the decoupling capacitors close to the TPA6045A4C is important for the performance of the  
amplifier. Use a 10 µF or greater capacitor near the TPA6045A4C to filter lower frequency noise signals;  
however, the high PSRR of the TPA6045A4C makes the 10-µF capacitor unnecessary in most applications.  
Midrail Bypass Capacitor, CBYPASS  
The midrail bypass capacitor, C(BYPASS), has several important functions. During start-up or recovery from  
shutdown mode, CBYPASS determines the rate at which the amplifier starts up. A 1-µF capacitor yields a start-up  
time of approximately 25 ms. CBYPASS also reduces the noise coupled into the output signal by the power supply.  
This improves the power supply ripple rejection (PSRR) of the amplifier. Ceramic or polyester capacitors with low  
ESR and values in the range of 0.47 µF to 1 µF are recommended.  
Low Dropout Regulator (LDO) Description  
The TPA6045A4C contains a 3.3-V output low dropout regulator (LDO) capable of providing a maximum of 120  
mA with a drop of less than 150 mV from the 5-V supply. This can be used to power an external CODEC. A  
10-µF decoupling capacitor is recommended at the output of the LDO as well as 0.1-µF capacitor to filter  
high-frequency noise from the supply line.  
Layout Recommendations  
Solder the exposed thermal pad (metal pad on the bottom of the part) on the TPA6045A4C QFN package to a  
pad on the PCB.  
It is important to keep the TPA6045A4C external components close to the body of the amplifier to limit noise  
pickup. One should lay out the differential input leads symmetrical and close together to take advantage of the  
inherent common mode rejection of the TPA6045A4C. The layout of the TPA6045A4C evaluation module (EVM)  
is a good example of component placement and the layout files are available at www.ti.com.  
Copyright © 2008, Texas Instruments Incorporated  
Submit Documentation Feedback  
23  
Product Folder Link(s): TPA6045A4C  
 
PACKAGE OPTION ADDENDUM  
www.ti.com  
20-Nov-2008  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
TPA6045A4CRHBR  
ACTIVE  
QFN  
RHB  
32  
3000 Green (RoHS & CU NIPDAU Level-3-260C-168 HR  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
27-Nov-2008  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0 (mm)  
B0 (mm)  
K0 (mm)  
P1  
W
Pin1  
Diameter Width  
(mm) W1 (mm)  
(mm) (mm) Quadrant  
TPA6045A4CRHBR  
QFN  
RHB  
32  
3000  
330.0  
12.4  
5.3  
5.3  
1.5  
8.0  
12.0  
Q2  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
27-Nov-2008  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
QFN RHB 32  
SPQ  
Length (mm) Width (mm) Height (mm)  
346.0 346.0 29.0  
TPA6045A4CRHBR  
3000  
Pack Materials-Page 2  
IMPORTANT NOTICE  
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