TPA6101A2D [TI]

50 MW ULTRALOW VOLTAGE FIXED GAIN STEREO HEADPHONE AUDIO POWER AMPLIFIER; 50兆瓦的超低电压,固定增益立体声耳机音频功率放大器
TPA6101A2D
型号: TPA6101A2D
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

50 MW ULTRALOW VOLTAGE FIXED GAIN STEREO HEADPHONE AUDIO POWER AMPLIFIER
50兆瓦的超低电压,固定增益立体声耳机音频功率放大器

放大器 功率放大器
文件: 总19页 (文件大小:422K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
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ꢇ ꢅ ꢈꢉꢊ ꢋꢌꢀ ꢍꢂꢌ ꢎ ꢊꢈꢏꢎ ꢌꢀꢂꢐ ꢑꢒ ꢓ ꢔꢕ ꢑꢖꢈꢐ ꢂꢔ ꢗ ꢘꢀ ꢑꢍ ꢑꢎ ꢙꢑꢂ ꢖꢁ ꢙ ꢎ ꢗꢑ  
ꢂꢋꢖ ꢔꢎ ꢁꢎ ꢊ ꢑꢍ ꢂꢚ ꢁ ꢌꢔ ꢓꢔ ꢑꢍ  
SLOS331B − AUGUST 2000 − REVISED SEPTEMBER 2004  
D or DGK PACKAGE  
(TOP VIEW)  
D
D
D
D
D
D
D
D
D
D
Minimal External Components Required  
1.6-V to 3.6-V Supply Voltage Range  
50-mW Stereo Output  
BYPASS  
GND  
IN1−  
1
2
3
4
8
7
6
5
V 1  
Low Supply Current . . . 0.75 mA  
Low Shutdown Current . . . 50 nA  
Gain Set Internally to 2 dB  
O
SHUTDOWN  
IN2−  
V
DD  
V 2  
O
Pop Reduction Circuitry  
Internal Mid-Rail Generation  
Thermal and Short-Circuit Protection  
Surface-Mount Packaging  
− MSOP  
− SOIC  
description  
The TPA6101A2 is a stereo audio power amplifier packaged in either an 8-pin SOIC package or an 8-pin MOSP  
package capable of delivering 50 mW of continuous RMS power per channel into 16-loads. Amplifier gain  
is internally set to 2 dB (inverting) to save board space by eliminating six external resistors.  
The TPA6101A2 is optimized for battery applications because of its low-supply current, shutdown current, and  
THD+N. To obtain the low-supply voltage range, the TPA6101A2 biases BYPASS to V /4.  
DD  
When driving a 16-load with 40-mW output power from 3.3 V, THD+N is 0.08% at 1 kHz, and less than 0.2%  
across the audio band of 20 Hz to 20 kHz. For 30 mW into 32-loads, the THD+N is reduced to less than 0.06%  
at 1 kHz, and is less than 0.3% across the audio band of 20 Hz to 20 kHz.  
typical application circuit  
V
V
6
7
DD  
V
DD  
80 kΩ  
80 kΩ  
C
S
Audio  
Input  
V
/4  
DD  
IN1−  
8
1
1
O
+
C
80 kΩ  
I
C
C
BYPASS  
C
B
Audio  
Input  
80 kΩ  
IN2−  
4
3
V
O
2
5
2
+
C
I
C
C
80 kΩ  
From Shutdown  
Control Circuit  
SHUTDOWN  
Bias  
Control  
80 kΩ  
NOTE: All internal resistor values are 20%.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢀꢦ  
Copyright 2004, Texas Instruments Incorporated  
ꢢ ꢦ ꢣ ꢢꢜ ꢝꢰ ꢟꢞ ꢡ ꢩꢩ ꢧꢡ ꢠ ꢡ ꢉ ꢦ ꢢ ꢦ ꢠ ꢣ ꢫ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
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ꢂ ꢋꢖꢔ ꢎ ꢁꢎꢊ ꢑꢍ ꢂꢚ ꢁꢌ ꢔ ꢓꢔ ꢑ ꢍ  
SLOS331B − AUGUST 2000 − REVISED SEPTEMBER 2004  
AVAILABLE OPTIONS  
PACKAGED DEVICE  
MSOP  
SYMBOLIZATION  
T
A
SMALL OUTLINE (D)  
MSOP (DGK)  
TPA6101A2DGK  
40°C to 85°C  
TPA6101A2D  
AJM  
Terminal Functions  
TERMINAL  
NAME  
I/O  
DESCRIPTION  
NO.  
BYPASS  
1
I
Tap to voltage divider for internal mid-supply bias supply. BYPASS is set at V /4. Connect to a 0.1-µF to 1-µF  
low-ESR capacitor for best performance.  
DD  
GND  
2
8
4
3
6
7
5
I
I
GND is the ground connection.  
IN1−  
IN1− is the inverting input for channel 1.  
IN2−  
I
IN2− is the inverting input for channel 2.  
SHUTDOWN  
I
Active-low input. When held low, the device is placed in a low-supply current mode.  
V
V
V
I
V
V
V
is the supply voltage terminal.  
DD  
DD  
1
2
O
O
1 is the audio output for channel 1.  
2 is the audio output for channel 2.  
O
O
O
O
absolute maximum ratings over operating free-air temperature (unless otherwise noted)  
Supply voltage, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 V  
DD  
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to V + 0.3 V  
I
DD  
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Internally Limited  
Operating junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 150°C  
J
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
stg  
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
DISSIPATION RATING TABLE  
T
25°C  
DERATING FACTOR  
T
= 70°C  
T = 85°C  
A
A
A
PACKAGE  
POWER RATING  
ABOVE T = 25°C  
POWER RATING POWER RATING  
A
D
710 mW  
5.68 mW/°C  
3.75 mW/°C  
454 mW  
300 mW  
369 mW  
244 mW  
DGK  
469 mW  
recommended operating conditions  
MIN  
MAX  
UNIT  
V
Supply voltage, V  
DD  
1.6  
3.6  
60% x V  
V
High-level input voltage, V (SHUTDOWN)  
IH  
DD  
25% x V  
V
Low-level input voltage, V (SHUTDOWN)  
IL  
DD  
85  
Operating free-air temperature, T  
40  
°C  
A
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
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ꢌꢀ  
ꢊꢈ  
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SLOS331B − AUGUST 2000 − REVISED SEPTEMBER 2004  
dc electrical characteristics at T = 25°C, V  
= 3.6 V (unless otherwise noted)  
A
DD  
PARAMETER  
TEST CONDITIONS  
= 2 dB  
V
MIN  
TYP  
5
MAX  
UNIT  
mV  
dB  
V
Output offset voltage  
Power supply rejection ratio  
Supply current  
A
40  
OO  
PSRR  
V
DD  
= 3 V to 3.6 V  
72  
I
SHUTDOWN = 3.6 V  
SHUTDOWN = 0 V  
0.75  
1.5  
mA  
DD  
I
Supply current in SHUTDOWN mode  
50  
80  
250  
nA  
DD(SD)  
|I  
|I  
|
High-level input current (SHUTDOWN)  
Low-level input current (SHUTDOWN)  
Input impedance  
V
V
= 3.6 V, V = V  
DD  
1
1
µA  
µA  
kΩ  
IH  
DD  
I
|
= 3.6 V, V = 0 V  
I
IL  
DD  
Z
I
ac operating characteristics, V  
= 3.3 V, T = 25°C, R = 16 Ω  
DD  
A
L
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
2
MAX  
UNIT  
dB  
G
Gain  
P
Output power (each channel)  
Total harmonic distortion + noise  
Maximum output power BW  
Supply ripple rejection ratio  
Signal-to-noise ratio  
THD 0.1%,  
= 45 mW,  
f = 1 kHz  
50  
mW  
O
THD+N  
P
O
20−20 kHz  
0.4%  
> 20  
47  
B
OM  
THD < 0.5%  
f = 1 kHz  
kHz  
dB  
k
SVR  
SNR  
P
O
= 50 mW  
86  
dB  
V
n
Noise output voltage (no-noise weighting filter)  
45  
µV(rms)  
ac operating characteristics, V  
= 3.3 V, T = 25°C, R = 32 Ω  
DD  
A
L
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
2
MAX  
UNIT  
dB  
G
Gain  
P
Output power (each channel)  
Total harmonic distortion + noise  
Maximum output power BW  
Supply ripple rejection ratio  
Signal-to-noise ratio  
THD 0.1%,  
= 30 mW,  
f = 1 kHz  
35  
mW  
O
THD+N  
P
O
20−20 kHz  
0.4%  
>20  
47  
B
OM  
THD < 0.4%  
f = 1 kHz  
kHz  
dB  
k
SVR  
SNR  
P
O
= 30 mW  
86  
dB  
V
n
Noise output voltage (no-noise weighting filter)  
50  
µV(rms)  
3
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SLOS331B − AUGUST 2000 − REVISED SEPTEMBER 2004  
dc electrical characteristics at T = 25°C, V  
= 1.6 V (unless otherwise noted)  
A
DD  
PARAMETER  
TEST CONDITIONS  
= 2 dB  
V
MIN  
TYP  
5
MAX  
UNIT  
mV  
dB  
V
Output offset voltage  
Power supply rejection ratio  
Supply current  
A
40  
OO  
PSRR  
V
DD  
= 1.4 V to 1.8 V  
80  
I
I
SHUTDOWN = 1.6 V  
SHUTDOWN = 0 V  
0.65  
1.2  
mA  
DD  
Supply current in SHUTDOWN mode  
High-level input current (SHUTDOWN)  
Low-level input current (SHUTDOWN)  
Input impedance  
50  
250  
1
nA  
µA  
µA  
kΩ  
DD(SD)  
|I  
|I  
|
V
= 1.6 V, V = V  
DD  
IH  
DD  
DD  
I
|
V
= 1.6 V, V = 0 V  
1
IL  
I
Z
I
80  
ac operating characteristics, V  
= 1.6 V, T = 25°C, R = 16 Ω  
DD  
A
L
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
2
MAX  
UNIT  
dB  
G
Gain  
P
Output power (each channel)  
Total harmonic distortion + noise  
Maximum output power BW  
Supply ripple rejection ratio  
Signal-to-noise ratio  
THD 0.5%,  
f = 1 kHz  
10  
mW  
O
THD+N  
P
O
= 9.5 mW, 20−20 kHz  
0.06%  
> 20  
47  
B
OM  
THD < 1%  
f = 1 kHz  
kHz  
dB  
k
SVR  
SNR  
P
O
= 10 mW  
82  
dB  
V
n
Noise output voltage (no-noise weighting filter)  
32  
µV(rms)  
ac operating characteristics, V  
= 1.6 V, T = 25°C, R = 32 Ω  
DD  
A
L
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
2
MAX  
UNIT  
dB  
G
Gain  
P
Output power (each channel)  
Total harmonic distortion + noise  
Maximum output power BW  
Supply ripple rejection ratio  
Signal-to-noise ratio  
THD 0.5%,  
f = 1 kHz  
7.5  
mW  
O
THD+N  
P
O
= 6.5 mW, 20−20 kHz  
0.05%  
>20  
47  
B
OM  
THD < 1%  
f = 1 kHz  
kHz  
dB  
k
SVR  
SNR  
P
O
= 7.5 mW  
84  
dB  
V
n
Noise output voltage (no-noise weighting filter)  
32  
µV(rms)  
TYPICAL CHARACTERISTICS  
Table of Graphs  
FIGURE  
vs Frequency  
1, 3, 5, 7, 9, 11  
2, 4, 6, 8, 10, 12  
13, 14  
vs Output power  
vs Output voltage  
vs Load resistance  
vs Frequency  
THD+N Total harmonic distortion plus noise  
P
O
Output power  
15, 16  
k
Supply ripple rejection ratio  
Output noise voltage  
Crosstalk  
17, 18  
SVR  
Vn  
vs Frequency  
19, 20  
vs Frequency  
21, 22  
Closed−loop gain and phase  
Supply current  
vs Frequency  
23, 24, 25, 26  
27  
I
vs Supply voltage  
vs Output power  
DD  
P
Power dissipation  
28  
D
4
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ꢂꢋꢖ ꢔꢎ ꢁꢎ ꢊ ꢑꢍ ꢂꢚ ꢁ ꢌꢔ ꢓꢔ ꢑꢍ  
SLOS331B − AUGUST 2000 − REVISED SEPTEMBER 2004  
TYPICAL CHARACTERISTICS  
TOTAL HARMONIC DISTORTION PLUS NOISE  
TOTAL HARMONIC DISTORTION PLUS NOISE  
vs  
vs  
FREQUENCY  
OUTPUT POWER  
10  
1
10  
1
V
P
C
R
= 1.6 V  
= 9.5 mW  
= 1 µF  
= 16 Ω  
V
C
R
= 1.6 V  
= 1 µF  
= 16 Ω  
DD  
O
B
L
DD  
B
L
f = 1 kHz  
0.1  
0.1  
0.01  
0.01  
0.001  
0.0001  
0.001  
20  
100  
1 k  
10 k 20 k  
1
5
10  
40  
f − Frequency − Hz  
P
O
− Output Power − mW  
Figure 1  
Figure 2  
TOTAL HARMONIC DISTORTION PLUS NOISE  
TOTAL HARMONIC DISTORTION PLUS NOISE  
vs  
vs  
FREQUENCY  
OUTPUT POWER  
10  
10  
1
V
P
C
R
= 1.6 V  
= 6.5 mW  
= 1 µF  
= 32 Ω  
DD  
O
B
L
V
C
R
= 1.6 V  
= 1 µF  
= 32 Ω  
DD  
B
L
1
0.1  
f = 1 kHz  
0.1  
0.01  
0.01  
0.001  
0.001  
0.0001  
0.0001  
20  
100  
1 k  
10 k 20 k  
1
5
10  
40  
f − Frequency − Hz  
P
O
− Output Power − mW  
Figure 3  
Figure 4  
5
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SLOS331B − AUGUST 2000 − REVISED SEPTEMBER 2004  
TYPICAL CHARACTERISTICS  
TOTAL HARMONIC DISTORTION PLUS NOISE  
TOTAL HARMONIC DISTORTION PLUS NOISE  
vs  
vs  
FREQUENCY  
OUTPUT POWER  
10  
1
10  
1
V
P
C
R
= 1.6 V  
= 4.5 mW  
= 1 µF  
= 50 Ω  
DD  
O
B
L
V
C
R
= 1.6 V  
= 1 µF  
= 50 Ω  
DD  
B
L
f = 1 kHz  
0.1  
0.1  
0.01  
0.01  
0.001  
0.0001  
0.001  
20  
100  
1 k  
10 k 20 k  
1
5
10  
40  
f − Frequency − Hz  
P
O
− Output Power − mW  
Figure 5  
Figure 6  
TOTAL HARMONIC DISTORTION PLUS NOISE  
TOTAL HARMONIC DISTORTION PLUS NOISE  
vs  
vs  
FREQUENCY  
OUTPUT POWER  
10  
10  
1
V
P
C
R
= 3.3 V  
= 45 mW  
= 1 µF  
= 16 Ω  
V
C
R
= 3.3 V  
= 1 µF  
= 16 Ω  
DD  
O
B
L
DD  
B
L
1
0.1  
f = 1 kHz  
0.1  
0.01  
0.01  
0.001  
0.0001  
0.001  
20  
100  
1 k  
10 k 20 k  
1
10  
100  
200  
f − Frequency − Hz  
P
O
− Output Power − mW  
Figure 7  
Figure 8  
6
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ꢂꢋꢖ ꢔꢎ ꢁꢎ ꢊ ꢑꢍ ꢂꢚ ꢁ ꢌꢔ ꢓꢔ ꢑꢍ  
SLOS331B − AUGUST 2000 − REVISED SEPTEMBER 2004  
TYPICAL CHARACTERISTICS  
TOTAL HARMONIC DISTORTION PLUS NOISE  
TOTAL HARMONIC DISTORTION PLUS NOISE  
vs  
vs  
OUTPUT POWER  
FREQUENCY  
10  
1
10  
1
V
C
R
= 3.3 V  
= 1 µF  
= 32 Ω  
V
P
C
R
= 3.3 V  
= 30 mW  
= 1 µF  
= 32 Ω  
DD  
B
L
DD  
O
B
L
f = 1 kHz  
0.1  
0.1  
0.01  
0.001  
0.01  
0.001  
0.0001  
1
10  
100 200  
20  
100  
1 k  
10 k 20 k  
P
O
− Output Power − mW  
f − Frequency − Hz  
Figure 9  
Figure 10  
TOTAL HARMONIC DISTORTION PLUS NOISE  
TOTAL HARMONIC DISTORTION PLUS NOISE  
vs  
vs  
FREQUENCY  
OUTPUT POWER  
10  
1
10  
V
P
C
R
= 3.3 V  
= 20 mW  
= 1 µF  
= 50 Ω  
DD  
O
B
L
V
C
R
= 3.3 V  
= 1 µF  
= 50 Ω  
DD  
B
L
f = 1 kHz  
1
0.1  
0.1  
0.01  
0.001  
0.01  
0.0001  
0.001  
20  
100  
1 k  
10 k 20 k  
1
10  
100 200  
f − Frequency − Hz  
P
O
− Output Power − mW  
Figure 11  
Figure 12  
7
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SLOS331B − AUGUST 2000 − REVISED SEPTEMBER 2004  
TYPICAL CHARACTERISTICS  
TOTAL HARMONIC DISTORTION PLUS NOISE  
TOTAL HARMONIC DISTORTION PLUS NOISE  
vs  
vs  
OUTPUT VOLTAGE  
OUTPUT VOLTAGE  
10  
1
10  
1
V
R
C
= 1.6 V  
= 10 kΩ  
= 1 µF  
DD  
L
B
V
R
C
= 3.3 V  
= 10 kΩ  
= 1 µF  
DD  
L
B
0.1  
0.1  
0.01  
0.01  
0.001  
0.001  
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9  
1
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
1.4  
V
O
− Output Voltage − V  
V
O
− Output Voltage − V  
Figure 13  
Figure 14  
OUTPUT POWER  
vs  
LOAD RESISTANCE  
OUTPUT POWER  
vs  
LOAD RESISTANCE  
15  
12  
9
150  
125  
V
= 1.6 V  
DD  
V
= 3.6 V  
DD  
THD+N = 1%  
Mode = Stereo  
THD+N = 1%  
Mode = Stereo  
Channel 1  
100  
Channel 2  
Channel 1  
Channel 2  
75  
50  
25  
0
6
3
0
16  
20  
24  
R
28  
32  
36  
40  
44  
48 50  
16  
20  
24  
28  
32  
36  
40  
44  
48 50  
− Load Resistance − Ω  
L
R
− Load Resistance − Ω  
L
Figure 15  
Figure 16  
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SLOS331B − AUGUST 2000 − REVISED SEPTEMBER 2004  
TYPICAL CHARACTERISTICS  
SUPPLY RIPPLE REJECTION RATIO  
SUPPLY RIPPLE REJECTION RATIO  
vs  
vs  
FREQUENCY  
FREQUENCY  
0
−10  
−20  
−30  
−40  
−50  
−60  
−70  
−80  
−90  
−100  
110  
−120  
0
−10  
−20  
−30  
−40  
−50  
−60  
−70  
−80  
−90  
V
C
R
= 3.3 V  
= 1 µF  
= 32 Ω  
V
C
R
= 1.6 V  
= 1 µF  
= 32 Ω  
DD  
B
L
DD  
B
L
−100  
110  
−120  
−130  
−140  
−130  
−140  
20  
100  
1 k  
10 k 20 k  
20  
100  
1 k  
10 k 20 k  
f − Frequency − Hz  
f − Frequency − Hz  
Figure 17  
Figure 18  
OUTPUT NOISE VOLTAGE  
OUTPUT NOISE VOLTAGE  
vs  
vs  
FREQUENCY  
FREQUENCY  
100  
10  
1
100  
V
C
R
= 1.6 V  
= 1 µF  
= 16 Ω  
DD  
B
L
V
C
R
= 3.3 V  
= 1 µF  
= 16 Ω  
DD  
B
L
10  
1
20  
100  
1 k  
10 k 20 k  
20  
100  
1 k  
10 k 20 k  
f − Frequency − Hz  
f − Frequency − Hz  
Figure 19  
Figure 20  
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SLOS331B − AUGUST 2000 − REVISED SEPTEMBER 2004  
TYPICAL CHARACTERISTICS  
CROSSTALK  
vs  
FREQUENCY  
CROSSTALK  
vs  
FREQUENCY  
0
0
−10  
−20  
−30  
−40  
−50  
−60  
−70  
−80  
−90  
−100  
110  
−120  
V
= 3.3 V  
DD  
V
P
R
= 1.6 V  
= 4.5 mW  
= 50 Ω  
−10  
−20  
DD  
O
L
P
O
= 20 mW  
R = 50 Ω  
L
−30  
−40  
−50  
−60  
−70  
−80  
−90  
−100  
110  
−120  
−130  
−140  
−130  
−140  
20  
100  
1 k  
10 k 20 k  
20  
100  
1 k  
10 k 20 k  
f − Frequency − Hz  
f − Frequency − Hz  
Figure 21  
Figure 22  
CLOSED-LOOP GAIN AND PHASE  
vs  
FREQUENCY  
40  
180°  
150°  
V
R
T
A
= 1.6 V  
DD  
= 16 Ω  
Phase  
30  
20  
L
= 25°C  
120°  
90°  
10  
60°  
0
30°  
Gain  
−10  
−20  
−30  
0°  
30°  
−60°  
−90°  
−40  
−120°  
−150°  
−180°  
−50  
−60  
10  
100  
1 k  
10 k 100 k 1 M 10 M 100 M  
f − Frequency − Hz  
Figure 23  
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SLOS331B − AUGUST 2000 − REVISED SEPTEMBER 2004  
TYPICAL CHARACTERISTICS  
CLOSED-LOOP GAIN AND PHASE  
vs  
FREQUENCY  
180°  
150°  
40  
30  
V
R
T
A
= 1.6 V  
DD  
= 32 Ω  
Phase  
L
= 25°C  
120°  
90°  
20  
10  
60°  
0
30°  
Gain  
0°  
−10  
−20  
−30  
30°  
−60°  
−90°  
−40  
−120°  
−150°  
−180°  
−50  
−60  
1 k  
10 k 100 k 1 M 10 M 100 M  
10  
100  
f − Frequency − Hz  
Figure 24  
CLOSED-LOOP GAIN AND PHASE  
vs  
FREQUENCY  
180°  
150°  
40  
30  
V
R
T
A
= 3.3 V  
DD  
= 16 Ω  
Phase  
L
= 25°C  
120°  
90°  
20  
10  
60°  
0
30°  
Gain  
−10  
−20  
−30  
0°  
30°  
−60°  
−90°  
−40  
−120°  
−150°  
−180°  
−50  
−60  
10  
100  
1 k  
10 k 100 k 1 M 10 M 100 M  
f − Frequency − Hz  
Figure 25  
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SLOS331B − AUGUST 2000 − REVISED SEPTEMBER 2004  
TYPICAL CHARACTERISTICS  
CLOSED-LOOP GAIN AND PHASE  
vs  
FREQUENCY  
40  
30  
180°  
150°  
V
R
T
A
= 3.3 V  
DD  
= 32 Ω  
Phase  
L
= 25°C  
120°  
90°  
20  
10  
60°  
0
30°  
Gain  
0°  
−10  
−20  
−30  
30°  
−60°  
−90°  
−40  
−120°  
−150°  
−180°  
−50  
−60  
10  
100  
1 k  
10 k 100 k 1 M 10 M 100 M  
f − Frequency − Hz  
Figure 26  
SUPPLY CURRENT  
vs  
SUPPLY VOLTAGE  
POWER DISSIPATION  
vs  
OUTPUT POWER  
1
40  
35  
30  
25  
20  
V
T
A
Low-to-High  
DD  
= 25°C  
16 Ω  
0.9  
T = 125°C  
A
0.8  
0.7  
0.6  
0.5  
T
A
= 25°C  
V = 3.3 V  
DD  
T
A
= −40°C  
32 Ω  
50 Ω  
0.4  
0.3  
15  
10  
0.2  
5
0
0.1  
0
0
0.4 0.8 1.2 1.6  
2
2.4 2.8 3.2 3.6  
0
10  
20  
30  
40  
50  
60  
70  
V
DD  
− Supply Voltage − V  
P
O
− Output Power − mW  
Figure 27  
Figure 28  
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SLOS331B − AUGUST 2000 − REVISED SEPTEMBER 2004  
APPLICATION INFORMATION  
input capacitor, C  
I
In the typical application, an input capacitor (C ) is required to allow the amplifier to bias the input signal to the  
I
proper dc level for optimum operation. In this case, C and R form a high-pass filter with the corner frequency  
I
I
determined in equation 1. R is set internally and is fixed at 80 kΩ.  
I
1
f
+
c
(1)  
2pR C  
I
I
The value of C is important to consider, as it directly affects the bass (low frequency) performance of the circuit.  
I
Consider the example where the specification calls for a flat-bass response down to 20 Hz. Equation 1 is  
reconfigured as equation 2.  
1
C +  
I
(2)  
2pR f  
c
I
In this example, C is approximately 0.1 µF. A further consideration for this capacitor is the leakage path from  
I
the input source through the input network (R , C ) and the feedback resistor (R ) to the load. This leakage  
I
I
F
current creates a dc-offset voltage at the input to the amplifier that reduces useful headroom. For this reason  
a low-leakage tantalum or ceramic capacitor is the best choice. When polarized capacitors are used, the positive  
side of the capacitor should face the amplifier input in most applications, as the dc level there is held at V /4,  
DD  
which is likely higher than the source dc level. It is important to confirm the capacitor polarity in the application.  
power supply decoupling, C  
S
The TPA6101A2 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling  
to ensure that the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also  
prevents oscillations for long lead lengths between the amplifier and the speaker. The optimum decoupling is  
achieved by using two capacitors of different types that target different types of noise on the power supply leads.  
For higher frequency transients, spikes, or digital hash on the line, a good low equivalent-series-resistance  
(ESR) ceramic capacitor, typically 0.1 µF, placed as close as possible to the device V  
lead, works best. For  
DD  
filtering lower-frequency noise signals, a larger, aluminum-electrolytic capacitor of 10 µF or greater placed near  
the power amplifier is recommended.  
midrail bypass capacitor, C  
B
The midrail bypass capacitor (C ) serves several important functions. During start-up, C determines the rate  
B
B
at which the amplifier starts up. This helps to push the start-up pop noise into the subaudible range (so low it  
can not be heard). The second function is to reduce noise produced by the power supply caused by coupling  
into the output drive signal. This noise is from the midrail generation circuit internal to the amplifier. The capacitor  
is fed from a 55-ksource inside the amplifier. To keep the start-up pop as low as possible, the relationship  
shown in equation 3 should be maintained.  
1
1
C   55 kǓ v ǒC RIǓ  
(3)  
ǒ
B I  
As an example, consider a circuit where C is 1 µF, C is 0.1 µF, and R is 80 k. Inserting these values into the  
B
I
I
equation 3 results in: 18.18 125 which satisfies the rule. Bypass capacitor (C ) values of 0.47-µF to 1-µF  
B
ceramic or tantalum low-ESR capacitors are recommended for the best THD and noise performance.  
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SLOS331B − AUGUST 2000 − REVISED SEPTEMBER 2004  
APPLICATION INFORMATION  
output coupling capacitor, C  
C
In the typical single-supply, single-ended (SE) configuration, an output coupling capacitor (C ) is required to  
C
block the dc bias at the output of the amplifier, thus preventing dc currents in the load. As with the input coupling  
capacitor, the output coupling capacitor and impedance of the load from a high-pass filter is governed by  
equation 4.  
1
f
+
c
(4)  
2pR C  
L
C
The main disadvantage, from a performance standpoint, is that the typically small-load impedances drive the  
low-frequency corner higher. Large values of C are required to pass low-frequencies into the load. Consider  
C
the example where a C of 68 µF is chosen and loads vary from 32 to 47 k. Table 1 summarizes the  
C
frequency response characteristics of each configuration.  
Table 1. Common Load Impedances vs Low-Frequency Output Characteristics in SE Mode  
R
C
LOWEST FREQUENCY  
Ą73 Hz  
L
C
32 Ω  
10,000 Ω  
47,000 Ω  
68 µF  
68 µF  
68 µF  
0.23 Hz  
0.05 Hz  
As Table 1 indicates, headphone response is adequate and drive into line level inputs (a home stereo for  
example) is very good.  
The output coupling capacitor required in single-supply SE mode also places additional constraints on the  
selection of other components in the amplifier circuit. With the rules described earlier still valid, add the following  
relationship:  
1
1
1
v
ǒ
C   55 kǓ ǒC R Ǔ Ơ  
(5)  
R C  
L C  
B
I I  
using low-ESR capacitors  
Low-ESR capacitors are recommended throughout this application. A real capacitor can be modeled simply as  
a resistor in series with an ideal capacitor. The voltage drop across this resistor minimizes the beneficial effects  
of the capacitor in the circuit. The lower the equivalent value of this resistance, the more the real capacitor  
behaves like an ideal capacitor.  
3.3-V versus 1.6-V operation  
The TPA6101A2 was designed for operation over a supply range of 1.6 V to 3.6 V. There are no special  
considerations for 1.6-V versus 3.3-V operation as far as supply bypassing, gain setting, or stability. Supply  
current is slightly reduced from 0.75 mA (typical) to 0.65 mA (typical). The most important consideration is that  
of output power. Each amplifier can produce a maxium output voltage swing within a few hundred millivolts of  
the rails with a 10-kload. However, this voltage swing decreases as the load resistance decreases and the  
r
as the output stage transistors becomes more significant. For example, for a 32-load, the maximum  
DS(on)  
peak output voltage with V  
swing effectively reduces the maximum undistorted output power.  
= 1.6 V is approximately 0.7 V with no clipping distortion. This reduced voltage  
DD  
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SLOS331B − AUGUST 2000 − REVISED SEPTEMBER 2004  
MECHANICAL DATA  
D (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
14 PIN SHOWN  
0.050 (1,27)  
0.020 (0,51)  
0.014 (0,35)  
0.010 (0,25)  
M
14  
8
0.008 (0,20) NOM  
0.244 (6,20)  
0.228 (5,80)  
0.157 (4,00)  
0.150 (3,81)  
Gage Plane  
0.010 (0,25)  
1
7
0°ā8°  
0.044 (1,12)  
A
0.016 (0,40)  
Seating Plane  
0.004 (0,10)  
0.010 (0,25)  
0.004 (0,10)  
0.069 (1,75) MAX  
PINS **  
8
14  
16  
DIM  
0.197  
(5,00)  
0.344  
(8,75)  
0.394  
(10,00)  
A MAX  
0.189  
(4,80)  
0.337  
(8,55)  
0.386  
(9,80)  
A MIN  
4040047/D 10/96  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).  
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SLOS331B − AUGUST 2000 − REVISED SEPTEMBER 2004  
MECHANICAL INFORMATION  
DGK (R-PDSO-G8)  
PLASTIC SMALL-OUTLINE PACKAGE  
0,38  
M
0,65  
8
0,25  
0,25  
5
0,15 NOM  
3,05  
2,95  
4,98  
4,78  
Gage Plane  
0,25  
0°ā6°  
1
4
0,69  
0,41  
3,05  
2,95  
Seating Plane  
0,10  
0,15  
0,05  
1,07 MAX  
4073329/B 04/98  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion.  
D. Falls within JEDEC MO-187  
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IMPORTANT NOTICE  
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in  
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