TPS1HB16-Q1 [TI]
具有可调节电流限制的 40V、16mΩ、汽车类单通道智能高侧开关;
| 型号： | TPS1HB16-Q1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有可调节电流限制的 40V、16mΩ、汽车类单通道智能高侧开关 开关 |
| 文件： | 总56页 (文件大小：2399K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS1HB16-Q1
ZHCSJT6B –MAY 2019 –REVISED FEBRUARY 2023
TPS1HB16-Q1 40V、16mΩ 单通道汽车类智能高边开关
1 特性
3 说明
• 符合面向汽车应用的AEC-Q100 标准
TPS1HB16-Q1 器件是一款适用于 12V 汽车系统的智
能高边开关。该器件集成了强大的保护和诊断功能，可
确保即使在汽车系统发生短路等不利事件时也能提供输
出端口保护。该器件通过可靠的电流限制来防止故障，
根据器件型号不同，电流限制可调范围为 4.4A 至
49A。凭借较高的电流限制范围，该器件可用于需要大
瞬态电流的负载，而低电流限制范围可为不需要高峰值
电流的负载提供更好的保护。该器件能够可靠地驱动各
种负载分布。
– 温度等级1：–40°C 至125°C
– 器件HBM ESD 分类等级2
– 器件CDM ESD 分类等级C4B
– 可承受40V 负载突降
• 提供功能安全
– 可提供用于功能安全系统设计的文档
• 单通道智能高边开关，具有16mΩRON (TJ =
25°C)
• 可通过可调电流限制提高系统级可靠性
– 电流限制设定点范围为4.4A 至49A
• 强大的集成输出保护：
TPS1HB16-Q1 还能够提供可改进负载诊断的高精度模
拟电流检测。通过向系统 MCU 报告负载电流和器件温
度，该器件可实现预测性维护和负载诊断，从而延长系
统寿命。
– 集成热保护
– 接地短路和电池短路保护
– 反向电池事件保护包括FET 通过反向电压自动
开启
TPS1HB16-Q1 采用 HTSSOP 封装，可减小 PCB 尺
寸。
– 在失电和接地失效时自动关闭
– 集成输出钳位对电感负载进行消磁
– 可配置故障处理
封装信息
器件型号(1)
封装尺寸（标称值）
封装
TPS1HB16-Q1
HTSSOP (16)
5.00 mm x 4.40 mm
• 可对模拟检测输出进行配置，以精确测量：
– 负载电流
– 器件温度
• 通过SNS 引脚提供故障指示
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
VBAT
– 开路负载和电池短路检测
DIA_EN
SEL1
VBB
2 应用
Bulbs
• 汽车显示模块
• ADAS 模块
SNS
ILIM
µC
Relays/Motors
VOUT
• 座椅舒适模块
• 变速器控制单元
• HVAC 控制模块
• 车身控制模块
• 白炽灯和LED 照明
LATCH
EN
Power Module:
Cameras, Sensors
General Resistive, Capacitive,
Inductive Loads
GND
简化原理图
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLVSE17
TPS1HB16-Q1
ZHCSJT6B –MAY 2019 –REVISED FEBRUARY 2023
www.ti.com.cn
Table of Contents
9.2 Functional Block Diagram.........................................19
9.3 Feature Description...................................................19
9.4 Device Functional Modes..........................................31
10 Application and Implementation................................33
10.1 Application Information........................................... 33
10.2 Typical Application.................................................. 36
10.3 Typical Application.................................................. 42
10.4 Power Supply Recommendations...........................45
10.5 Layout..................................................................... 45
11 Device and Documentation Support..........................47
11.1 Documentation Support.......................................... 47
11.2 接收文档更新通知................................................... 47
11.3 支持资源..................................................................47
11.4 Trademarks............................................................. 47
11.5 静电放电警告...........................................................47
11.6 术语表..................................................................... 47
12 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Device Comparison Table...............................................3
6 Pin Configuration and Functions...................................4
6.1 Recommended Connections for Unused Pins............5
7 Specifications.................................................................. 6
7.1 Absolute Maximum Ratings........................................ 6
7.2 ESD Ratings............................................................... 6
7.3 Recommended Operating Conditions.........................6
7.4 Thermal Information....................................................7
7.5 Electrical Characteristics.............................................7
7.6 SNS Timing Characteristics........................................ 9
7.7 Switching Characteristics..........................................10
7.8 Typical Characteristics.............................................. 11
8 Parameter Measurement Information..........................16
9 Detailed Description......................................................18
9.1 Overview...................................................................18
Information.................................................................... 47
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
Changes from Revision A (April 2020) to Revision B (February 2023)
Page
• 更新了整个文档中的表格、图和交叉参考的编号格式.........................................................................................1
• Addition of VSC parameter to the Specifications section.....................................................................................6
Changes from Revision * (May 2019) to Revision A (April 2020)
Page
• 将状态从“预告信息”更改为“量产数据”....................................................................................................... 1
• Added device variant F to the data sheet .......................................................................................................... 3
Copyright © 2023 Texas Instruments Incorporated
English Data Sheet: SLVSE17
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5 Device Comparison Table
表5-1. Device Options
DEVICE
PART NUMBER
VERSION
CURRENT LIMIT
CURRENT LIMIT RANGE
OVERCURRENT BEHAVIOR
A
B
F
TPS1HB16A-Q1
TPS1HB16B-Q1
TPS1HB16F-Q1
Resistor Programmable
Resistor Programmable
Internally set
4.4 A to 22 A
9.8 A to 49 A
60 A
Disable switch immediately
Disable switch immediately
Disable switch immediately
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English Data Sheet: SLVSE17
TPS1HB16-Q1
ZHCSJT6B –MAY 2019 –REVISED FEBRUARY 2023
www.ti.com.cn
6 Pin Configuration and Functions
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GND
DIA_EN
NC
SNS
LATCH
EN
SEL1
NC
VBB
ILIM (Version A/B)
FLT (Version F)
NC
VOUT
VOUT
VOUT
NC
NC
NC
图6-1. PWP Package 16-Pin HTSSOP Top View
表6-1. Pin Functions
PIN
I/O
DESCRIPTION
VERSION VERSION
NAME
A/B
F
GND
SNS
LATCH
EN
1
1
Device ground
Sense output
—
O
I
2
2
3
3
Sets fault handling behavior (latched or auto-retry)
Control input, active high
4
5
4
-
I
ILIM
O
O
O
I
Connect resistor to set current-limit threshold
Open drain output with pulldown to signal fault.
Channel output
FLT
-
5
VOUT
NC
6 - 8
6 - 8
9 - 13, 15 9 - 13, 15
No Connect, leave floating
Diagnostics select. No functionality on device version F; connect to IC GND
through RPROT resistor
SEL1
DIA_EN
VBB
14
16
14
16
I
I
I
Diagnostic enable, active high
Power supply input
Exposed
pad
Exposed
pad
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English Data Sheet: SLVSE17
TPS1HB16-Q1
ZHCSJT6B –MAY 2019 –REVISED FEBRUARY 2023
www.ti.com.cn
6.1 Recommended Connections for Unused Pins
The TPS1HB16-Q1 is designed to provide an enhanced set of diagnostic and protection features. However, if
the system design only allows for a limited number of I/O connections, some pins can be considered as optional.
表6-2. Connections For Optional Pins
PIN NAME
CONNECTION IF NOT USED
IMPACT IF NOT USED
SNS
Analog sense is not available.
Ground through 1-kΩresistor
With LATCH unused, the device auto-retries after a fault. If latched
Float or ground through RPROT behavior is desired, but the system describes limited I/O, it is possible to
LATCH
resistor
use one microcontroller output to control the latch function of several high-
side channels.
If the ILIM pin is left floating, the device is set to the default internal current-
limit threshold.
ILIM (Version A/B)
FAULT (Version F)
Float
Float
Open drain FAULT signal is not able to be used
SEL1 selects the TJ sensing feature. With SEL1 unused, only current
sensing and open load detection are available. If unused, must be
grounded through a resistor to engage FET turn-on during reverse battery.
SEL1
Ground through RPROT
Float or ground through RPROT With DIA_EN unused, the analog sense, open-load, and short-to-battery
DIA_EN
resistor
diagnostics are not available.
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English Data Sheet: SLVSE17
TPS1HB16-Q1
ZHCSJT6B –MAY 2019 –REVISED FEBRUARY 2023
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7 Specifications
7.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
UNIT
V
Maximum continuous supply voltage, VBB
36
40
Load dump voltage, VLD
ISO16750-2:2010(E)
V
V
Reverse battery voltage, VRev, t ≤3 minutes
Enable pin voltage, VEN
–18
–1
–1
–1
–1
–1
7
7
V
LATCH pin voltage, VLATCH
V
Diagnostic Enable pin voltage, VDIA_EN
Sense pin voltage, VSNS
7
V
18
7
V
Select pin voltage, VSEL1
V
Reverse ground current, IGND
Energy dissipation during turnoff, ETOFF
Energy dissipation during turnoff, ETOFF
Maximum junction temperature, TJ
Storage temperature, Tstg
VBB < 0 V
mA
mJ
mJ
°C
°C
–50
34(2)
14(2)
150
Single pulse, LOUT = 5 mH, TJ,start = 125°C
Repetitive pulse, LOUT = 5 mH, TJ,start = 125°C
150
–65
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute maximum rated conditions for extended periods may affect device
reliability.
(2) For further details, see the section regarding switch-off of an inductive load.
7.2 ESD Ratings
VALUE
UNIT
All pins except VBB and
VOUT
±2000
Human-body model (HBM), per AEC Q100-002(1)
Charged-device model (CDM), per AEC Q100-011
Electrostatic
discharge
V(ESD)
V
VBB and VOUT
All pins
±4000
±750
(1) AEC-Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specifications.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted) (1)
MIN
6
MAX
18
UNIT
VBB
Nominal supply voltage (1)
Extended lower supply voltage
Extended higher supply voltage((2))
Enable voltage
V
V
V
V
V
V
V
V
VBB
3
6
VBB
18
28
VEN
5.5
5.5
5.5
5.5
7
–1
–1
–1
–1
–1
VLATCH
VDIA_EN
VSEL1
VSNS
LATCH voltage
Diagnostic Enable voltage
Select voltage
Sense voltage
(1) All operating voltage conditions are measured with respect to device GND
(2) All parameters specified are still valid, short circuit protection valide to value specified by VSC parameter
Copyright © 2023 Texas Instruments Incorporated
English Data Sheet: SLVSE17
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7.4 Thermal Information
TPS1HB16-Q1
THERMAL METRIC (1) (2)
PWP (HTSSOP)
UNIT
16 PINS
34.3
31.2
10.8
2.4
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
ψJT
10.8
1.6
ψJB
RθJC(bot)
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
(2) The thermal parameters are based on a 4-layer PCB according to the JESD51-5 and JESD51-7 standards.
7.5 Electrical Characteristics
VBB = 6 V to 18 V, TJ = -40°C to 150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT VOLTAGE AND CURRENT
VDSCLAMP VDS clamp voltage
VBBCLAMP VBB clamp voltage
40
58
46
76
V
V
VBB undervoltage lockout
VUVLOF
falling
Measured with respect to the GND pin of the device
Measured with respect to the GND pin of the device
2.0
2.2
3
3
V
V
VBB undervoltage lockout
VUVLOR
rising
VBB = 13.5 V, TJ = 25°C
VEN = VDIA_EN = 0 V, VOUT = 0 V
0.1
0.5
µA
Standby current (total
device leakage including
MOSFET channel)
ISB
VBB = 13.5 V, TJ = 85°C,
VEN = VDIA_EN = 0 V, VOUT = 0 V
µA
A
ILNOM
Continuous load current TAMB = 70°C
7
VBB = 13.5 V, TJ = 25°C
VEN = VDIA_EN = 0 V, VOUT = 0 V
0.01
0.1
1.5
6
µA
IOUT(standby) Output leakage current
VBB = 13.5 V, TJ = 125°C
VEN = VDIA_EN = 0 V, VOUT = 0 V
µA
Current consumption in
diagnostic mode
VBB = 13.5 V, ISNS = 0 mA
VEN = 0 V, VDIA_EN = 5 V, VOUT = 0V
IDIA
3
mA
VBB = 13.5 V
VEN = VDIA_EN = 5 V, IOUT = 0 A
IQ
Quiescent current
3
6
mA
ms
tSTBY
Standby mode delay time VEN = VDIA_EN = 0 V to standby
12
17
22
RON CHARACTERISTICS
16
16
TJ = 25°C, 6 V ≤VBB ≤28 V
TJ = 150°C, 6 V ≤VBB ≤28 V
TJ = 25°C, 3 V ≤VBB ≤6 V
TJ = 25°C, -18 V ≤VBB ≤-8 V
TJ = 105°C, -18 V ≤VBB ≤-8 V
mΩ
mΩ
mΩ
mΩ
mΩ
On-resistance
(Includes MOSFET and
package)
RON
32
30
On-resistance during
reverse polarity
RON(REV)
39
CURRENT SENSE CHARACTERISTICS
Current sense ratio
IOUT / ISNS
KSNS
IOUT = 1 A
3000
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TPS1HB16-Q1
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VBB = 6 V to 18 V, TJ = -40°C to 150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
–5
–5
–5
-6
TYP
MAX
UNIT
mA
%
2.6
IOUT = 8 A
5
5
1.000
0.333
mA
%
IOUT = 3 A
mA
%
IOUT = 1 A
5
0.101
mA
%
Current sense current
and accuracy
VEN = VDIA_EN = 5 V,
SEL1 = 0 V
ISNSI
IOUT = 300 mA
IOUT = 100 mA
IOUT = 50 mA
IOUT = 20 mA
V
6
0.03438
0.0174
0.00737
mA
%
-11
-18
-38
11
18
38
mA
%
mA
%
TJ SENSE CHARACTERISTICS
TJ = -40°C
TJ = 25°C
TJ = 85°C
TJ = 125°C
TJ = 150°C
0.01
0.72
1.25
1.61
1.80
0.12
0.85
0.38
0.98
1.79
2.31
2.70
mA
mA
Temperature sense
current
VDIA_EN = 5 V, VSEL1 = 5
V
ISNST
1.52
mA
1.96
mA
2.25
mA
dISNST/dT Coefficient
0.0112
mA/°C
SNS CHARACTERISTICS
ISNSFH
ISNS fault high-level
ISNS leakage
VDIA_EN = 5 V, VSEL1 = 0 V
VDIA_EN = 0 V
4
4.5
5.3
1
mA
µA
ISNSleak
CURRENT LIMIT CHARACTERISTICS
Version A
Version B
Version F
18
18
18
V
V
V
Short Circuit Maximum
Supply Voltage
VSC
RILIM = GND, open, or
out of range
28.6
A
Device Version A, TJ =
-40°C to 150°C
18.16
2.62
22
28
A
A
RILIM = 5 kΩ
RILIM = 25 kΩ
4.4
5.7
RILIM = GND, open, or
out of range
70
A
ICL
Current limit threshold
Device Version B, TJ =
-40°C to 150°C
40.44
8
49
9.8
60
62.4
11.76
72
A
RILIM = 5 kΩ
RILIM = 25 kΩ
TJ = 25°C
A
A
53
Device Version F
TJ = 150°C
42
47
56
A
Version A
Version B
110
245
A * kΩ
A * kΩ
KCL
Current Limit Ratio
FAULT CHARACTERISTICS
Open-load (OL) detection
VOL
VEN = 0 V, VDIA_EN = 5 V, VSEL1 = 0 V
2
3
4
V
voltage
OL and STB indication-
time from EN falling
VEN = 5 V to 0 V, VDIA_EN = 5 V, VSEL1 = 0 V
IOUT = 0 mA, VOUT = 4 V
tOL1
300
500
700
µs
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English Data Sheet: SLVSE17
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VBB = 6 V to 18 V, TJ = -40°C to 150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OL and STB indication-
time from DIA_EN rising IOUT = 0 mA, VOUT = 4 V
VEN = 0 V, VDIA_EN = 0 V to 5 V, VSEL1 = 0 V
tOL2
2
20
50
µs
OL and STB indication-
time from VOUT rising
VEN = 0 V, VDIA_EN = 5 V, VSEL1 = 0 V
IOUT = 0 mA, VOUT = 0 V to 4 V
tOL3
2
150
20
20
25
50
µs
°C
°C
TABS
THYS
Thermal shutdown
Thermal shutdown
hysteresis
30
50
3
VDIA_EN = 5 V
Time between switch shutdown and ISNS settling at
ISNSFH
Fault shutdown
indication-time
tFAULT
µs
Time from fault shutdown until switch re-enable
(thermal shutdown or current limit).
tRETRY
Retry time
1
2
ms
EN PIN CHARACTERISTICS
VIL, EN
VIH, EN
VIHYS, EN
REN
Input voltage low-level
Input voltage high-level
Input voltage hysteresis
Internal pulldown resistor
Input current low-level
Input current high-level
No GND network diode
No GND network diode
0.8
2
V
V
2.0
0.5
350
1
mV
MΩ
µA
µA
IIL, EN
VEN = 0.8 V
VEN = 5 V
0.8
5.0
IIH, EN
DIA_EN PIN CHARACTERISTICS
VIL, DIA_EN Input voltage low-level
VIH, DIA_EN Input voltage high-level
No GND network diode
No GND network diode
0.8
2
V
V
2.0
0.5
VIHYS,
Input voltage hysteresis
350
mV
DIA_EN
RDIA_EN
Internal pulldown resistor
Input current low-level
Input current high-level
1
0.8
5.0
MΩ
µA
IIL, DIA_EN
IIH, DIA_EN
VDIA_EN = 0.8 V
VDIA_EN = 5 V
µA
SEL1 PIN CHARACTERISTICS
VIL, SEL1
VIH, SEL1
Input voltage low-level
Input voltage high-level
No GND network diode
No GND network diode
0.8
2
V
V
2.0
0.5
VIHYS, SEL1 Input voltage hysteresis
350
1
mV
MΩ
µA
µA
RSEL1
Internal pulldown resistor
Input current low-level
Input current high-level
IIL, SEL1
IIH, SEL1
VSEL1 = 0.8 V
VSEL1 = 5 V
0.8
5.0
LATCH PIN CHARACTERISTICS
VIL, LATCH Input voltage low-level
No GND network diode
No GND network diode
0.8
2
V
V
VIH, LATCH Input voltage high-level
2.0
0.5
VIHYS,
Input voltage hysteresis
350
mV
LATCH
RLATCH
Internal pulldown resistor
Input current low-level
Input current high-level
1
0.8
5
MΩ
µA
IIL, LATCH
IIH, LATCH
VLATCH = 0.8 V
VLATCH = 5 V
µA
7.6 SNS Timing Characteristics
VBB = 6 V to 18 V, TJ = -40°C to +150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SNS TIMING - CURRENT SENSE
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7.6 SNS Timing Characteristics (continued)
VBB = 6 V to 18 V, TJ = -40°C to +150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VEN = 5 V, VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ, RL ≤4 Ω
tSNSION1
tSNSION2
tSNSION3
Settling time from rising edge of DIA_EN
40
200
165
20
µs
VEN = VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ, RL ≤4 Ω
Settling time from rising edge of EN and
DIA_EN
µs
µs
µs
µs
µs
VEN = 0 V to 5 V, VDIA_EN = 5 V
RSNS = 1 kΩ, RL ≤4 Ω
Settling time from rising edge of EN
VEN = 5 V, VDIA_EN = 5 V to 0 V
RSNS = 1 kΩ, RL ≤4 Ω
tSNSIOFF1 Settling time from falling edge of DIA_EN
VEN = 5 V, VDIA_EN = 5 V
RSNS = 1 kΩ, IOUT = 1 A to 5 A
tSETTLEH
tSETTLEL
Settling time from rising edge of load step
Settling time from falling edge of load step
20
VEN = 5 V, VDIA_EN = 5 V
RSNS = 1 kΩ, IOUT = 5 A to 1 A
20
SNS TIMING - TEMPERATURE SENSE
VEN = 5 V, VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ
tSNSTON1
tSNSTON2
tSNSTOFF
Settling time from rising edge of DIA_EN
40
70
20
µs
µs
µs
VEN = 0 V, VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ
Settling time from rising edge of DIA_EN
Settling time from falling edge of DIA_EN
VEN = X, VDIA_EN = 5 V to 0 V
RSNS = 1 kΩ
SNS TIMING - MULTIPLEXER
VEN = 5 V, VDIA_EN = 5 V
VSEL1 = 5 V to 0 V
RSNS = 1 kΩ, RL ≤4 Ω
Settling time from temperature sense to
current sense
60
60
µs
µs
tMUX
VEN = 5 V, VDIA_EN = 5 V
VSEL1 = 0 V to 5 V
RSNS = 1 kΩ, RL ≤4 Ω
Settling time from current sense to
temperature sense
7.7 Switching Characteristics
VBB = 13.5 V, TJ = -40°C to +150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VBB = 13.5 V, RL ≤4 Ω, 50% EN
rising to 10% VOUT rising
tDR
Turnon delay time (from Active)
20
60
60
100
100
0.7
0.7
µs
VBB = 13.5 V, RL ≤4 Ω, 50% EN
falling to 90% VOUT Falling
tDF
Turnoff delay time
20
0.1
0.1
µs
VBB = 13.5 V, 20% to 80% of VOUT
RL ≤4 Ω
,
,
SRR
SRF
VOUT rising slew rate
VOUT falling slew rate
0.4
0.4
V/µs
V/µs
VBB = 13.5 V, 80% to 20% of VOUT
RL ≤4 Ω
VBB = 13.5 V, RL ≤4 Ω, 50% EN
rising to 80% VOUT rising
tON
Turnon time (active)
Turnoff time
39
39
94
94
0
235
235
25
µs
µs
%
tOFF
VBB = 13.5 V, RL ≤4 Ω
200-µs enable pulse, VS = 13.5 V, RL
= 4 Ω
PWM accuracy - average load
current
ΔPWM
tON - tOFF
EON
–25
–85
Turnon and turnoff matching
200-us enable pulse
0
85
µs
mJ
Switching energy losses during
turnon
0.7
VBB = 13.5 V, RL ≤4 Ω
Switching energy losses during
turnoff
EOFF
0.7
mJ
VBB = 13.5 V, RL ≤4 Ω
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7.8 Typical Characteristics
35
30
25
20
15
10
5
4.5
4
6 V
8 V
13.5 V
18 V
3.5
3
2.5
2
1.5
1
0.5
0
0
1E-6 1E-5 0.0001
0.01 0.1
Time (s)
1 2 510
100 1000
-40 -20
0
20
40
60
80 100 120 140 160
Temperature (èC)
图7-1. Transient Thermal Impedance
VOUT = 0 V
VEN = 0 V
VDIAG_EN = 0 V
图7-2. Standby Current (ISB) vs Temperature
4.35
4.3
28
6 V
8 V
13.5 V
18 V
6 V
8 V
13.5 V
18 V
26
24
22
20
18
16
14
12
4.25
4.2
4.15
4.1
4.05
4
3.95
3.9
3.85
3.8
3.75
3.7
-40 -20
0
20
40
60
80 100 120 140 160
-40
-20
0
20
40
60
80
100 120 140
Temperature (èC)
Temperature (èC)
IOUT = 0 A
VEN = 5 V
VSEL1 = 0 V
VDIAG_EN = 5 V
IOUT = 200 mA
VEN = 5 V
VDIAG_EN = 0 V
RSNS = 1 kΩ
RSNS = 1 kΩ
图7-3. Quiescent Current (IQ) vs Temperature
图7-4. On Resistance (RON) vs Temperature
30
27.5
25
80
6 V
8 V
13.5 V
18 V
76
72
68
22.5
20
64
60
56
52
48
44
40
17.5
15
12.5
10
-40èC
25èC
65èC
85èC
105èC
125èC
7.5
5
2.5
5
7.5 10 12.5 15 17.5 20 22.5 25 27.5 30
VBB (V)
-40
-20
0
20
40
60
80
100 120 140
Temperature (èC)
IOUT = 200 mA
VEN = 5 V
VDIAG_EN = 0 V
VEN = 0 V to 5 V
VBB = 13.5 V
VDIAG_EN = 0 V
ROUT = 2.6 Ω
RSNS = 1 kΩ
VBB = 13.5 V
RSNS = 1 kΩ
图7-5. On Resistance (RON) vs VBB
图7-6. Turn-on Delay Time (tDR) vs Temperature
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7.8 Typical Characteristics (continued)
60
0.4
0.375
0.35
6 V
8 V
13.5 V
18 V
6 V
8 V
13.5 V
18 V
58
56
54
52
50
48
46
44
42
40
0.325
0.3
0.275
0.25
0.225
0.2
0.175
0.15
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
Temperature (èC)
Temperature (èC)
VEN = 5 V to 0 V
VBB = 13.5 V
VDIAG_EN = 0 V
VEN = 0 V to 5 V
VBB = 13.5 V
VDIAG_EN = 0 V
ROUT = 2.6 Ω
RSNS = 1 kΩ
ROUT = 2.6 Ω
RSNS = 1 kΩ
图7-7. Turn-off Delay Time (tDF) vs Temperature
图7-8. VOUT Slew Rate Rising (SRR) vs Temperature
0.4
150
140
130
120
6 V
8 V
6 V
8 V
13.5 V
18 V
0.375
13.5 V
0.35
18 V
0.325
0.3
0.275
0.25
110
100
90
0.225
0.2
80
70
0.175
0.15
60
50
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
Temperature (èC)
Temperature (èC)
VEN = 5 V to 0 V
VBB = 13.5 V
VDIAG_EN = 0 V
VEN = 0 V to 5 V
VBB = 13.5 V
VDIAG_EN = 0 V
ROUT = 2.6 Ω
RSNS = 1 kΩ
ROUT = 2.6 Ω
RSNS = 1 kΩ
图7-9. VOUT Slew Rate Falling (SRF) vs Temperature
图7-10. Turn-on Time (tON) vs Temperature
150
140
130
120
40
38
36
34
32
30
28
6 V
8 V
13.5 V
18 V
110
100
90
80
6 V
8 V
26
70
13.5 V
18 V
24
22
60
50
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
Temperature (èC)
Temperature (èC)
VEN = 5 V to 0 V
VBB = 13.5 V
VDIAG_EN = 0 V
VEN = 0 V to 5 V
and 5 V to 0 V
VBB = 13.5 V
VDIAG_EN = 0 V
ROUT = 2.6 Ω
RSNS = 1 kΩ
ROUT = 2.6 Ω
RSNS = 1 kΩ
图7-11. Turn-off Time (tOFF) vs Temperature
图7-12. Turn-on and Turn-off Matching (tON - tOFF) vs
Temperature
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7.8 Typical Characteristics (continued)
2.8
2.6
2.4
2.2
2
2.8
2.6
2.4
2.2
2
1.8
1.6
1.4
1.2
1
1.8
1.6
1.4
1.2
1
-40èC
6 V
8 V
13.5 V
18 V
24 V
28 V
25èC
65èC
85èC
105èC
125èC
0.8
0.6
0.4
0.2
0
0.8
0.6
0.4
0.2
0
0
1
2
3
4
IOUT (A)
5
6
7
8
0
1
2
3
4
IOUT (A)
5
6
7
8
VSEL = 0 V
RSNS = 1 kΩ
VEN = 5 V
VDIAG_EN = 5 V
VSEL = 0 V
RSNS = 1 kΩ
VEN = 5 V
TA = 25°C
VDIAG_EN = 5 V
VBB = 13.5 V
图7-13. Current Sense Output Current (ISNSI ) vs Load Current
图7-14. Current Sense Output Current (ISNSI) vs Load Current
(IOUT) Across Temperature
(IOUT) Across VBB
2.2
4.9
6 V
8 V
13.5 V
18 V
6 V
8 V
13.5 V
18 V
2
4.85
4.8
1.8
1.6
1.4
1.2
1
4.75
4.7
4.65
4.6
0.8
0.6
0.4
0.2
0
4.55
4.5
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
Temperature (èC)
Temperature (èC)
VSEL = 5 V
RSNS = 1 kΩ
VEN = 0 V
VDIAG_EN = 5 V
VSEL = 0 V
RSNS = 500 Ω
VEN = 0 V
VDIAG_EN = 5 V
VOUT Floating
图7-15. Temperature Sense Output Current (ISNST) vs
图7-16. Fault High Output Current (ISNSFH) vs Temperature
Temperature
2
1.95
1.9
1.59
6 V
8 V
13.5 V
18 V
1.57
1.55
1.53
1.51
1.49
1.47
1.45
1.43
1.41
1.39
1.85
1.8
1.75
1.7
1.65
6 V
1.6
8 V
13.5 V
1.55
18 V
1.5
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
Temperature (èC)
Temperature (èC)
VEN = 3.3 V to 0 V
VOUT = 0 V
VDIAG_EN = 0 V
VEN = 0 V to 3.3 V
VOUT = 0 V
VDIAG_EN = 0 V
ROUT = 1 kΩ
ROUT = 1 kΩ
图7-17. VIL vs Temperature
图7-18. VIH vs Temperature
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7.8 Typical Characteristics (continued)
500
1.15
1.1
6 V
8 V
13.5 V
18 V
6 V
8 V
13.5 V
18 V
490
480
470
460
450
440
430
420
410
400
390
380
370
360
350
1.05
1
0.95
0.9
0.85
0.8
0.75
0.7
0.65
0.6
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
Temperature (èC)
Temperature (èC)
VEN = 0 V to 3.3 V
and 3.3 V to 0 V
ROUT = 1 kΩ
VOUT = 0 V
VDIAG_EN = 0 V
VEN = 0.8 V
VOUT = 0 V
VDIAG_EN = 0 V
ROUT = 1 kΩ
图7-20. IIL vs Temperature
图7-19. VHYST vs Temperature
7.5
7
6 V
8 V
13.5 V
18 V
6.5
6
5.5
5
4.5
4
3.5
-40
-20
0
20
40
60
80
100 120 140
Temperature (èC)
VEN = 5 V
ROUT = 1 kΩ
图7-21. IIH vs Temperature
VOUT = 0 V
VDIAG_EN = 0 V
VDIA_EN = 5 V
ROUT = 2.6 Ω
VSEL = 0 V
图7-22. Turn-on Time (tON
RSNS = 1 kΩ
)
VDIA_EN = 5 V
VSEL = 0 V
ROUT = 2.6 Ω
VSEL = 0 V
图7-23. Turn-off Time (tOFF
RSNS = 1 kΩ
ROUT = 2.6 Ω
IOUT = 1 A to 5 A
RSNS = 1 kΩ
VBB = 13.5 V
)
图7-24. ISNS Settling time (tSNSION1) on Load Step
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7.8 Typical Characteristics (continued)
VBB = 13.5 V
TA = 25°C
IOUT1 = 5 A
LOUT = 5 µH to
GND
VSEL = 0 V
TA = 25°C
RLIM = 5 kΩ
VEN = 0 V to 5 V
VEN = 0 V to 5 V
VDIAG_EN = 5 V
图7-25. SNS Output Current Measurement Enable on DIAG_EN
PWM
图7-26. Device Version A Short Circuit Event
VBB = 13.5 V
TA = 25°C
LOUT = 5 mH
LOUT = 5 µH to
GND
VSEL = 0 V
TA = 25°C
RLIM = 5 kΩ
图7-28. 5-mH Inductive Load Demagnetization
VEN = 0 V to 5 V
VDIAG_EN = 5 V
图7-27. Device Version B Short Circuit Event
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8 Parameter Measurement Information
IEN
EN
IVBB
VBB
IDIAG_EN
DIAG_EN
FLT
IFLT
ILATCH
ISNS
IILIM
VOUT
IOUT
LATCH
SNS
ILIM
GND
图8-1. Parameter Definitions
(1)
VEN
50%
50%
90%
90%
tDR
tDF
VOUT
10%
10%
tON
tOFF
Rise and fall time of VEN is 100 ns.
图8-2. Switching Characteristics Definitions
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VEN
VDIA_EN
IOUT
ISNS
tSNSION1
tSNSION2
tSNSION3
tSNSIOFF1
VEN
VDIA_EN
IOUT
ISNS
tSETTLEH
tSETTLEL
VEN
VDIA_EN
TJ
ISNS
tSNSTON1
tSNSTON2
tSNSTOFF
Rise and fall times of control signals are 100 ns. Control signals include: EN, DIA_EN.
图8-3. SNS Timing Characteristics Definitions
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9 Detailed Description
9.1 Overview
The TPS1HB16-Q1 device is a single-channel smart high-side switch intended for use with 12-V automotive
batteries. Many protection and diagnostic features are integrated in the device.
Diagnostics features include the analog SNS output that is capable of providing a signal that is proportional to
load current or device temperature. The high-accuracy load current sense allows for diagnostics of complex
loads.
This device includes protection through thermal shutdown, current limiting, transient withstand, and reverse
battery operation. For more details on the protection features, refer to the Feature Description and Application
Information sections of the document.
The TPS1HB16-Q1 is one device in a family of TI high side switches. For each device, the part number indicates
elements of the device behavior. 图9-1 gives an example of the device nomenclature.
TPS
2
H
B
16
X
Q
PWPR
Q1
Prefix
Auto Qual
Packaging
No. of channels
12V HSS
H
AEC Temp Grade
Version
Generation
RON (mΩ)
图9-1. Naming Convention
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9.2 Functional Block Diagram
9.3 Feature Description
9.3.1 Protection Mechanisms
The TPS1HB16-Q1 is designed to operate in the automotive environment. The protection mechanisms allow the
device to be robust against many system-level events such as load dump, reverse battery, short-to-ground, and
more.
There are two protection features which, if triggered, will cause the switch to automatically disable:
• Thermal Shutdown
• Current Limit
When any of these protections are triggered, the device will enter the FAULT state. In the FAULT state, the fault
indication will be available on the SNS pin (see the Diagnostic Mechanisms section of the data sheet for more
details).
The switch is no longer held off and the fault indication is reset when all of the below conditions are met:
• LATCH pin is low
• tRETRY has expired
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• All faults are cleared (thermal shutdown, current limit)
9.3.1.1 Thermal Shutdown
The TPS1HB16-Q1 includes a temperature sensor on the power FET and also within the controller portion of the
device. There are two cases that the device will consider to be a thermal shutdown fault:
• TJ,FET > TABS
• (TJ,FET –TJ,controller) > TREL
After the fault is detected, the switch will turn off. If TJ,FET passes TABS, the fault is cleared when the switch
temperature decreases by the hysteresis value, THYS. If instead the TREL threshold is exceeded, the fault is
cleared after TRETRY passes.
9.3.1.2 Current Limit
When IOUT reaches the current limit threshold, ICL, the channel will switch off immediately. The ICL value will vary
with slew rate and a fast current increase that occurs during a powered-on short circuit can temporarily go above
the specified ICL value. When the switch is in the FAULT state, it will output an output current ISNSFH on the SNS
pin .
During a short-circuit event, the device will hit the ICL value that is listed in the Electrical Characteristics table (for
the given device version and RILIM) and then turn the output off to protect the device. The device will register a
short-circuit event when the output current exceeds ICL, however, the measured maximum current can exceed
the ICL value due to the TPS1HB16-Q1 deglitch filter and turn-off time. This deglitch time is defined at 3 µs, so
use the test setup described in the AEC-Q100-012 Short Circuit Reliability section, and take 3 µs before the
peak value as the ICL. The device is assured to protect itself during a short-circuit event over the nominal supple
voltage range (as defined in the Electrical Characteristics table) at 125°C.
9.3.1.2.1 Current Limit Foldback
Version B of the TPS1HB16-Q1 implements a current limit foldback feature that is designed to protect the device
in the case of a long-term fault condition. If the device undergoes fault shutdown events (either of thermal
shutdown or current limit) seven consecutive times, the current limit will be reduced to half of the original value.
The device will revert back to the original current limit threshold if either of the following occurs:
• The device goes to standby mode.
• The switch turns on and turns off without any fault occurring.
Version A does not implement the current limit foldback due to the lower current limit causing less harm during
repetitive long-term faults.
9.3.1.2.2 Programmable Current Limit
All versions of the TPS1HB16-Q1 include an adjustable current limit. Some applications (for example,
incandescent bulbs) will require a high current limit while other applications can benefit from a lower current limit
threshold. In general, wherever possible a lower current limit is recommended due to allowing system
advantages through:
• Reduced size and cost in current carrying components such as PCB traces and module connectors
• Less disturbance at the power supply (VBB pin) during a short-circuit event
• Improved protection of the downstream load
To set the current limit threshold, connect a resistor from ILIM to VBB. The current limit threshold is determined by
Equation 1 (RILIM in kΩ):
ICL = KCL / RILIM
(1)
The RILIM range is between 5 kΩ and 25 kΩ . An RILIM resistor is required, however in the fault case where the
pin is floating, grounded, or outside of this range the current limit will default to an internal level that is defined in
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the Specifications section of this document. If RILIM is out of this range, the device cannot assure complete short-
circuit protection.
备注
Capacitance on the ILIM pin can cause ILIM to go out of range during short-circuit events. For accurate
current limiting, place RILIM near to the device with short traces to ensure < 5-pF capacitance to GND
on the ILIM pin.
9.3.1.2.3 Undervoltage Lockout (UVLO)
The device monitors the supply voltage VBB to prevent unpredicted behaviors in the event that the supply
voltage is too low. When the supply voltage falls down to VUVLOF, the output stage is shut down automatically.
When the supply rises up to VUVLOR, the device turns back on.
During an initial ramp of VBB from 0 V at a ramp rate slower than 1 V/ms, VEN pin will have to be held low until
VBB is above UVLO threshold (with respect to board ground) and the supply voltage to the device has reliably
reached above the UVLO condition. For best operation, ensure that VBB has risen above UVLO before setting
the VEN pin to high.
9.3.1.2.4 VBB During Short-to-Ground
When VOUT is shorted to ground, the module power supply (VBB) can have a transient decrease. This decrease
is caused by the sudden increase in current flowing through the wiring harness cables. To achieve ideal system
behavior, TI recommends that the module maintain VBB > 3 V (above the maximum VUVLOF) during VOUT short-
to-ground. This maintenance is typically accomplished by placing bulk capacitance on the power supply node.
9.3.1.3 Voltage Transients
The TPS1HB16-Q1 device contains two types of voltage clamps which protect the FET against system-level
voltage transients. The two different clamps are shown in 图9-2.
The clamp from VBB to GND is primarily used to protect the controller from positive transients on the supply line
(for example, ISO7637-2). The clamp from VBB to VOUT is primarily used to limit the voltage across the FET
when switching off an inductive load. If the voltage potential from VBB to GND exceeds the VBB clamp level, the
clamp will allow current to flow through the device from VBB to GND (path 2). If the voltage potential from VBB to
VOUT exceeds the clamping voltage, the power FET will allow current to flow from VBB to VOUT (path 3).
Additional capacitance from VBB to GND can increase the reliability of the system during ISO 7637 pulse 2-A
testing.
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Ri
Positive Supply Transient
(e.g. ISO7637 pulse 2a/3b)
(1)
VBB
VDS
Clamp
(3)
(2)
Controller
VBB
Clamp
VOUT
Load
GND
图9-2. Current Path During Supply Voltage Transient
9.3.1.3.1 Load Dump
The TPS1HB16-Q1 device is tested according to ISO 16750-2:2010(E) suppressed load dump pulse. The device
supports up to 40-V load dump transient and will maintain normal operation during the load dump pulse. If the
switch is enabled, it will stay enabled and if the switch is disabled, it will stay disabled.
9.3.1.3.2 Driving Inductive Loads
When switching off an inductive load, the inductor can impose a negative voltage on the output of the switch.
The TPS1HB16-Q1 includes a voltage clamp to limit voltage across the FET. The maximum acceptable load
inductance is a function of the device robustness.
图9-3. TPS1HB16-Q1 Inductive Discharge (5 mH)
For more information on driving inductive loads, refer to TI's How To Drive Inductive, Capacitive, and Lighting
Loads With Smart High Side Switches application report.
9.3.1.4 Reverse Battery
In the reverse battery condition, the switch will automatically be enabled regardless of the state of EN to prevent
excess power dissipation inside the MOSFET body diode. In many applications (for example, resistive loads),
the full load current can be present during reverse battery. In order to activate the automatic switch on feature,
SEL must have a path to ground from either from the MCU or it needs to be tied to ground through RPROT if
unused.
There are two options for blocking reverse current in the system. The first option is to place a blocking device
(FET or diode) in series with the battery supply, blocking all current paths. The second option is to place a
blocking diode in series with the GND node of the high-side switch. This method will protect the controller portion
of the switch (path 2), but it will not prevent current from flowing through the load (path 3). The diode used for the
second option can be shared amongst multiple high-side switches.
Path 1 shown in 图9-4 is blocked inside of the device.
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Reverse blocking
FET or diode
Option 1
BAT
VBB
0V
µC
VDD
(3)
(2)
Controller
VOUT
GPIO
GPIO
VBB
Clamp
Load
RPROT
(1)
GND
Option 2
13.5V
图9-4. Current Path During Reverse Battery
For more information on reverse battery protection, refer to TI's Reverse Battery Protection for High Side
Switches application note.
9.3.1.5 Fault Event –Timing Diagrams
备注
All timing diagrams assume that the SEL1 pin is low.
The LATCH, DIA_EN, and EN pins are controlled by the user. The timing diagrams represent a
possible use-case.
图 9-5 shows the immediate current limit switch off behavior. The diagram also illustrates the retry behavior. As
shown, the switch will remain latched off until the LATCH pin is low.
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µC resets
the latch
LATCH
DIA_EN
ISNSFH
Current
Sense
High-z
Current
Sense
High-z
High-z
High-z
SNS
VOUT
EN
ICL
tRETRY
IOUT
t
Switch follows EN. Normal
operation.
Load reaches limit.
Switch is Disabled.
图9-5. Current Limit –Version A and B - Latched Behavior
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图 9-6 shows the immediate current limit switch off behavior. In this example, LATCH is tied to GND; hence, the
switch will retry after the fault is cleared and tRETRY has expired.
DIA_EN
ISNSFH
Current
Sense
Current
Sense
High-z
High-z
High-z
High-z
SNS
VOUT
EN
ICL
tRETRY
IOUT
t
Switch follows EN. Normal
operation.
Load reaches limit.
Switch is Disabled.
图9-6. Current Limit - Version A and B - LATCH = 0
When the switch retries after a shutdown event, the SNS fault indication will remain until VOUT has risen to VBB
– 1.8 V. After VOUT has risen, the SNS fault indication is reset and current sensing is available. If there is a
short-to-ground and VOUT is not able to rise, the SNS fault indication will remain indefinitely. 图 9-7 illustrates
auto-retry behavior and provides a zoomed-in view of the fault indication during retry.
备注
图9-7 assumes that tRETRY has expired by the time that TJ reaches the hysteresis threshold.
LATCH = 0 V and DIA_EN = 5 V
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ISNSFH
ISNSFH
ISNSFH
ISNSFH
SNS
VOUT
EN
TABS
THYS
TJ
t
ISNSFH
ISNSI
SNS
VBB t 1.8 V
VOUT
EN
TABS
THYS
TJ
t
图9-7. Fault Indication During Retry
9.3.2 Diagnostic Mechanisms
9.3.2.1 VOUT Short-to-Battery and Open-Load
The TPS1HB16-Q1 is capable of detecting short-to-battery and open-load events regardless of whether the
switch is turned on or off, however the two conditions use different methods.
9.3.2.1.1 Detection With Switch Enabled
When the switch is enabled, the VOUT short-to-battery and open-load conditions can be detected by the current
sense feature. In both cases, the load current will be measured through the SNS pin as below the expected
value.
9.3.2.1.2 Detection With Switch Disabled
While the switch is disabled, if DIA_EN is high, an internal comparator will detect the condition of VOUT. If the
load is disconnected (open load condition) or there is a short to battery the VOUT voltage will be higher than the
open load threshold (VOL,off) and a fault is indicated on the SNS pin. An internal pull-up of 1 MΩis in series with
an internal MOSFET switch, so no external component is required if a completely open load must be detected.
However, if there is significant leakage or other current draw even when the load is disconnected, a lower value
pull-up resistor and switch can be added externally to set the VOUT voltage above the VOL,off during open load
conditions.
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This figure assumes that the device ground and the load ground are at the same potential. In a real system, there can be a ground shift
voltage of 1 V to 2 V.
图9-8. Short to Battery and Open Load Detection
The detection circuitry is only enabled when DIA_EN = HIGH and EN = LOW. If VOUT > VOL, the SNS pin will go
to the fault level, but if VOUT < VOL there will be no fault indication. The fault indication will only occur if the SEL1
pin is low.
While the switch is disabled and DIA_EN is high, the fault indication mechanisms will continuously represent the
present status. For example, if VOUT decreases from greater than VOL to less than VOL, the fault indication is
reset. Additionally, the fault indication is reset upon the falling edge of DIA_EN or the rising edge of EN.
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DIA_EN
ISNSFH
High-z
High-z
SNS
tOL2
Enabled
VOUT depends on external conditions
VOL
VOUT
EN
t
Switch is disabled and DIA_EN goes
high.
The condition is determined by the
internal comparator.
The open-load fault is
indicated.
Device standby
图9-9. Open Load
9.3.2.2 SNS Output
The SNS output can be used to sense the load current if the SEL1 pin is low and there is no fault or device
temperature if the SEL1 pin is high and there is no fault. The sense circuit will provide a current that is
proportional to the selected parameter. This current will be sourced into an external resistor to create a voltage
that is proportional to the selected parameter. This voltage can be measured by an ADC or comparator. In
addition, the SNS pin can be used to measure the FET temperature.
To ensure accurate sensing measurement, the sensing resistor must be connected to the same ground potential
as the μC ADC.
表9-1. Analog Sense Transfer Function
PARAMETER
TRANSFER FUNCTION
ISNSI = IOUT / KSNS = IOUT / 3000
ISNST = (TJ –25°C) × dISNST / dT + 0.85
Load current
Device temperature
The SNS output will also be used to indicate system faults. ISNS will go to the predefined level, ISNSFH, when
there is a fault. ISNSFH, dISNST/dT, and KSNS are defined in the Specifications section.
9.3.2.2.1 RSNS Value
The following factors must be considered when selecting the RSNS value:
• Current sense ratio (KSNS
)
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• Largest and smallest diagnosable load current required for application operation
• Full-scale voltage of the ADC
• Resolution of the ADC
For an example of selecting RISNS value, reference RILIM Calculation in the applications section of this data
sheet.
9.3.2.2.1.1 High Accuracy Load Current Sense
In many automotive modules, it is required that the high-side switch provide diagnostic information about the
downstream load. With more complex loads, high accuracy sensing is required. A few examples follow:
• LED lighting: In many architectures, the body control module (BCM) must be compatible with both
incandescent bulbs and also LED modules. The bulb can be relatively simple to diagnose. However, the LED
module will consume less current and also can include multiple LED strings in parallel. The same BCM is
used in both cases, so the high-side switch can accurately diagnose both load types.
• Solenoid protection: Often solenoids are precisely controlled by low-side switches. However, in a fault
event, the low-side switch cannot disconnect the solenoid from the power supply. A high-side switch can be
used to continuously monitor several solenoids. If the system current becomes higher than expected, the
high-side switch can disable the module.
9.3.2.2.1.2 SNS Output Filter
To achieve the most accurate current sense value, TI recommends to filter the SNS output. There are two
methods of filtering:
• Low-Pass RC filter between the SNS pin and the ADC input. This filter is illustrated in Figure 10-1 with typical
values for the resistor and capacitor. The designer must select a CSNS capacitor value based on system
requirements. A larger value will provide improved filtering but a smaller value will allow for faster transient
response.
• The ADC and microcontroller can also be used for filtering. TI recommends that the ADC collects several
measurements of the SNS output. The median value of this data set must be considered as the most
accurate result. By performing this median calculation, the microcontroller can filter out any noise or outlier
data.
9.3.2.3 Fault Indication and SNS Mux
The following faults will be communicated through the SNS output:
• Switch shutdown, due to:
– Thermal Shutdown
– Current limit
• Open-Load and VOUT shorted-to-battery
Open-load and Short-to-battery are not indicated while the switch is enabled, although these conditions can still
be detected through the sense current. Hence, if there is a fault indication while the channel is enabled, then it
must be either due to an overcurrent or overtemperature event.
The SNS pin will only indicate the fault if the SEL1 pins is low. When the SEL1 pin is high and the device is set to
measure temperature, the pin will be measuring the channel FET temperature.
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表9-2. Device Version A/B SNS Mux
INPUTS
OUTPUTS
SNS
DIA_EN
SEL1
FAULT DETECT(1)
0
1
1
1
1
X
0
1
0
1
X
0
0
1
1
High-z
Output current
Device temperature
ISNSFH
Device temperature
(1) Fault Detect encompasses multiple conditions:
•
•
Switch shutdown and waiting for retry
Open Load and Short To Battery
For device version F, the SEL1 pin has no functionality so the device cannot output a temperature sense current.
In this case, SEL1 must be connected to ground through an RPROT resistor and the SNS behavior will follow the
table below.
表9-3. Device Version F SNS Mux
INPUTS
OUTPUTS
DIA_EN
SEL1
FAULT DETECT(1)
SNS
High-z
FLT (2)
High-z
0
1
1
X
X
X
X
0
1
Output current
ISNSFH
High-z
Open-drain
(1) Fault Detect encompasses multiple conditions:
•
•
Switch shutdown and waiting for retry
Open Load / Short To Battery
(2) Version F Only
9.3.2.4 Resistor Sharing
Multiple high-side devices can use the same SNS resistor as shown in 图 9-10. This action reduces the total
number of passive components in the system and the number of ADC terminals that are required of the
microcontroller.
Microcontroller
GPIO
GPIO
GPIO
DIA_EN
DIA_EN
DIA_EN
DIA_EN
Switch 1
Switch 2
Switch 3
Switch 4
SNS
SNS
SNS
SNS
GPIO
ADC
RPROT
CSNS
RSNS
图9-10. Sharing RSNS Among Multiple Devices
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9.3.2.5 High-Frequency, Low Duty-Cycle Current Sensing
Some applications will operate with a high-frequency, low duty-cycle PWM or require fast settling of the SNS
output. For example, a 250-Hz, 5% duty cycle PWM will have an on-time of only 200 µs that must be
accommodated. The micro-controller ADC can sample the SNS signal after the defined settling time tSNSION3
.
DIA_EN
EN
IOUT
SNS
t
t
SNSION3
图9-11. Current Sensing in Low-Duty Cycle Applications
9.4 Device Functional Modes
During typical operation, the TPS1HB16-Q1 can operate in a number of states that are described below and
shown as a state diagram in 图9-12.
9.4.1 Off
Off state occurs when the device is not powered.
9.4.2 Standby
Standby state is a low-power mode used to reduce power consumption to the lowest level. Diagnostic
capabilities are not available in Standby mode.
9.4.3 Diagnostic
Diagnostic state can be used to perform diagnostics while the switch is disabled.
9.4.4 Standby Delay
The Standby Delay state is entered when EN and DIA_EN are low. After tSTBY, if the EN and DIA_EN pins are
still low, the device will go to Standby State.
9.4.5 Active
In Active state, the switch is enabled. The diagnostic functions can be turned on or off during Active state.
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9.4.6 Fault
The Fault state is entered if a fault shutdown occurs (thermal shutdown or current limit). After all faults are
cleared, the LATCH pin is low, and the retry timer has expired, the device will transition out of Fault state. If the
EN pin is high, the switch will re-enable. If the EN pin is low, the switch will remain off.
VBB < UVLO
OFF
ANY STATE
VBB > UVLO
EN = Low
DIA_EN = Low
t > tSTBY
STANDBY
EN = Low
DIA_EN = High
EN = Low
DIA_EN = Low
EN = High
DIA_EN = X
DIAGNOSTIC
STANDBY DELAY
EN = Low
DIA_EN = High
EN = Low
DIA_EN = High
EN = High
DIA_EN = X
ACTIVE
EN = Low
DIA_EN = Low
EN = High
DIA_EN = X
!OT_ABS & !OT_REL & !ILIM
& LATCH = Low & tRETRY
expired
OT_ABS || OT_REL ||
ILIM
FAULT
图9-12. State Diagram
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10 Application and Implementation
备注
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes. Customers must validate and test their design
implementation to confirm system functionality.
10.1 Application Information
图 10-1 shows the schematic of a typical application for version A or B of the TPS1HB16-Q1. It includes all
standard external components. This section of the data sheet discusses the considerations in implementing
commonly required application functionality. Version F of the device will replace the ILIM pin with the open drain
FLT pin. In this case, the FLT pin must be connected to a 5-V rail through a 10-kΩpull up resistor.
CVBB1 CVBB2
VBB
DIA_EN
SEL1
+
RPROT
BAT
œ
RPROT
GND
RGND
DGND
(1)
EN
RPROT
Microcontroller
(1)
LATCH
RPROT
VBB
Optional
CGND
Load
VOUT
RILIM
COUT
ILIM
SNS
Legend
ADC
RPROT
Chassis GND
Module GND
Device GND
RSNS
CSNS
(1) With the ground protection network, the
device ground will be offset relative to the
microcontroller ground.
With the ground protection network, the device ground will be offset relative to the microcontroller ground.
图10-1. System Diagram
表10-1. Recommended External Components
COMPONENT
RPROT
RSNS
TYPICAL VALUE
PURPOSE
Protect microcontroller and device I/O pins.
15 kΩ
Translate the sense current into sense voltage.
Low-pass filter for the ADC input.
1 kΩ
CSNS
100 pF –10 nF
4.7 kΩ
RGND
Stabilize GND potential during turn-off of inductive load.
Protects device during reverse battery.
Set current limit threshold.
DGND
BAS21 Diode
5 kΩ–25 kΩ
RILIM
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表10-1. Recommended External Components (continued)
COMPONENT
TYPICAL VALUE
PURPOSE
Filtering of voltage transients (for example, ESD, ISO7637-2) and improved
emissions.
CVBB1
4.7 nF to Device GND
CVBB2
COUT
220 nF to Module GND Stabilize the input supply and filter out low frequency noise.
220 nF Filtering of voltage transients (for example, ESD, ISO7637-2).
10.1.1 Ground Protection Network
As discussed in the Reverse Battery section, DGND can be used to prevent excessive reverse current from
flowing into the device during a reverse battery event. Additionally, RGND is placed in parallel with DGND if the
switch is used to drive an inductive load. The ground protection network (DGND and RGND) can be shared
amongst multiple high-side switches.
A minimum value for RGND can be calculated by using the absolute maximum rating for IGND. During the reverse
battery condition, IGND = VBB / RGND
:
RGND ≥VBB / IGND
(2)
• Set VBB = –13.5 V
• Set IGND = –50 mA (absolute maximum rating)
RGND ≥–13.5 V / –50 mA = 270 Ω
In this example, it is found that RGND must be at least 270 Ω. It is also necessary to consider the power
dissipation in RGND during the reverse battery event:
PRGND = VBB 2 / RGND
(3)
PRGND = (13.5 V)2 / 270 Ω = 0.675 W
In practice, RGND can not be rated for such a high power. In this case, a larger resistor value must be selected.
10.1.2 Interface With Microcontroller
The ground protection network will cause the device ground to be at a higher potential than the module ground
(and microcontroller ground). This offset will impact the interface between the device and the microcontroller.
Logic pin voltage will be offset by the forward voltage of the diode. For input pins (for example, EN), the designer
must consider the VIH specification of the switch and the VOH specification of the microcontroller. For a system
that does not include DGND, it is required that VOH > VIH. For a system that does include DGND, it is required that
VOH > (VIH + VF). VF is the forward voltage of DGND
.
The sense resistor, RSNS, must be terminated to the microcontroller ground. In this case, the ADC can accurately
measure the SNS signal even if there is an offset between the microcontroller ground and the device ground.
10.1.3 I/O Protection
RPROT is used to protect the microcontroller I/O pins during system-level voltage transients such as ISO pulses
or reverse battery. The SNS pin voltage can exceed the ADC input pin maximum voltage if the fault or saturation
current causes a high enough voltage drop across the sense resistor. If that can occur in the design (for
example, by switching to a high value RSNS to improve ADC input level), then an appropriate external clamp has
to be designed to prevent a high voltage at the SNS output and the ADC input.
10.1.4 Inverse Current
Inverse current occurs when 0 V < VBB < VOUT. In this case, current can flow from VOUT to VBB. Inverse current
cannot be caused by a purely resistive load. However, a capacitive or inductive load can cause inverse current.
For example, if there is a significant amount of load capacitance and the VBB node has a transient droop, VOUT
can be greater than VBB
.
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The TPS1HB16-Q1 will not detect inverse current. When the switch is enabled, inverse current will pass through
the switch. When the switch is disabled, inverse current can pass through the MOSFET body diode. The device
will continue operating in the normal manner during an inverse current event.
10.1.5 Loss of GND
The ground connection can be lost either on the device level or on the module level. If the ground connection is
lost, the switch will be disabled. If the switch was already disabled when the ground connection was lost, the
switch will remain disabled. When the ground is reconnected, normal operation will resume.
10.1.6 Automotive Standards
The TPS1HB16-Q1 is designed to be protected against all relevant automotive standards to ensure reliable
operations when connected to a 12-V automotive battery.
10.1.6.1 ISO7637-2
The TPS1HB16-Q1 is tested according to the ISO7637-2:2011 (E) standard. The test pulses are applied both
with the switch enabled and disabled. The test setup includes only the DUT and minimal external components:
CVBB, COUT, DGND, and RGND
.
Status II is defined in ISO 7637-1 Function Performance Status Classification (FPSC) as: “The function does
not perform as designed during the test but returns automatically to normal operation after the test”. See 表
10-2 for ISO7637-2:2011 (E) expected results.
表10-2. ISO7637-2:2011 (E) Results
TEST PULSE SEVERITY LEVEL WITH
STATUS II FUNCTIONAL PERFORMANCE
MINIMUM NUMBER
OF PULSES OR TEST
TIME
BURST CYCLE / PULSE REPETITION TIME
TEST
PULSE
LEVEL
US
MINIMUM
0.5 s
MAXIMUM
1
2a(1)
2b
III
III
IV
IV
IV
500 pulses
500 pulses
10 pulses
1 hour
–112 V
+55 V
—
5 s
0.20
+10 V
0.5 s
5 s
3a
90 ms
90 ms
100 ms
100 ms
–220 V
+150 V
3b
1 hour
(1) 1-µF capacitance on CVBB is required for passing level 3 ISO7637 pulse 2 A.
10.1.6.2 AEC-Q100-012 Short Circuit Reliability
The TPS1HB16-Q1 is tested according to the AEC-Q100-012 Short Circuit Reliability standard. This test is
performed to demonstrate the robustness of the device against VOUT short-to-ground events. Test conditions and
test procedures are summarized in 表10-3. For further details, refer to the AEC-Q100-012 standard document.
Test conditions:
• LATCH = 0 V
• RILIM = 5 kΩ
• 10 units from 3 separate lots for a total of 30 units.
• Lsupply = 5 μH, Rsupply = 10 mΩ
• VBB = 14 V
Test procedure:
• Parametric data is collected on each unit pre-stress
• Each unit is enabled into a short-circuit with the required short circuit cycles or duration as specified
• Functional testing is performed on each unit post-stress to verify that the part still operates as expected
The cold repetitive test is run at 85°C which is the worst case condition for the device to sustain a short circuit.
The cold repetitive test refers to the device being given time to cool down between pulses, rather than being run
at a cold temperature. The load short circuit is the worst case situation, since the energy stored in the cable
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inductance can cause additional harm. The fast response of the device ensures current limiting occurs quickly
and at a current close to the load short condition. In addition, the hot repetitive test is performed as well.
表10-3. AEC-Q100-012 Test Results
DEVICE
VERSION
NO. OF CYCLES /
DURATION
NO. OF
UNITS
NO. OF
FAILS
TEST
LOCATION OF SHORT
Cold Repetitive - Long
Pulse(1)
Load Short Circuit, Lshort = 5 μH, Rshort
200 mΩ, TA = 85°C
=
=
B
B
100 k cycles
100 hours
30
30
0
0
Load Short Circuit, Lshort = 5 μH, Rshort
100 mΩ, TA = 25°C
Hot Repetitive - Long Pulse
(1) For Cold Repetitive short, 200-mΩRshort is used so that the device is at a higher junction temperature before the short-circuit event,
increasing the harshness of the test.
10.1.7 Thermal Information
When outputting current, the TPS1HB16-Q1 will heat up due to the power dissipation. The transient thermal
impedance curve can be used to determine the device temperature during a pulse of a given length. This ZθJA
value corresponds to a JEDEC standard 2s2p thermal test PCB with thermal vias.
35
32.5
30
27.5
25
22.5
20
17.5
15
12.5
10
7.5
5
2.5
0
0.0001
0.0010.002 0.005 0.01 0.02 0.05 0.1 0.20.3 0.5
Time (s)
1
2
3 4 567 10 20 30 50 100 200
500 1000
16PW
图10-2. TPS1HB16-Q1 Transient Thermal Impedance
10.2 Typical Application
This application example demonstrates how the TPS1HB16-Q1 device can be used to power resistive heater
loads in automotive seats. In this example, we consider a heater load that is powered by the device. This is just
one example of the many applications where this device can fit.
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12 V Battery
DIA_EN
SEL1
VBB
SNS
ILIM
µC
LATCH
EN
GND
VOUT
HEATER LOAD
图10-3. Block Diagram for Powering Heater Load
10.2.1 Design Requirements
For this design example, use the input parameters shown in 表10-4.
表10-4. Design Parameters
DESIGN PARAMETER
VBB
EXAMPLE VALUE
13.5 V
Load - Heater
Load current sense
ILIM
80-W max
60 mA to 12 A
8 A
Ambient temperature
RθJA
70°C
34.3°C/W (depending on PCB)
A
Device version
10.2.2 Detailed Design Procedure
10.2.2.1 Thermal Considerations
The 80 W heater load will cause a DC current in the channel under maximum load power condition of around 5.9
A. Therefore, this current at 13.5 V will assume worst case heating.
Power dissipation in the switch is calculated in 方程式 4. RON is assumed to be 32 mΩ because this is the
maximum specification at high temperature. In practice, RON will almost always be lower.
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PFET = I2 × RON
(4)
(5)
PFET = (5.9 A)2 × 32 mΩ= 1.11 W
This means that the maximum FET power dissipation is 1.11 W. The junction temperature of the device can be
calculated using 方程式6 and the RθJA value from the Specifications section.
TJ = TA + RθJA × PFET
(6)
TJ = 70°C + 34.3°C/W × 1.11 W = 108.1°C
The maximum junction temperature rating for the TPS1HB16-Q1 is TJ = 150°C. Based on the above example
calculation, the device temperature will stay below the maximum rating even at this high level of current.
10.2.2.2 RILIM Calculation
In this application, the TPS1HB16-Q1 must allow for the maximum DC current with margin but minimize the
energy in the switch during a fault condition by minimizing the current limit. For this application, the best ILIM set
point is approximately 8 A. 方程式 7 allows you to calculate the RILIM value that is placed from the ILIM pins to
V
BB. RILIM is calculated in kΩ.
RILIM = KCL / ICL
(7)
(8)
Because this device is version A, the KCL value in the Specifications section is 110 A × kΩ.
RILIM = 110 (A × kΩ) / 8 A = 13.75 kΩ
For a ILIM of 8 A, the RILIM value must be set at around 13.75 kΩ.
10.2.2.3 Diagnostics
If the resistive heating load is disconnected (heater malfunction), an alert is desired. Open-load detection can be
performed in the switch-enabled state with the current sense feature of the TPS1HB16-Q1 device. Under open
load condition, the current in the SNS pin will be the fault current and the can be detected from the sense
voltage measurement.
10.2.2.3.1 Selecting the RISNS Value
表 10-5 shows the requirements for the load current sense in this application. The KSNS value is specified for the
device and can be found in the Specifications section.
表10-5. RSNS Calculation Parameters
PARAMETER
EXAMPLE VALUE
Current Sense Ratio (KSNS
)
3000
12 A
Largest diagnosable load current
Smallest diagnosable load current
Full-scale ADC voltage
60 mA
5 V
ADC resolution
10 bit
The load current measurement requirements of 12 A ensures that even in the event of a overcurrent surpassing
the set current limit, the MCU can register and react by shutting down the TPS1HB16-Q1, while the low level of
60 mA allows for accurate measurement of low load currents.
The RSNS resistor value must be selected such that the largest diagnosable load current puts VSNS at about 95%
of the ADC full-scale. With this design, any ADC value above 95% can be considered a fault. Additionally, the
RSNS resistor value must ensure that the smallest diagnosable load current does not cause VSNS to fall below 1
LSB of the ADC. With the given example values, a 1.2-kΩ sense resistor satisfies both requirements shown in 表
10-6.
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表10-6. VSNS Calculation
LOAD (A)
0.06
SENSE RATIO
3000
ISNS (mA)
VSNS (V)
0.024
% of 5-V ADC
0.5%
RSNS (Ω)
1200
0.02
4
12
3000
1200
4.800
96.0%
10.2.3 Application Curves
When the device receives a rising edge on the EN pulse the output will turn on. After the turn-on delay time, the
device VOUT goes to the VBB supply and begins outputting the steady state resistive current.
图10-4. TPS1HB16-Q1 Turn-On Waveform (ROUT = 4 Ω)
When the device turns off on a falling edge of EN, the channel IOUT will go to zero and the VOUT will drop to zero
as well as shown.
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图10-5. TPS1HB16-Q1 Turn-Off Waveform (ROUT = 4 Ω)
When there is a load step, the SNS current output will follow the load current with a slight delay. The image
shows the output current temporarily increase from 1 A to 5 A and then return to 1 A. In this situation, the output
current is accurately modeled throughout the pulse by the voltage on the SNS pin allowing for accurate
diagnostics.
图10-6. TPS1HB16-Q1 SNS Settling Time
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If the device has a no-load case due to an open load or cable, the device will register the fault even in an off-
state if the DIAG_EN pin is high. 图 10-7 shows the device behavior when an open load event is registered with
EN low and DIAG_EN is raised. Systems can PWM DIAG_EN to lower system power losses while still watching
for open load events and the same timing applies.
图10-7. Open Load (tOL) Detection Time
If the output of the TPS1HB16-Q1 is short-circuited, the device will protect the system from failure. Depending on
the device version and RILIM, the current limit set-point will vary. The waveforms below show examples of the
current limit behavior when the device is enabled into a short circuit with a test setup according to AEC-
Q100-012. In each case, the RILIM pin has a 5 kΩresistor to set the current limit.
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图10-8. TPS1HB16-Q1 Version A Short Circuit Waveform
图10-9. TPS1HB16-Q1 Version B Short Circuit Waveform
10.3 Typical Application
This application example demonstrates how the TPS1HB16-Q1 device can be used to power bulb loads in
automotive headlights. In this example, we consider a 35 W bulb that is powered by the device. This example is
just one example of the many applications where this device can fit.
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12 V Battery/
Cap Bank
Temperature
Chamber
DIA_EN
SEL1
VBB
65 mꢀ
~2m 18 AWG
BULB LOAD
VOUT
SNS
ILIM
µC
LATCH
EN
GND
10mꢀ
~2m 8 AWG
图10-10. Block Diagram for Driving Bulb Load
10.3.1 Design Requirements
For this design example, use the input parameters shown in 表10-7.
表10-7. Design Parameters
DESIGN PARAMETER
VBB
EXAMPLE VALUE
16 V
35-W maximum
60 A
Load - Bulb
Fixed ILIM
Ambient temperature
Bulb temperature in chamber
25°C
–40°C
Cable impedance from device to
bulb
65 mΩ
Device version
F
10.3.2 Detailed Design Procedure
The typical bulb test setup is where the device is at 25°C and the bulb is in a temperature chamber at –40°C.
The bulb needs to be kept at –40°C so that the impedance is very low and the inrush current will be the highest.
The impedance of the cables is important because it will change the inrush current of the bulb as well. The F
version of the TPS1HB16-Q1 has a very high fixed current limit so that the inrush current of the bulb can be
passed without limitation.
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10.3.3 Application Curves
图10-11. TPS1HB16-Q1 Version F 35 W Bulb Inrush Current
10.3.4 Detailed Design Procedure
Another typical bulb test is to have the bulb at room temperature (25°C) and the device heated up to 105°C. This
test is designed see if the device can drive the bulb without hitting thermal shutdown due to the current draw of
the bulbs. The passing criteria is that the bulb illuminates when the device enables the channel and the device
does not go into thermal shutdown. 图 10-12 shows the current waveform of this test and as it can be seen the
bulb comes on and stays on without hitting thermal shutdown. Notice that the current is lower in this condition
than the inrush condition. This is due to the bulb's effective capacitance being lower at higher temperatures as
expected.
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10.3.5 Application Curves
图10-12. TPS1HB16-Q1 Version F 35W Bulb Turn On
10.4 Power Supply Recommendations
The TPS1HB16-Q1 device is designed to operate in a 12-V automotive system. The nominal supply voltage
range is 6 V to 18 V as measured at the VBB pin with respect to the GND pin of the device. In this range the
device meets full parametric specifications as listed in the Electrical Characteristics table. The device is also
designed to withstand voltage transients beyond this range. When operating outside of the nominal voltage
range but within the operating voltage range, the device will exhibit normal functional behavior. However,
parametric specifications can not be specified outside the nominal supply voltage range.
表10-8. Operating Voltage Range
VBB VOLTAGE RANGE
NOTE
Transients such as cold crank and start-stop, functional operation are
specified but some parametric specifications can not apply. The
device is completely short-circuit protected up to 125°C.
3 V to 6 V
Nominal supply voltage, all parametric specifications apply. The
device is completely short-circuit protected up to 125°C.
6 V to 18 V
Transients such as jump-start and load-dump, functional operation
specified but some parametric specifications can not apply.
18 V to 40 V
10.5 Layout
10.5.1 Layout Guidelines
To achieve optimal thermal performance, connect the exposed pad to a large copper pour. On the top PCB layer,
the pour can extend beyond the package dimensions as shown in the example below. In addition to this, TI
recommends to also have a VBB plane either on one of the internal PCB layers or on the bottom layer.
Vias must connect this plane to the top VBB pour.
Ensure that all external components are placed close to the pins. Device current limiting performance can be
harmed if the RILIM is far from the pins and extra parasitics are introduced.
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10.5.2 Layout Example
The layout example is for device versions A/B.
Via to VBB plane
GND
SNS
DIA_EN
NC
To µC
To µC
LATCH
EN
SEL1
NC
VBB
ILIM
NC
VOUT
VOUT
VOUT
NC
NC
NC
图10-13. 16-PWP Layout Example
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11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Documentation
For related documentation see the following:
• Texas Instruments, How To Drive Inductive, Capacitive, and Lighting Loads with Smart High Side Switches
application note
• Texas Instruments, Short-Circuit Reliability Test for Smart Power Switch application note
• Texas Instruments, Reverse Battery Protection for High Side Switches application note
• Texas Instruments, Adjustable Current Limit of Smart Power Switches application note
11.2 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更
改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
11.3 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的《使用条款》。
11.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
11.5 静电放电警告
静电放电(ESD) 会损坏这个集成电路。德州仪器(TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理
和安装程序，可能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参
数更改都可能会导致器件与其发布的规格不相符。
11.6 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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8-Mar-2021
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS1HB16AQPWPRQ1
TPS1HB16BQPWPRQ1
TPS1HB16FQPWPRQ1
ACTIVE
HTSSOP
HTSSOP
HTSSOP
PWP
16
16
16
3000
3000
3000
RoHS-Exempt
& Green
NIPDAU
Level-3-260C-168HRS
Level-3-260C-168HRS
Level-3-260C-168HRS
-40 to 125
-40 to 125
-40 to 125
1HB16AQ
ACTIVE
ACTIVE
PWP
RoHS-Exempt
& Green
NIPDAU
NIPDAU
1HB16BQ
1HB16FQ
PWP
RoHS-Exempt
& Green
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
8-Mar-2021
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Mar-2021
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS1HB16AQPWPRQ1 HTSSOP PWP
TPS1HB16BQPWPRQ1 HTSSOP PWP
TPS1HB16FQPWPRQ1 HTSSOP PWP
16
16
16
3000
3000
3000
330.0
330.0
330.0
12.4
12.4
12.4
6.9
6.9
6.9
5.6
5.6
5.6
1.6
1.6
1.6
8.0
8.0
8.0
12.0
12.0
12.0
Q1
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Mar-2021
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS1HB16AQPWPRQ1
TPS1HB16BQPWPRQ1
TPS1HB16FQPWPRQ1
HTSSOP
HTSSOP
HTSSOP
PWP
PWP
PWP
16
16
16
3000
3000
3000
350.0
350.0
350.0
350.0
350.0
350.0
43.0
43.0
43.0
Pack Materials-Page 2
PACKAGE OUTLINE
PWP0016M
PowerPADTM TSSOP - 1.2 mm max height
S
C
A
L
E
2
.
5
0
0
SMALL OUTLINE PACKAGE
6.6
6.2
C
TYP
A
PIN 1 INDEX
AREA
0.1 C
SEATING
PLANE
14X 0.65
16
1
2X
5.1
4.9
4.55
NOTE 3
8
9
0.30
16X
4.5
4.3
B
0.19
0.1
C A B
SEE DETAIL A
(0.15) TYP
2X 0.6 MAX
NOTE 5
THERMAL
PAD
2X 0.31 MAX
NOTE 5
8
9
0.25
1.2 MAX
GAGE PLANE
3.37
2.48
17
0.15
0.05
0.75
0.50
0 -8
A
20
DETAIL A
TYPICAL
0.45
2X
16
1
0.25
NOTE 5
0.32
0.16
2X
NOTE 5
2X (0.13)
2.78
2.20
4223886/B 09/2019
PowerPAD is a trademark of Texas Instruments.
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. Reference JEDEC registration MO-153.
5. Features may differ or may not be present.
www.ti.com
EXAMPLE BOARD LAYOUT
PWP0016M
PowerPADTM TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
(3.4)
NOTE 9
SOLDER MASK
DEFINED PAD
(2.78)
16X (1.5)
METAL COVERED
BY SOLDER MASK
SYMM
16
16X (0.45)
1
(1.2) TYP
(R0.05) TYP
SYMM
(3.37)
17
(5)
NOTE 9
(0.6)
14X (0.65)
(
0.2) TYP
VIA
9
8
(1.2) TYP
SEE DETAILS
(5.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 10X
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MAX
ALL AROUND
0.07 MIN
ALL AROUND
NON-SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
15.000
SOLDER MASK DETAILS
4223886/B 09/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
8. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
numbers SLMA002 (www.ti.com/lit/slma002) and SLMA004 (www.ti.com/lit/slma004).
9. Size of metal pad may vary due to creepage requirement.
10. Vias are optional depending on application, refer to device data sheet. It is recommended that vias under paste be filled, plugged
or tented.
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EXAMPLE STENCIL DESIGN
PWP0016M
PowerPADTM TSSOP - 1.2 mm max height
SMALL OUTLINE PACKAGE
(2.78)
BASED ON
0.125 THICK
STENCIL
16X (1.5)
METAL COVERED
BY SOLDER MASK
1
16
16X (0.45)
(R0.05) TYP
SYMM
(3.37)
17
BASED ON
0.125 THICK
STENCIL
14X (0.65)
8
9
SYMM
(5.8)
SEE TABLE FOR
DIFFERENT OPENINGS
FOR OTHER STENCIL
THICKNESSES
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE: 10X
STENCIL
THICKNESS
SOLDER STENCIL
OPENING
0.1
3.11 X 3.77
2.78 X 3.37 (SHOWN)
2.54 X 3.08
0.125
0.15
0.175
2.35 X 2.85
4223886/B 09/2019
NOTES: (continued)
11. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
12. Board assembly site may have different recommendations for stencil design.
www.ti.com
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