TPS1HC100-Q1_技术文档

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

TPS1HC100-Q1，100mΩ，2.5 A 单通道汽车智能高侧开关

1 特性

2 应用

• 具有全面诊断功能的适用于12V 汽车系统的单通道

智能高侧电源开关

• 汽车显示模块

• ADAS 模块

• 座椅舒适模块

• HVAC 控制模块

• 车身控制模块

– 开漏状态输出

– 电流检测模拟输出

• 宽工作电压范围：3V 至28V

• 低待机电流：85°C 下低于0.5µA

• 工作结温范围：–40°C 至150°C

• 支持1.8V、3.3V 和5V 逻辑电压

• 通过故障检测电压调节功能实现ADC 保护

• 可编程电流限制，1.9A 时精度为±18%

• 高精度电流检测，1A 时精度为±6%

• 保护

3 说明

TPS1HC100-Q1 器件是一款具有全方位保护的高侧电

源开关，它集成有NMOS 功率FET 和电荷泵，专用于

对各种负载进行智能控制。该器件凭借着精确的电流检

测和可编程电流限制特性在市场上脱颖而出。

由于输入引脚上的 1.5V 低逻辑高电平阈值 V_IH，可以

使用 1.8V 的 MCU GPIO 信号。高精度电流检测功能

可提供更好的实时监测效果和更准确的诊断，无需进一

步校准。外部高精度电流限制功能允许根据应用设置电

流限制值。该器件通过在启动或短路条件下有效地钳制

浪涌电流，极大地提高了系统的可靠性。TPS1HC100-

Q1 器件可用作各种阻性、感性和容性负载（包括低瓦

数灯泡、LED、继电器、电磁阀和加热器）的高侧电源

开关。

– 过载和短路保护

– 感性负载负电压钳位

– 欠压锁定(UVLO) 保护

– 具备自恢复功能的热关断和热振荡

– 接地失效保护和失电保护

– 对外部元件提供反向电池保护

• 诊断

– 开启和关闭状态输出的开路负载和电池短路检测

– 过载和接地短路检测

– 热关断和热振荡检测

器件信息⁽¹⁾

封装尺寸（标称值）

器件型号

封装

• 资格认证

TPS1HC100-Q1

HTSSOP (14)

4.40mm × 5.00mm

– 符合AEC-Q100 汽车级1 级温度标准

– 提供功能安全

(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附

录。

• 可帮助进行功能安全系统设计的文档

– 经测试符合AECQ100-12 A 级标准，

经过100 万次接地短路测试

– 通过ISO7637-2 和ISO16750-2 电瞬变抗扰度

认证

• 14 引脚热增强型PWP 封装

VOUT

R_ILIM

电容充电应用

功能方框图

本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问

www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。

English Data Sheet: SLVSFI1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

Table of Contents

8.3 Feature Description...................................................19

8.4 Device Functional Modes..........................................38

9 Application and Implementation..................................40

9.1 Application Information............................................. 40

9.2 Typical Application.................................................... 40

10 Power Supply Recommendations..............................46

11 Layout...........................................................................46

11.1 Layout Guidelines................................................... 46

11.2 Layout Example...................................................... 46

11.3 Thermal Considerations..........................................48

12 Device and Documentation Support..........................49

12.1 Documentation Support ......................................... 49

12.2 接收文档更新通知................................................... 49

12.3 支持资源..................................................................49

12.4 Trademarks.............................................................49

12.5 Electrostatic Discharge Caution..............................49

12.6 术语表..................................................................... 49

13 Mechanical, Packaging, and Orderable

1 特性................................................................................... 1

2 应用................................................................................... 1

3 说明................................................................................... 1

4 Revision History.............................................................. 2

5 Pin Configuration and Functions...................................3

5.1 Recommended Connections for Unused Pins............4

6 Specifications.................................................................. 5

6.1 Absolute Maximum Ratings........................................ 5

6.2 ESD Ratings............................................................... 5

6.3 Recommended Operating Conditions.........................5

6.4 Thermal Information....................................................6

6.5 Electrical Characteristics.............................................6

6.6 SNS Timing Characteristics........................................ 9

6.7 Switching Characteristics............................................9

6.8 Typical Characteristics.............................................. 11

7 Parameter Measurement Information..........................16

8 Detailed Description......................................................18

8.1 Overview...................................................................18

8.2 Functional Block Diagram.........................................19

Information.................................................................... 49

4 Revision History

注：以前版本的页码可能与当前版本的页码不同

Changes from Revision * (July 2021) to Revision A (December 2021)

Page

• 将状态从“预告信息”更改为“量产数据”....................................................................................................... 1

2

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

5 Pin Configuration and Functions

14

13

GND

EN

1

2

3

4

NC

VBB

DIAG_EN

12

11

10

9

Thermal

Pad

FAULT

LATCH

SNS

NC

5

6

7

VOUT

NC

8

ILIM

图5-1. PWP Package 14-Pin HTSSOP Top View

表5-1. Pin Functions

over operating free-air temperature range (unless otherwise noted)

TYPE

DESCRIPTION

NO.

NAME

Ground of device. Connect to resistor-diode ground network to have

reverse battery protection.

1

GND

Power

2

3

4

5

6

EN

DIAG_EN

FAULT

LATCH

SNS

I

Input control for channel activation

Enable-disable pin for diagnostics, internal pulldown

Open drain global fault output. Referred to FAULT, FLT, or fault pin.

Thermal shutdown behavior, latch off or auto retry, internal pull down

Output corresponding sense value based on sense ratio

O

I

O

Adjustable current limit. Short to ground or leave floating if external

current limit is not used.

7

ILIM

O

8, 11, 14

9, 10

NC

VOUT

VBB

Pad

N/A

Power

—

No internal connection

Output of high side switch, connected to load

Power supply

12, 13

Thermal Pad

Thermal Pad, internally shorted to ground

Submit Document Feedback

3

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

5.1 Recommended Connections for Unused Pins

The TPS1HC100-Q1 is designed to provide an enhanced set of diagnostic and protection features. However, if

the system design only allows for a limited number of I/O connections, some pins can be considered as optional.

表5-2. Connections For Optional Pins

PIN NAME

CONNECTION IF NOT USED

IMPACT IF NOT USED

SNS

Analog sense is not available.

Ground through 1-kΩresistor

With LATCH unused, the device auto-retries after a fault. If latched

Float or ground through R_PROTbehavior is desired, but the system describes limited I/O, it is possible to

LATCH

ILIM

resistor

use one microcontroller output to control the latch function of several high-

side channels.

If the ILIM pin is left floating, the device is set to the default internal current-

limit threshold.

Float

Float or ground through R_PROTWith DIA_EN unused, the analog sense, open-load, and short-to-battery

DIA_EN

FAULT

resistor

diagnostics are not available.

Float

Open drain FAULT signal is not able to be used

4

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

6 Specifications

6.1 Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise noted)⁽¹⁾

MIN

MAX

28

UNIT

V

Maximum continuous supply voltage, V_BB

Load dump voltage, V_LD

Reverse Polarity Voltage

Enable pin current, I_EN

ISO16750-2:2010(E)

36

V

Maximum duration 3 minutes

V

–18

–1

20

7

mA

V

Enable pin voltage, V_EN

Diagnostic Enable pin current, I_{DIA_EN}

Diagnostic Enable pin voltage, V_{DIA_EN}

Sense pin current, I_SNS

–1

20

7

mA

V

–1

10

5.5

10

7

mA

V

–100

–1

Sense pin voltage, V_SNS

Latch pin current, I_LATCH

Latch pin voltage, V_LATCH

FLT pin current, I_FLT

mA

V

–1

10

7

mA

V

–30

–0.3

FLT pin voltage, V_FLT

Reverse ground current, I_GND

Storage temperature, T_stg

V_BB< 0 V

mA

°C

–50

150

–65

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under

Recommended Operating Conditions. Exposure to absolute maximum rated conditions for extended periods may affect device

reliability.

6.2 ESD Ratings

VALUE

UNIT

Human-body model (HBM), per AEC

Q100-002 Classification Level H2⁽²⁾

All pins except VS and VOUT

VS and VOUT

±2000

Electrostatic

discharge⁽¹⁾

Human-body model (HBM), per AEC

Q100-002 Classification Level H3A⁽²⁾

V_(ESD)

±4000

±750

V

Charged-device model (CDM), per AEC Q100-011

Classification Level C5

All pins

(1) All ESD strikes are with reference from the pin mentioned to GND

(2) AEC-Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specifications.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) ⁽¹⁾

MIN

3.5

MAX

18

UNIT

V_{VBB_NOM}

V_{VBB_EXT}

V_{VBB_SC}

V_EN

Nominal supply voltage ⁽¹⁾

Extended supply voltage⁽²⁾

Short circuit supply voltage capability

Enable voltage

V

2.6

28

V

5.5

7

V

–1

V_{DIA_EN}

V_LATCH

V_SNS

Diagnostic Enable voltage

Latch voltage

V

–1

Sense voltage

V

–1

T_A

Operating free-air temperature

125

°C

–40

(1) All operating voltage conditions are measured with respect to device GND

Submit Document Feedback

5

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

(2) Device will function within extended operating range, however some timing parametric values might not apply. See the respective

sections for what voltages are used. Additionally more explanation can be found in Power Supply Recommendations

6.4 Thermal Information

TPS1HC100-Q1

THERMAL METRIC^{(1) (2)}

PWP (HTSSOP)

UNIT

14 PINS

42.6

34.7

13.8

0.7

R_θJA

Junction-to-ambient thermal resistance

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

°C/W

R_θJC(top)

R_θJB

Junction-to-top characterization parameter

Junction-to-board characterization parameter

Junction-to-case (bottom) thermal resistance

ψ_JT

14.0

1.8

ψ_JB

R_θJC(bot)

(1) For more information about traditional and new thermal metrics, see the SPRA953 application report.

(2) The thermal parameters are based on a 4-layer PCB according to the JESD51-5 and JESD51-7 standards.

6.5 Electrical Characteristics

V_BB= 6 V to 28 V, T_A= -40°C to 125°C (unless otherwise noted); Typical application is 13.5V, 10Ω, RILIM=Open (unless

otherwise specified)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

INPUT VOLTAGE AND CURRENT

T_J=25°C

35

33

43

45

V

V_Clamp

VDS clamp voltage

T_J= -40°C to 150°C

V_BBundervoltage lockout

rising

V_UVLOR

V_UVLOF

3.0

2.4

3.5

2.6

4.0

3.0

0.3

0.5

V

Measured with respect to the GND pin of the device

V_BBundervoltage lockout

falling

T_J= 25°C

µA

A

Standby current (total

device leakage including

both MOSFET channels)

V_BB≤28 V, V_EN

=

I_SB

V_{DIA_EN}= 0 V, V_OUT= 0 V

T_J= 85°C

Continuous load current,

per channel

I_NOM

Channel enabled, T_AMB= 85°C

2

V_BB≤28 V, T_J= 25°C

V_EN= V_{DIA_EN}= 0 V, V_OUT= 0 V

0.01

0.1

0.3

1.5

2.5

µA

mA

Output leakage current

(per channel)

I_OUT(standby)

V_BB≤28 V, T_J= 85°C

V_EN= V_{DIA_EN}= 0 V, V_OUT= 0 V

Current consumption in

diagnostic mode

V_BB≤28 V, I_SNS= 0 mA

V_EN= 0 V, V_{DIA_EN}= 5 V, V_OUT= 0V

I_DIA

1.3

Quiescent current

channel enabled

V_BB≤28 V

V_EN= V_{DIA_EN}= 5 V, I_OUTx= 0 A

I_Q

1.6

20

mA

ms

t_STBY

Standby mode delay time V_ENx= V_{DIA_EN}= 0 V to standby

RON CHARACTERISTICS

T_J= 25°C

T_J= 150°C

T_J= 25°C

T_J= 150°C

T_J= 25°C

T_J= 150°C

88

mΩ

6 V ≤V_BB≤28 V,

I_OUT= 1 A

On-resistance

(Includes MOSFET

channel and metallization

on die)

176

190

250

R_ON

3V ≤V_BB≤6V,

I_OUT=1A

94

On-resistance during

reverse polarity

R_ON(REV)

-18 V ≤V_BB≤-6 V

188

CURRENT SENSE CHARACTERISTICS

6

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

6.5 Electrical Characteristics (continued)

V_BB= 6 V to 28 V, T_A= -40°C to 125°C (unless otherwise noted); Typical application is 13.5V, 10Ω, RILIM=Open (unless

otherwise specified)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Current sense ratio

I_OUT/ I_SNS

K_SNS

I_OUT= 1 A

1040

Saturated sense current

level

I_{SAT_SNS}

Maximum amount of load current that can be sensed

I_OUT= 4 A

6

A

3.87

mA

%

6

–6

1.93

0.96

mA

%

I_OUT= 2 A

mA

%

I_OUT= 1 A

6

–6

0.48

mA

%

I_OUT= 500 mA

6

–6

0.192

0.096

0.048

0.0192

0.0096

0.0048

mA

%

I_OUT= 200 mA

6

–6

Current sense current

and accuracy

I_SNSI

V_EN= V_{DIA_EN}= 5 V

mA

%

I_OUT= 100 mA

6

–6

mA

%

I_OUT= 50 mA

I_OUT= 20 mA

I_OUT= 10 mA

I_OUT= 5 mA

7

–7

mA

%

15

40

70

–15

–40

–70

mA

%

mA

%

SNS CHARACTERISTICS

V_{DIA_EN}= 5 V

4.75

3.3

5

3.5

5.5

3.75

3.5

V

V_SNSFH

V_SNSfault high-level

V_{DIA_EN}= 3.3 V

V_{DIA_EN}= V_IH

V_SNSFH

I_SNSFH

V_SNSfault high-level

I_SNSfault high-level

2.8

3.15

6.6

V

V_{DIA_EN}> V_{IH,DIAG_EN}

mA

µA

1.8

2.2

T_A= 25℃

V_{DIA_EN}= 5 V, IL = 0 mA

T_A= 125℃

I_SNSleak

I_SNSleakage

V_BBheadroom needed

V_{BB_ISNS}

for full current sense and V_{DIAG_EN}= 3.3V

fault functionality

5.3

6.5

V

V_BBheadroom needed

for full current sense and V_{DIAG_EN}= 5V

fault functionality

V_{BB_ISNS}

CURRENT LIMIT CHARACTERISTICS

T_J= -40°C to 150°C dI/dt

< 0.01 A/ms

I_{CL_LINPK}

I_{CL_ENPS}

Linear Mode peak

I_ILIM= 0.7A to 7A

0.9 × I_CL

1.4 × I_CL

2 × I_CL

A

Peak current enabling

into permanent short

T_J= -40°C to 150°C

R_ILIM= 7.15K to 71.5K

6.5

9.5

16

A

OVCR Peak current

threshold when short is

applied while switch

enabled

R_ILIM> 35kΩ

I_OVCR

T_J= -40°C to 150°C

15kΩ ≤R_ILIM≤35kΩ

R_ILIM< 15kΩ

Submit Document Feedback

7

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

6.5 Electrical Characteristics (continued)

V_BB= 6 V to 28 V, T_A= -40°C to 125°C (unless otherwise noted); Typical application is 13.5V, 10Ω, RILIM=Open (unless

otherwise specified)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

R_ILIM= GND

5

7

9

A

I_CLCurrent Limit

Threshold

R_ILIM= open, or out of

range

I_CL

T_J= -40°C to 150°C

3

A

36.34

45

44.3

48.5

49

55.41

57.25

61.26

R_ILIM= 7.15 kΩ

R_ILIM= 25 kΩ

R_ILIM= 71.5 kΩ

A * kΩ

K_CL

Current Limit Ratio

T_J= -40°C to 150°C

36.75

FAULT CHARACTERISTICS

Open-load (OL) detection

R_VOL

V_EN= 0 V, V_{DIA_EN}= 5 V

150

350

2

kΩ

internal pull-up resistor

Open-load (OL) detection

deglitch time

V_EN= 0 V, V_{DIA_EN}= 5 V, When V_BB–V_OUT< V_OL

duration longer than t_OL. Openload detected.

,

t_OL

1000

µs

Open-load (OL) detection

voltage

V_OL

V_FLT

t_OL1

V_EN= 0 V, V_{DIA_EN}= 5 V

I_FLT= 2.5 mA

2.5

0.5

V

FLT low output voltage

OL and STB indication-

time from EN falling

V_EN= 5 V to 0 V, V_{DIA_EN}= 5 V

I_OUT= 0 mA, V_OUT= V_BB- V_OL

350

1000

µs

OL and STB indication-

time from DIA_EN rising I_OUT= 0 mA, V_OUT= V_BB- V_OL

V_EN= 0 V, V_{DIA_EN}= 0 V to 5 V

t_OL2

1000

µs

°C

T_ABS

T_REL

Thermal shutdown

165

60

Relative thermal

shutdown

Thermal shutdown

hysteresis

T_HYS

25

°C

µs

ms

V_{DIA_EN}= 5 V

Time between fault and FLT asserting

t_{FAULT_FLT}Fault indication-time

t_{FAULT_SNS}Fault indication-time

60

3

V_{DIA_EN}= 5 V

Time between fault and I_SNSsettling at V_SNSFH

Time from fault shutdown until switch re-enable

(thermal shutdown).

t_RETRY

Retry time

1

2

EN PIN CHARACTERISTICS

V_{IL, EN}

V_{IH, EN}

V_{IHYS, EN}

R_EN

Input voltage low-level

Input voltage high-level

Input voltage hysteresis

Internal pulldown resistor

Input current low-level

Input current high-level

No GND Network

0.8

V

1.5

V

280

350

2.2

14

mV

kΩ

µA

200

500

I_{IL, EN}

V_EN= 0.8 V

V_EN= 5 V

I_{IH, EN}

DIA_EN PIN CHARACTERISTICS

V_{IL, DIA_EN}Input voltage low-level

V_{IH, DIA_EN}Input voltage high-level

No GND Network

0.8

V

1.5

V_IHYS,

Input voltage hysteresis

280

mV

DIA_EN

R_{DIA_EN}

Internal pulldown resistor

Input current low-level

Input current high-level

100

250

3.2

20

450

kΩ

µA

I_{IL, DIA_EN}

I_{IH, DIA_EN}

V_{DIA_EN}= 0.8 V

V_{DIA_EN}= 5 V

LATCH PIN Characteristics

V_{IL, LATCH}Input voltage low-level

No GND Network

0.8

V

8

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

6.5 Electrical Characteristics (continued)

V_BB= 6 V to 28 V, T_A= -40°C to 125°C (unless otherwise noted); Typical application is 13.5V, 10Ω, RILIM=Open (unless

otherwise specified)

PARAMETER

TEST CONDITIONS

No GND Network

MIN

TYP

MAX

UNIT

V_{IH, LATCH}Input voltage high-level

1.5

V

V_IHYS,

Input voltage hysteresis

280

mV

LATCH

R_LATCH

Internal pulldown resistor

Input current low-level

Input current high-level

0.5

1

2.2

5

1.5

MΩ

µA

I_{IL, LATCH}

I_{IH, LATCH}

V_{DIA_EN}= 0.8 V

V_{DIA_EN}= 5 V

µA

6.6 SNS Timing Characteristics

V_BB= 6 V to 18 V, T_J= -40°C to +150°C (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SNS TIMING - CURRENT SENSE

V_ENx= 5 V, V_{DIA_EN}= 0 V to 5 V

R_SNS= 1 kΩ, I_L= 1A

Settling time from rising edge of DIA_EN

50% of V_{DIA_EN}to 90% of settled ISNS

t_SNSION1

30

µs

V_EN= 5 V, V_{DIA_EN}= 0 V to 5 V

R_SNS= 1 kΩ, I_L= 30 mA

Settling time from rising edge of DIA_EN

50% of V_{DIA_EN}to 90% of settled ISNS

V_EN= V_{DIA_EN}= 0 V to 5 V

VBB = 13.5V R_SNS= 1 kΩ, R_LOAD

10Ω

Settling time from rising edge of EN and

DIA_EN

50% of V_{DIA_EN}V_ENto 90% of settled ISNS

t_SNSION2

t_SNSION3

t_SNSIOFF

=

150

20

µs

V_EN= 0 V to 5 V, V_{DIA_EN}= 5 V VBB =

13.5V

R_SNS= 1 kΩ, R_LOAD= 10Ω

Settling time from rising edge of EN with

DIA_EN HI;

50% of V_{DIA_EN}V_ENto 90% of settled ISNS

V_EN= 5 V, V_{DIA_EN}= 5 V to 0 V VBB

= 13.5V

Settling time from falling edge of DIA_EN

R_SNS= 1 kΩ, R_L= 10 Ω

V_EN= 5 V, V_{DIA_EN}= 5 V

R_SNS= 1 kΩ, I_OUT= 0.5 A to 3 A

t_SETTLEH

t_SETTLEL

Settling time from rising edge of load step

Settling time from falling edge of load step

20

µs

V_EN= 5 V, V_{DIA_EN}= 5 V

R_SNS= 1 kΩ, I_OUT= 3 A to 0.5 A

6.7 Switching Characteristics

V_BB= 13.5 V, T_J= -40°C to +150°C (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Channel Turnon delay time (from

Standby)

V_BB= 13.5 V, R_L= 10 Ω50% of EN

to 10% of VOUT

t_DR

t_DF

10

40

30

55

µs

Channel Turnon delay time (from

Active)

V_BB= 13.5 V, R_L= 10Ω50% of EN

to 10% of VOUT

45

µs

V_BB= 13.5 V, R_L= 10 Ω50% of EN

to 90% of VOUT

Channel Turnoff delay time

VOUT rising slew rate

10

30

V_BB= 13.5 V, 20% to 80% of V_OUT

R_L= 10 Ω

,

SR_R

0.1

0.25

0.5

V/µs

V_BB= 13.5 V, 80% to 20% of V_OUT

SR_F

f_max

t_ON

VOUT falling slew rate

Maximum PWM frequency⁽¹⁾

Channel Turnon time

0.25

0.4

70

0.5

2

V/µs

kHz

µs

R_L= 10 Ω

V_BB= 13.5 V, R_L= 10 Ω 50% of EN

to 80% of VOUT

30

39

145

V_BB= 13.5 V, R_L= 10Ω 50% of EN

to 20% of VOUT

t_OFF

Channel Turnoff time

70

145

µs

Submit Document Feedback

9

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

6.7 Switching Characteristics (continued)

V_BB= 13.5 V, T_J= -40°C to +150°C (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

1ms enable pulse V_BB= 13.5 V, R_L=

10 Ω

30

µs

–30

t_ON- t_OFF

Turnon and off matching

200-µs enable pulse, V_BB= 13.5 V,

R_L= 10 Ω,

µs

%

–30

–25

–10

200-µs enable pulse (1ms

period), V_BB= 13.5 V, R_L= 10 Ω

25

10

PWM accuracy - average load

current

Δ_PWM

≤500Hz, 50% Duty cycle V_BB= 13.5

V, R_L= 10 Ω

Switching energy losses during

turnon

E_ON

0.5

mJ

V_BB= 13.5 V, R_L= 10 Ω

Switching energy losses during

turnoff

E_OFF

10

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

6.8 Typical Characteristics

All the following data are based on the mean value of the three lots samples, V_VBB= 13.5 V if not specified.

50

40

30

20

10

0

0.2

0.18

0.16

0.14

0.12

0.1

3 V

6 V

8 V

13.5 V

18 V

24 V

28 V

0.08

0.06

0.04

0.02

0

-0.02

1E-6 1E-5 0.0001

0.01 0.1

Time (s)

1 2 510

100 1000

-40 -20

0

20

40

60

80 100 120 140 160

Temperature (C)

图6-1. Transient Thermal Impedance

V_OUT= 0 V

V_BBVaried

V_EN= 0 V

V_{DIAG_EN}= 0 V

图6-2. Standby Current I_SBvs. Temperature

0.18

0.16

0.14

0.12

0.1

1.9

1.8

1.7

1.6

1.5

1.4

1.3

1.2

1.1

1

3 V

6 V

8 V

13.5 V

18 V

24 V

28 V

0.08

0.06

0.04

0.02

0

3 V

6 V

8 V

13.5 V

18 V

24 V

28 V

0.9

-40 -20

0

20

40

60

80 100 120 140 160

-40 -20

0

20

40

60

80 100 120 140 160

Temperature (C)

V_OUT= 0 V

V_BBVaried

V_EN= 0 V

V_{DIAG_EN}= 0 V

I_OUT= 0 A

V_BBVaried

V_EN= 5 V

V_{DIAG_EN}= 5 V

图6-3. Output Leakage Current I_OUT,STBYvs Temperature

图6-4. Quiescent Current I_Qvs Temperature

1.5

155

145

135

125

115

105

95

3 V

5 V

6 V

8 V

13.5 V

18 V

24 V

3 V

6 V

8 V

13.5 V

18 V

24 V

28 V

1.44

1.38

1.32

1.26

1.2

28 V

1.14

1.08

1.02

0.96

0.9

85

75

65

-40 -20

0

20

40

60

80 100 120 140 160

-40 -20

0

20

40

60

80 100 120 140

Temperature (C)

I_OUT= 1 A

V_BBVaried

V_EN= 5 V

V_{DIAG_EN}= 5 V

I_OUT= 0 A

V_BBVaried

V_EN= 0 V

V_{DIAG_EN}= 5 V

图6-6. R_DSONvs Temperature

图6-5. Diagnostic Current I_DIAvs Temperature

Submit Document Feedback

11

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

6.8 Typical Characteristics (continued)

All the following data are based on the mean value of the three lots samples, V_VBB= 13.5 V if not specified.

155

140

130

120

110

100

90

6 V

13.5 V

18V

-40 C

25 C

85 C

105 C

125 C

150 C

145

135

125

115

105

95

80

85

70

75

60

65

-40 -20

0

20

40

60

80 100 120 140 160

2.5

5

7.5 10 12.5 15 17.5 20 22.5 25 27.5 30

V_BB(V)

Temperature (C)

I_OUT= 1 A

V_BBVaried

V_EN= 5 V

V_{DIAG_EN}= 5 V

I_OUT= 1 A

V_BBVaried

图6-7. R_DSONvs V_BB

V_EN= 5 V

V_{DIAG_EN}= 5 V

图6-8. R_ONREVvs Temperature

51

50

49

48

47

46

45

44

43

7.15 k

25 k

71.5 k

-40 -20

0

20

40

60

80 100 120 140 160

Temperature (C)

V_EN= 5 V

V_{DIAG_EN}= 5 V

R_OUT= 5μH and 100 mΩ

R_OUTvaried

V_BB= 13.5 V

V_EN= 5 V

V_{DIAG_EN}= 5 V

V_BB= 13.5 V

R_SNS= 1 kΩ

图6-9. K_CLvs Temperature

图6-10. KSNS Error vs Temperature

12

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

6.8 Typical Characteristics (continued)

All the following data are based on the mean value of the three lots samples, V_VBB= 13.5 V if not specified.

3.49

3.48

3.47

3.46

3.45

3.44

3.43

3.42

3.41

3.4

2.5

2

-40 C

25 C

85 C

105 C

125 C

150 C

1.5

1

0.5

0

-0.5

-1

-1.5

-2

3.39

3.38

3.37

-°4C0

2°C5

8°C5

1°C05

1°C25

1°C50

-2.5

5

7.5 10 12.5 15 17.5 20 22.5 25 27.5 30

V_BB(V)

5

7.5 10 12.5 15 17.5 20 22.5 25 27.5 30

V_BB(V)

V_EN= 5 V

V_{DIAG_EN}= 5 V

R_OUT= 5μH and 100

mΩ

I_OUT= 1A

V_EN= 5 V

V_{DIAG_EN}= 5 V

V_BBvaried

R_SNS= 1 kΩ

V_BBvaried

R_SNS= 1 kΩ

图6-11. KSNS Error vs VBB

图6-12. VSNSFH (3.3 V) vs VBB

5.1

5.09

5.08

5.07

5.06

5.05

5.04

5.03

5.02

5.01

5

75

70

65

60

55

50

45

40

35

30

25

20

15

10

5

6 V

13.5 V

18 V

24 V

28 V

-40 C

25 C

85 C

105 C

125 C

150 C

4.99

0

5

7.5 10 12.5 15 17.5 20 22.5 25 27.5 30

V_BB(V)

-40 -20

0

20

40

60

80 100 120 140 160

Temperature (C)

V_EN= 5 V

V_{DIAG_EN}= 5 V

R_OUT= 5μH and 100

mΩ

V_EN= 5 V

V_{DIAG_EN}= 5 V

R_OUT= 10 Ω

V_BBvaried

R_SNS= 1 kΩ

V_BBvaried

R_SNS= 1 kΩ

图6-14. Turn on time T_ONvs Temperature

图6-13. VSNSFH (5 V) vs VBB

Submit Document Feedback

13

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

6.8 Typical Characteristics (continued)

All the following data are based on the mean value of the three lots samples, V_VBB= 13.5 V if not specified.

0.5

0.475

0.45

85

80

75

70

65

60

55

50

45

40

0.425

0.4

0.375

0.35

0.325

0.3

-40 C

25 C

85 C

105 C

125 C

150 C

6 V

13.5 V

18 V

24 V

28 V

0.275

0.25

0.225

5

7.5 10 12.5 15 17.5 20 22.5 25 27.5 30

VBB (V)

-40 -20

0

20

40

60

80 100 120 140 160

Temperature (C)

V_EN= 5 V

V_{DIAG_EN}= 5 V

R_OUT= 10 Ω

V_EN= 5 V

V_{DIAG_EN}= 5 V

R_OUT= 10 Ω

V_BBvaried

R_SNS= 1 kΩ

V_BBvaried

R_SNS= 1 kΩ

图6-16. Rising Slew Rate SRR vs Temperature

图6-15. Turn off time T_OFFvs Temperature

0.45

1.32

1.3

3 V

6 V

0.425

0.4

13.5 V

18 V

24 V

28 V

1.28

1.26

1.24

1.22

1.2

0.375

0.35

0.325

0.3

-40 C

25 C

0.275

0.25

0.225

0.2

85 C

105 C

125 C

150 C

1.18

1.16

5

7.5 10 12.5 15 17.5 20 22.5 25 27.5 30

VBB (V)

-40 -20

0

20

40

60

80 100 120 140 160

Temperature (C)

V_EN= 5 V

V_{DIAG_EN}= 5 V

R_OUT= 10 Ω

V_EN= 0 to 3.3 V

V_{DIAG_EN}= 0 to 3.3 V

R_OUT= 1 kΩ

V_BBvaried

R_SNS= 1 kΩ

V_BBvaried

R_SNS= 1 kΩ

图6-17. Falling Slew Rate SRF vs Temperature

图6-18. V_IHvs Temperature

1.02

1.01

1

3 V

6 V

13.5 V

18 V

24 V

28 V

0.99

0.98

0.97

0.96

0.95

0.94

0.93

0.92

0.91

0.9

-40 -20

0

20

40

60

80 100 120 140 160

V_EN= 0 to 5 V

V_{DIAG_EN}= 0 V

R_OUT= 10 Ω

Temperature (C)

V_BB= 13.5 V

R_SNS= 1 kΩ

V_EN= 3.3 to 0 V

V_{DIAG_EN}= 3.3 to 0 V

R_OUT= 1 kΩ

图6-20. Turn-on Time (t_ON

)

V_BBvaried

R_SNS= 1 kΩ

图6-19. V_ILvs Temperature

14

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

6.8 Typical Characteristics (continued)

All the following data are based on the mean value of the three lots samples, V_VBB= 13.5 V if not specified.

V_EN= 5 to 0 V

V_{DIAG_EN}= 0 V

I_OUT= 500 mA to 3

V_EN= 5 V

V_{DIAG_EN}= 5 V

R_OUT= 10 Ω

A

V_BB= 13.5 V

R_SNS= 1 kΩ

V_BB= 13.5 V

R_SNS= 1 kΩ

图6-21. Turn-off Time (t_OFF

)

图6-22. ISNS Settling Time (t_SNSION) on Load Step

V_EN= 5 V

V_{DIAG_EN}= 5 V

R_ILIM= GND

R_OUT= 5 mH

V_BB= 13.5 V

V_EN= 5 V

V_{DIAG_EN}= 5 V

R_ILIM= GND

R_OUT= 5 μH and

100 mΩ

R_SNS= 1 kΩ

V_BB= 13.5 V

R_SNS= 1 kΩ

图6-24. 5mH Inductive Load Driving

图6-23. Short Circuit With ILIM Shorted to Ground

V_EN= 5 V

V_{DIAG_EN}= 5 V

R_ILIM= open

R_OUT= 470 μF and 10 Ω

V_BB= 13.5 V

R_SNS= 1 kΩ

图6-25. 470-μF Capacitive Load Driving

Submit Document Feedback

15

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

7 Parameter Measurement Information

I_EN

EN

I_VBB

VBB

I_{DIAG_EN}

DIAG_EN

FLT

I_FLT

I_LATCH

I_SNS

I_ILIM

VOUT

I_OUT

LATCH

SNS

ILIM

GND

图7-1. Parameter Definitions

(1)

V_EN

50%

90%

t_DR

t_DF

V_OUT

10%

t_ON

t_OFF

Rise and fall time of V_ENis 100 ns.

图7-2. Switching Characteristics Definitions

16

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

V_EN

V_{DIA_EN}

I_OUT

I_SNS

t_SNSION1

t_SNSION2

t_SNSION3

t_SNSIOFF1

V_EN

V_{DIA_EN}

I_OUT

I_SNS

t_SETTLEH

t_SETTLEL

V_EN

V_{DIA_EN}

T_J

I_SNS

t_SNSTON1

t_SNSTON2

t_SNSTOFF

Rise and fall times of control signals are 100 ns. Control signals include: EN, DIA_EN.

图7-3. SNS Timing Characteristics Definitions

Submit Document Feedback

17

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

8 Detailed Description

8.1 Overview

The TPS1HC100-Q1 is a single-channel, fully-protected, high-side power switch with an integrated NMOS power

FET and charge pump. Full diagnostics and high-accuracy current-sense features enable intelligent control of

the load. Low logic high threshold, V_IH, of 1.5 V on the input pins allow use of MCU GPIO signals of 1.8 V. A

programmable current-limit function greatly improves the reliability of the whole system. The device diagnostic

reporting has two pins to support both digital status and analog current-sense output, both of which can be set to

the high-impedance state when diagnostics are disabled, for multiplexing the MCU analog or digital interface

among devices.

The digital status report is implemented with an open-drain structure on the fault pin. When a fault condition

occurs, the pin is pulled down to GND. An external pullup is required to match the microcontroller supply level.

High-accuracy current sensing allows a better real-time monitoring effect and more-accurate diagnostics without

further calibration. A current mirror is used to source 1 / K_SNSof the load current, which is reflected as voltage on

the SNS pin. K_SNSis a constant value across the temperature and supply voltage. The current-sensing function

operates normally within a wide linear region from 0 to 4 V. The SNS pin can also report a fault by forcing a

voltage of V_SNSFHthat scales with the diagnostic enable voltage so that the maximum voltage seen by the

system's ADC is within an acceptable value. This action removes the need for an external zener diode or resistor

divider on the SNS pin.

The external high-accuracy current limit allows setting the current limit value by application. The current limit

highly improves the reliability of the system by clamping the inrush current effectively under start-up or short-

circuit conditions. Also, the current limit can save system costs by reducing PCB trace, connector size, and the

preceding power-stage capacity. An internal current limit is also implemented in this device. The lower value of

the external or internal current-limit value is applied.

An active drain to source voltage clamp is built in to address switching off the energy of inductive loads, such as

relays, solenoids, pumps, motors, and so forth. During the inductive switching-off cycle, both the energy of the

power supply (E_BAT) and the load (E_LOAD) are dissipated on the high-side power switch itself. With the benefits of

process technology and excellent IC layout, the TPS1HC100-Q1 device can achieve excellent power dissipation

capacity, which can help save the external free-wheeling circuitry in most cases. For more details, see Inductive-

Load Switching-Off Clamp.

Short-circuit reliability is critical for smart high-side power-switch devices. The standard of AEC-Q100-012 is to

determine the reliability of the devices when operating in a continuous short-circuit condition. Different grade

levels are specified according to the pass cycles. This device is qualified with the highest level, Grade A, 1

million times short-to-GND certification.

The TPS1HC100-Q1 device can be used as a high-side power switch for a wide variety of resistive, inductive,

and capacitive loads, including the low-wattage bulbs, LEDs, relays, solenoids, and heaters.

18

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

8.2 Functional Block Diagram

VOUT

R_ILIM

8.3 Feature Description

8.3.1 Accurate Current Sense

The high-accuracy current-sense function is internally implemented, which allows a better real-time monitoring

effect and more-accurate diagnostics without further calibration. A current mirror is used to source 1 / K_SNSof the

load current, flowing out to the external resistor between the SNS pin and GND, and reflected as voltage on the

SNS pin.

K_SNSis the ratio of the output current and the sense current. The accuracy values of K_SNSquoted in the

electrical characteristics do take into consideration temperature and supply voltage. Each device was internally

calibrated while in production, so post-calibration by users is not required in most cases.

Submit Document Feedback

19

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

6 A

1 A

I_SNSerr@1A= 6%

100 mA

I_SNSerr@100mA= 10%

50 mA

I_SNSerr@50mA= 15%

20 mA

I_SNSerr@20mA= 25%

5 mA

0 A

I_SNSerr@5mA= 75%

图8-1. Current-Sense Accuracy

The maximum voltage out on the SNS pin is clamped to V_SNSFH, which is the fault voltage level. To make sure

that this voltage is not higher than the system can tolerate, TI has correlated the voltage coming in on the

DIAG_EN pin with the maximum voltage out on the SNS pin. If DIAG_EN is between V_IHand 3.3 V, the

maximum output on the SNS pin is approximately 3.3 V. However, if the voltage at DIAG_EN is above 3.3 V,

then the fault SNS voltage, V_SNSFH, tracks that voltage up to 5 V. Tracking is done because the GPIO voltage

output that is powering the diagnostics through DIAG_EN is close to the maximum acceptable ADC voltage

within the same microcontroller. Therefore, the sense resistor value, R_SNS, can be chosen to maximize the range

of currents needed to be measured by the system. The R_SNSvalue must be chosen based on application need.

The maximum usable R_SNSvalue is bounded by the ADC minimum acceptable voltage, V_ADC,min, for the smallest

load current needed to be measured by the system, I_LOAD,min. The minimum acceptable R_SNSvalue has to

ensure the V_SNSvoltage is below the V_SNSFHvalue so that the system can determine faults. This difference

between the maximum readable current through the SNS pin, I_LOAD,max× R_SNS, and the V_SNSFHis called the

headroom voltage, V_HR. The headroom voltage is determined by the system but is important so that there is a

difference between the maximum readable current and a fault condition. Therefore, the minimum R_SNSvalue has

to be the V_SNSFHminus the V_HRtimes the sense current ratio, K_SNSdivided by the maximum load current the

system must measure, I_LOAD,max. This boundary equation can be seen in 方程式1.

(V_SNSFH–V_HR) × K_SNS/ I_LOAD,max≤R_SNS≤V_ADC,min× K_SNS/ I_LOAD,min

(1)

20

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

Current Sense

Voltage

V_SNSFH

ADC Full Scale Range, V_ADC,max

Headroom, V_HR

Over Current

Max Measurable Current

Max Nominal Current

1

Normal

R_SNS

Open Load Current, V_ADC,min

Sense Current

图8-2. Voltage Indication on the Current-Sense Pin

The maximum current the system wants to read, I_LOAD,max, must be below the current limit threshold because

after the current limit threshold is tripped the V_SNSvalue goes to V_SNSFH. Additionally, currents being measured

must be below 6 A to ensure that the current sense output is not saturated.

VBAT

VBB

Iout/K

Iout/K_ILIM

V_SNSFH

Iout

Voltage

Scaling

–

+

DIAG_EN

VOUT

CURRENT

CLAMP

Vcl,th

SNS

ILIM

R_SNS

RILIM

图8-3. Current-Sense and Current-Limit Block Diagram

Because this scheme adapts based on the voltage coming in from the MCU, there is no need to have a Zener

diode on the SNS pin to protect from high voltages.

8.3.2 Programmable Current Limit

A high-accuracy current limit allows higher reliability, which protects the power supply during short circuit or

power up. Also, a current limit can save system costs by reducing PCB traces, connector size, and the capacity

of the preceding power stage.

Current limiting offers protection from over-stressing to the load and integrated power FET. The current limit

regulates the output current to the set value, and pulls up the SNS pin to V_SNSFHand asserts the FLT pin as

diagnostic reports. The three current-limit thresholds are:

• External programmable current limit –an external resistor, R_ILIM, is used to set the channel current limit.

When the current through the device exceeds I_CL(current limit threshold), a closed loop steps in immediately.

V_GSvoltage regulates accordingly, leading to the V_DSvoltage regulation. When the closed loop is set up, the

current is clamped at the set value. The external programmable current limit provides the capability to set the

current-limit value by application.

Additionally, this value can be dynamically changed by changing the resistance on the ILIM pin. This

information can be seen in the Applications section.

Submit Document Feedback

21

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

• Internal current limit: ILIM pin shorted to ground –if the external current limit is out of range on the lower end

or the I_LIMpin is shorted to ground, the internal current limit is fixed and typically 7 A. To use the internal

current limit for large-current applications, tie the ILIM pin directly to the device GND.

• Internal current limit: ILIM pin open –if the external resistor is out of range on the higher end or the ILIM pin

is open, the current limit reverts to 3 A or half the current limit range. This level is still above the nominal

operation for the device to operate in DC steady state but is low enough that if a pin fault occurs and the R_ILIM

opens up, the current does not default to the highest rating and put additional stress on the power supply.

Both the internal current limit (I_lim,nom) and external programmable current limit are always active when V_BBis

powered and EN is high. The lower value one (of I_LIMand the external programmable current limit) is applied as

the actual current limit. The typical deglitch time for the current limit to assert is 2.5 µs.

Note that if a GND network is used (which leads to the level shift between the device GND and board GND), the

ILIM pin must be connected with device GND. Calculate R_ILIMwith Equation 2.

R_ILIM= K_CL/ I_LIM

(2)

For better protection from a hot short condition (when V_BBis high, channel is on, and a short to GND happens

suddenly), an over current protection, OVCR, circuit is triggered that makes sure to limit the maximum current

the device allows to go through. With this OVCR, the device is protected during hot short events.

For more information about the current limiting feature, see the Short-Circuit and Overload Protection section.

Current Limit Accuracy

The TPS1HC100-Q1 has very tight accuracy of the current limit regulation level across the full range of currents

and temperature. This accuracy is defined at several defined R_ILIMvalues, 7.15 kΩ, 25 kΩ, and 71.5 kΩ

specified in the Electrical Characteristics. As the current limit is changed with the R_ILIM, the KCL ratio value also

slightly changes. Additionally, the current limit architecture in the device allows for the tightest variation at current

limit set by a 25-kΩ R_ILIM, 1.9 A, of +18%, -7% and at the lower and upper ends of the range, 690 mA and 6.15

A respectively, to be about ±25%. Then, using the boundaries for R_ILIMof 7.15 kΩand 71.5 kΩ, a graph can be

built to linearly interpret the error for RILIM values that are inside of the range. This graph can be seen in the

figure below.

30%

KCL

Min KCL

Max KCL

25%

20%

15%

10%

5%

0

-5%

-10%

-15%

-20%

-25%

-30%

0.5

1

1.5

2

2.5

3

3.5

4

4.5

5

5.5

6

6.5

Current Limit Value (A)

图8-4. Current Limit Ratio vs Current limit Value With Percent Error

Using this figure, the error can be estimated for any current limit value desired, and the associated KCL value

can determine the RILIM resistor appropriate. This graph does not take into account RILIM resistor tolerances,

only the error associated with the current limit regulation.

22

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

8.3.2.1 Capacitive Charging

图 8-5 shows the typical set up for a capacitive load application and the internal blocks that function when the

device is used. Note that all capacitive loads have an associated load in parallel with the capacitor that is

described as a resistive load but in reality it can be inductive or resistive.

VBAT

VBB

Smart High Side Switch

EN

Gate Driver

K_CL

I_LIM1

=

R_ILIM

ILIM

Current Limiting

Circuit

(V_BB– V_OUT

R_LOAD

)

I_NOM

=

VOUT

R_ILIM

C_LOAD

GND

R_LOAD

I_LIM= C_LOADx dV_DS/dt

图8-5. Capacitive Charging Circuit

The first thing to check is that the nominal DC current, I_NOM, is acceptable for the TPS1HC100-Q1 device. This

check can easily be done by taking the R_θJAfrom the Thermal section and multiplying the R_ONof the

TPS1HC100-Q1 and the I_NOMwith it, add the ambient temperature and if that value is below the thermal

shutdown value the device can operate with that load current. For an example of this calculation see the

Applications section.

The second key care about for this application is to make sure that the capacitive load can be charged up

completely without the device hitting thermal shutdown. The reason is because if the device hits thermal

shutdown during the charging, the resistive nature of the load in parallel with the capacitor starts to discharge the

capacitor over the duration the TPS1HC100-Q1 is off. Note that there are some application with high enough

load impedance that the TPS1HC100-Q1 hitting thermal shutdown and trying again is acceptable; however, for

the majority of applications, the system must be designed so that the TPS1HC100-Q1 does not hit thermal

shutdown while charging the capacitor.

With the current clamping feature of the TPS1HC100-Q1, capacitors can be charged up at a lower inrush current

than other high current limit switches. This lower inrush current means that the capacitor takes a little longer to

charge all the way up. The time that it takes to charge up follows the equation below.

I_LIM= C × d(V_BB–V_DS) / dt

(3)

However, because the V_DSfor a typical 1 A applications is much less than the V_BBvoltage (V_DS≈1A × 0.1 Ω=

100 mV, V_BB≈13.5 V), the equation can be rewritten and approximated as

dt = C × dV_BB/ I_LIM

(4)

图8-6 pictures this charge timing.

Submit Document Feedback

23

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

Voltage (V)

V_BB

V_BB- V_DS

Time (s)

Current (A)

I_{CL_ENPS}

I_CL

I_NOM

dt

Time (s)

图8-6. Capacitive Charging Timing

For more information about capacitive charging with high side switches, see the How to Drive Capacitive Loads

application note application note. This application note has information about the thermal modeling available

along with quick ways to estimate if a high side switch is able to charge a capacitor to a given voltage.

8.3.3 Inductive-Load Switching-Off Clamp

When an inductive load is switching off, the output voltage is pulled down to negative, due to the inductance

characteristics. The power FET can break down if the voltage is not clamped during the current-decay period. To

protect the power FET in this situation, internally clamp the drain-to-source voltage, namely V_DS,clamp, the clamp

diode between the drain and gate.

V_DS,clamp= V_BATœ V_OUT

(5)

During the current-decay period (T_DECAY), the power FET is turned on for inductance-energy dissipation. Both

the energy of the power supply (E_BAT) and the load (E_LOAD) are dissipated on the high-side power switch itself,

which is called E_HSD. If resistance is in series with inductance, some of the load energy is dissipated in the

resistance.

E_HSD= E_BAT+ E_LOAD= E_BAT+E_Lœ E_R

(6)

From the high-side power switch’s view, E_HSDequals the integration value during the current-decay period.

T_DECAY

E_HSD

=

V_DS,clampì I_OUT(t)dt

—

0

(7)

(8)

(9)

≈

’

R ì I_OUT(MAX)+ V_OUT

L

∆

«

÷

◊

T_DECAY

=

ì ln

R

V_OUT

»

ÿ

Ÿ

V_BAT+ V_OUT

≈ R ì I_OUT(MAX)+ V_OUT

’

…

ì R ì I_OUT(MAX)œ V_OUTln

E_HSD= L ì

∆

÷

◊

R²

∆

V_OUT

…

Ÿ

⁄

«

When R approximately equals 0, E_HSDcan be given simply as:

V_BAT+ V_OUT

1

2

E_HSD

=

ì L ì I²

OUT(MAX)

R²

(10)

24

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

VBAT

DRAIN

IN

L

-

SOURCE

+

GND

图8-7. Driving Inductive Load

INPUT

V_BAT

VOUT

IOUT

V_{DS, clamp}

E_HSD

t_DECAY

图8-8. Inductive-Load Switching-Off Diagram

When switching off, battery energy and load energy are dissipated on the high-side power switch, which leads to

the large thermal variation. For each high-side power switch, the upper limit of the maximum safe power

dissipation depends on the device intrinsic capacity, ambient temperature, and board dissipation condition.

See Figure 8-9 for one dedicated inductance, 5 mH. If the maximum switching-off current is lower than the

current value shown on the curve, the internal clamp function can be used for the demagnetization energy

dissipation. If not, external free-wheeling circuitry is necessary for device protection.

Submit Document Feedback

25

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

图8-9. 5-mH Maximum Demagnetization Curve

8.3.4 Full Protections and Diagnostics

表 8-1 is when DIAG_EN is enabled. When DIAG_EN is low, current sense and FLT are disabled. The output is

in high-impedance mode. Refer to 表8-1 for details.

表8-1. Diagnostic Enable Logic Table

DIAG_EN IN Condition

Protections and Diagnostics

ON

HIGH

OFF

See Fault Table

ON

Diagnostics disabled, protection normal

SNS and FLT are high impedance

LOW

OFF

表8-2. Fault Table

Conditions

EN

VOUT

Latch

FLT

SNS

Behavior

Recovery

L

x

Hi-Z

0

Normal

V_BB–

Normal

H

x

I_Load/ K_snsNormal

I_LOAD

R_ON

×

Holds the current at the current limit

until thermal shutdown or when the

overcurrent event is removed. Typical

deglitch time for device to recognize

overcurrent fault and begin to act on it

is 2.5 μs.

V_BB–

I_LIM

R_LOAD

Overcurrent

L

V_SNSFH

×

26

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

Conditions

表8-2. Fault Table (continued)

EN

VOUT

Latch

FLT

SNS

Behavior

Recovery

Shuts down when devices hits relative Auto retries when T_HYS

or absolute thermal shutdown. Typical is met and it has been

deglitch time for device to recognize

longer than t_RETRY

overcurrent fault and begin to act on it amount of time

is 2.5 μs. Typical deglitch time for

device to recognize a T_ABSfault is 20

μs.

H

H/L

L

V_SNSFH

STG, Relative

Thermal

Shutdown,

Shuts down when devices hits relative Stays off until latch or

or absolute thermal shutdown. Typical enable is toggled

deglitch time for device to recognize

overcurrent fault and begin to act on it

is 2.5 μs. Typical deglitch time for

Absolute Thermal

Shutdown

H

H/L

H

L

V_SNSFH

device to recognize a T_ABSfault is 20

μs.

Normal behavior, user can judge

through SNS pin output if it is an open

load or not.

I_Load

/

H

L

x

H

x

Hi-Z

K_SNS= ~0

Open load, STB

Reverse Polarity

Internal pullup resistor is active. If V_BBClears when fault goes

away

–V_OUT< V_OLthen fault active. Typical

deglitch time before fault is indicated is

700 μs.

L

x

V_SNSFH

Channel turns on to lower power

dissipation. Current into ground pin is

limited by external ground network.

x

表8-3. Deglitch Time for Each Fault Condition

Fault Condition

Deglitch Time

ILIM

TREL

2.5 µs

TABS

20 µs

Open load

700 µs

8.3.4.1 Short-Circuit and Overload Protection

TPS1HC100-Q1 provides output short-circuit protection to ensure that the device prevents current flow in the

event of a low impedance path to GND, removing the risk of damage or significant supply droop. The device is

ensured to protect against short-circuit events regardless of the state of the ILIM pins and with up to 28-V supply

at 125°C.

图8-10 shows the behavior of the TPS1HC100-Q1 when the device is enabled into a short-circuit.

Submit Document Feedback

27

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

Current (A)

I_{CL_ENPS}

I_CL

Thermal Shutdown

t_RETRY

Time (s)

图8-10. Enable into Short-Circuit Behavior (LATCH = 0)

Due to the low impedance path, the output current rapidly increases until it hits the current limit threshold. Due to

the response time of the current limiting circuit, the measured maximum current can temporarily exceed the I_CL

value defined as I_{CL_ENPS}, however, it settles to the current limit regulation value. The amount of deglitch timing

between when the overload is recognized and when the system begins to react on it is about 2.5 μs.

In this state, high power is dissipated in the FET, so eventually the internal thermal protection temperature for the

FET is reached and the device safely shuts down. Then, if LATCH pin is low, the part waits t_RETRYamount of

time and turn back on, unless a T_ABSfault was triggered in which case it can AND the t_RETRYtimer and the T_HYS

temperature reduction.

图8-11 shows the behavior of the TPS1HC100-Q1 when a short-circuit occurs when the device is in the on-state

and already outputting current. When the internal pass FET is fully enabled, the current clamping settling time is

slower so to ensure overshoot is limit. The device implements a fast-trip level at a level I_OVCR. When this fast-trip

threshold is hit, the device immediately shuts off for a short period of time before quickly re-enabling and

clamping the current to I_CLlevel after a brief transient overshoot to the higher peak current (I_{CL_ENPS}) level. The

device then keeps the current clamped at the regulation current limit until the thermal shutdown temperature is

hit and the device safely shuts off.

Current (A)

I_OVCR

I_{CL_ENPS}

I_CL

Thermal Shutdown

t_RETRY

I_NOM

Time (s)

图8-11. On-State Short-Circuit Behavior

Overload Behavior shows the behavior of the TPS1HC100-Q1 when there is a small change in impedance that

sends the load current above the I_CLthreshold. The current rises (commonly referred to as current creep) to

I_{CL_LINPK}above the regulation level. Then the current limit regulation loop kicks in and the current drops to the

I_CLvalue.

28

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

Current (A)

I_{CL_ENPS}

I_{CL_LINPK}

I_CL

I_NOM

t_RETRY

Thermal Shutdown

Time (s)

图8-12. Overload Behavior (Current Creep)

In all of these cases, the internal thermal shutdown is safe to hit repetitively. There is no device risk or lifetime

reliability concerns from repeatedly hitting this thermal shutdown level.

8.3.4.2 Open-Load and Short-to-Battery Detection

When the main channel is enabled faults are diagnosed by reading the voltage on the SNS or FLT pin and

evaluated by the user. A benefit of high-accuracy current sense is that this device can achieve a very low open-

load detection threshold, which correspondingly expands the normal operation region. TI suggests 5 mA as the

upper limit for the open-load detection threshold and 15 mA as the lower limit for the normal operation current. In

图 8-13, the recommended open-load detection region is shown as the dark-shaded region and the light-shaded

region is for normal operation. As a guideline, do not overlap these two regions.

Normal Operation

Region

27.5 mA

10% Tolerance

25 mA

22.5 mA

18 mA

80% Tolerance

On State, Open Load/

Short to Battery

10 mA

2 mA

图8-13. On-State Open-Load Detection and Normal-Operation Diagram

In the off state, if a load is connected, the output voltage is pulled to 0 V. In the case of an open load, the output

voltage is close to the supply voltage, V_BB– V_OUT< V_ol,off. The FLT pin goes low to indicate the fault to the

MCU, and the SNS pin is pulled up to I_SNSFH. There is always a leakage current I_ol,offpresent on the output, due

to the internal logic control path or external humidity, corrosion, and so forth. Thus, TI implemented an internal

pullup resistor to offset the leakage current. This pullup current must be less than the output load current to avoid

false detection in the normal operation mode. To reduce the standby current, TI implemented a switch in series

with the pullup resistor controlled by the DIAG_EN pin. The pull up resistor value is R_pu≤150 kΩ.

Submit Document Feedback

29

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

VBAT

VBB

DIAG_EN

OPEN LOAD

SNS

Vol,off

FAULT

Rpu

FLT

OUT

EN

GND

图8-14. Open-Load Detection Circuit

8.3.4.3 Short-to-Battery Detection

Short-to-battery detection has the same detection mechanism and behavior as open-load detection, both in the

on-state and off-state. There is no way to differentiate between open load and short-to-battery in this device, but

the system does detect the fault and protect accordingly. See 表8-2 for more details.

8.3.4.4 Reverse-Polarity and Battery Protection

Reverse-polarity, commonly referred to as reverse battery, occurs when the ground of the device goes to the

battery potential, V_GND= V_BAT, and the supply pin goes to ground, V_BB= 0 V. In this case, if the EN pin has a

path to the ground plane, then the FET turns on to lower the power dissipation through the main channel and

prevent current flow through the body diode. Note that the resistor/diode ground network (if there is not a central

blocking diode on the supply) must be present for the device to protect itself during a reverse battery event.

Smart High Side Switch

VBB

MCU

R_PROT

EN

GPIO

Gate Driver

VOUT

GND

R_LOAD

R_GND

图8-15. Reverse Battery Circuit

For more external protection circuitry information, see Reverse Current Protection. See the fault truth table for

more details.

30

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

8.3.4.5 Latch-Off Mode

The TPS1HC100-Q1 comes with a latch functionality that decides after the channel is shut down due to a fault,

whether or not to automatically try and turn back on, or stay off until other action is taken. This action is done by

holding the LATCH pin high for latch-off functionality or holding LATCH low for auto-retry functionality.

The order that occurs is:

1. Device shuts down due to fault (relative thermal shutdown)

2. Wait t_RETRY

3. If LATCH = 0

a. Turn back on the channel

4. If LATCH = 1

a. Keep off until LATCH = 0 || EN = 0

i. Then if LATCH = 0 and EN = 1

1. Turn on channel into auto-retry mode

ii. If LATCH = 1 and EN = 1

1. Turn on channel into latch mode where if another fault occurs then output is latched off again

For more information, see Thermal Protection Behavior.

8.3.4.6 Thermal Protection Behavior

The thermal protection behavior can be split up into three categories of events that can happen. 图 8-16 shows

each of these categories.

1. Relative thermal shutdown: the device is enabled into an overcurrent event. The DIAG_EN pin is high so

that diagnostics can be monitored on SNS and FLT (however, DIAG_EN being high is not necessary for all

protection features to function). The output current rises up to the I_ILIMlevel and the FLT goes low while the

SNS goes to V_SNSFH. With this large amount of current going through the junction temperature of the FET

increases rapidly with respect to the controller temperature. When the power FET temperature rises T_REL

amount above the controller junction temperature ΔT = T_FET–T_CON> T_REL, the device shuts down. The

faults are continually shown on SNS and FLT and the part waits for the t_RETRYtimer to expire. When t_RETRY

timer expires, because the LATCH pin is low and EN is still high, the device comes back on into this I_ILIM

condition.

2. Absolute thermal shutdown: the device is still enabled in an overcurrent event with DIAG_EN high and

LATCH still low. However, in this case the junction temperature rises up and hits an absolute reference

temperature, T_ABS, and then shuts down. The device does not recover until both T_J< T_ABS–T_hysand the

t_RETRYtimer has expired.

3. Latch-off mode: the device is enabled into an overcurrent event. The DIAG_EN pin is high so that

diagnostics can be monitored on SNS and FLT. The output current rises up to the I_ILIMlevel and the FLT

goes low while the SNS goes to V_SNSFH. If the part shuts down due to a thermal fault, either relative thermal

shutdown or absolute thermal shutdown, the device does not enable the channel until either the LATCH pin

or the EN pin is toggled.

Submit Document Feedback

31

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

1

2

3

DIAG_EN

LATCH

EN

TABS

T_HYS

Junction

Temperature

t_RETRY

T_REL

Output

I_LIM

Current

V_SNSFH

VSNS

FLT

图8-16. Thermal Behavior

8.3.4.7 UVLO Protection

The device monitors the supply voltage V_BBto prevent unpredicted behaviors in the event that the supply

voltage is too low. When the supply voltage falls down to V_UVLOF, the output stage is shut down automatically.

When the supply rises up to V_UVLOR, the device turns on. If an overcurrent event trips the UVLO threshold, the

device shuts off and comes back on into a current limit safely.

32

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

8.3.4.8 Loss of GND Protection

When loss of GND occurs, output is turned off regardless of whether the input signal is high or low.

Case 1 (loss of device GND): loss of GND protection is active when the thermal pad (Tab), I_{C_GND}, and current

limit ground are one trace connected to the system ground, as shown in 图8-17.

Smart High Side Switch

VBB

EN

5V

FLT

LATCH

VOUT

MCU

DIAG_EN

SNS

ILIM

Load

GND

图8-17. Loss of Device GND

Submit Document Feedback

33

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

Case 2 (loss of module GND): when the whole ECU module GND is lost, protections are also active. At this

condition, the load GND remains connected.

Smart High Side Switch

VBB

EN

5V

FLT

LATCH

VOUT

MCU

DIAG_EN

SNS

ILIM

Load

GND

图8-18. Loss of Module GND

34

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

8.3.4.9 Loss of Power Supply Protection

When loss of supply occurs, output is turned off regardless of whether the input is high or low. For a resistive or

capacitive load, loss of supply protection is easy to achieve due to no more power. The worst case is a charged

inductive load. In this case, the current is driven from all of the IOs to maintain the inductance output loop. TI

recommends either the MCU serial resistor plus the GND network (diode and resistor in parallel) or external free-

wheeling circuitry.

Smart High Side Switch

VBB

EN

5V

FLT

LATCH

VOUT

MCU

DIAG_EN

D

Z

SNS

ILIM

L

GND

R_GND

D_GND

图8-19. Loss of Battery

Submit Document Feedback

35

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

8.3.4.10 Reverse Current Protection

Method 1: block diode connected with V_BB. Both the device and load are protected when in reverse polarity. The

blocking diode does not allow any of the current to flow during reverse battery condition.

B

5V

UT

MCU

d

图8-20. Reverse Protection With Block Diode

36

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

Method 2 (GND network protection): only the high-side device is protected under this connection. The load

reverse current is limited by the impedance of the load itself. Note when reverse polarity happens, the

continuous reverse current through the power FET must not make the heat build up be greater than the absolute

maximum junction temperature. This can be calculated using the R_ON(REV)value and the R_θJAspecification. In

the reverse battery condition it is important that the FET comes on to lower the power dissipation. This action is

achieved through the path from EN to system ground where the positive voltage is being applied. No matter what

types of connection are between the device GND and the board GND, if a GND voltage shift happens, ensure

the following proper connections for the normal operation:

• Connect the current limit programmable resistor to the device GND.

2

V_BAT

T

=

R

B

5V

UT

MCU

d

R_GND

D_GND

图8-21. Reverse Protection With GND Network

• Recommendation –resistor and diode in parallel: a peak negative spike can occur when the inductive

load is switching off, which can damage the HSD or the diode. So, TI recommends a resistor in parallel with

the diode when driving an inductive load. The recommended selection are a 1-kΩresistor in parallel with an

I_F> 100-mA diode. If multiple high-side switches are used, the resistor and diode can be shared among

devices.

If multiple high-side power switches are used, the resistor can be shared among devices.

• Ground Resistor: The higher resistor value contributes to a better current limit effect when the reverse

battery or negative ISO pulses.

œV

(

)

CC

R_GND

í

œI

GND

(11)

where

– –V_CCis the maximum reverse battery voltage (typically –16 V).

– –I_GNDis the maximum reverse current the ground pin can withstand, which is available in the Absolute

Maximum Ratings.

• Ground Diode: A diode is needed to block the reverse voltage, which also brings a ground shift (≈600 mV).

Additionally, the diode must be ≈200-V reverse voltage for the ISO 7637 pulse 1 testing so that it does not

get biased.

Submit Document Feedback

37

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

8.3.4.11 Protection for MCU I/Os

In many conditions, such as the negative ISO pulse, or the loss of battery with an inductive load, a negative

potential on the device GND pin can damage the MCU I/O pins (more likely, the internal circuitry connected to

the pins). Therefore, the serial resistors between MCU and HSS are required.

Also, for proper protection against loss of GND, TI recommends 5-kΩresistance for the R_PROTresistors.

Smart High Side Switch

VBB

5k

EN

5V

5k

FLT

Reverse FET

Turn On

LATCH

5k

VOUT

MCU

DIAG_EN

5k

SNS

ILIM

Load

GND

R_GND

D_GND

图8-22. MCU I/O Protections

8.3.5 Diagnostic Enable Function

The diagnostic enable pin, DIAG_EN, offers multiplexing of the microcontroller diagnostic input for current sense

or digital status, by sharing the same sense resistor and ADC line or I/O port among multiple devices.

In addition, during the output-off period, the diagnostic disable function lowers the current consumption for the

standby condition. The three working modes in the device are normal mode (I_Q), standby mode (I_STBY), and

standby mode with diagnostic (I_DIA). If off-state power saving is required in the system, the standby current is <

500 nA with DIAG_EN low. If the off-state diagnostic is required in the system, the typical standby current is

around 1 mA with DIAG_EN high.

8.4 Device Functional Modes

8.4.1 Working Mode

The three working modes in the device are normal mode, standby mode, and standby mode with diagnostic. If

an off-state power saving is required in the system, the standby current is less than 500 nA with EN and

DIAG_EN low. If an off-state diagnostic is required in the system, the typical standby current is around 1.2 mA

with DIAG_EN high. Note that to enter standby mode requires IN low and t > t_STBY. t_STBYis the standby-mode

38

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

deglitch time, which is used to avoid false triggering or interfere with PWM switching. 图 8-23 shows a work-

mode state-machine state diagram.

Standby Mode

(EN Low, DIAG_EN Low)

DIAG_EN low and

EN high to low and

t > t_STBY

DIAG_EN

high to Low

and t > t_STBY

EN low to high

DIAG_EN

low to high

IN high to low and

DIAG_EN high

Normal Mode

(EN high)

Diagnostic Mode

(EN low, DIAG_EN high)

EN low to high

图8-23. Work-Mode State Machine

Submit Document Feedback

39

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

9 Application and Implementation

备注

以下应用部分中的信息不属于TI 器件规格的范围，TI 不担保其准确性和完整性。TI 的客户应负责确定

器件是否适用于其应用。客户应验证并测试其设计，以确保系统功能。

9.1 Application Information

The following discussion notes how to implement the device to distinguish the different fault modes and

implement a transient-pulse immunity test.

In some applications, open load, short-to-battery, and short to GND must be distinguished from each other. This

action requires two steps.

9.2 Typical Application

图9-1 shows an example of how to design the external circuitry parameters.

C_VBB

C_IC

+

TVS

C_BULK

LDO

(DC/DC)

R_PROT

VCC

I/O

VOUT

R_PROT

I/O

C_VOUT

R_PROT

MCU

R_PROT

I/O

ADC

R_ILIM

C_FILTERR_SNS

GND

R_GND

图9-1. Typical Application Circuitry

40

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

9.2.1 Design Requirements

Component

Description

Purpose

TVS

SMBJ39CA (optional)

220 nF (optional)

100 nF

Filter voltage transients coming from battery (ISO7637-2)

Better EMI performance

CVBB

CIC

Minimal amount of capacitance on input for EMI mitigation

There to hold the rail for the LDO; however, helps to filter voltage

transients on supply rail. Not a requirement.

CBULK

10 uF (optional)

RPROT

RILIM

Protection resistor for microcontroller and device I/O pins

Set current limit threshold

5 kΩ

7 kΩ–70 kΩ

1kΩ

RSNS

Translate the sense current into sense voltage.

Coupled with RPROT on the SNS line creates a low pass filter to filter out

noise going into the ADC of the MCU

CFILTER

100 nF

CVOUT

RGND

DGND

22 nF

Improves EMI performance, filtering of voltage transients

Stabilize GND potential during turn-off of inductive load

Keeps GND close to system ground during normal operation

1 kΩ

BAS21 Diode

9.2.2 Detailed Design Procedure

To keep maximum voltage on the SNS pin at an acceptable range for the system, calculate the R_SNSas in 方程

式1. To achieve better current sense accuracy. A 1% accuracy or better resistor is preferred.

(V_SNSFH–V_HR) × K_SNS/ I_LOAD,max≤R_SNS≤V_ADC,min× K_SNS/ I_LOAD,min

(12)

表9-1. Typical Application

Parameter

Value

5 V

V_{DIAG_EN}

I_LOAD,max

I_LOAD,min

V_ADC,min

V_HR

2 A

5 mA

5 mV

1 V

For this application, an RSNS value of approximately 1 kΩcan be chosen to satisfy the equation requirements.

(5 V –1 V) × 1040 / 4 A ≤≈1 kΩ≤5 mV × 1040 / 5 mA

(13)

In other applications, more emphasis can be put on the lower end measurable values, which can increase

RSNS. Likewise if the higher currents are of more interest the R_SNScan be decreased. Note that the maximum

current that can be measured without saturation is 6 A.

Having the maximum SNS voltage scale with the DIAG_EN voltage removes the need for a Zener diode on the

SNS pin going to the ADC.

The current limit must be set to an acceptable level, so with the KCL tolerances, the current limit of 4A is chosen.

To set the programmable current limit value at 4 A , calculate the R_LIMas in Equation 12.

R_LIM= K_CL/ I_LIM= 45 / 4 = 11.25 kΩ

(14)

For a more accurate current limit estimation with the error tolerances of KCL see the Current Limit Accuracy

section and use the graph to estimate the error at each desired current limit value.

Submit Document Feedback

41

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

TI recommends R_PROT= 5 kΩto ensure the current going into the digital pins (EN, DIAG_EN, LATCH) is limited.

TI recommends a 1-kΩresistor and 200-V, 0.2-A diode (BAS21 for example) for the GND network.

9.2.2.1 Dynamically Changing Current Limit

The current limit threshold is able to be changed dynamically by altering the resistance going from the current

limit pin to the ground of the device on the fly. This alteration allows the system to have a different current limit

for start-up, when there can be significant inrush current, and during normal operation. The way this is commonly

done is by putting two resistors in parallel on the ILIM pin and having a switch to enable or disable one of the

resistors. This set-up can be seen in the figure below. Alternatively, a digital potentiometer can be used to adjust

the impedance on the ILIM pin on the fly. Care must be taken so that the capacitance on the ILIM pin is below

approximately 100 pF because it can cause the current regulation loop to become unstable. The most common

application where this feature is useful is capacitive loads.

VBAT

VBB

Smart High Side Switch

EN

Gate Driver

K_CL

K_CL(R_ILIM1+ R_ILIM2

R_ILIM1R_ILIM2

)

I_LIM1

=

I_LIM2

=

SW

R_ILIM

ILIM

Current Limiting

Circuit

(V_BB– V_OUT

R_LOAD

)

I_NOM

=

VOUT

R_ILIM2

R_ILIM1

C_LOAD

GND

R_LOAD

I_LIM= C_LOADx dV_DS/dt

图9-2. Dynamic Changing Current Limit Setup

In a capacitive charging case, the initial current to charge the capacitor is the inrush current. Depending on the

system requirements, dynamically changing the current limit can help either charge up a capacitor faster or

charge up a larger capacitor. To allow a higher inrush level of current through in the beginning, the switch can be

closed making the current limit be according to the equation below.

I_LIM2= K_CL(R_ILIM1+ R_ILIM2) / (R_ILIM1× R_ILIM2

)

(15)

When the inrush event is over and the output voltage is charged up, the switch opens and the current limit is just

the R_ILIM1equivalent level. This timing can be seen in the figure below.

42

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

V_OUT(V)

V_BB

V_BB- V_DS

Time (s)

Current (A)

I_ILIM2

I_ILIM1

I_NOM

dt

Time (s)

t_SW

图9-3. Capacitive Charging Changing Current Limit

Alternatively, if the switch is open, the current limit starts out at a lower value and then the switch can be closed

when the capacitance gets charged up. This lower current limit level allows higher value capacitance’s to be

charged up. The timing diagram can be seen below.

V_OUT(V)

V_BB

V_BB- V_DS

Time (s)

Current (A)

I_ILIM2

I_NOM

I_ILIM1

dt

Time (s)

t_SW

图9-4. Large Capacitive Charging Changing Current Limit

9.2.2.2 AEC Q100-012 Test Grade A Certification

Short-circuit reliability is critical for smart high-side power switch devices. The AEC-Q100-012 standard is used

to determine the reliability of the devices when operating in a continuous short-circuit condition. Different grade

levels are specified according to the pass cycles. This device is qualified with the highest level, Grade A, 1

million times short-to-GND certification.

Three test modes are defined in the AEC Q100-012 standard. See 表 9-2 for cold repetitive short-circuit test –

long pulse, cold repetitive short-circuit test –short pulse, and hot repetitive short-circuit test.

Submit Document Feedback

43

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

表9-2. Tests

Test Items

Test Condition

Test Cycles

1M

Cold repetitive short-circuit test –short pulse

Cold repetitive short-circuit test –long pulse

Hot repetitive short-circuit test

–40°C, 10-ms pulse, cool down

–40°C, 300-ms pulse, cool down

25°C, continuous short

1000 hr

Different grade levels are specified according to the pass cycles. The TPS1HC100-Q1device gets the

certification of Grade A level, 1 million short-to-GND cycles, which is the highest test standard in the market.

表9-3. Grade Levels

Grade

Number of Cycles

Lots,Samples Per Lot

Number of Fails

A

B

C

D

E

F

> 1000000

3, 10

0

> 300000 to 1000000

> 100000 to 300000

> 30000 to 100000

> 10000 to 30000

> 3000 to 10000

> 1000 to 3000

300 to 1000

G

H

O

< 300

9.2.2.3 EMC Transient Disturbances Test

Due to the severe electrical conditions in the automotive environment, immunity capacity against electrical

transient disturbances is required, especially for a high-side power switch, which is connected directly to the

battery. Detailed test requirements are in accordance with the ISO 7637-2:2011 and ISO 16750-2:2010

standards. The TPS1HC100-Q1 device is tested and certificated by a third-party organization.

表9-4. ISO 7637-2:2011(E) in 12-V System^{(1) (2) (3) (4)}

Test Pulse Severity Level

and vs Accordingly

Minimum

Number of

Duration (t_d) Pulses or Test

Time

Burst-Cycle Pulse-

Repetition Time

Function

Performance

Status

Input

Resistance

(Ω)

Test

Item

Pulse

Level

Vs/V

MIN

MAX

Classification

1

III

IV

2 ms

50 µs

500 pulses

10 pulses

1h

0.5 s

0.2 s

e s

5 s

10

Status II

–112

55

2a

2b

3a

3b

2

0 to 0.05

50

10

0.2 to 2 s

0.1 µs

0.5 s

5 s

90 ms

100 ms

–220

150

0.1 µs

1h

50

(1) Tested both under input low condition and high condition.

(2) Considering the worst test condition, it is tested without any filter capacitors in V_BBand V_OUT

(3) GND pin network is a 1-kΩresistor in parallel with a diode BAS21-7-F.

(4) Status II: the function does not perform as designed during the test, but returns automatically to normal operation after the test.

表9-5. ISO 16750-2:2010(E) Load Dump Test B in 12-V System^{(1) (2) (3) (4) (5)}

Test Pulse Severity Level

and vs Accordingly

Minimum

Number of

Pulses or Test

Time

Burst- Cycle Pulse-

Repetition Time

Function

Performance

Status

Input

Resistance

(Ω)

Test

Item

Pulse

Duration (t_d)

Level

Vs/V

MIN (s)

MAX (s)

Classification

Test B

35

40 to 400 ms

5 pulses

60

e

0.5 to 4

Status II

(1) Tested both under input low condition and high condition (DIAG_EN, EN, and VBB are all classified as inputs).

(2) Considering the worst test condition, the device is tested without any filter capacitors on VBB and VOUT.

(3) The GND pin network is a 1-kΩresistor in parallel with a diode BAS21-7-F.

(4) Status II: the function does not perform as designed during the test, but returns automatically to normal operation after the test.

(5) Select a 39-V external suppressor.

44

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

9.2.3 Application Curves

图 9-5 shows a test example of charging a 470-μF capacitor. Test conditions: V_BB= 13.5 V, input is from low to

high, load is a 470-µF capacitive load, ILIM pin is shorted to GND. CH4 is the output current. CH3 is the input

step. CH2 is the output voltage, VOUT. CH1 is the supply voltage, VBB

图 9-6 shows a test example of a enable into short-circuit inrush current limit. Test conditions: V_BB= 13.5 V, input

is low to high, load is 5 µH + 100 mΩ, ILIM pin is shorted to GND. CH4 is the output current. CH3 is the input

step. CH2 is the output voltage, VOUT. CH1 is the supply voltage, VBB

图 9-7 shows a test example of a load step from 500 mA to 3 A back to 500 mA. Test conditions: V_BB= 13.5 V,

input is high, load is 6.75 Ωand then changed to 4.5 Ωthen back to 6.75 Ω, ILIM pin is shorted to GND. CH4 is

the output current. CH3 is the SNS pin. CH2 is the output voltage, VOUT. CH1 is the supply voltage, VBB

图9-5. Charging a 470-μF Capacitor

图9-6. Enable into Short Circuit

图9-7. Load Step

Submit Document Feedback

45

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

10 Power Supply Recommendations

The device is qualified for both automotive and industrial applications. The normal power supply connection is a

12-V automotive system. The supply voltage must be within the range specified in the Recommended Operating

Conditions.

VBB Voltage Range

Note

Extended lower 12-V automotive battery operation such as cold crank and start-stop. Device is fully functional

but current sense and current limit accuracies do not apply as well as timing parametrics can deviate from

specification.

3 V to 6 V

Nominal 12-V automotive battery voltage range. All parametric specifications apply and the device is fully

functional and protected.

6 V to 18 V

18 V to 28 V

35 V

Extended upper 12-V automotive battery operation such as double battery. Device is fully functional and

protected but timing parametrics can deviate from specifications

Load dump voltage. Device is operational and lets the pulse pass through without being damaged but does not

protect against short circuits.

11 Layout

11.1 Layout Guidelines

To prevent thermal shutdown, T_Jmust be less than 150°C. If the output current is very high, the power

dissipation can be large. The HTSSOP package has good thermal impedance. However, the PCB layout is very

important. Good PCB design can optimize heat transfer, which is absolutely essential for the long-term reliability

of the device.

• Maximize the copper coverage on the PCB to increase the thermal conductivity of the board. The major heat-

flow path from the package to the ambient is through the copper on the PCB. Maximum copper is extremely

important when there are not any heat sinks attached to the PCB on the other side of the board opposite the

package.

• Add as many thermal vias as possible directly under the package ground pad to optimize the thermal

conductivity of the board.

• Plate shut or plug and cap all thermal vias on both sides of the board to prevent solder voids. To ensure

reliability and performance, the solder coverage must be at least 85%.

11.2 Layout Example

11.2.1 Without a GND Network

Without a GND network, tie the thermal pad directly to the board GND copper for better thermal performance.

46

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

R_PROT

14

13

C_VBB

GND

NC

1

2

3

4

5

6

7

R_PROT

VBB

EN

DIAG_EN

FAULT

12

11

R_PU

R_PROT

Thermal

Pad

NC

R_PROT

10

LATCH

SNS

VOUT

R_PROT

9

8

R_SNS

C_FILTER

C_VOUT

ILIM

NC

R_LIM

图11-1. Layout Without a GND Network

Submit Document Feedback

47

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

11.2.2 With a GND Network

With a GND network, tie the thermal pad with a single trace through the GND network to the board GND copper.

R_GND

D_GND

R_PROT

C_{VBB_IC}

C_VBB

G

R_PROT

DIAG_

FAU

LAT

S

R_PU

R_PROT

C_VOUT

R_SNS

C_FILTER

ILIM

R_LI

图11-2. Layout With a GND Network

11.3 Thermal Considerations

This device possesses thermal shutdown (T_ABS) circuitry as a protection from overheating. For continuous

normal operation, the junction temperature must not exceed the thermal-shutdown trip point. If the junction

temperature exceeds the thermal-shutdown trip point, the output turns off. When the junction temperature falls

below the thermal shutdown hysteresis, the output turns on again.

Calculate the power dissipated by the device according to Equation 13.

P_T= I_OUT²× R_DSON+ V_BB× I_Q

(16)

where

• P_T= total power dissipation of the device

After determining the power dissipated by the device, calculate the junction temperature from the ambient

temperature and the device thermal impedance.

T_J= T_A+ R_θJA× P_T

(17)

For more information, please see the How to Drive Resistive, Inductive, Capacitive, and Lighting Loads

application note.

48

Submit Document Feedback

Product Folder Links: TPS1HC100-Q1

TPS1HC100-Q1

ZHCSLK6A –JULY 2021 –REVISED DECEMBER 2021

www.ti.com.cn

12 Device and Documentation Support

12.1 Documentation Support

12.1.1 Related Documentation

For related documentation see the following:

• Texas Instruments, How to Drive Resistive, Inductive, Capacitive, and Lighting Loads application note

12.2 接收文档更新通知

要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新进行注册，即可每周接收产品信息更

改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。

12.3 支持资源

TI E2E^™支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解

答或提出自己的问题可获得所需的快速设计帮助。

链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅

TI 的《使用条款》。

12.4 Trademarks

TI E2E^™is a trademark of Texas Instruments.

所有商标均为其各自所有者的财产。

12.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled

with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may

be more susceptible to damage because very small parametric changes could cause the device not to meet its published

specifications.

12.6 术语表

TI 术语表

本术语表列出并解释了术语、首字母缩略词和定义。

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Submit Document Feedback

49

Product Folder Links: TPS1HC100-Q1

重要声明和免责声明

TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，

不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担

保。

这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验

证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。

这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。

您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成

本、损失和债务，TI 对此概不负责。

TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改

TI 针对 TI 产品发布的适用的担保或担保免责声明。

TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE

邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265


型号：	TPS1HC100-Q1
厂家：	TEXAS INSTRUMENTS
描述：	汽车类 100mΩ、2.5A 单通道智能高侧开关开关
文件：	总51页 (文件大小：2593K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

TPS1HC100-Q1 [TI]

相关型号：

TPS1HC100BQPWPRQ1

TPS1HC30-Q1

TPS1HC30BQPWPRQ1

TPS20001C

TPS2000B

TPS2000C

TPS2000CDGK

TPS2000CDGKR

TPS2000CDGN

TPS2000CDGNR

TPS2001C

TPS2001C-2