TPS2062-1_14 [TI]
CURRENT-LIMITED, POWER-DISTRIBUTION SWITCHES;
| 型号： | TPS2062-1_14 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | CURRENT-LIMITED, POWER-DISTRIBUTION SWITCHES |
| 文件： | 总28页 (文件大小：514K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS2062-1
TPS2065-1
D−16
D−8
DGN−8
TPS2066-1
www.ti.com
SLVS714–FEBRUARY 2007
CURRENT-LIMITED, POWER-DISTRIBUTION SWITCHES
FEATURES
TPS2065-1
DGN PACKAGE
(TOP VIEW)
TPS2062/TPS2066
D AND DGN PACKAGE
(TOP VIEW)
•
•
•
•
•
Output Discharge Function
70-mΩ High-Side MOSFET
1-A Continuous Current
Thermal and Short-Circuit Protection
Accurate Current Limit
(1.1 A min, 1.9 A max)
DESCRIPTION
•
•
•
•
•
•
•
•
Operating Range: 2.7 V to 5.5 V
0.6-ms Typical Rise Time
The TPS206x-1 power-distribution switches are
intended for applications where heavy capacitive
loads and short-circuits are likely to be encountered.
This device incorporates 70-mΩ N-channel MOSFET
power switches for power-distribution systems that
require multiple power switches in a single package.
Each switch is controlled by a logic enable input.
Gate drive is provided by an internal charge pump
designed to control the power-switch rise times and
fall times to minimize current surges during
switching. The charge pump requires no external
components and allows operation from supplies as
low as 2.7 V.
Undervoltage Lockout
Deglitched Fault Report (OC)
No OC Glitch During Power Up
1-µA Maximum Standby Supply Current
Ambient Temperature Range: -40°C to 85°C
ESD Protection
APPLICATIONS
•
Heavy Capacitive Loads
•
Short-Circuit Protections
These switches provide a discharge function that
provides a controlled discharge of the output voltage
stored on the output capacitor.
When the output load exceeds the current-limit threshold or a short is present, the device limits the output
current to a safe level by switching into a constant-current mode, pulling the overcurrent (OCx) logic output low.
When continuous heavy overloads and short-circuits increase the power dissipation in the switch, causing the
junction temperature to rise, a thermal protection circuit shuts off the switch to prevent damage. Recovery from a
thermal shutdown is automatic once the device has cooled sufficiently. Internal circuitry ensures that the switch
remains off until valid input voltage is present. This power-distribution switch is designed to set current limit at
1.5 A typically.
GENERAL SWITCH CATALOG
TPS2042B 500 mA
TPS2052B 500 mA
80 mΩ, dual
80 mΩ, quad
33 mΩ, single
80 mΩ, dual
TPS201xA 0.2 A − 2 A
80 mΩ, triple
80 mΩ, quad
TPS2046
TPS2056
TPS2062
TPS2066
TPS2060
TPS2064
250 mA
250 mA
1 A
1 A
1.5 A
1.5 A
TPS202x
TPS203x
0.2 A − 2 A
0.2 A − 2 A
TPS2080
500 mA
500 mA
500 mA
250 mA
250 mA
250 mA
TPS2081
TPS2082
TPS2090
TPS2091
TPS2092
TPS2043B 500 mA
TPS2053B 500 mA
TPS2047 250 mA
TPS2057 250 mA
TPS2085
500 mA
500 mA
500 mA
250 mA
80 mΩ, single
260 mΩ
1.3 Ω
TPS2014
TPS2015
600 mA
1 A
TPS2100/1
TPS2044B 500 mA
TPS2054B 500 mA
TPS2048 250 mA
TPS2058 250 mA
TPS2086
TPS2087
TPS2095
IN1 500 mA
IN2 10 mA
IN1
IN2
TPS2041B 500 mA
TPS2051B 500 mA
OUT
TPS2102/3/4/5
IN1 500 mA
IN2 100 mA
TPS2045
TPS2055
TPS2061
TPS2065
250 mA
250 mA
1 A
TPS2096 250 mA
TPS2097 250 mA
1 A
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains
Copyright © 2007, Texas Instruments Incorporated
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TPS2062-1
TPS2065-1
TPS2066-1
www.ti.com
SLVS714–FEBRUARY 2007
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE OPTION AND ORDERING INFORMATION(1)
RECOMMENDED
MAXIMUM
CONTINUOUS
LOAD CURRENT
TYPICAL
SHORT-CIRCUIT
CURRENT LIMIT
AT 25°C
PACKAGED
DEVICES
(2)
NUMBER OF
SWITCHES
TA
ENABLE
MSOP (DGN)
SOIC(D)
Active high
Active low
Active high
Single
Dual
TPS2065DGN-1
–40°C to 85°C
1 A
1.5 A
TPS2062D-1
TPS2066DGN-1
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) The package is available taped and reeled. Add an R suffix to device types (e.g., TPS2062-1DR).
ORDERING INFORMATION
TA
SOIC(D)
STATUS
Active
MSOP (DGN)
STATUS
Active
TPS2062D
–40°C to 85°C
Active
TPS2065DGN
TPS2066DGN
Active
Active
Active
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)
UNIT
(2)
Input voltage range, VI(IN)
–0.3 V to 6 V
-0.3 V to 6 V
Output voltage range, VO(OUT)(2), VO(OUTx)
Input voltage range, VI(EN), VI(EN), VI(ENx), VI(ENx)
Voltage range, VI(OC), VI(OCx)
–0.3 V to 6 V
–0.3 V to 6 V
Continuous output current, IO(OUT), IO(OUTx)
Continuous total power dissipation
Internally limited
See Dissipation Rating Table
-40°C to 125°C
–65°C to 150°C
2 kV
Operating virtual junction temperature range, TJ
Storage temperature range, Tstg
Human body model MIL-STD-883C
Charge device model (CDM)
Electrostatic discharge (ESD) protection
500 V
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to GND.
2
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TPS2062-1
TPS2065-1
TPS2066-1
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SLVS714–FEBRUARY 2007
DISSIPATING RATING TABLE
T
A ≤ 25°C
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
PACKAGE
POWER RATING
D-8
585.82 mW
5.8582 mW/°C
17.123 mW/°C
322.20 mW
941.78 mW
234.32 mW
684.33 mW
DGN-8
1712.3 mW
RECOMMENDED OPERATING CONDITIONS
MIN
MAX
5.5
5.5
1
UNIT
V
Input voltage, VI(IN)
2.7
0
Input voltage, VI(EN), VI(EN), VI(ENx), VI(ENx)
V
Continuous output current, IO(OUT), IO(OUTx)
Steady state current through discharge. Device disabled, measured through output pin(s)
Operating virtual junction temperature, TJ
0
A
8
mA
°C
-40
125
ELECTRICAL CHARACTERISTICS
over recommended operating junction temperature range, VI(IN) = 5.5 V, IO = 1 A, VI(/ENx) = 0 V, or VI(ENx) = 5.5 V (unless
otherwise noted)
PARAMETER
TEST CONDITIONS(1)
MIN
TYP MAX
UNIT
POWER SWITCH
Static drain-source on-state resistance,
5-V operation and 3.3-V operation
VI(IN) = 5 V or 3.3 V, IO = 1 A, –40°C ≤ TJ ≤ 125°C
VI(IN) = 2.7 V, IO = 1 A, -40°C ≤ TJ ≤ 125°C
70
75
135
150
mΩ
mΩ
rDS(on)
Static drain-source on-state resistance,
(2)
2.7-V operation
VI(IN) = 5.5 V
VI(IN) = 2.7 V
0.6
0.4
1.5
1
(2)
tr
Rise time, output
Fall time, output
CL = 1 µF, RL = 5 Ω,
TJ = 25°C
ms
VI(IN) = 5.5 V
VI(IN) = 2.7 V
0.05
0.05
0.5
0.5
tf(2)
ENABLE INPUT EN OR EN
VIH
VIL
II
High-level input voltage
2.7 V ≤ VI(IN)≤ 5.5 V
2.7 V ≤ VI(IN)≤ 5.5 V
2
V
Low-level input voltage
Input current
0.8
0.5
3
VI(ENx) = 0 V or 5.5 V, VI(ENx) = 0 V or 5.5 V
CL = 100 µF, RL = 5 Ω
-0.5
µA
ms
(3)
ton
Turnon time
(3)
toff
Turnoff time
CL = 100 µF, RL = 5 Ω
10
CURRENT LIMIT
TJ = 25°C
1.1
1.1
1.5
1.5
2.4
1.9
2.1
3
VI(IN) = 5 V, OUT connected to GND,
device enabled into short-circuit
IOS
Short-circuit output current
A
A
-40°C ≤ TJ≤ 125°C
(3)
IOC_TRIP
Overcurrent trip threshold
VI(IN) = 5 V, current ramp (≤ 100 A/s) on OUT
SUPPLY CURRENT (TPS2065-1)
TJ = 25°C
0.5
0.5
43
43
0
1
10
60
70
No load on OUT, VI(ENx) = 5.5 V,
or VI(ENx) = 0 V
Supply current, low-level output
µA
-40°C ≤ TJ≤ 125°C
TJ = 25°C
No load on OUT, VI(ENx) = 0 V,
or VI(ENx) = 5.5 V
Supply current, high-level output
µA
µA
-40°C ≤ TJ≤ 125°C
TJ = 25°C
Reverse leakage current
VI(OUTx) = 5.5 V, IN = ground(3)
SUPPLY CURRENT (TPS2062-1, TPS2066-1)
TJ = 25°C
0.5
0.5
50
1
20
70
90
No load on OUT, VI(ENx) = 5.5 V,
or VI(ENx) = 0 V
Supply current, low-level output
µA
-40°C ≤ TJ≤ 125°C
TJ = 25°C
No load on OUT, VI(ENx) = 0 V,
or VI(ENx) = 5.5 V
Supply current, high-level output
Reverse leakage current
µA
µA
-40°C ≤ TJ≤ 125°C
TJ = 25°C
50
VI(OUTx) = 5.5 V, IN = ground(3)
0.2
(1) Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account
separately.
(2) Not tested in production, specified by design.
(3) Not tested in production, specified by design.
3
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TPS2062-1
TPS2065-1
TPS2066-1
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SLVS714–FEBRUARY 2007
ELECTRICAL CHARACTERISTICS (continued)
over recommended operating junction temperature range, VI(IN) = 5.5 V, IO = 1 A, VI(/ENx) = 0 V, or VI(ENx) = 5.5 V (unless
otherwise noted)
PARAMETER
UNDERVOLTAGE LOCKOUT
TEST CONDITIONS(1)
MIN
TYP MAX
UNIT
Low-level input voltage, IN
Hysteresis, IN
2
2.5
75
V
TJ = 25°C
mV
OVERCURRENT OC1 and OC2
Output low voltage, VOL(OCx)
Off-state current(3)
IO(OCx) = 5 mA
0.4
1
V
µA
ms
Ω
VO(OCx) = 5 V or 3.3 V
OC deglitch(3)
OCx assertion or deassertion
VCC = 5 V, disabled, IO = 1 mA
4
8
15
Discharge resistance
100
THERMAL SHUTDOWN(4)
Thermal shutdown threshold(3)
Recovery from thermal shutdown(3)
Hysteresis(3)
135
125
°C
°C
°C
10
(4) The thermal shutdown only reacts under overcurrent conditions.
DEVICE INFORMATION
Terminal Functions
TERMINAL
TPS2062-1
I/O
DESCRIPTION
TPS2065-1,
TPS2066-1
NAME
EN
4
-
4
I
I
Enable input, logic low turns on power switch
Enable input, logic high turns on power switch
Ground
EN
-
1
GND
IN
1
2, 3
5
2, 3
5
I
Input voltage
OC
OUT
O
O
Overcurrent, open-drain output, active-low
Power-switch output
6, 7, 8
6, 7, 8
FUNCTIONAL BLOCK DIAGRAM (TPS2065-1)
(See Note A)
CS
OUT
IN
Charge
Pump
EN
Discharge
Control
Current
Limit
EN
Driver
OC
UVLO
Deglitch
Thermal
Sense
GND
Note A: Current sense
4
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TPS2065-1
TPS2066-1
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SLVS714–FEBRUARY 2007
Terminal Functions
TERMINAL
NO.
TPS2065-1,
I/O
DESCRIPTION
NAME
TPS2062-1
TPS2066-1
EN1
EN2
EN1
EN2
GND
IN
3
4
–
–
1
2
8
5
7
6
–
–
3
4
1
2
8
5
7
6
I
I
I
I
Enable input, logic low turns on power switch IN-OUT1
Enable input, logic low turns on power switch IN-OUT2
Enable input, logic high turns on power switch IN-OUT1
Enable input, logic high turns on power switch IN-OUT2
Ground
I
Input voltage
OC1
OC2
OUT1
OUT2
O
O
O
O
Overcurrent, open-drain output, active low, IN-OUT1
Overcurrent, open-drain output, active low, IN-OUT2
Power-switch output, IN-OUT1
Power-switch output, IN-OUT2
FUNCTIONAL BLOCK DIAGRAM (TPS2062-1 and TPS2066-1)
OC1
Thermal
Deglitch
Sense
GND
EN1
(See Note B)
Current
Limit
Driver
Charge
Pump
(See Note A)
CS
OUT1
OUT2
OC2
UVLO
EN
Discharge
Control
(See Note A)
IN
CS
Charge
Pump
EN
Discharge
Control
Current
Limit
Driver
EN2
(See Note B)
Thermal
Sense
Deglitch
Note A: Current sense
Note B: Active low (ENx) for TPS2062. Active high (ENx) for TPS2066
5
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TPS2065-1
TPS2066-1
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SLVS714–FEBRUARY 2007
PARAMETER MEASUREMENT INFORMATION
OUT
t
f
t
r
R
L
C
L
V
90%
10%
O(OUT)
90%
10%
TEST CIRCUIT
50%
90%
50%
50%
50%
V
V
I(EN)
I(EN)
t
off
t
off
t
on
t
on
90%
V
V
O(OUT)
O(OUT)
10%
10%
VOLTAGE WAVEFORMS
Figure 1. Test Circuit and Voltage Waveforms
R
C
T
A
= 5 W,
= 1 mF
= 255C
L
L
V
V
I(EN)
I(EN)
5 V/div
5 V/div
R
C
T
= 5 W,
= 1 mF
= 255C
L
L
V
O(OUT)
2 V/div
V
A
O(OUT)
2 V/div
t − Time − 500 ms/div
Figure 3. Turnoff Delay and Fall Time With 1-µF Load
t − Time − 500 ms/div
Figure 2. Turnon Delay and Rise Time With 1-µF Load
6
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TPS2065-1
TPS2066-1
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SLVS714–FEBRUARY 2007
PARAMETER MEASUREMENT INFORMATION (continued)
R
C
T
= 5 W,
= 100 mF
= 255C
L
L
V
I(EN)
V
I(EN)
5 V/div
A
5 V/div
R
C
T
A
= 5 W,
= 100 mF
= 255C
L
L
V
O(OUT)
2 V/div
V
O(OUT)
2 V/div
t − Time − 500 ms/div
Figure 5. Turnoff Delay and Fall Time With 100-µF Load
t − Time − 500 ms/div
Figure 4. Turnon Delay and Rise Time With 100-µF Load
V
= 5 V
= 5 W,
= 255C
IN
R
T
L
V
I(EN)
V
I(EN)
A
5 V/div
5 V/div
220 mF
470 mF
I
O(OUT)
I
O(OUT)
100 mF
500 mA/div
500 mA/div
t − Time − 500 ms/div
t − Time − 1 ms/div
Figure 6. Short-Circuit Current,
Device Enabled Into Short
Figure 7. Inrush Current With Different
Load Capacitance
7
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TPS2062-1
TPS2065-1
TPS2066-1
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SLVS714–FEBRUARY 2007
PARAMETER MEASUREMENT INFORMATION (continued)
V
O(OC)
V
O(OC)
2 V/div
2 V/div
I
O(OUT)
I
O(OUT)
1 A/div
1 A/div
t − Time − 2 ms/div
t − Time − 2 ms/div
Figure 9. 1-Ω Load Connected to Enabled Device
Figure 8. 2-Ω Load Connected to Enabled Device
8
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TPS2065-1
TPS2066-1
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SLVS714–FEBRUARY 2007
TYPICAL CHARACTERISTICS
TURNON TIME
vs
INPUT VOLTAGE
TURNOFF TIME
vs
INPUT VOLTAGE
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
2
C = 100 mF,
C = 100 mF,
L
L
R = 5 W,
R = 5 W,
L
L
T = 255C
A
T = 255C
A
1.9
1.8
1.7
1.6
1.5
0
2
3
4
5
6
2
3
4
5
6
V − Input Voltage − V
I
V − Input Voltage − V
I
Figure 10.
Figure 11.
RISE TIME
vs
INPUT VOLTAGE
FALL TIME
vs
INPUT VOLTAGE
0.25
0.2
0.6
0.5
0.4
C = 1 mF,
C = 1 mF,
L
L
R = 5 W,
R = 5 W,
L
L
T = 255C
A
T = 255C
A
0.15
0.1
0.3
0.2
0.1
0.05
0
0
2
3
4
5
6
2
3
4
5
6
V − Input Voltage − V
I
V − Input Voltage − V
I
Figure 12.
Figure 13.
9
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TPS2065-1
TPS2066-1
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SLVS714–FEBRUARY 2007
TYPICAL CHARACTERISTICS (continued)
TPS2061, TPS2065-1
TPS2062-1, TPS2066-1
SUPPLY CURRENT, OUTPUT ENABLED
SUPPLY CURRENT, OUTPUT ENABLED
vs
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
60
50
40
30
20
70
60
50
40
30
20
10
0
V = 5.5 V
I
V = 5.5 V
I
V = 5 V
I
V = 5 V
I
V = 3.3 V
I
V = 2.7 V
I
V = 2.7 V
I
V = 3.3 V
I
10
0
−50
0
50
100
150
−50
0
50
100
150
T − Junction Temperature − 5C
J
T − Junction Temperature − 5C
J
Figure 14.
Figure 15.
TPS2065-1
SUPPLY CURRENT, OUTPUT DISABLED
vs
TPS2062-1, TPS2066-1
SUPPLY CURRENT, OUTPUT DISABLED
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
1.6
1.4
10
9
8
7
6
5
4
3
2
1.2
1
0.8
0.6
0.4
0.2
0
1
0
−50
0
50
100
150
−50
0
50
100
150
T
− Junction Temperature − oC
T
− Junction Temperature − oC
J
J
Figure 16.
Figure 17.
10
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TPS2065-1
TPS2066-1
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SLVS714–FEBRUARY 2007
TYPICAL CHARACTERISTICS (continued)
STATIC DRAIN-SOURCE ON-STATE RESISTANCE
SHORT-CIRCUIT OUTPUT CURRENT
vs
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
120
100
80
60
40
20
0
1.56
1.54
1.52
1.5
V = 2.7 V
I
I
O
= 0.5 A
Out1 = 5 V
V = 3.3 V
I
Out1 = 3.3 V
Out1 = 2.7 V
1.48
1.46
1.44
1.42
1.4
V = 5 V
I
V = 5.5 V
I
1.38
1.36
1.34
−50
0
50
100
150
−50
0
50
100
150
T − Junction Temperature − 5C
J
T − Junction Temperature − 5C
J
Figure 18.
Figure 19.
THRESHOLD TRIP CURRENT
UNDERVOLTAGE LOCKOUT
vs
JUNCTION TEMPERATURE
vs
INPUT VOLTAGE
2.3
2.5
2.3
2.1
1.9
1.7
1.5
UVLO Rising
T
= 255C
A
Load Ramp = 1A/10 ms
2.26
2.22
2.18
UVLO Falling
2.14
2.1
−50
0
50
100
150
2.5
3
3.5
4
4.5
5
5.5
6
T − Junction Temperature − 5C
J
V − Input Voltage − V
I
Figure 20.
Figure 21.
11
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TPS2065-1
TPS2066-1
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SLVS714–FEBRUARY 2007
TYPICAL CHARACTERISTICS (continued)
CURRENT-LIMIT RESPONSE
vs
PEAK CURRENT
200
V = 5 V,
I
T
A
= 255C
150
100
50
0
0
2.5
5
7.5
10
12.5
Peak Current − A
Figure 22.
12
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TPS2065-1
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SLVS714–FEBRUARY 2007
APPLICATION INFORMATION
POWER-SUPPLY CONSIDERATIONS
TPS2062-1
2
Power Supply
2.7 V to 5.5 V
IN
7
Load
Load
OUT1
0.1 µF
0.1 µF
0.1 µF
22 µF
22 µF
8
OC1
EN1
OC2
3
5
6
OUT2
4
EN2
GND
1
Figure 23. Typical Application
A 0.01-µF to 0.1-µF ceramic bypass capacitor between IN and GND, close to the device, is recommended.
Placing a high-value electrolytic capacitor on the output pin(s) is recommended when the output load is heavy.
This precaution reduces power-supply transients that may cause ringing on the input. Additionally, bypassing the
output with a 0.01-µF to 0.1-µF ceramic capacitor improves the immunity of the device to short-circuit transients.
OVERCURRENT
A sense FET is employed to check for overcurrent conditions. Unlike current-sense resistors, sense FETs do not
increase the series resistance of the current path. When an overcurrent condition is detected, the device
maintains a constant output current and reduces the output voltage accordingly. Complete shutdown occurs only
if the fault is present long enough to activate thermal limiting.
Three possible overload conditions can occur. In the first condition, the output has been shorted before the
device is enabled or before VI(IN) has been applied (see Figure 15). The TPS206x-1 senses the short and
immediately switches into a constant-current output.
In the second condition, a short or an overload occurs while the device is enabled. At the instant the overload
occurs, high currents may flow for a short period of time before the current-limit circuit can react. After the
current-limit circuit has tripped (reached the overcurrent trip threshold), the device switches into constant-current
mode.
In the third condition, the load has been gradually increased beyond the recommended operating current. The
current is permitted to rise until the current-limit threshold is reached or until the thermal limit of the device is
exceeded (see Figure 17). The TPS206x-1 is capable of delivering current up to the current-limit threshold
without damaging the device. Once the threshold has been reached, the device switches into its
constant-current mode.
OC RESPONSE
The OCx open-drain output is asserted (active low) when an overcurrent or overtemperature shutdown condition
is encountered after a 10-ms deglitch timeout. The output remains asserted until the overcurrent or
overtemperature condition is removed. Connecting a heavy capacitive load to an enabled device can cause a
momentary overcurrent condition; however, no false reporting on OCx occurs due to the 10-ms deglitch circuit.
The TPS206x-1 is designed to eliminate false overcurrent reporting. The internal overcurrent deglitch eliminates
the need for external components to remove unwanted pulses. OCx is not deglitched when the switch is turned
off due to an overtemperature shutdown.
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APPLICATION INFORMATION (continued)
V+
R
pullup
TPS2062-1
GND
OC1
OUT1
OUT2
OC2
IN
EN1
EN2
Figure 24. Typical Circuit for the OC Pin
POWER DISSIPATION AND JUNCTION TEMPERATURE
The low on-resistance on the N-channel MOSFET allows the small surface-mount packages to pass large
currents. The thermal resistances of these packages are high compared to those of power packages; it is good
design practice to check power dissipation and junction temperature. Begin by determining the rDS(on) of the
N-channel MOSFET relative to the input voltage and operating temperature. As an initial estimate, use the
highest operating ambient temperature of interest and read rDS(on) from Figure 18. Using this value, the power
dissipation per switch can be calculated by:
PD = rDS(on) × I2
Multiply this number by the number of switches being used. This step renders the total power dissipation from
the N-channel MOSFETs.
Finally, calculate the junction temperature:
TJ = PD × RθJA + TA
Where:
TA= Ambient temperature °C
RθJA = Thermal resistance
PD = Total power dissipation based on number of switches being used.
Compare the calculated junction temperature with the initial estimate. If they do not agree within a few degrees,
repeat the calculation, using the calculated value as the new estimate. Two or three iterations are generally
sufficient to get a reasonable answer.
THERMAL PROTECTION
Thermal protection prevents damage to the IC when heavy-overload or short-circuit faults are present for
extended periods of time. The TPS206x-1 implements a thermal sensing to monitor the operating junction
temperature of the power distribution switch. In an overcurrent or short-circuit condition, the junction temperature
rises due to excessive power dissipation. Once the die temperature rises to approximately 140°C due to
overcurrent conditions, the internal thermal sense circuitry turns the power switch off, thus preventing the power
switch from damage. Hysteresis is built into the thermal sense circuit, and after the device has cooled
approximately 10°C, the switch turns back on. The switch continues to cycle in this manner until the load fault or
input power is removed. The OCx open-drain output is asserted (active low) when an overtemperature shutdown
or overcurrent occurs.
UNDERVOLTAGE LOCKOUT (UVLO)
An undervoltage lockout ensures that the power switch is in the off state at power up. Whenever the input
voltage falls below approximately 2 V, the power switch is quickly turned off. This facilitates the design of
hot-insertion systems where it is not possible to turn off the power switch before input power is removed. The
UVLO also keeps the switch from being turned on until the power supply has reached at least 2 V, even if the
switch is enabled. On reinsertion, the power switch is turned on, with a controlled rise time to reduce EMI and
voltage overshoots.
14
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APPLICATION INFORMATION (continued)
UNIVERSAL SERIAL BUS (USB) APPLICATIONS
The universal serial bus (USB) interface is a 12-Mb/s, or 1.5-Mb/s, multiplexed serial bus designed for
low-to-medium bandwidth PC peripherals (e.g., keyboards, printers, scanners, and mice). The four-wire USB
interface is conceived for dynamic attach-detach (hot plug-unplug) of peripherals. Two lines are provided for
differential data, and two lines are provided for 5-V power distribution.
USB data is a 3.3-V level signal, but power is distributed at 5 V to allow for voltage drops in cases where power
is distributed through more than one hub across long cables. Each function must provide its own regulated 3.3 V
from the 5-V input or its own internal power supply.
The USB specification defines the following five classes of devices, each differentiated by power-consumption
requirements:
•
•
•
•
•
Hosts/self-powered hubs (SPH)
Bus-powered hubs (BPH)
Low-power, bus-powered functions
High-power, bus-powered functions
Self-powered functions
SPHs and BPHs distribute data and power to downstream functions. The TPS206x-1 has higher current
capability than required by one USB port; so, it can be used on the host side and supplies power to multiple
downstream ports or functions.
HOST/SELF-POWERED AND BUS-POWERED HUBS
Hosts and SPHs have a local power supply that powers the embedded functions and the downstream ports (see
Figure 25). This power supply must provide from 5.25 V to 4.75 V to the board side of the downstream
connection under full-load and no-load conditions. Hosts and SPHs are required to have current-limit protection
and must report overcurrent conditions to the USB controller. Typical SPHs are desktop PCs, monitors, printers,
and stand-alone hubs.
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APPLICATION INFORMATION (continued)
Downstream
USB Ports
D+
D−
V
BUS
0.1 µF
33 µF
GND
Power Supply
3.3 V
5 V
D+
D−
TPS2062-1
2
8
IN
7
V
BUS
OUT1
0.1 µF
0.1 µF
33 µF
GND
OC1
EN1
OC2
EN2
3
5
USB
Controller
D+
D−
4
6
V
BUS
OUT2
0.1 µF
33 µF
GND
GND
1
D+
D−
V
BUS
0.1 µF
33 µF
GND
Figure 25. Typical Four-Port USB Host / Self-Powered Hub
BPHs obtain all power from upstream ports and often contain an embedded function. The hubs are required to
power up with less than one unit load. The BPH usually has one embedded function, and power is always
available to the controller of the hub. If the embedded function and hub require more than 100 mA on power up,
the power to the embedded function may need to be kept off until enumeration is completed. This can be
accomplished by removing power or by shutting off the clock to the embedded function. Power switching the
embedded function is not necessary if the aggregate power draw for the function and controller is less than one
unit load. The total current drawn by the bus-powered device is the sum of the current to the controller, the
embedded function, and the downstream ports, and it is limited to 500 mA from an upstream port.
LOW-POWER BUS-POWERED AND HIGH-POWER BUS-POWERED FUNCTIONS
Both low-power and high-power bus-powered functions obtain all power from upstream ports; low-power
functions always draw less than 100 mA; high-power functions must draw less than 100 mA at power up and
can draw up to 500 mA after enumeration. If the load of the function is more than the parallel combination of 44
Ω and 10 µF at power up, the device must implement inrush current limiting (see Figure 26). With TPS206x-1,
the internal functions could draw more than 500 mA, which fits the needs of some applications such as motor
driving circuits.
16
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APPLICATION INFORMATION (continued)
Power Supply
D+
D−
3.3 V
TPS2062-1
2
IN
V
BUS
7
10 µF
0.1 µF
Internal
OUT1
GND
Function
0.1 µF
10 µF
8
OC1
EN1
OC2
EN2
3
5
USB
Control
6
4
OUT2
GND
Internal
Function
0.1 µF
10 µF
1
Figure 26. High-Power Bus-Powered Function
USB POWER-DISTRIBUTION REQUIREMENTS
USB can be implemented in several ways, and, regardless of the type of USB device being developed, several
power-distribution features must be implemented.
•
•
Hosts/SPHs must:
–
–
Current-limit downstream ports
Report overcurrent conditions on USB VBUS
BPHs must:
–
–
–
Enable/disable power to downstream ports
Power up at <100 mA
Limit inrush current (<44 Ω and 10 µF)
•
Functions must:
–
–
Limit inrush currents
Power up at <100 mA
The feature set of the TPS206x-1 allows them to meet each of these requirements. The integrated
current-limiting and overcurrent reporting is required by hosts and self-powered hubs. The logic-level enable and
controlled rise times meet the need of both input and output ports on bus-powered hubs, as well as the input
ports for bus-powered functions (see Figure 27).
17
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TPS2066-1
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APPLICATION INFORMATION (continued)
TUSB2040
Hub Controller
SN75240
BUSPWR
GANGED
Tie to TPS2041 EN Input
Downstream
Ports
Upstream
Port
A
B
C
D
DP1
DM1
D +
D −
DP0
DM0
D +
D −
Ferrite Beads
A
B
C
D
GND
5 V
†
GND
SN75240
DP2
DM2
TPS2041B
33 µF
5-V Power
Supply
OC
IN OUT
1 µF
EN
DP3
DM3
5 V
D +
D −
A
B
C
D
Ferrite Beads
TPS76333
IN
SN75240
GND
DP4
DM4
0.1 µF
4.7 µF
V
CC
3.3 V
GND
5 V
†
4.7 µF
TPS2062-1
PWRON1
GND
EN1
OC1
OUT1
OUT2
33 µF
OVRCUR1
PWRON2
OVRCUR2
48-MHz
Crystal
EN2
OC2
XTAL1
XTAL2
D +
D −
IN
0.1 µF
Ferrite Beads
Tuning
Circuit
GND
5 V
†
OCSOFF
GND
33 µF
D +
D −
Ferrite Beads
GND
5 V
†
33 µF
Note: USB rev 1.1 requires 120 mF per hub.
Figure 27. Hybrid Self / Bus-Powered Hub Implementation
GENERIC HOT-PLUG APPLICATIONS
In many applications it may be necessary to remove modules or pc boards while the main unit is still operating.
These are considered hot-plug applications. Such implementations require the control of current surges seen by
the main power supply and the card being inserted. The most effective way to control these surges is to limit and
slowly ramp the current and voltage being applied to the card, similar to the way in which a power supply
normally turns on. Due to the controlled rise times and fall times of the TPS206x-1, these devices can be used
to provide a softer start-up to devices being hot-plugged into a powered system. The UVLO feature of the
TPS206x-1 also ensures that the switch is off after the card has been removed, and that the switch is off during
the next insertion. The UVLO feature insures a soft start with a controlled rise time for every insertion of the card
or module.
18
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SLVS714–FEBRUARY 2007
APPLICATION INFORMATION (continued)
PC Board
TPS2062-1
Power
Block of
Circuitry
Supply
OC1
GND
2.7 V to 5.5 V
IN
OUT1
OUT2
0.1 µF
EN1
EN2
1000 µF
Optimum
OC2
Block of
Circuitry
Overcurrent Response
Figure 28. Typical Hot-Plug Implementation
By placing the TPS206x-1 between the VCC input and the rest of the circuitry, the input power reaches these
devices first after insertion. The typical rise time of the switch is approximately 1 ms, providing a slow voltage
ramp at the output of the device. This implementation controls system surge currents and provides a
hot-plugging mechanism for any device.
DETAILED DESCRIPTION
Power Switch
The power switch is an N-channel MOSFET with a low on-state resistance. Configured as a high-side switch,
the power switch prevents current flow from OUT to IN and IN to OUT when disabled. The power switch
supplies a minimum current of 1 A.
Charge Pump
An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate
of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and requires
little supply current.
Driver
The driver controls the gate voltage of the power switch. To limit large current surges and reduce the associated
electromagnetic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and fall
times of the output voltage.
Enable (ENx or ENx)
The logic enable disables the power switch and the bias for the charge pump, driver, and other circuitry to
reduce the supply current. The supply current is reduced to less than 1 µA when a logic high is present on ENx,
or when a logic low is present on ENx. A logic zero input on ENx, or a logic high input on ENx restores bias to
the drive and control circuits and turns the switch on. The enable input is compatible with both TTL and CMOS
logic levels.
Overcurrent (OCx)
The OCx open-drain output is asserted (active low) when an overcurrent or overtemperature condition is
encountered. The output remains asserted until the overcurrent or overtemperature condition is removed. A
10-ms deglitch circuit prevents the OCx signal from oscillation or false triggering. If an overtemperature
shutdown occurs, the OCx is asserted instantaneously.
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DETAILED DESCRIPTION (continued)
Current Sense
A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than
conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry
sends a control signal to the driver. The driver in turn reduces the gate voltage and drives the power FET into its
saturation region, which switches the output into a constant-current mode and holds the current constant while
varying the voltage on the load.
Thermal Sense
The TPS206x-1 implements a thermal sensing to monitor the operating temperature of the power distribution
switch. In an overcurrent or short-circuit condition the junction temperature rises. When the die temperature rises
to approximately 140°C due to overcurrent conditions, the internal thermal sense circuitry turns off the switch,
thus preventing the device from damage. Hysteresis is built into the thermal sense, and after the device has
cooled approximately 10 degrees, the switch turns back on. The switch continues to cycle off and on until the
fault is removed. The open-drain false reporting output (OCx) is asserted (active low) when an overtemperature
shutdown or overcurrent occurs.
Undervoltage Lockout
A voltage sense circuit monitors the input voltage. When the input voltage is below approximately 2 V, a control
signal turns off the power switch.
Discharge Function
When the device is disabled (when enable is deasserted or during power-up power-down when VI < UVLO) the
discharge function is active. The discharge function offers a resistive discharge path for the external storage
capacitor. This is suitable only to discharge filter capacitors for limited time and cannot dissipate steady state
currents greater than 8 ma.
20
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PACKAGE OPTION ADDENDUM
www.ti.com
7-May-2007
PACKAGING INFORMATION
Orderable Device
TPS2062D-1
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2062D-1G4
TPS2062DR-1
TPS2062DR-1G4
TPS2065DGN-1
SOIC
SOIC
SOIC
D
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
MSOP-
Power
PAD
DGN
80 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TPS2065DGN-1G4
TPS2065DGNR-1
TPS2065DGNR-1G4
TPS2066DGN-1
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
MSOP-
Power
PAD
DGN
DGN
DGN
DGN
DGN
8
8
8
8
8
80 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
MSOP-
Power
PAD
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
MSOP-
Power
PAD
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
MSOP-
Power
PAD
80
TBD
TBD
Call TI
Call TI
Call TI
Call TI
TPS2066DGNR-1
MSOP-
Power
PAD
2500
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
7-May-2007
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
17-May-2007
TAPE AND REEL INFORMATION
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
17-May-2007
Device
Package Pins
Site
FMX
NSE
Reel
Diameter Width
(mm)
Reel
A0 (mm)
6.4
B0 (mm)
5.2
K0 (mm)
2.1
P1
W
Pin1
(mm) (mm) Quadrant
(mm)
TPS2062DR-1
TPS2065DGNR-1
D
8
8
330
0
8
8
12 PKGORN
T1TR-MS
P
DGN
330
12
5.3
3.3
1.3
12 PKGORN
T1TR-MS
P
TAPE AND REEL BOX INFORMATION
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
TPS2062DR-1
D
8
8
FMX
NSE
342.9
370.0
336.6
355.0
20.6
55.0
TPS2065DGNR-1
DGN
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
17-May-2007
Pack Materials-Page 3
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