TPS2096DR [TI]
QUAD POWER-DISTRIBUTION SWITCHES; QUAD配电开关
| 型号： | TPS2096DR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | QUAD POWER-DISTRIBUTION SWITCHES |
| 文件： | 总19页 (文件大小：313K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS2090, TPS2091, TPS2092 DUAL,
TPS2095, TPS2096, TPS2097 QUAD
POWER-DISTRIBUTION SWITCHES
SLVS245A – SEPTEMBER 2000 – REVISED MARCH 2001
TPS2090, TPS2091, AND TPS2092
D PACKAGE
80-mΩ High-Side MOSFET Switch
250 mA Continuous Current per Channel
(TOP VIEW)
Independent Thermal and Short-Circuit
Protection With Overcurrent Logic Output
GND
IN1
OC
1
2
3
4
8
7
6
5
OUT1
OUT2
Operating Range . . . 2.7-V to 5.5-V
CMOS- and TTL-Compatible Enable Inputs
2.5-ms Typical Rise Time
IN2
†
†
EN1
EN2
†
See Available Options table
Undervoltage Lockout
10 µA Maximum Standby Supply Current
Bidirectional Switch
TPS2095, TPS2096 AND TPS2097
D PACKAGE
(TOP VIEW)
Available in 8-Pin and 16-Pin SOIC
Packages
GNDA
IN1
OCA
1
2
3
4
5
6
7
8
16
15
14
13
12
11
Ambient Temperature Range, 0°C to 85°C
OUT1
OUT2
ESD Protection
IN2
†
†
EN1
EN2
description
GNDB
IN3
OCB
OUT3
The TPS2090, TPS2091, and TPS2092 dual and
the TPS2095, TPS2096 and TPS2097 quad
power-distribution switches are intended for
applications where heavy capacitive loads and
short circuits are likely to be encountered. The
TPS209x devices incorporate 80-mΩ N-channel
IN4
10 OUT4
†
†
EN3
9
EN4
†
See Available Options table
MOSFET high-side power switches for power-distribution systems that require multiple power switches in a
single package. Each switch is controlled by an independent logic enable input. Gate drive is provided by an
internal charge pump designed to control the power-switch rise times and fall times to minimize current surges
during switching. The charge pump requires no external components and allows operation from supplies as low
as 2.7 V.
When the output load exceeds the current-limit threshold or a short is present, the TPS209x limits the output
current to a safe level by switching into a constant-current mode, pulling the overcurrent (OCx) logic output low.
When continuous heavy overloads and short circuits increase the power dissipation in the switch causing the
junction temperature to rise, a thermal protection circuit shuts off the switch to prevent damage. Recovery from
a thermal shutdown is automatic once the device has cooled sufficiently. Internal circuitry ensures the switch
remains off until valid input voltage is present. The TPS209x devices are designed to current limit at 0.5-A load.
GENERAL SWITCH CATALOG
80 mW, dual
80 mW, quad
33 mW, single
80 mW, single
80 mW, dual
260 mW
TPS201xA 0.2 A – 2 A
TPS2042
TPS2052
TPS2046
TPS2056
500 mA
500 mA
250 mA
250 mA
80 mW, triple
80 mW, quad
TPS202x
TPS203x
0.2 A – 2 A
0.2 A – 2 A
TPS2080
500 mA
500 mA
500 mA
250 mA
250 mA
250 mA
TPS2014
TPS2015
TPS2041
TPS2051
TPS2045
TPS2055
600 mA
1 A
500 mA
500 mA
250 mA
250 mA
TPS2100/1
TPS2081
TPS2082
TPS2090
TPS2091
TPS2092
IN1 500 mA
IN2 10 mA
TPS2043 500 mA
TPS2053 500 mA
TPS2047 250 mA
TPS2057 250 mA
IN1
IN2
TPS2085
500 mA
500 mA
500 mA
250 mA
TPS2044 500 mA
TPS2054 500 mA
TPS2048 250 mA
TPS2058 250 mA
OUT
TPS2086
TPS2087
TPS2095
TPS2102/3/4/5
IN1 500 mA
IN2 100 mA
1.3 W
TPS2096 250 mA
TPS2097 250 mA
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2090, TPS2091, TPS2092 DUAL,
TPS2095, TPS2096, TPS2097 QUAD
POWER-DISTRIBUTION SWITCHES
SLVS245A – SEPTEMBER 2000 – REVISED MARCH 2001
AVAILABLE OPTIONS
DUAL POWER DISTRIBUTION SWITCHES
RECOMMENDED
MAXIMUM
CONTINUOUS
PACKAGED
DEVICES
TYPICAL SHORT-
CIRCUIT CURRENT
LIMIT AT 25°C
(A)
ENABLE
T
A
SMALL OUTLINE
LOAD CURRENT
EN1
EN2
†
(D)
(A)
Active high
Active high
Active low
Active high
TPS2090D
TPS2091D
TPS2092D
0°C to 85°C
Active low
Active low
0.25
0.5
QUAD POWER DISTRIBUTION SWITCHES
RECOMMENDED
MAXIMUM
CONTINUOUS
LOAD CURRENT
TYPICAL
SHORT-CIRCUIT
CURRENT LIMIT
AT 25°C
PACKAGED
DEVICES
ENABLE
T
A
SMALL OUTLINE
EN1
EN2
EN3
EN4
†
(D)
(A)
(A)
Active high Active high Active high Active high
Active high Active low Active high Active low
TPS2095D
TPS2096D
TPS2097D
0°C to 85°C
0.25
0.5
Active low
Active low
Active low
Active low
†
The D package is available taped and reeled. Add an R suffix to device type (e.g., TPS2091DR)
TPS2092 functional block diagram
OC
Thermal
Sense
GND
‡
EN1
Current
Limit
Driver
Charge
Pump
†
†
CS
IN1
IN2
OUT1
OUT2
V
Select
CC
Power Switch
and UVLO
CS
Charge
Pump
Current
Limit
Driver
§
EN2
Thermal
Sense
†
‡
§
Current sense
Active high for TPS2090 and TPS2091
Active high for TPS2090
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2090, TPS2091, TPS2092 DUAL,
TPS2095, TPS2096, TPS2097 QUAD
POWER-DISTRIBUTION SWITCHES
SLVS245A – SEPTEMBER 2000 – REVISED MARCH 2001
TPS2097 functional block diagram
OCA
Thermal
Sense
GNDA
‡
EN1
Current
Limit
Driver
Charge
Pump
†
†
CS
IN1
IN2
OUT1
OUT2
V
CC
Select
Power Switch
CS
and UVLO
Charge
Pump
Current
Limit
Driver
§
EN2
Thermal
Sense
OCB
Thermal
Sense
GNDB
‡
EN3
Current
Limit
Driver
Charge
Pump
†
†
CS
IN3
IN4
OUT3
OUT4
V
Select
CC
Power Switch
and UVLO
CS
Charge
Pump
Current
Limit
Driver
§
EN4
Thermal
Sense
†
‡
§
Current sense
Active high for TPS2095 and TPS2096
Active high for TPS2095
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2090, TPS2091, TPS2092 DUAL,
TPS2095, TPS2096, TPS2097 QUAD
POWER-DISTRIBUTION SWITCHES
SLVS245A – SEPTEMBER 2000 – REVISED MARCH 2001
Terminal Functions
DUAL POWER-DISTRIBUTION SWITCHES
TERMINAL
NO.
I/O
DESCRIPTION
NAME
TPS2090
TPS2091
TPS2092
EN1
EN2
EN1
EN2
GND
IN1
4
5
I
I
Enable input. Active low turns on power switch.
Enable input. Active low turns on power switch.
Enable input. Active high turns on power switch.
Enable input. Active high turns on power switch.
Ground
5
4
4
5
1
2
3
8
7
6
I
I
1
2
3
8
7
6
1
2
3
8
7
6
I
I
N-Channel MOSFET Drain
IN2
I
N-Channel MOSFET Drain
OC
O
O
O
Overcurrent. Open drain output active low
Power-switch output
OUT1
OUT2
Power-switch output
QUAD POWER-DISTRIBUTION SWITCHES
I/O
TERMINAL
NO.
DESCRIPTION
NAME
TPS2095
TPS2096
TPS2097
EN1
EN2
EN3
EN4
EN1
EN2
EN3
EN4
GNDA
GNDB
IN1
4
13
8
I
I
I
I
I
I
I
I
Enable input. Active low turns on power switch.
Enable input. Active low turns on power switch.
Enable input. Active low turns on power switch.
Enable input. Active low turns on power switch.
Enable input. Active high turns on power switch.
Enable input. Active high turns on power switch.
Enable input. Active high turns on power switch.
Enable input. Active high turns on power switch.
Ground for IN1 and IN2 switch and circuitry
Ground for IN3 and IN4 switch and circuitry
N-channel MOSFET drain
13
9
4
9
4
13
8
8
9
1
1
5
1
5
5
2
2
2
I
IN2
3
3
3
I
N-channel MOSFET drain
IN3
6
6
6
I
N-channel MOSFET drain
IN4
7
7
7
I
N-channel MOSFET drain
OCA
OCB
OUT1
OUT2
OUT3
OUT4
16
12
15
14
11
10
16
12
15
14
11
10
16
12
15
14
11
10
O
O
O
O
O
O
Overcurrent indicator for switch 1 and switch 2. Active-low open drain output.
Overcurrent indicator for switch 3 and switch 4. Active low open drain output
Power-switch output
Power-switch output
Power-switch output
Power-switch output
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2090, TPS2091, TPS2092 DUAL,
TPS2095, TPS2096, TPS2097 QUAD
POWER-DISTRIBUTION SWITCHES
SLVS245A – SEPTEMBER 2000 – REVISED MARCH 2001
detailed description
power switch
The power switch is an N-channel MOSFET with a maximum on-state resistance of 135 mΩ (V
= 5 V).
I(IN)
Configured as a high-side switch, the power switch prevents current flow from OUTx to IN and IN to OUTx when
disabled. The power switch supplies a minimum of 250 mA per switch.
charge pump
An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate
of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and requires
very little supply current.
driver
The driver controls the gate voltage of the power switch. To limit large current surges and reduce the associated
electromagnetic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and
fall times of the output voltage. The rise and fall times are typically in the 2-ms to 4-ms range.
enable (ENx or ENx)
Thelogicenabledisablesthepowerswitchandthebiasforthechargepump, driver, andothercircuitrytoreduce
the supply current to less than 10 µA when a logic high is present on ENx or a logic low is present on ENx. A
logic low input on ENx or logic high on ENx restores bias to the drive and control circuits and turns the power
on. The enable input is compatible with both TTL and CMOS logic levels.
overcurrent (OCx)
The OCx open drain output is asserted (active low) when an overcurrent or over temperature condition is
encountered. The output will remain asserted until the overcurrent or overtemperature condition is removed.
current sense
A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than
conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry
sends a control signal to the driver. The driver in turn reduces the gate voltage and drives the power FET into
its saturation region, which switches the output into a constant current mode and holds the current constant
while varying the voltage on the load.
thermal sense
The TPS209x implements a dual thermal trip to allow fully independent operation of the power distribution
switches. In an overcurrent or short-circuit condition the junction temperature rises. When the die temperature
rises to approximately 140°C, the internal thermal sense circuitry checks to determine which power switch is
in an overcurrent condition and turns off that switch, thus isolating the fault without interrupting operation of the
adjacent power switch. Hysteresis is built into the thermal sense, and after the device has cooled approximately
20 degrees, the switch turns back on. The switch continues to cycle off and on until the fault is removed. The
(OCx) open-drain output is asserted (active low) when overtemperature or overcurrent occurs.
undervoltage lockout
A voltage sense circuit monitors the input voltage. When the input voltage is below approximately 2 V, a control
signal turns off the power switch.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2090, TPS2091, TPS2092 DUAL,
TPS2095, TPS2096, TPS2097 QUAD
POWER-DISTRIBUTION SWITCHES
SLVS245A – SEPTEMBER 2000 – REVISED MARCH 2001
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Input voltage range, V
Output voltage range, V
Input voltage range, V
Continuous output current, I
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6 V
I(IN)
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to V
+ 0.3 V
O(OUTx)
I(ENx)
I(IN)
or V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6 V
I(ENx)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . internally limited
O(OUTx)
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating virtual junction temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 125°C
J
Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . 260°C
Electrostatic discharge (ESD) protection: Human body model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
Machine model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200 V
Charged device model (CDM) . . . . . . . . . . . . . . . . . . . . . . . . . 750 V
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltages are with respect to GND.
DISSIPATION RATING TABLE
DERATING FACTOR
T
≤ 25°C
T
A
= 70°C
T = 85°C
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING POWER RATING
A
D-8
725 mW
5.8 mW/°C
9 mW/°C
464 mW
719 mW
377 mW
584 mW
D-16
1123 mW
recommended operating conditions
MIN
2.7
0
MAX
5.5
UNIT
V
Input voltage, V
Input voltage, V
I(IN)
or V
5.5
V
I(ENx)
I(ENx)
Continuous output current, I (per switch)
0
250
125
mA
°C
O
Operating virtual junction temperature, T
0
J
electrical characteristics over recommended operating junction temperature range, V
= 5.5 V,
I(IN)
I = rated current, V
= 0 V, V
= V
(unless otherwise noted)
O
I(ENx)
I(ENx)
I(INx)
supply current
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
T
= 25°C
0.025
1
J
Supply current, low-level
output
V
V
= V
= 0 V
,
I(ENx)
I(ENx)
I(IN)
No Load on OUT
µA
–40°C ≤ T ≤ 125°C
10
J
T
= 25°C
85
110
Supply current,
high-level output
J
V
V
= 0 V,
= V
I(ENx)
I(ENx)
No Load on OUT
µA
–40°C ≤ T ≤ 125°C
100
I(IN)
J
V
V
= V
I(IN)
,
I(ENx)
I(ENx)
Leakage current
OUT connected to ground
–40°C ≤ T ≤ 125°C
100
0.3
µA
µA
J
= 0 V
V
V
= 0 V,
I(ENx)
I(ENx)
Reverse leakage current INx = high impedance
T = 125°C
J
= V
I(IN)
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2090, TPS2091, TPS2092 DUAL,
TPS2095, TPS2096, TPS2097 QUAD
POWER-DISTRIBUTION SWITCHES
SLVS245A – SEPTEMBER 2000 – REVISED MARCH 2001
electrical characteristics over recommended operating junction temperature range, V
= 5.5 V,
I(IN)
I = rated current, V
= 0 V, V
= V
(unless otherwise noted) (continued)
O
I(ENx)
I(ENx)
I(INx)
power switch
†
PARAMETER
MIN
TYP
80
MAX
100
120
135
125
145
165
UNIT
TEST CONDITIONS
V
= 5 V,
T
J
T
J
T
J
T
J
T
J
T
J
T
J
= 25°C,
= 85°C,
= 125°C,
= 25°C,
= 85°C,
= 125°C,
= 25°C,
I
O
I
O
I
O
I
O
I
O
I
O
= 0.25 A
= 0.25 A
= 0.25 A
= 0.25 A
= 0.25 A
= 0.25 A
I(IN)
I(IN)
I(IN)
I(IN)
I(IN)
I(IN)
I(IN)
V
V
V
V
V
V
= 5 V,
90
= 5 V,
100
90
mΩ
r
Static drain-source on-state resistance
DS(on)
= 3.3 V,
= 3.3 V,
= 3.3 V,
= 5.5 V,
110
120
C
= 1 µF,
= 1 µF,
= 1 µF,
= 1 µF,
L
2.5
3
R =20 Ω
L
t
t
Rise time, output
Fall time, output
ms
ms
r
V
= 2.7 V,
T
J
T
J
T
J
= 25°C,
= 25°C,
= 25°C,
C
C
C
I(IN)
R =20 Ω
L
L
V
= 5.5 V,
I(IN)
R =20 Ω
L
L
4.4
2.5
L
f
V
= 2.7 V,
I(IN)
R =20 Ω
L
†
Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
enable input V
or V
I(ENx)
I(ENx)
PARAMETER
TEST CONDITIONS
≤ 5.5 V
MIN TYP
MAX
UNIT
V
V
V
High-level input voltage
2.7 V ≤ V
4.5 V ≤ V
2
IH
I(IN)
I(IN)
I(IN)
≤ 5.5 V
0.8
0.4
V
Low-level input voltage
IL
2.7 V≤ V
≤ 4.5 V
V
V
= 0 V and V
I(ENx)
= V
, or
I(IN)
I(ENx)
I(ENx)
I
I
Input current
–0.5
0.5
µA
= V
and V
= 0 V
I(ENx)
I(IN)
t
t
Turnon time
Turnoff time
C
C
= 100 µF, R =20 Ω
20
40
ms
on
L
L
L
= 100 µF, R =20 Ω
off
L
current limit
†
PARAMETER
MIN TYP
0.3 0.5
MAX
UNIT
TEST CONDITIONS
V
= 5 V, OUT connected to GND,
I(IN)
I
Short-circuit output current
0.7
A
OS
Device enabled into short circuit
†
Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
undervoltage lockout
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
Low-level input voltage
Hysteresis
2
2.5
T
J
= 25°C
100
mV
overcurrent OCx
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
10
UNIT
mA
V
†
Sink current
V
= 5 V
O
Output low voltage
I
O
= 5 mA,
V
V
0.5
1
OL(OCx)
= 3.3 V
†
Off-state current
V
O
= 5 V,
µA
O
†
Specified by design, not production tested.
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2090, TPS2091, TPS2092 DUAL,
TPS2095, TPS2096, TPS2097 QUAD
POWER-DISTRIBUTION SWITCHES
SLVS245A – SEPTEMBER 2000 – REVISED MARCH 2001
PARAMETER MEASUREMENT INFORMATION
OUTx
t
t
f
r
RL
CL
V
90%
10%
O(OUTx)
90%
10%
TEST CIRCUIT
50%
90%
50%
50%
50%
V
V
I(ENx)
I(ENx)
t
t
off
t
t
on
off
on
90%
V
V
O(OUTx)
O(OUTx)
10%
10%
VOLTAGE WAVEFORMS
Figure 1. Test Circuit and Voltage Waveforms
V
I(EN)
(5 V/div)
V
I(EN)
(5 V/div)
V
T
C
= 5 V
= 25°C
= 0.1 µF
= 20 Ω
V
T
C
= 5 V
= 25°C
= 0.1 µF
= 20 Ω
I(IN)
A
L
L
I(IN)
A
L
L
V
O(OUT)
(2 V/div)
V
O(OUT)
(2 V/div)
R
R
0
2
4
6
8
10 12 14 16 18 20
0
1
2
3
4
5
6
7
8
9
10
t – Time – ms
t – Time – ms
Figure 2. Turnon Delay and Rise Time
Figure 3. Turnoff Delay and Fall Time
With 0.1-µF Load
With 0.1-µF Load
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS2090, TPS2091, TPS2092 DUAL,
TPS2095, TPS2096, TPS2097 QUAD
POWER-DISTRIBUTION SWITCHES
SLVS245A – SEPTEMBER 2000 – REVISED MARCH 2001
PARAMETER MEASUREMENT INFORMATION
V
I(EN)
(5 V/div)
V
I(EN)
(5 V/div)
V
= 5 V
I(IN)
= 25°C
V
T
C
= 5 V
I(IN)
= 25°C
T
A
V
A
O(OUT)
(2 V/div)
C
R
= 1 µF
= 20 Ω
V
L
L
O(OUT)
(2 V/div)
= 1 µF
= 20 Ω
L
L
R
0
2
4
6
8
10 12 14 16 18 20
0
1
2
3
4
5
6
7
8
9
10
t – Time – ms
t – Time – ms
Figure 4. Turnon Delay and Rise Time
Figure 5. Turnoff Delay and Fall Time
With 1-µF Load
With 1-µF Load
V
= 5 V
I(IN)
= 25°C
T
A
RAMP: 1A/10ms
V
I(ENx)
(5 V/div)
V
O(OUT)
(2 V/div)
V
T
A
= 5 V
= 25°C
I(IN)
I
I
O(OUT)
O(OUTx)
(0.2 A/div)
(0.2 A/div)
0
10 20 30 40 50 60 70 80 90 100
0
1
2
3
4
5
6
7
8
9
10
t – Time – ms
t – Time – ms
Figure 6. TPS2090, Short-Circuit Current,
Device Enabled Into Short
Figure 7. TPS2090, Threshold Trip Current
With Ramped Load on Enabled Device
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POWER-DISTRIBUTION SWITCHES
SLVS245A – SEPTEMBER 2000 – REVISED MARCH 2001
PARAMETER MEASUREMENT INFORMATION
V
= 5 V
I(IN)
= 25°C
T
A
RAMP: 1A/100 ms
V
V
I(EN)
(5 V/div)
O(OC)
(5 V/div)
220 µF
47 µF
100 µF
V
T
R
= 5 V
I(IN)
= 25°C
I
I
A
O(OUT)
O(OUT)
= 20 Ω
L
(0.2 A/div)
(0.2 A/div)
0
20 40 60 80 100 120 140 160 180 200
0
2
4
6
8
10 12 14 16 18 20
t – Time – ms
t – Time – ms
Figure 9. Inrush Current With 47-µF, 100-µF
and 220-µF Load Capacitance
Figure 8. Ramped Load on Enabled Device
V
T
A
= 5 V
V
= 5 V
I(IN)
= 25°C
I(IN)
T = 25°C
A
V
V
O(OC)
(5 V/div)
O(OC)
(5 V/div)
I
I
O(OUT)
(0.5 A/div)
O(OUT)
(1 A/div)
0
200
400
600
800
1000
0
200
400
600
800
1000
t – Time – µs
t – Time – µs
Figure 10. 4-Ω Load Connected to
Figure 11. 1-Ω Load Connected to
Enabled Device
Enabled Device
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POWER-DISTRIBUTION SWITCHES
SLVS245A – SEPTEMBER 2000 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
TURNON DELAY TIME
vs
TURNOFF DELAY TIME
vs
INPUT VOLTAGE
INPUT VOLTAGE
3.9
3.6
3.3
3
10
8
C
= 1 µF
= 20 Ω
= 25°C
C
R
T
= 1 µF
= 20 Ω
= 25°C
L
L
L
L
A
R
T
A
6
4
2
2.7
2.4
2.5
3
3.5
4
4.5
5
5.5
6
2.5
3
3.5
4
4.5
5
5.5
6
V – Input Voltage – V
I
V – Input Voltage – V
I
Figure 12
Figure 13
RISE TIME
vs
INPUT VOLTAGE
FALL TIME
vs
INPUT VOLTAGE
2.7
1.9
1.8
1.7
1.6
1.5
C
R
T
= 1 µF
= 20 Ω
= 25°C
C
R
T
= 1 µF
= 20 Ω
= 25°C
L
L
A
L
L
A
2.6
2.5
2.4
2.3
2.2
1.4
1.3
2.1
2
2.5
3
3.5
4
4.5
5
5.5
6
2.5
3
3.5
4
4.5
5
5.5
6
V – Input Voltage – V
I
V – Input Voltage – V
I
Figure 14
Figure 15
11
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TYPICAL CHARACTERISTICS
SUPPLY CURRENT, OUTPUT ENABLED
SUPPLY CURRENT, OUTPUT DISABLED
vs
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
160
140
110
100
90
V
I(IN)
= 5.5 V
V
I(IN)
= 5.5 V
120
100
80
V
= 5 V
I(IN)
V
I(IN)
= 5 V
V
I(IN)
= 4.5 V
V
= 4.5 V
= 3.3 V
I(IN)
V
I(IN)
80
60
V
I(IN)
= 2.7 V
70
V
I(IN)
= 3.3 V
40
V
I(IN)
= 2.7 V
60
20
0
50
–40
–40
0
25
85
125
0
25
85
125
T
J
– Junction Temperature – °C
T
J
– Junction Temperature – °C
Figure 16
Figure 17
STATIC DRAIN-SOURCE ON-STATE RESISTANCE
INPUT-TO-OUTPUT VOLTAGE
vs
vs
JUNCTION TEMPERATURE
LOAD CURRENT
160
140
120
100
80
40
35
30
25
20
15
T
A
= 25°C
V = 2.7 V
I(IN)
V
= 2.7 V
I(IN)
V
I(IN)
= 3.3 V
V
= 3 V
I(IN)
V
I(IN)
= 3.3 V
V
I(IN)
= 5 V
V
= 4.5 V
I(IN)
V
I(IN)
= 4.5 V
V
I(IN)
= 5 V
60
10
5
40
20
0
100
0
25
85
125
150
200
250
T
J
– Junction Temperature – °C
I
L
– Load Current – mA
Figure 18
Figure 19
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POWER-DISTRIBUTION SWITCHES
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TYPICAL CHARACTERISTICS
SHORT-CIRCUIT OUTPUT CURRENT
THRESHOLD TRIP CURRENT
vs
vs
JUNCTION TEMPERATURE
INPUT VOLTAGE
500
490
480
470
460
450
440
430
420
410
400
0.67
0.65
0.63
T
= 25°C
A
Load Ramp = 1 A/10 ms
V
= 2.7 V
I(IN)
V
= 3.3 V
I(IN)
V
I(IN)
= 4 .5V
V
I(IN)
= 5 .5V
V
= 5V
I(IN)
0.61
0.59
0.57
–40
0
25
85
125
2.5
3
3.5
4
4.5
5
5.5
6
T
J
– Junction Temperature – °C
V – Input Voltage – V
I
Figure 20
Figure 21
UNDERVOLTAGE LOCKOUT
vs
JUNCTION TEMPERATURE
CURRENT LIMIT RESPONSE
vs
PEAK CURRENT
2.36
2.34
2.32
2.3
300
250
Start Threshold
200
2.28
2.26
2.24
2.22
2.2
150
100
50
Stop Threshold
2.18
2.16
0
–40
0
25
85
125
0
2
4
6
8
10
T
J
– Junction Temperature – °C
Peak Current – A
Figure 22
Figure 23
13
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POWER-DISTRIBUTION SWITCHES
SLVS245A – SEPTEMBER 2000 – REVISED MARCH 2001
APPLICATION INFORMATION
TPS2092
2
Power Supply
2.7 V to 5.5 V
IN1
7
6
Load
Load
OUT1
0.1 µF
0.1 µF
0.1 µF
22 µF
22 µF
8
OC
4
5
EN1
EN2
IN2
OUT2
3
Power Supply
2.7 V to 5.5 V
0.1 µF
GND
1
Figure 24. Typical Application
power-supply considerations
A 0.01-µF to 0.1-µF ceramic bypass capacitor between INx and GND, close to the device, is recommended.
Placing a high-value electrolytic capacitor on the output pin(s) is recommended when the output load is heavy.
This precaution reduces power-supply transients that may cause ringing on the input. Additionally, bypassing
the output with a 0.01-µF to 0.1-µF ceramic capacitor improves the immunity of the device to short-circuit
transients.
overcurrent
A sense FET is employed to check for overcurrent conditions. Unlike current-sense resistors, sense FETs do
not increase the series resistance of the current path. When an overcurrent condition is detected, the device
maintains a constant output current and reduces the output voltage accordingly. Complete shutdown occurs
only if the fault is present long enough to activate thermal limiting.
Three possible overload conditions can occur. In the first condition, the output has been shorted before the
device is enabled or before V
immediately switches into a constant-current output.
has been applied (see Figure 6). The TPS209x senses the short and
I(IN)
In the second condition, a short or an overload occurs while the device is enabled. At the instant the overload
occurs, very high currents may flow for a short time before the current-limit circuit can react (see Figure 10 and
11). After the current-limit circuit has tripped (reached the overcurrent trip threshhold) the device switches into
constant-current mode.
In the third condition, the load has been gradually increased beyond the recommended operating current. The
current is permitted to rise until the current-limit threshold is reached or until the thermal limit of the device is
exceeded (see Figure 8). The TPS209x is capable of delivering current up to the current-limit threshold without
damagingthedevice. Oncethethresholdhasbeenreached, thedeviceswitchesintoitsconstant-currentmode.
OC response
The OC open-drain output is asserted (active low) when an overcurrent or overtemperature condition is
encountered. The output will remain asserted until the overcurrent or overtemperature condition is removed.
Connectingaheavycapacitiveloadtoanenableddevicecancausemomentaryfalseovercurrentreportingfrom
the inrush current flowing through the device, charging the downstream capacitor. The TPS209x devices are
designed to reduce false overcurrent reporting. An internal overcurrent transient filter eliminates the need to use
external components to remove unwanted pulses. Using low-ESR electrolytic capacitors on the output lowers
the inrush current flow through the device during hot-plug events by providing a low impedance energy source,
thereby reducing erroneous overcurrent reporting.
14
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APPLICATION INFORMATION
OC response (continued)
V+
R
TPS2092
pullup
GND
OC
OUT1
OUT2
EN2
IN1
IN2
EN1
Figure 25. Typical Circuit for OC Pin
power dissipation and junction temperature
The low on-resistance on the n-channel MOSFET allows small surface-mount packages, such as SOIC, to pass
large currents. The thermal resistances of these packages are high compared to that of power packages; it is
good design practice to check power dissipation and junction temperature. Begin by determining the r
the N-channel MOSFET relative to the input voltage and operating temperature. As an initial estimate, use the
of
DS(on)
highest operating ambient temperature of interest and read r
dissipation per switch can be calculated by:
from Figure 18. Using this value, the power
DS(on)
2
P
r
I
D
DS(on)
Multiply this number by the total number of switches being used, to get the total power dissipation coming from
the N-channel MOSFETs.
Finally, calculate the junction temperature:
T
P
R
T
J
D
JA
A
Where:
T = Ambient Temperature °C
A
θJA
R
= Thermal resistance SOIC = 172°C/W (for 8 pin), 111°C/W (for 16 pin)
P = Total power dissipation based on number of switches being used.
D
Compare the calculated junction temperature with the initial estimate. If they do not agree within a few degrees,
repeat the calculation, using the calculated value as the new estimate. Two or three iterations are generally
sufficient to get a reasonable answer.
thermal protection
Thermal protection prevents damage to the IC when heavy-overload or short-circuit faults are present for
extended periods of time. The faults force the TPS209x into constant current mode, which causes the voltage
across the high-side switch to increase; under short-circuit conditions, the voltage across the switch is equal
to the input voltage. The increased dissipation causes the junction temperature to rise to high levels. The
protectioncircuitsensesthejunctiontemperatureoftheswitchandshutsitoff. Hysteresisisbuiltintothethermal
sense circuit, and after the device has cooled approximately 20 degrees, the switch turns back on. The switch
continues to cycle in this manner until the load fault or input power is removed.
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APPLICATION INFORMATION
thermal protection (continued)
The TPS209x implements a dual thermal trip to allow fully independent operation of the power distribution
switches. In an overcurrent or short-circuit condition the junction temperature will rise. Once the die temperature
risestoapproximately140°C, theinternalthermalsensecircuitrycheckswhichpowerswitchisinanovercurrent
condition and turns that power switch off, thus isolating the fault without interrupting operation of the adjacent
power switch. Should the die temperature exceed the first thermal trip point of 140°C and reach 160°C, both
switches turn off. The OC open-drain output is asserted (active low) when overtemperature or overcurrent
occurs.
undervoltage lockout (UVLO)
Anundervoltagelockoutensuresthatthepowerswitchisintheoffstateatpowerup. Whenevertheinputvoltage
falls below approximately 2 V, the power switch will be quickly turned off. This facilitates the design of
hot-insertion systems where it is not possible to turn off the power switch before input power is removed. The
UVLO will also keep the switch from being turned on until the power supply has reached at least 2 V, even if
the switch is enabled. Upon reinsertion, the power switch will be turned on with a controlled rise time to reduce
EMI and voltage overshoots.
generic hot-plug applications (see Figure 26)
In many applications it may be necessary to remove modules or pc boards while the main unit is still operating.
These are considered hot-plug applications. Such implementations require the control of current surges seen
by the main power supply and the card being inserted. The most effective way to control these surges is to limit
and slowly ramp the current and voltage being applied to the card, similar to the way in which a power supply
normally turns on. Due to the controlled rise times and fall times of the TPS209x, these devices can be used
to provide a softer start-up to devices being hot-plugged into a powered system. The UVLO feature of the
TPS209x also ensures the switch will be off after the card has been removed, and the switch will be off during
the next insertion. The UVLO feature insures a soft start with a controlled rise time for every insertion of the card
or module.
Overcurrent Response
PC Board
Power
Supply
TPS2092
1000 µF
Optimum
0.1 µF
GND
OC
Block of
Circuitry
IN1
OUT1
2.7 V to 5.5 V
0.1 µF
1000 µF
Optimum
OUT2
EN2
IN2
EN1
Block of
Circuitry
Figure 26. Typical Hot-Plug Implementation
By placing the TPS209x between the V
input and the rest of the circuitry, the input power will reach these
CC
devices first after insertion. The typical rise time of the switch is approximately 2.5 ms, providing a slow voltage
ramp at the output of the device. This implementation controls system surge currents and provides a
hot-plugging mechanism for any device.
16
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MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
0.050 (1,27)
0.020 (0,51)
0.014 (0,35)
0.010 (0,25)
M
14
8
0.008 (0,20) NOM
0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane
0.010 (0,25)
1
7
0°–8°
0.044 (1,12)
A
0.016 (0,40)
Seating Plane
0.004 (0,10)
0.010 (0,25)
0.004 (0,10)
0.069 (1,75) MAX
PINS **
8
14
16
DIM
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MAX
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
A MIN
4040047/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
17
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PACKAGE OPTION ADDENDUM
www.ti.com
19-Apr-2005
PACKAGING INFORMATION
Orderable Device
TPS2090D
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
8
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2090DR
TPS2091D
SOIC
SOIC
SOIC
SOIC
SOIC
D
D
D
D
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2091DR
TPS2092D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2092DR
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS2095D
TPS2095DR
TPS2096D
TPS2096DR
TPS20976D
TPS2097D
TPS2097DR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
D
D
D
D
D
D
D
16
16
16
16
16
16
16
40
2500
40
TBD
TBD
TBD
TBD
TBD
TBD
TBD
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
2500
40
Call TI
Call TI
40
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
2500
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
IMPORTANT NOTICE
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enhancements, improvements, and other changes to its products and services at any time and to discontinue
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in
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TI assumes no liability for applications assistance or customer product design. Customers are responsible for
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amplifier.ti.com
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