TPS22860DBVR [TI]
0.73Ω、5V 超低泄漏负载开关 | DBV | 6 | -40 to 85;
| 型号： | TPS22860DBVR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 0.73Ω、5V 超低泄漏负载开关 | DBV | 6 | -40 to 85 开关 |
| 文件： | 总16页 (文件大小：678K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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TPS22860
ZHCSDR1 –APRIL 2015
TPS22860 超低泄漏电流负载开关
1 特性
2 应用
1
•
•
•
•
集成单通道负载开关
•
•
•
可穿戴产品
物联网
偏置电压范围 (VBIAS)：1.65V 至 5.5V
输入电压范围：0V 至 VBIAS
无线传感器网络
导通电阻 (RON
)
3 说明
–
–
–
VIN = 5V (VBIAS = 5V) 时，RON = 0.73Ω
TPS22968 是一款小型、超低泄漏电流、单通道负载
开关。 该器件需要一个 VBIAS 电压，工作输入电压范
围为 0V 至 VBIAS。 它可支持最大 200mA 的持续电
流。 此开关可由一个打开/关闭输入 (ON) 控制，此输
入可与低压控制信号直接对接。 TPS22860 采用两种
节省空间的 6 引脚 SOT-23 和 SC70 小型封装。
器件在自然通风环境下的额定运行温度范围为 -40°C
至 85°C。
VIN = 3.3V (VBIAS = 5V) 时，RON = 0.68Ω
VIN = 1.8V (VBIAS = 5V) 时，RON = 0.63Ω
•
•
200mA 最大持续开关电流
超低泄漏电流
–
–
VIN 泄漏电流 = 2nA
BIAS 泄漏电流（5.5V 时）= 10nA
V
•
•
6 引脚小外形尺寸晶体管 (SOT)-23 封装或 SC70
封装
静电放电 (ESD) 性能经测试符合 JESD 22 规范
器件信息(1)
–
2kV 人体放电模式 (HBM) 和 1kV 组件充电模式
器件型号
TPS22860
封装
封装尺寸（标称值）
2.80 x 2.90mm
(CDM)
SOT-23
SC-70
2.10 x 2.00mm
(1) 要了解所有可用封装，请见数据表末尾的可订购产品附录。
4 常见应用电路原理图
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLVSD04
TPS22860
ZHCSDR1 –APRIL 2015
www.ti.com.cn
目录
8.3 Feature Description................................................... 7
8.4 Device Functional Modes.......................................... 7
Application and Implementation .......................... 8
9.1 Application Information.............................................. 8
9.2 Typical Application ................................................... 8
1
2
3
4
5
6
7
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
常见应用电路原理图................................................. 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 3
7.1 Absolute Maximum Ratings ...................................... 3
7.2 ESD Ratings.............................................................. 3
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information.................................................. 4
7.5 Electrical Characteristics........................................... 4
7.6 Switching Characteristics.......................................... 4
7.7 Typical Characteristics.............................................. 5
Detailed Description .............................................. 7
8.1 Overview ................................................................... 7
8.2 Functional Block Diagram ......................................... 7
9
10 Power Supply Recommendations ....................... 9
11 Layout................................................................... 10
11.1 Layout Guidelines ................................................. 10
11.2 Thermal Reliability................................................. 10
11.3 Improving Package Thermal Performance ........... 10
11.4 Layout Example .................................................... 10
12 器件和文档支持 ..................................................... 11
12.1 商标....................................................................... 11
12.2 静电放电警告......................................................... 11
12.3 术语表 ................................................................... 11
13 机械、封装和可订购信息....................................... 11
8
5 修订历史记录
日期
修订版本
注释
2015 年 4 月
*
首次发布。
2
Copyright © 2015, Texas Instruments Incorporated
TPS22860
www.ti.com.cn
ZHCSDR1 –APRIL 2015
6 Pin Configuration and Functions
Top View
VOUT
GND
NC
1
2
3
6
5
4
ON
VBIAS
VIN
Pin Functions
PIN
I/O
DESCRIPTION
NAME
VOUT
GND
NC
NO.
1
O
—
—
I
Switch output.
Ground
2
3
No connect
VIN
4
Switch input. Connect a ceramic capacitor from VIN to GND.
Bias voltage. Power supply to the device.
VBIAS
ON
5
I
6
I
Active high switch control input. Do not leave floating.
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
–0.5
–0.5
–0.5
–0.5
MAX
UNIT(2)
V
VBIAS
VIN
BIAS voltage range
6.5
VBIAS + 0.5
VBIAS + 0.5
6.5
Input voltage range
V
VOUT
VON
IMAX
IPLS
TA
Output voltage range
V
Input voltage range
V
Maximum Continuous Switch Current
Maximum Pulsed Switch Current, pulse <300us, 2% duty cycle
Operating free-air temperature range(3)
Maximum junction temperature
Storage temperature
200
mA
mA
°C
400
–40
–65
85
TJ
125
°C
TSTG
150
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(3) Inapplications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may
have to be derated. Maximum ambient temperature [TA(max)] is dependent on the maximum operating junction temperature [TJ(max)], the
maximum power dissipation of the device in the application [PD(max)], and the junction-to-ambient thermal resistance of the part/package
in the application (θJA), as given by the following equation: TA(max) = TJ(max) – (M JA × PD(max)
)
7.2 ESD Ratings
VALUE
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
2000
V(ESD)
Electrostatic discharge
V
Charged-device model (CDM), per JEDEC specification JESD22-
C101(2)
1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 500-V HBM is possible with the necessary precautions.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with
less than 250-V CDM is possible with the necessary precautions.
Copyright © 2015, Texas Instruments Incorporated
3
TPS22860
ZHCSDR1 –APRIL 2015
www.ti.com.cn
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
0
NOM
MAX
UNIT
V
VIN
Input voltage range
VBIAS
5.5
VBIAS
VON
Supply voltage range
Control input voltage range
Output voltage range
High-level input voltage, ON
Low-level input voltage, ON
Input Capacitor
1.65
0
V
5.5
V
VOUT
VIH, ON
VIL, ON
CIN
0
VBIAS
5.5
V
VBIAS = 5 V
VBIAS = 5 V
2.4
0
V
0.8
V
1
µF
7.4 Thermal Information
TPS22860
THERMAL METRIC(1)(2)
DBV
6 PINS
235.2
164.8
82,.5
52.9
DCK
6 PINS
249.0
107.7
95.8
UNIT
RθJA
RθJC(top)
RθJB
ψJT
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
Junction-to-top characterization parameter
Junction-to-board characterization parameter
6.2
ψJB
82.0
93.7
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator.
7.5 Electrical Characteristics
over operating free-air temperature range(1) (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
POWER SUPPLIES AND CURRENTS
IQ, VBIAS
ISD, VBIAS
ISD, VIN
VBIAS quiescent current
VBIAS shutdown current
VIN shutdown current
IOUT = 0, VIN = VON = VBIAS = 3.3 V
10
10
2
100
100
VON = 0 V
nA
VON = 0 V, VOUT = 1 V
VIN = 3.0 V
50
ON pin input leakage
current
ION
VON = 5.5 V
100
RESISTANCE CHARACTERISTICS
TA = 25°C
Full TA
0.92
1.2
1.15
1.31
1.5
VIN = 3.3 V
VIN = 2 V
TA = 25°C
Full TA
IOUT = –100 mA, VBIAS = 3.3
V
RON
ON-state resistance
Ω
1.7
TA = 25°C
Full TA
0.95
1.2
VIN = 1.8 V
1.35
(1) Over the operating ambient temp –40°C ≤ TA ≤ 85°C (full) and VBIAS = 3.3V. Typical values are for TA = 25°C. (unless otherwise
noted)
7.6 Switching Characteristics
over operating free-air temperature range(1) (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
2
TYP
MAX UNIT
TA = 25°C
VBIAS = 3.3 V
4.5
13
ns
15
tON
Turn-on time
VOUT = VBIAS, RL = 50 Ω CL = 35 pF
VOUT = VBIAS, RL = 50 Ω CL = 35 pF
Full TA
TA = 25°C
Full TA
VBIAS = 3 V to 3.6 V
VBIAS = 3.3 V
1
3
9
15
ns
20
tOFF
Turn-off time
VBIAS = 3 V to 3.6 V
2
tON/OFF ON/OFF delay time
See Figure 9
(1) VIN = VON = VBIAS = 5V, TA = 25ºC
4
Copyright © 2015, Texas Instruments Incorporated
TPS22860
www.ti.com.cn
ZHCSDR1 –APRIL 2015
7.7 Typical Characteristics
Figure 1. ron vs VOUT
Figure 2. ron vs VOUT (VBIAS = 3.3 V)
Figure 4. Leakage Current vs Temperature (VBIAS = 5.5 V)
Figure 3. ron vs VOUT (VBIAS = 5 V)
VIN (PWRoff)
VOUT (PWRoff)
Figure 5. Leakage Current vs Temperature (VBIAS = 5 V)
Figure 6. Logic-Level Threshold vs VBIAS
Copyright © 2015, Texas Instruments Incorporated
5
TPS22860
ZHCSDR1 –APRIL 2015
www.ti.com.cn
Typical Characteristics (continued)
TA (°C)
Figure 7. Power-Supply Current vs Temperature
(VBIAS = 5 V)
6
Copyright © 2015, Texas Instruments Incorporated
TPS22860
www.ti.com.cn
ZHCSDR1 –APRIL 2015
8 Detailed Description
8.1 Overview
The TPS22860 is a small, ultra-low leakage current, single channel bi-driectional load switch. The device
requires a VBIAS voltage and can operate over an input voltage range of 0 V to VBIAS. It can support a maximum
continuous current of 200 mA. The switch is controlled by an on/off input (ON), which is capable of interfacing
directly with low-voltage control signals. The TPS22860 is available in two small, space-saving 6-pin SOT-23 and
SC70 packages. The device is characterized for operation over the free-air temperature range of –40°C to 85°C.
8.2 Functional Block Diagram
VIN
VOUT
VBIAS
ON
GND
8.3 Feature Description
8.3.1 ON/OFF Control
The ON input controls the load switch with positive logic.
8.3.2 Pass Transistor
The TPS22860 supports up to 200-mA current flow in either direction. RON is dependent on VBIAS as shown in
Figure 1, Figure 2, and Figure 3.
8.4 Device Functional Modes
Table 1. Functional Table
ON
L
VIN to VOUT
Off
On
H
Copyright © 2015, Texas Instruments Incorporated
7
TPS22860
ZHCSDR1 –APRIL 2015
www.ti.com.cn
9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
This section will highlight some of the design considerations when implementing this device in a common
application.
9.2 Typical Application
The TPS22860 IC is a high side load switch. The TPS22860 internal components are rated for 1.65-V to 5.5-V
supply and support up to 200 mA of load current. The TPS22860 can be used in a variety of applications.
Figure 8 below shows a general application of TPS22860 to control the load inrush current.
Figure 8. Standard Load Switching Application
9.2.1 Design Requirements
Table 2. Component Table
COMPONENT
CIN
DESCRIPTION
Input capacitance(1)
LOAD
Load resistance and capacitance will affect the output rise time
(1) Required for load inrush current (slew rate) control
8
Copyright © 2015, Texas Instruments Incorporated
TPS22860
www.ti.com.cn
ZHCSDR1 –APRIL 2015
9.2.2 Detailed Design Procedure
9.2.2.1 Inrush Current
To limit the voltage drop on the input supply caused by transient inrush currents when the switch turns on into a
discharged load capacitor, a capacitor must be placed between VIN and GND. A 1-µF ceramic capacitor, CIN,
placed close to the pins, is usually sufficient. Higher values of CIN can be used to further reduce the voltage drop
during high-current applications. When switching heavy loads, TI recommends to have an input capacitor about
10× higher than the output capacitor to avoid excessive voltage drop. Do not float the ON pin.
9.2.2.2 ON/OFF Interface
The load switch is controlled by the voltage at the ON pin. To turn ON, the input voltage must be larger than VIH
and to turn off the voltage must be below VIL.
In applications where an ON/OFF signal is not available, connect ON pin to VIN. The TPS22860 will turn ON/OFF
in sync with the input supply connected to VIN.
NOTE
Connect a pull down resistor from the ON pin to GND when the ON/OFF signal is driven
by a high-impedance (tri-state) driver.
9.2.3 Application Curves
TA (°C)
Figure 10. tON and tOFF vs Temperature (VBIAS = 5 V)
Figure 9. tON and tOFF vs VBIAS
10 Power Supply Recommendations
The device is designed to operate from a VIN range of 1.65 V to 5.5 V. This supply must be well regulated and
placed as close to the device terminal as possible with the recommended 1-μF bypass capacitor. If the supply is
located more than a few inches from the device terminals, additional bulk capacitance may be required in
addition to the ceramic bypass capacitors. If additional bulk capacitance is required, an electrolytic, tantalum, or
ceramic capacitor of 1 μF may be sufficient.
Copyright © 2015, Texas Instruments Incorporated
9
TPS22860
ZHCSDR1 –APRIL 2015
www.ti.com.cn
11 Layout
11.1 Layout Guidelines
For best operational performance of the device, use good PCB layout practices, including:
•
•
VIN and VOUT traces should be as short and wide as possible to accommodate for high current.
The VIN pin should be bypassed to ground with low ESR ceramic bypass capacitors. The typical
recommended bypass capacitance is 1-μF ceramic with X5R or X7R dielectric. This capacitor should be
placed as close to the device pins as possible.
•
The VOUT pin should be bypassed to ground with low ESR ceramic bypass capacitors. The typical
recommended bypass capacitance is one-tenth of the VIN bypass capacitor of X5R or X7R dielectric rating.
This capacitor should be placed as close to the device pins as possible.
11.2 Thermal Reliability
For higher reliability it is recommended to limit TPS22860 IC’s die junction temperature to less than 105°C. The
IC junction temperature is directly proportional to the on-chip power dissipation. Use the following equation to
calculate maximum on-chip power dissipation to achieve the maximum die junction temperature target:
T
J(MAX) - TA
(
)
PD(MAX)
=
qJA
Where:
TJ(MAX) is the target maximum junction temperature.
TA is the operating ambient temperature.
R
θJA is the package junction to ambient thermal resistance.
(1)
11.3 Improving Package Thermal Performance
The package RθJA value under standard conditions on a High-K board is listed in the Thermal Information table.
RθJA value depends on the PC board layout. An external heat sink and/or a cooling mechanism, like a cold air
fan, can help reduce RθJA and thus improve device thermal capabilities. Refer to TI’s design support web page at
www.ti.com/thermal for a general guidance on improving device thermal performance.
11.4 Layout Example
Control
Signal
LOAD
RL CL
1
2
3
6
5
4
VOUT
GND
NC
ON
VOUT Bypass
Capacitor
VBIAS
VIN
+ Battery
VIN Bypass
Capacitor
Indicates connection to ground plane
Figure 11. Basic PCB Layout
10
版权 © 2015, Texas Instruments Incorporated
TPS22860
www.ti.com.cn
ZHCSDR1 –APRIL 2015
12 器件和文档支持
12.1 商标
All trademarks are the property of their respective owners.
12.2 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
12.3 术语表
SLYZ022 — TI 术语表。
这份术语表列出并解释术语、首字母缩略词和定义。
13 机械、封装和可订购信息
以下页中包括机械、封装和可订购信息。 这些信息是针对指定器件可提供的最新数据。 这些数据会在无通知且不
对本文档进行修订的情况下发生改变。 欲获得该数据表的浏览器版本，请查阅左侧的导航栏。
版权 © 2015, Texas Instruments Incorporated
11
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS22860DBVR
ACTIVE
SOT-23
DBV
6
3000 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
ZFNR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OUTLINE
DBV0006A
SOT-23 - 1.45 mm max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
0.1 C
1.75
1.45
B
1.45 MAX
A
PIN 1
INDEX AREA
1
2
6
5
2X 0.95
1.9
3.05
2.75
4
3
0.50
6X
0.25
C A B
0.15
0.00
0.2
(1.1)
TYP
0.25
GAGE PLANE
0.22
0.08
TYP
8
TYP
0
0.6
0.3
TYP
SEATING PLANE
4214840/C 06/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.25 per side.
4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation.
5. Refernce JEDEC MO-178.
www.ti.com
EXAMPLE BOARD LAYOUT
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
5
2
3
2X (0.95)
4
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214840/C 06/2021
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
5
2
3
2X(0.95)
4
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214840/C 06/2021
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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