TPS2400DBVTG4 [TI]

具有 100V 输入瞬态保护的 5.5V 过压保护控制器 | DBV | 5 | -40 to 85;
TPS2400DBVTG4
型号: TPS2400DBVTG4
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

具有 100V 输入瞬态保护的 5.5V 过压保护控制器 | DBV | 5 | -40 to 85

控制器 光电二极管 电源管理电路 电源电路
文件: 总15页 (文件大小:252K)
中文:  中文翻译
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SLUS599 − JUNE 2004  
FEATURES  
DESCRIPTION  
D
D
D
D
D
D
D
D
D
Up to 100-V Overvoltage Protection  
The TPS2400 overvoltage protection controller is  
used with an external N-channel MOSFET to  
isolate sensitive electronics from destructive  
voltage spikes and surges. It is specifically  
designed to prevent large voltage transients  
associated with automotive environments (load  
dump) from damaging sensitive circuitry. When  
potentially damaging voltage levels are detected  
by the TPS2400 the supply is disconnected from  
the load before any damage can occur.  
6.9-V Overvoltage Shutdown Threshold  
3.0-V Undervoltage Shutdown Threshold  
Overvoltage Turn-Off Time Less than 1.0 µs  
External N-Channel MOSFET Driven by  
Internal Charge Pump  
1-mA Maximum Static Supply Current  
5-Pin SOT−23 Package  
−40_C to 85_C Ambient Temperature Range  
Internal circuitry includes a trimmed band-gap  
reference, oscillator, zener diode, charge pump,  
comparator, and control logic. The TPS2400 is  
designed for use with an external N-channel  
MOSFET which are readily available in a wide  
variety of voltages.  
2.5-kV Human-Body-Model, 500-V CDM  
Electrostatic Discharge Protection  
APPLICATIONS  
D
D
D
D
D
D
Cellular Phones  
PDAs  
Portable PCs  
Media Players  
Digital Cameras  
GPS  
FUNCTIONAL BLOCK DIAGRAM  
VIN  
5
High= Closed  
Internal Rail  
8 V  
8 V  
Enable  
Charge Pump  
UVLO  
OVLO  
+
+
5 µA  
1.15 V  
4
GATE  
GND  
2
18 V  
ꢀꢝ  
Copyright 2004, Texas Instruments Incorporated  
ꢙ ꢝ ꢚ ꢙꢒ ꢓꢧ ꢕꢔ ꢘ ꢠꢠ ꢞꢘ ꢖ ꢘ ꢗ ꢝ ꢙ ꢝ ꢖ ꢚ ꢢ  
1
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SLUS599 − JUNE 2004  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
ABSOLUTE MAXIMUM RATINGS  
(1)  
over operating free-air temperature range (unless otherwise noted)  
TPS2400  
−0.3 to 110  
−0.3 to 22  
−0.3 to 25  
UNIT  
Input voltage range, V  
IN  
V
IN  
GATE (continuous)  
V
Output voltage range, V  
OUT  
GATE (transient, < 10 µs, Duty Cycle < 0.1%)  
Continuous total power dissipation  
See dissipation rating table  
−40 to 125  
Operating junction temperature range, T  
J
Operating free-air temperature range, T  
−40 to 85  
A
°C  
Storage temperature range, T  
stg  
−65 to 150  
Lead temperature soldering 1, 6 mm (1/16 inch) from case for 10 seconds  
260  
(1)  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only,  
and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute−maximum−rated conditions for extended periods may affect device reliability. All voltages are with respect to GND.  
DISSIPATION RATINGS  
DERATING FACTOR  
= 25°C  
T
= 70°C  
T = 85°C  
A
A
PACKAGE  
T < 25°C  
A
T
POWER RATING  
POWER RATING  
A
SOT−23  
285 mW  
2.85 mW/°C  
155 mW  
114 mW  
RECOMMENDED OPERATING CONDITIONS  
MIN  
3.1  
−40  
NOM MAX  
6.8  
125  
UNIT  
Supply voltage at V  
IN  
V
Operating junction temperature  
°C  
ELECTROSTATIC DISCHARGE (ESD) PROTECTION  
MIN  
2.5  
0.5  
MAX  
UNIT  
Human Body Model  
CDM  
kV  
ORDERING INFORMATION  
PACKAGED DEVICES  
T
T
QUANTITY PER REEL  
A =  
J
SOT23−5 (DBV)  
TPS2400DBVR  
TPS2400DBVT  
3000  
500  
40°C to 85°C  
DBV PACKAGE  
(TOP VIEW)  
VIN  
GATE  
4
3
5
1
2
N/C  
GND N/C  
2
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SLUS599 − JUNE 2004  
ELECTRICAL CHARACTERISTICS  
T
A
= −40°C to 85°C, T = −40°C to 125°C (unless otherwise noted)  
J
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
INPUT  
V
V
V
V
V
= 3.1 V  
= 5.0 V  
= 6.5 V  
= 100 V  
rising  
65  
110  
I(VIN)  
I(VIN)  
I(VIN)  
I(VIN)  
I(VIN)  
95  
135  
550  
3.0  
180  
220  
1000  
3.1  
I
Input supply current, V  
IN  
µA  
I(VIN)  
UVLO  
UVLO  
Undervoltage lockout upper threshold  
Undervoltage lockout hysteresis  
2.9  
V
(upper)  
85  
6.7  
100  
6.9  
115  
7.1  
mV  
V
(hyst)  
OVP  
OVP  
Overvoltage protection upper threshold  
Overvoltage protection hysteresis  
V
I(VIN)  
rising  
(upper)  
135  
150  
165  
mV  
(hyst)  
GATE DRIVE  
V
V
V
V
V
V
= 3.1 V, V  
= 7 V  
= 10 V  
I(VIN)  
O(gate)  
I
Gate sourcing current  
3
10  
µA  
OSOURCE(gate)  
= 5 V, V  
O(gate)  
I(VIN)  
(1)  
I
Gate sinking current  
= 7.2 V, V  
O(gate)  
= 15 V  
350  
10  
485  
600  
12  
mA  
OSINK(gate)  
I(VIN)  
= 3.1 V, I  
= 1.0 µA  
= 1.5µA  
= 1.5 µA  
I(VIN)  
OSOURCE(gate)  
= 5 V, I  
16  
19  
V
Gate output high voltage  
I(VIN)  
OSOURCE(gate)  
OH(gate)  
= 6.5 V, I  
OSOURCE(gate)  
16  
20  
V
I(VIN)  
V
V
Gate output high maximum voltage  
Gate output low voltage  
I
= 0 µA  
20  
OHMAX(gate)  
OSOURCE(gate)  
V
V
= 7.2 V, I  
= 50 mA  
1.0  
OL(gate)  
I(VIN)  
OSINK(gate)  
stepped from 0 V to 5 V,  
= 1 nF  
I(VIN)  
0.1  
0.9  
1.5  
15  
0.6  
3
Gate turn-on propogation delay, (50%  
C
C
T
LOAD  
LOAD  
I(VIN)  
ON(prop)  
ON(rise)  
OFF  
V
I(vin)  
to V  
O(gate)  
= 1 V, R  
= 10 M)  
LOAD  
= 10 nF  
ms  
V
stepped from 0 V to 5V,  
= 1 nF  
6
Gate turn-on rise time, (V  
= 1 V to  
O(gate)  
C
T
T
LOAD  
LOAD  
I(VIN)  
90% V = 10 M)  
R
O(gate) , LOAD  
C
= 10 nF  
55  
V
stepped from 6 V to 8 V,  
= 1 nF  
0.25  
Turn-off time, (50% V  
step to  
I(VIN)  
LOAD  
C
µs  
LOAD  
V
= 6.9 V, R  
= 10 meg )  
O(GATE)  
C
= 10 nF  
0.5  
LOAD  
(1)  
Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.  
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SLUS599 − JUNE 2004  
TERMINAL FUNCTIONS  
Terminals  
I/O  
Description  
Output gate drive for an external N-channel MOSFET.  
Name  
GATE  
No.  
4
O
I
GND  
NC  
2
Ground  
1
No internal connection  
Input voltage  
NC  
3
VIN  
5
DETAILED DESCRIPTION  
Undervoltage and Overvoltage Comparators and Logic  
When the comparators detect that V  
on the external N-channel MOSFET. When V  
undervoltage level, the GATE output is driven low.  
is within the operating window, the GATE output is driven high to turn  
CC  
goes above the set overvoltage level, or below the set  
CC  
Charge pump  
An internal charge pump supplies power to the GATE drive circuit and provides the necessary voltage to pull  
the gate of the MOSFET above the source.  
Zener Diodes  
Limit internal power rails to 8.0 V and GATE output to 18 V.  
Shut-Off MOSFET  
When an undervoltage or overvoltage event occurs, this MOSFET is turned on to pull down the gate of the  
external N-channel MOSFET, thus isolating the load from the incoming transient.  
I
I
IN  
OUT  
FDC3616N  
V
IN  
V
OUT  
5
VIN  
TPS2400  
GATE 4  
GND  
2
UDG−04056  
Figure 1. Application Diagram  
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SLUS599 − JUNE 2004  
APPLICATION INFORMATION  
Overvoltage Protection  
An overvoltage condition is commonly created in these situations.  
D
Unplugging a wall adapter from an AC outlet. Energy stored in the transformer magnetizing inductance is  
released and spikes the output voltage.  
D
D
D
D
Powering an appliance with the wrong voltage adapter (user error)  
Automotive load dump due to ignition, power windows, or starter motor (for example)  
An AC power-line transient  
Power switch contact bounce (causes power supply/distribution inductive kick), (See Figure 2)  
Many electronic appliances use a transient voltage suppressor (TVS) for overvoltage protection as shown in  
Figure 2. The TVS is typically a metal-oxide varister (MOV) or Transzorb. The former is a non-linear resistor  
with a soft turn-on characteristic whereas the latter is a large junction zener diode with a very sharp turn-on  
characteristic. These devices have high pulse-power capability and pico-second response time. A TVS clamps  
the load voltage to a safe level so the load operates uninterrupted in the presence of power supply  
output-voltage spikes. But in the event of a voltage surge, fuse F2 blows and must be replaced to restore  
operation.  
F1  
L
S
R
S
S1  
F2  
+
V
S
TVS  
LOAD  
Power Supply  
Appliance  
UDG−04057  
Figure 2. Load Protection Using Transient Voltage Suppressor Clamps  
The TPS2400 circuit in Figure 3 protects the load from an overvoltage, not by clamping the load voltage like  
a TVS, but by disconnecting the load from the power supply. The circuit responds to an overvoltage in less than  
1 µs and rides out a voltage surge without blowing fuse F2. Note that the voltage surge can be of indefinite  
duration.  
The load can see a voltage spike of up to 1 µs, the amount of time it takes the TPS2400 to disconnect the load  
from the power supply. A low-power zener diode D2 can be used to clamp the load voltage to a safe level. In  
most cases, diode D2 is not necessary since the load bypass capacitor (not shown) forms a low-pass filter with  
resistor R and inductor L to significantly attenuate the spike.  
S
S
5
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SLUS599 − JUNE 2004  
APPLICATION INFORMATION  
When the TPS2400 disconnects the load from the power supply, the power-supply output-voltage spikes as the  
stored energy in inductor L is released. A zener diode D1 or a small ceramic capacitor can be used to keep  
S
the voltage spike at a safe level.  
L
S
R
S
F1  
S1  
F2  
Q1  
5
U1  
4
LOAD  
TPS2400  
+
V
S
D1  
(Optional)  
D2  
(Optional)  
2
Power Supply  
Appliance  
UDG−04058  
Figure 3. TPS2400 Application Block Diagram  
Controlling the Load Inrush-Current  
Figure 4 is a simplified representation of an appliance with a plug-in power supply (e.g., wall adapter). When  
power is first applied to the load in Figure 4, the large filter capacitor C acts like a short circuit, producing  
LOAD  
an immediate inrush-current that is limited by the power-supply output resistance and inductance, R and L ,  
S
S
respectively. This current can be several orders of magnitude greater than the steady-state load current. The  
large inrush current can damage power connectors P1 and J1 and power switch S1, and stress components.  
Increasing the power-supply output resistance and inductance lowers the inrush current. However, the former  
increases system power-dissipation and the latter decreases connector and switch reliability by encouraging  
the contacts to arc when they bounce.  
L
S
R
S
F1  
J1  
P1  
S1  
F2  
+
V
S
LOAD  
C
LOAD  
Power Supply  
Appliance  
UDG−04059  
Figure 4. Power-Supply Output Resistance and Inductance Circuit Model  
6
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SLUS599 − JUNE 2004  
APPLICATION INFORMATION  
The TPS2400 circuit in Figure 5 limits the inrush current without these draw backs. The TPS2400 charges the  
transistor Q1 gate capacitance C with a 5-µA source when Q1 is commanded to turn on. Transistor Q1 is wired  
G
as a source follower so the gate-voltage slew rate and the load-voltage slew rate are identical and equal to  
ēV  
ēt  
5 mA  
L
+
C
G
(1)  
The corresponding inrush current is:  
ēV  
ēt  
C
L
L
+ ǒ Ǔ  
I
[ C   
  5 mA  
INRUSH  
L
C
G
(2)  
An external capacitor and a series 1-kresistor can be connected to the gate of Q1 and ground to reduce inrush  
current further. In this case, the parameter C in equations 1 and 2 is the sum of the internal and external FET  
G
gate capacitance. The 1-kresistor decouples the external gate capacitor so the TPS2400 can rapidly turn off  
transistor Q1 in response to an overvoltage condition.  
L
S
R
S
F1  
Q1  
J1 P1  
S1  
F2  
5
C
LOAD  
U1  
4
LOAD  
TPS2400  
+
D1  
(Optional)  
2
Power Supply  
Appliance  
UDG−04060  
Figure 5. Turn-On Voltage Slew Rate Control Using the TPS2400  
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SLUS599 − JUNE 2004  
TYPICAL CHARACTERISTICS  
R
= 50 Ω  
LOAD  
BW = 20 MHz  
V
IN  
(1 V/div)  
V
OUT  
(1 V/div)  
t − Time − 200 µs/div  
Figure 6. Output Turn-On Response  
V
IN  
V
OUT  
S1  
Q1  
FDC3616N  
5
VIN  
+
U1  
TPS2400  
50 Ω  
LOAD  
5 V  
GATE  
4
R
V
IN1  
GND  
2
V
GATE  
UDG−04062  
Figure 7. Output Turn-On Response Test Circuit  
8
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SLUS599 − JUNE 2004  
TYPICAL CHARACTERISTICS  
R
= 50 Ω  
LOAD  
BW = 20 MHz  
V
IN  
(2 V/div)  
V
OUT  
V
G
(2 V/div)  
V
GATE  
V
IN  
V
GATE  
(5 V/div)  
t − Time − 40 ns/div  
Figure 8. Output Turn-Off Response  
V
IN  
V
OUT  
D1  
1N5818  
Q1  
FDC3616N  
5
S1  
V
50 Ω  
LOAD  
U1  
TPS2400  
4
R
V
5 V  
IN1  
IN2  
+
+
V
GATE  
10 V  
2
UDG−04061  
Figure 9. Output Turn-Off Response Test Circuit  
9
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SLUS599 − JUNE 2004  
TYPICAL CHARACTERISTICS  
INPUT SUPPLY CURRENT  
INPUT SUPPLY CURRENT  
vs  
JUNCTION TEMPERATURE  
vs  
JUNCTION TEMPERATURE  
180  
800  
700  
V
is within the  
IN  
GATE Enable Range  
V
VIN  
> V  
OVP  
V
IN  
= 6.5 V  
V
IN  
= 100 V  
160  
140  
V
IN  
= 75 V  
600  
500  
120  
100  
80  
60  
40  
20  
0
V
IN  
V
IN  
V
IN  
= 50 V  
= 25 V  
= 10 V  
V
= 5.0 V  
IN  
400  
300  
200  
100  
0
V
= 3.1 V  
IN  
−50  
0
50  
100  
150  
−50  
0
50  
100  
150  
T
J
− Junction Temperature − °C  
T
J
− Junction Temperature − °C  
Figure 10  
Figure 11  
GATE SOURCING CURRENT  
GATE SOURCING CURRENT  
vs  
vs  
GATE VOLTAGE  
GATE VOLTAGE  
8
7
8
7
T
J
= 125°C  
V
IN  
= 3.1 V  
V
IN  
= 5 V  
T
J
= 125°C  
T
= 25°C  
J
T
= 25°C  
J
6
5
6
5
T
J
= −40°C  
T
J
= −40°C  
4
3
4
3
2
2
0
5
10  
15  
0
5
10  
15  
20  
V
− Gate Voltage − V  
V
− Gate Voltage − V  
GATE  
GATE  
Figure 12  
Figure 13  
10  
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SLUS599 − JUNE 2004  
TYPICAL CHARACTERISTICS  
GATE OUTPUT VOLTAGE  
GATE SINKING CURRENT  
vs  
vs  
INPUT SUPPLY VOLTAGE  
JUNCTION TEMPERATURE  
600  
550  
500  
20  
18  
−40°C T 125°C  
J
V = 15V  
GATE  
16  
14  
12  
10  
8
450  
6
4
2
0
400  
350  
300  
2
3
4
5
6
7
8
−50  
0
50  
100  
150  
V
VIN  
− Input Supply Voltage − V  
T
J
− Junction Temperature − °C  
Figure 14  
Figure 15  
TURN-OFF TIME to V  
vs  
= 6.9 V  
GATE  
TURN-OFF TIME to V  
vs  
= 6.9 V  
GATE  
JUNCTION TEMPERATURE  
JUNCTION TEMPERATURE  
600  
500  
400  
700  
V
IN  
V
IN  
Step 3.3 V to 8 V  
Step 3.3 V to 8 V  
600  
500  
400  
300  
200  
V
IN  
Step 5 V to 8 V  
V
IN  
Step 5 V to 8 V  
300  
200  
100  
0
V
IN  
Step 6 V to 8 V  
100  
0
V
IN  
Step 6 V to 8 V  
C
= 1 nF  
C
= 10 nF  
LOAD  
LOAD  
−50  
0
50  
100  
150  
−50  
0
50  
100  
150  
T
J
− Junction Temperature − °C  
T
J
− Junction Temperature − °C  
Figure 16  
Figure 17  
11  
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SLUS599 − JUNE 2004  
12  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
4-Mar-2005  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
TPS2400DBVR  
TPS2400DBVT  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
DBV  
5
5
3000  
250  
None  
None  
CU NIPDAU Level-1-235C-UNLIM  
CU NIPDAU Level-1-235C-UNLIM  
DBV  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional  
product content details.  
None: Not yet available Lead (Pb-Free).  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,  
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 1  
IMPORTANT NOTICE  
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