TPS25221DRVT [TI]
高电平有效且具有反向阻断功能的 0.275-2.7A 可调节ILIMIT、2.5-5.5V、70mΩ USB 电源开关 | DRV | 6 | -40 to 125;
| 型号： | TPS25221DRVT |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 高电平有效且具有反向阻断功能的 0.275-2.7A 可调节ILIMIT、2.5-5.5V、70mΩ USB 电源开关 | DRV | 6 | -40 to 125 开关 驱动 电源开关 光电二极管 接口集成电路 |
| 文件： | 总36页 (文件大小：2055K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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TPS25221
ZHCSHI4D –JANUARY 2018–REVISED DECEMBER 2019
TPS25221 2.5V 至 5.5V、2A 持续电流限制开关
1 特性
3 说明
1
•
•
•
•
2.5V 至 5.5V VOPERATING
TPS25221 旨在用于可能会遇到大电容负载和短路事
件的 应用 。可编程电流限制阈值可通过一个外部电阻
器设定在 275mA 至 2.7A（典型值）之间。在更高电
流限制设置上可实现严格至 ±6% 的 ILIMIT 精度。通过
控制电源开关的上升时间和下降时间，可最大限度地降
低开通和关断期间的电流浪涌。
与 TPS2553 引脚对引脚兼容
2A ICONT_MAX
0.275A 至 1.7A 可调节 ILIMIT（2.7A 时精确度为
±6.5%）
•
•
•
•
•
•
•
70mΩ（典型值）RON
1.5µs 短路响应
当负载尝试吸收超过编程的 ILIMIT 的电流时，内部 FET
会进入恒定电流模式，以确保 ILOAD 等于或低于
8ms 故障报告抗尖峰脉冲
反向电流阻断（禁用时）
内置软启动
ILIMIT。在固有的抗尖峰脉冲时间之后，FAULT 输出将
会在过流状态期间维持低电平。
UL 60950 和 UL 62368 认证
器件信息(1)
15kV ESD 保护，符合 IEC 61000-4-2 标准（带外
部电容）
器件型号
TPS25221
封装
SOT-23 (6)
WSON (6)
封装尺寸（标称值）
2.90mm x 1.60mm
2.00mm x 2.00mm
2 应用
•
•
•
•
USB 端口/集线器、笔记本、台式机
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
高清电视
机顶盒
可选插座保护
简化原理图
5-V USB
Input
USB Data
120 µF
0.1 µF
USB
Port
IN
OUT
ILIM
RFAULT
20 kΩ
Fault Signal
Control Signal
FAULT
EN
USB requirement only*
RILIM
20 kΩ
GND
Thermal Pad
*USB requirement that downstream facing ports are bypassed with at
least 120 µF per hub.
1
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。 有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLVSDT3
TPS25221
ZHCSHI4D –JANUARY 2018–REVISED DECEMBER 2019
www.ti.com.cn
目录
1
2
3
4
5
6
7
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Device Comparison Table..................................... 3
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
7.1 Absolute Maximum Ratings ...................................... 4
7.2 ESD Ratings ............................................................ 4
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information.................................................. 4
7.5 Electrical Characteristics........................................... 5
7.6 Typical Characteristics.............................................. 7
Parameter Measurement Information ................ 10
Detailed Description ............................................ 11
9.1 Overview ................................................................. 11
9.2 Functional Block Diagram ....................................... 11
9.3 Feature Description................................................. 12
9.4 Device Functional Modes........................................ 13
9.5 Programming........................................................... 13
10 Application and Implementation........................ 14
10.1 Application Information.......................................... 14
10.2 Typical Applications .............................................. 15
11 Power Supply Recommendations ..................... 21
11.1 Self-Powered and Bus-Powered Hubs ................. 21
11.2 Low-Power Bus-Powered and High-Power Bus-
Powered Functions .................................................. 21
11.3 Power Dissipation and Junction Temperature ...... 21
12 Layout................................................................... 23
12.1 Layout Guidelines ................................................. 23
12.2 Layout Example .................................................... 23
13 器件和文档支持 ..................................................... 24
13.1 器件支持 ............................................................... 24
13.2 文档支持 ............................................................... 24
13.3 接收文档更新通知 ................................................. 24
13.4 社区资源................................................................ 24
13.5 商标....................................................................... 24
13.6 静电放电警告......................................................... 24
13.7 Glossary................................................................ 24
14 机械、封装和可订购信息....................................... 24
8
9
4 修订历史记录
Changes from Revision C (May 2019) to Revision D
Page
•
Removed content from the Programming the Current-Limit Threshold section................................................................... 13
Changes from Revision B (November 2018) to Revision C
Page
•
Changed the Storage temperature From: TBD to: MIN = –65°C MAX = 150°C in the Absolute Maximum Ratings ............ 4
Changes from Revision A (May 2018) to Revision B
Page
•
已删除 特性 列表项中的“正在申请”字样.................................................................................................................................. 1
Changes from Original (January 2018) to Revision A
Page
•
已投入量产 ............................................................................................................................................................................. 1
2
Copyright © 2018–2019, Texas Instruments Incorporated
TPS25221
www.ti.com.cn
ZHCSHI4D –JANUARY 2018–REVISED DECEMBER 2019
5 Device Comparison Table
MAX
OPERATING
CURRENT
OUTPUT
DISCHARGE
ENABLE
CURRENT LIMIT
LATCH OFF
Package
BASE PART NUMBER
2
2
N
N
High
High
Adjustable
Adjustable
N
N
SOT-23 (6)
WSON (6)
TPS25221DBV
TPS25221DRV
6 Pin Configuration and Functions
DBV PACKAGE
SOT-23 6-Pin
Top View
DRV PACKAGE
WSON 6-Pin
Top View
OUT
ILIM
1
2
3
6
5
4
IN
IN
GND
EN
1
2
3
6
5
4
OUT
Thermal
Pad
ILIM
GND
EN
FAULT
FAULT
Not to scale
Not to scale
Pin Functions
PIN
I/O
DESCRIPTION
NAME
SOT-23
WSON
Input voltage and power switch drain; connect a 0.1 μF or greater
ceramic capacitor from IN to GND close to IC
IN
1
6
I
GND
EN
2
3
5
4
--
I
Ground connection
Enable input, logic high/low turns on power switch
Active-low open-drain output, asserted during over-current, or over-
temperature conditions
FAULT
4
3
O
ILIM
OUT
5
6
2
1
O
O
External resistor used to set current limit threshold
Power switch output, connect to load
Internally connected to GND; used to heat-sink the part to the circuit
board traces. Connect thermal pad to GND pin externally.
Thermal Pad
--
PAD
--
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3
TPS25221
ZHCSHI4D –JANUARY 2018–REVISED DECEMBER 2019
www.ti.com.cn
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.3
–6
0
MAX
UNIT
Voltage range on IN, OUT, EN, FAULT,ILIM
Voltage range from IN to OUT
Continuous FAULT sink current
ILIM source current
6
6
V
25
1
mA
mA
0
Maximum junction temperature, Tj
Storage temperature, Tstg
Internally Limited
–65 150
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7.2 ESD Ratings
VALUE
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±2000
V
Charged-device model (CDM), per JEDEC specification JESD22-C101
or ANSI/ESDA/JEDEC JS-002(2)
±500
V
V(ESD)
Electrostatic discharge
IEC 61000-4-2 contact discharge(3)
IEC 61000-4-2 air-gap discharge(3)
±8000
V
V
±15000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(3) Surges per EN61000-4-2. 1999 applied to output terminals of EVM. These are passing tests levels, not failure threshold.
7.3 Recommended Operating Conditions
Voltages are respect to GND (unless otherwise noted)
MIN NOM MAX UNIT
VIN
Supply voltage
IN
2.5
0
5.5
5.5
V
V
VEN
VIH
Input voltage
EN
EN
EN
OUT
High-level input voltage
Low-level input voltage
Output continuous current
1.7
V
VIL
0.66
2
V
ICON
RILIM
I/FAULT
TJ
0
20
A
Current-limit threshold resistor range (nominal 1%) from ILIM to GND
210
10
kΩ
mA
°C
Sink current into FAULT
FAULT
0
Operating junction temperature
–40
125
7.4 Thermal Information
TPS25221
THERMAL METRIC(1)
DBV (SOT-23)
6-PIN
193.2
127.1
65.6
DRV (WSON)
6-PIN
83
UNIT
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
100.5
46.5
ψJT
49.0
8.7
ψJB
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
65.3
46.4
RθJC(bot)
--
24.4
(1) Proper thermal design is required to ensure TJ <125°C for best long term reliability. This is particularly important at higher currents, see
the Semiconductor and IC Package Thermal Metrics application report.
4
Copyright © 2018–2019, Texas Instruments Incorporated
TPS25221
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ZHCSHI4D –JANUARY 2018–REVISED DECEMBER 2019
7.5 Electrical Characteristics
over recommended operating conditions, VEN = VIN, RFAULT = 10 kΩ (unless otherwise noted)
PARAMETER
POWER SWITCH
TEST CONDITIONS
MIN
TYP
70
MAX UNIT
DBV package, TJ = 25°C
80
DBV package, –40°C ≤TJ ≤125°C
DRV package, TJ = 25°C
DRV package, –40°C ≤TJ ≤125°C
VIN = 5.5 V
110
mΩ
92
Static drain-source on-state
resistance
rDS(on)
70
122
0.55
0.35
0.24
0.22
0.95
Rise time, output
Fall time, output
r
VIN = 2.5 V
0.62
ms
CL = 1 µF, RL = 100 Ω,
(see 图 1)
VIN = 5.5 V
0.3
tf
VIN = 2.5 V
0.28
ENABLE INPUT EN OR EN
Enable pin turn on/off
threshold
0.8
1.6
V
IEN
ton
toff
Input current
Turnon time
Turnoff time
VEN = 0 V or 5.5 V
-0.5
0
0.5
3
µA
ms
ms
CL = 1 µF, RL = 100 Ω, (see 图 2 )
CL = 1 µF, RL = 100 Ω, (see 图 2)
0.7
CURRENT LIMIT
TJ = 25°C
2585
2560
1710
1700
630
2720
1820
690
2850
2880
1930
1945
755
RILIM = 20 kΩ
RILIM = 30 kΩ
RILIM = 80 kΩ
–40°C ≤TJ ≤125°C
TJ = 25°C
Current-limit threshold
(Maximum DC output current
IOUT delivered to load) and
Short-circuit current, OUT
connected to GND
–40°C ≤TJ ≤125°C
TJ = 25°C
IOS
mA
µs
–40°C ≤TJ ≤125°C
TJ = 25°C
610
790
220
275
330
RILIM = 210 kΩ
–40°C ≤TJ ≤125°C
210
370
Response time to short
circuit
tIOS
VIN = 5 V (see 图 4)
1.5
SUPPLY CURRENT
Supply current, switch
disable
ISD
ISE
VIN = 5.5 V, No load on OUT, VEN = 0 V,RILIM = 20 kΩ
VIN = 5.5 V, No load on OUT ,RILIM = 20 kΩ
0.02
75
0.5
90
µA
µA
Supply current, switch
enable
UNDERVOLTAGE LOCKOUT
UVLO Low-level input voltage, IN
Hysteresis, IN
VIN rising
2.37
45
2.47
V
TJ = 25 °C
mV
FAULT FLAG
VOL
Output low voltage, FAULT
Off-state leakage
I/FAULT = 1 mA
180
0.5
12
mV
µA
ms
V/FAULT = 5.5 V
FAULT deglitch
FAULT assertion or de-assertion due to overcurrent condition
6
8
THERMAL SHUTDOWN
Thermal shutdown threshold
165
145
20
°C
°C
°C
Thermal shutdown threshold
in current-limit
Hysteresis
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5
TPS25221
ZHCSHI4D –JANUARY 2018–REVISED DECEMBER 2019
www.ti.com.cn
90%
10%
tr
tf
VOUT
图 1. Power-On and Off Timing
50%
ton
50%
VEN
toff
90%
VOUT
10%
图 2. Enable Timing, Active High Enable
50%
50%
VEN
toff
90%
ton
VOUT
10%
图 3. Enable Timing, Active Low Enable
IOS
IOUT
tIOS
图 4. Output Short Circuit Parameters
6
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TPS25221
www.ti.com.cn
ZHCSHI4D –JANUARY 2018–REVISED DECEMBER 2019
7.6 Typical Characteristics
See 图 21 for reference schematic
VIN = 5 V, RILIM = 20 kΩ, ROUT = 5 Ω
VIN = 5 V, RILIM = 20 kΩ, ROUT = 5 Ω
图 6. Turnoff Delay and Fall Time
图 5. Turnon Delay and Rise Time
VIN = 5 V, RILIM = 20 kΩ, ROUT = 0 Ω
图 7. Device Enabled into Short-Circuit
VIN = 5 V, RILIM = 20 kΩ
图 8. Full-Load to Short-Circuit Transient Response
VIN = 5 V, RILIM = 20 kΩ
图 10. No-Load to Short-Circuit Transient Response
VIN = 5 V, RILIM = 20 kΩ
图 9. Short-Circuit to Full-Load Recovery Response
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TPS25221
ZHCSHI4D –JANUARY 2018–REVISED DECEMBER 2019
www.ti.com.cn
Typical Characteristics (接下页)
See 图 21 for reference schematic
VIN = 5 V, RILIM = 20 kΩ
VIN = 5 V, RILIM = 20 kΩ
图 12. No Load to 1-Ω Transient Response
图 11. Short-Circuit to No-Load Recovery Response
2.4
2.39
2.38
2.37
2.36
2.35
2.34
2.33
2.32
2.31
2.3
UVLO Rising
UVLO Falling
-50
0
50
100
150
TJ - Junction Temperature (èC)
UVLO
RILIM = 20 kΩ
VIN = 5 V, RILIM = 20 kΩ
图 14. UVLO – Undervoltage Lockout – V
图 13. 1-Ω to No Load Transient Response
0.04
90
80
70
60
50
40
30
20
10
0.035
0.03
0.025
0.02
2.5 V
5 V
5.5 V
0.015
2.5 V
5.5 V
0.01
0
-50
0
50
100
150
-50
0
50
TJ - Junction Temperature (°C)
100
150
TJ - Junction Temperature (èC)
D007
D008
RILIM = 20 kΩ
RILIM = 20 kΩ
图 15. IIN – Supply Current, Output Disabled – µA
图 16. IIN – Supply Current, Output Enabled – µA
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TPS25221
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ZHCSHI4D –JANUARY 2018–REVISED DECEMBER 2019
Typical Characteristics (接下页)
See 图 21 for reference schematic
20
150
125
100
75
18
16
14
12
10
8
50
6
4
25
DBV package
DRV package
2
0
-50
0
0
50
100
150
0
1.5
3
Peak Current (A)
4.5
6
TJ - Junction Temperature (èC)
D004
D006
VIN = 5 V, RILIM = 20 kΩ, TA = 25°C
图 18. On-Resistance Vs. Junction Temperature
图 17. Current Limit Response – µs
3
2.5
2
0.35
0.3
0.25
0.2
1.5
1
0.15
0.1
TA = -40èC
TA = -40èC
TA = 25èC
TA = 125èC
0.5
0
0.05
0
TA = 25èC
TA = 125èC
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
VIN - VOUT (V/div)
1
0
0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45
VIN - VOUT (V/div)
Curr
D006
VIN = 5.5 V, RILIM = 20 kΩ
VIN = 5.5 V, RILIM = 210 kΩ
图 19. Switch Current Vs. Drain-Source Voltage Across
图 20. Switch Current Vs. Drain-Source Voltage Across
Switch
Switch
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TPS25221
ZHCSHI4D –JANUARY 2018–REVISED DECEMBER 2019
www.ti.com.cn
8 Parameter Measurement Information
图 21. Typical Characteristics Reference Schematic
OUT
RL
CL
图 22. Output Rise / Fall Test Load
Decreasing
Load Resistance
V
OUT
Decreasing
Load Resistance
I
OUT
I
OS
图 23. Output Voltage vs Current-Limit Threshold
10
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TPS25221
www.ti.com.cn
ZHCSHI4D –JANUARY 2018–REVISED DECEMBER 2019
9 Detailed Description
9.1 Overview
The TPS25221 is current-limited, power-distribution switch using N-channel MOSFETs for applications where
short circuits or heavy capacitive loads are encountered. The TPS25221 allows the user to program the current
limit threshold between 275 mA to 2.7A (typical) through an external resistor.
This device incorporates an internal charge pump and the gate drive circuitry necessary to drive the N-channel
MOSFET. The charge pump supplies power to the driver circuit and provides the necessary voltage to pull the
gate of the MOSFET above the source. The charge pump operates from input voltages as low as 2.5 V and
requires little supply current. The driver controls the gate voltage of the power switch. The driver incorporates
circuitry that controls the rise and fall times of the output voltage to limit large current and voltage surges and
provides built-in soft-start functionality.
The TPS25221 limits the output current to the current-limit threshold IOS during an over-current or short-circuit
event by reducing the charge pump voltage driving the N-channel MOSFET and operating it in the saturation
region. The result of limiting the output current to IOS reduces the output voltage at OUT because N-channel
MOSFET is no longer fully enhanced (see 图 22).
9.2 Functional Block Diagram
IN
CS
OUT
Current
Sense
Charge
Pump
Current
Limit
Driver
EN
FAULT
UVLO
GND
ILIM
Thermal
Sense
8-ms
Deglitch
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9.3 Feature Description
9.3.1 Over-current Conditions
The TPS25221 responds to over-current conditions by limiting output current to IOS as show in 图 24. When an
overload condition occurs, the device maintains a constant output current and the output voltage reduces
accordingly. Two possible overload conditions can occur.
1. The first condition is when a short circuit or overload is present when the device is powered-up or enabled.
The short circuit and overload holds the output near zero potential with respect to ground and the TPS25221
ramps the output current to IOS. The TPS25221 limits the current to IOS until the overload condition is
removed or the device begins to thermal cycle.
2. The second condition is when a short circuit, partial short circuit, or transient overload occurs when the
device is on and the internal NFET is fully enhanced. The device responds to the over-current condition by
turning off the NFET within the time limit specified by tIOS (see 图 4). The current-sense amplifier is over-
driven during this time and momentarily disables the internal N-channel MOSFET. The current-sense
amplifier then recovers and ramps the output current to IOS. Similar to the previous case, the TPS25221
limits the current to IOS until the overload condition is removed or the device begins to thermal cycle.
The TPS25221 thermal cycles if an overload condition is present long enough to activate thermal limiting in any
of the above cases. Thermal limiting turns off the internal NFET and starts when the junction temperature
exceeds 145°C (typical). The device remains off until the junction temperature cools 20°C (typical) and then
restarts.
9.3.2 Fault Response
The FAULT open-drain output is asserted (active low) during an over-current or over-temperature condition. The
TPS25221 asserts the FAULT signal until the fault condition is removed and the device resumes normal
operation. The TPS25221 is designed to eliminate nuisance FAULT reporting by using an internal 8 ms deglitch
delay when reporting a fault. This ensures that FAULT is not accidentally asserted due to normal transient
conditions, such as starting into a heavy capacitive load. The deglitch circuitry delays asserting and de-asserting
current limit induce FAULT reports. The FAULT signal is not deglitched when the MOSFET is disabled due to an
over-temperature condition, but is deglitched after the device has cooled and begins to turn on. This
unidirectional deglitch prevents FAULT oscillation during an over-temperature event.
9.3.3 Undervoltage Lockout (UVLO)
The undervoltage lockout (UVLO) circuit disables the power switch until the input voltage reaches the UVLO turn-
on threshold. Built-in hysteresis prevents unwanted on/off cycling due to input voltage droop during turn on.
9.3.4 Enable, (EN)
The logic enable controls the power switch and device supply current. The supply current is reduced to less than
0.5 μA.
The TPS25221 is active high logic, when a logic low is present on EN, the part is disabled. A logic high input on
EN enables the driver, control circuits, and power switch. The enable input is compatible with both TTL and
CMOS logic levels.
9.3.5 Thermal Sense
The TPS25221 has self-protection features using two independent thermal-sensing circuits that monitor the
operating temperature of the power switch and disable operation if the temperature exceeds the Over
Temperature Shutdown Threshold (OTSD). The TPS25221 device operates in constant-current mode during
overload conditions, which increases the voltage drop across power-switch. Power dissipation in the package is
proportional to the voltage drop across the power switch, which increases the junction temperature during an
over-current condition. The first thermal sensor turns off the power switch when the die temperature exceeds
145°C (typical) and the part is in current limit. Hysteresis is built into the thermal sensor, and the switch turns on
after the device has cooled approximately 20°C (typical). The TPS25221 continues to cycle off and on until the
fault condition is removed.
The ambient thermal sensor turns off the power-switch when the junction temperature exceeds 165°C (typical) in
non-current limit condition. The part will turn the switch back on once the junction temperature has cooled
approximately 20°C (typical).
12
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ZHCSHI4D –JANUARY 2018–REVISED DECEMBER 2019
Feature Description (接下页)
The open-drain fault reporting output FAULT is asserted (active low) immediately during an over-temperature
shutdown condition.
9.4 Device Functional Modes
表 1. Protection Function Table
EVENT
CONDITION
ACTION
The device outputs IOS x RLOAD until thermal shutdown. The
fault indicator asserts when the over-current condition
persists for more 8 ms, the fault does not de-assert until
over-current is removed and persists for 8 ms.
Overload on OUT
Overheating
ILOAD > IOS
The device immediately shuts off the internal power switch
and the fault indicator asserts immediately when the junction
temperature exceeds 165°C (typical). The device has a
thermal hysteresis of 20°C (typical). The fault indicator de-
asserts when the junction temperature falls below 145°C
(typical).
TJ > 165 C
The device immediately shuts off the internal current-limited
switch.
Undervoltage on IN
VIN < 2.37 V
9.5 Programming
9.5.1 Programming the Current-Limit Threshold
The over-current threshold is user programmable through an external resistor. The TPS25221 uses an internal
regulation loop to provide a regulated voltage on the ILIM pin. The current-limit threshold is proportional to the
current sourced out of ILIM. The recommended 1% resistor range for RILIM is 20 kΩ ≤ RILIM ≤ 210 kΩ to ensure
stability of the internal regulation loop. Many applications require that the minimum current limit is above a certain
current level or that the maximum current limit is below a certain current level, so it is important to consider the
tolerance of the over-current threshold when selecting a value for RILIM. The following equations and 图 24 can
be used to calculate the resulting over-current threshold for a given external resistor value (RILIM). 图 24 includes
current-limit tolerance due to variations caused by temperature and process. However, the equations do not
account for tolerance due to external resistor variation, so it is important to account for this tolerance when
selecting RILIM. The traces routing the RILIM resistor to the TPS25221 must be as short as possible to reduce
parasitic effects on the current-limit accuracy.
RILIM can be selected to provide a current-limit threshold that occurs: 1) above a minimum load current or 2)
below a maximum load current.
To design above a minimum current-limit threshold, find the intersection of RILIM and the maximum desired load
current on the IOS(min) curve and choose a value of RILIM below this value. Programming the current limit above a
minimum threshold is important to ensure start-up into full load or heavy capacitive loads. The resulting
maximum current-limit threshold is the intersection of the selected value of RILIM and the IOS(max) curve.
To design below a maximum current-limit threshold, find the intersection of RILIM and the maximum desired load
current on the IOS(max) curve and choose a value of RILIM above this value. Programming the current limit below a
maximum threshold is important to avoid current limiting upstream power supplies, causing the input voltage bus
to droop. The resulting minimum current-limit threshold is the intersection of the selected value of RILIM and the
IOS(min) curve.
Current-Limit Threshold Equation (IOS):
52640V
IOSmax (mA) =
RILIM0.97kW
55960V
RILIM1.004kW
IOSnom(mA) =
56850V
RILIM1.033kW
IOSmin(mA) =
where:
20 kΩ ≤ RILIM ≤ 210 kΩ.
(1)
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13
TPS25221
ZHCSHI4D –JANUARY 2018–REVISED DECEMBER 2019
www.ti.com.cn
Programming (接下页)
3000
2800
2600
2400
2200
2000
1800
1600
1400
1200
1000
800
IOS(max)
IOS(nom)
IOS(min)
600
400
200
0
20 40 60 80 100 120 140 160 180 200 220 235
RILIM-Current Limit Resistor-KW
Curr
图 24. Current-Limit Threshold vs Current-Limit Resistor (RILIM
)
10 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
10.1.1 Constant-Current
During normal operation, the TPS25221 load current is less than the current-limit threshold and the device is not
limiting current. During normal operation the N-channel MOSFET is fully enhanced, and VOUT = VIN - (IOUT
x
rDS(on)). The voltage drop across the MOSFET is relatively small compared to VIN, and VOUT is approximately
equal to VIN.
The TPS25221 limits current to the programmed current-limit threshold, set by RILIM, reducing gate drive to the
internal NFET, which increases Rds(on) and reduces load current. This allows the device to effectively regulate
the current to the current-limit threshold. Increasing the resistance of the MOSFET means that the voltage drop
across the device is no longer negligible (VIN ≠ VOUT), and VOUT decreases. The amount that VOUT decreases is
proportional to the magnitude of the overload condition. The expected VOUT can be calculated by:
IOS × RLOAD
where:
IOS is the current-limit threshold and RLOAD is the magnitude of the overload condition.
(2)
For example, if IOS is programmed to 1 A and a 1 Ω overload condition is applied, the resulting VOUT is 1 V.
While in current limit the power dissipation in the package can raise the die temperature above the thermal
shutdown threshold (145°C typical), and the device turns off until the die temperature decreases by the
hysteresis of the thermal shutdown circuit (20°C typical). The device then turns on and continues to thermal cycle
until the overload condition is removed.
14
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TPS25221
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ZHCSHI4D –JANUARY 2018–REVISED DECEMBER 2019
10.2 Typical Applications
10.2.1 Two-Level Current-Limit Circuit
Some applications require different current-limit thresholds depending on external system conditions. 图 25
shows an implementation for an externally controlled, two-level current-limit circuit. The current-limit threshold is
set by the total resistance from ILIM to GND (see the Programming the Current-Limit Threshold section). A logic-
level input enables or disables MOSFET Q1 and changes the current-limit threshold by modifying the total
resistance from ILIM to GND. Additional MOSFET and resistor combinations can be used in parallel to Q1/R2 to
increase the number of additional current-limit levels.
注
ILIM must never be driven directly with an external signal.
Input
0.1 mF
Output
IN
OUT
R
R
FAULT
C
LOAD
LOAD
100 kW
R1
210 kW
ILIM
R2
22.1 kW
Fault Signal
FAULT
EN
GND
Control Signal
Thermal Pad
Q1
2N7002
Current Limit
Control Signal
Copyright © 2018, Texas Instruments Incorporated
图 25. Two-Level Current-Limit Circuit
10.2.1.1 Design Requirements
For this example, use the parameters shown in 表 2.
表 2. Design Requirements
PARAMETER
Input voltage
VALUE
5 V
Output voltage
5 V
Above a minimum current limit
Below a maximum current limit
1000 mA
500 mA
10.2.1.2 Detailed Design Procedures
10.2.1.2.1 Designing Above a Minimum Current Limit
Some applications require that current limiting cannot occur below a certain threshold. For this example, assume
that 1 A must be delivered to the load so that the minimum desired current-limit threshold is 1000 mA. Use the
IOS equations and 图 24 to select RILIM
.
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15
TPS25221
ZHCSHI4D –JANUARY 2018–REVISED DECEMBER 2019
www.ti.com.cn
IOSmin(mA) = 1000mA
56850V
RILIM1.033kW
IOSmin(mA) =
1
æ
ç
ç
ö1.033
56850V
÷
÷
÷
÷
ø
RILIM(kW) =
ç
ç
I
mA
è OSmin
RILIM(kW) = 50kW
(3)
Select the closest 1% resistor less than the calculated value: RILIM = 49.9 kΩ. This sets the minimum current-limit
threshold at 1 A . Use the IOS equations, 图 24, and the previously calculated value for RILIM to calculate the
maximum resulting current-limit threshold.
RILIM(kW) = 49.9kW
52640V
RILIM0.97kW
IOSmax (mA) =
52640V
49.90.97kW
IOSmax (mA) =
IOSmax (mA) = 1186mA
(4)
The resulting maximum current-limit threshold is 1186 mA with a 49.9 kΩ resistor.
10.2.1.2.2 Designing Below a Maximum Current Limit
Some applications require that current limiting must occur below a certain threshold. For this example, assume
that the desired upper current-limit threshold must be below 500 mA to protect an up-stream power supply. Use
the IOS equations and 图 24 to select RILIM
.
IOSmax (mA) = 500mA
52640V
RILIM0.97kW
IOSmax (mA) =
1
æ
ç
ç
ö0.97
52640V
÷
÷
÷
÷
ø
RILIM(kW) =
ç
ç
I
mA
è OSmax
RILIM(kW) = 121.6kW
(5)
Select the closest 1% resistor greater than the calculated value: RILIM = 124 kΩ. This sets the maximum current-
limit threshold at 500 mA . Use the IOS equations, 图 24, and the previously calculated value for RILIM to calculate
the minimum resulting current-limit threshold.
RILIM(kW) = 124kW
56850V
RILIM1.033kW
IOSmin(mA) =
56850V
1241.033kW
IOSmin(mA) =
IOSmin(mA) = 391mA
(6)
The resulting minimum current-limit threshold is 391 mA with a 124 kΩ resistor.
10.2.1.2.3 Accounting for Resistor Tolerance
The previous sections described the selection of RILIM given certain application requirements and the importance
of understanding the current-limit threshold tolerance. The analysis focused only on TPS25221 performance and
assumed an exact resistor value. However, resistors sold in quantity are not exact and are bounded by an upper
and lower tolerance centered around a nominal resistance. The additional RILIM resistance tolerance directly
affects the current-limit threshold accuracy at a system level. The following table shows a process that accounts
16
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TPS25221
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ZHCSHI4D –JANUARY 2018–REVISED DECEMBER 2019
for worst-case resistor tolerance assuming 1% resistor values. Step one follows the selection process outlined in
the application examples above. Step two determines the upper and lower resistance bounds of the selected
resistor. Step three uses the upper and lower resistor bounds in the IOS equations to calculate the threshold
limits. It is important to use tighter tolerance resistors, for example, 0.5% or 0.1%, when precision current limiting
is desired.
表 3. Common RILIM Resistor Selections
DESIRED
NOMINAL
CURRENT
LIMIT
RESISTOR TOLERANCE
ACTUAL LIMITS
IOS(nom) (mA)
IDEAL
RESISTOR
(kΩ)
CLOSEST
1% RESISTOR
(kΩ)
1% LOW (kΩ) 1% HIGH (kΩ)
IOS(min) (mA)
IOS(max) (mA)
(mA)
275
400
199.2
137.2
109.8
91.6
78.6
68.8
61.2
55.1
45.9
39.4
34.5
30.7
27.6
25.1
23.0
21.3
20.5
200
137
198
135.6
108.9
90.0
77.9
67.4
61.3
54.4
45.9
38.8
34.5
30.6
27.1
24.7
23.0
21.3
20.3
202
138.4
111.1
91.8
79.5
68.8
62.5
55.4
46.9
39.6
35.1
31.2
27.7
25.1
23.4
21.7
20.7
236
349
274
401
312
450
500
110
438
499
556
600
90.9
78.7
68.1
61.9
54.9
46.4
39.2
34.8
30.9
27.4
24.9
23.2
21.5
20.5
533
605
669
700
619
699
770
800
719
808
886
900
793
889
972
1000
1200
1400
1600
1800
2000
2200
2400
2600
2700
898
1003
1188
1407
1585
1786
2015
2219
2382
2571
2697
1092
1285
1514
1699
1907
2143
2351
2518
2711
2839
1068
1272
1438
1626
1841
2032
2186
2365
2484
10.2.1.2.4 Input and Output Capacitance
Input and output capacitance improves the performance of the device; the actual capacitance must be optimized
for the particular application. For all applications, TI recommends placing a 0.1 µF or greater ceramic bypass
capacitor between IN and GND as close to the device as possible for local noise de-coupling. This precaution
reduces ringing on the input due to power-supply transients. Additional input capacitance may be needed on the
input to reduce voltage overshoot from exceeding the absolute maximum voltage of the device during heavy
transient conditions. This is especially important during bench testing when long, inductive cables are used to
connect the evaluation board to the bench power-supply.
TI recommends placing a high-value electrolytic capacitor on the output pin when large transient currents are
expected on the output.
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www.ti.com.cn
10.2.1.3 Application Curve
VIN = 5 V, RILIM = 20 kΩ, ROUT = 5 Ω
图 26. Turnon Delay and Rise Time
10.2.2 Auto-Retry Functionality
Some applications require that an over-current condition disables the part momentarily during a fault condition
and re-enables after a pre-set time. This auto-retry functionality can be implemented with an external resistor and
capacitor. During a fault condition, FAULT pulls low disabling the part. The part is disabled when EN is pulled
low, and FAULT goes high impedance allowing CRETRY to begin charging. The part re-enables when the voltage
on EN reaches the turn-on threshold, and the auto-retry time is determined by the resistor-capacitor time
constant. The device continues to cycle in this manner until the fault condition is removed.
TPS25221
0.1 mF
Input
Output
IN
OUT
R
R
LOAD
FAULT
C
LOAD
100 kW
ILIM
R
ILIM
FAULT
EN
20 kW
GND
C
RETRY
Thermal Pad
0.1 mF
Copyright © 2018, Texas Instruments Incorporated
图 27. Auto-Retry Functionality
Some applications require auto-retry functionality and the ability to enable or disable with an external logic signal.
图 28 shows how an external logic signal can drive EN through RFAULT and maintain auto-retry functionality. The
resistor-capacitor time constant determines the auto-retry time-out period.
18
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TPS25221
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ZHCSHI4D –JANUARY 2018–REVISED DECEMBER 2019
TPS25221
0.1 mF
Input
Output
IN
OUT
R
LOAD
C
LOAD
ILIM
External Logic
Signal & Driver
R
R
FAULT
ILIM
FAULT
EN
100 kW
20 kW
GND
C
RETRY
Thermal Pad
0.1 mF
Copyright © 2018, Texas Instruments Incorporated
图 28. Auto-Retry Functionality With External EN Signal
10.2.2.1 Design Requirements (added)
For this example, use the parameters shown in 表 4.
表 4. Design Requirements
PARAMETER
Input voltage
VALUE
5 V
Output voltage
5 V
Above a minimum current limit
Below a maximum current limit
1000 mA
500 mA
10.2.2.2 Detailed Design Procedure
Refer to Programming the Current-Limit Threshold section for the current limit setting. For auto-retry functionality,
once FAULT asserted, EN pull low, TPS25221 is disabled, FAULT des-asserted, CRETRY is slowly charged to EN
logic high through RFAULT, then enable, after deglitch time, FAULT asserted again. In the event of an overload,
TPS25221 cycles and has output average current. ON-time with output current is decided by FAULT deglitch
time. OFF-time without output current is decided by RFAULT x CRETRY constant time to EN logic high and ton time.
Therefore, set the RFAULT × CRETRY to get the desired output average current during overload.
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ZHCSHI4D –JANUARY 2018–REVISED DECEMBER 2019
www.ti.com.cn
10.2.3 Typical Application as USB Power Switch
TPS25221
5V USB
Input
USB Data
0.1 mF
USB
Port
IN
OUT
RFAULT
100 kW
120 mF
ILIM
RILIM
20 kW
Fault Signal
Control Signal
FAULT
EN
USB requirement only*
GND
*USB requirement that downstream
facing ports are bypassed with at least
120 mF per hub
Thermal Pad
Copyright © 2018, Texas Instruments Incorporated
图 29. Typical Application as USB Power Switch
10.2.3.1 Design Requirements
For this example, use the parameters shown in 表 5.
表 5. Design Requirements
PARAMETER
Input voltage
Output voltage
Current
VALUE
5 V
5 V
1200 mA
10.2.3.1.1 USB Power-Distribution Requirements
USB can be implemented in several ways regardless of the type of USB device being developed. Several power-
distribution features must be implemented.
•
Self Powered Hub (SPH) must:
–
–
Current limit downstream ports
Report over-current conditions
•
Bus Powered Hub (BPH) must:
–
–
–
Enable or disable power to downstream ports
Power up at <100 mA
Limit inrush current (<44 Ω and 10 µF)
•
Functions must:
–
–
Limit inrush currents
Power up at <100 mA
The feature set of the TPS25221 meets each of these requirements. The integrated current limiting and over-
current reporting is required by self-powered hubs. The logic-level enable and controlled rise times meet the
need of both input and output ports on bus-powered hubs and the input ports for bus-powered functions.
10.2.3.2 Detailed Design Procedure
10.2.3.2.1 Universal Serial Bus (USB) Power-Distribution Requirements
One application for this device is for current limiting in universal serial bus (USB) applications. The original USB
interface was a 12-Mbps or 1.5-Mbps, multiplexed serial bus designed for low-to-medium bandwidth PC
peripherals (for example, keyboards, printers, scanners, and mice). As the demand for more bandwidth
increased, the USB 2.0 standard was introduced increasing the maximum data rate to 480 Mbps. The four-wire
USB interface is conceived for dynamic attach-detach (hot plug-unplug) of peripherals. Two lines are provided for
differential data, and two lines are provided for 5-V power distribution.
20
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USB data is a 3.3-V level signal, but power is distributed at 5 V to allow for voltage drops in cases where power
is distributed through more than one hub across long cables. Each function must provide its own regulated 3.3 V
from the 5-V input or its own internal power supply. The USB specification classifies two different classes of
devices depending on its maximum current draw. A device classified as low-power can draw up to 100 mA as
defined by the standard. A device classified as high-power can draw up to 500 mA. It is important that the
minimum current-limit threshold of the current-limiting power-switch exceed the maximum current-limit draw of
the intended application. The latest USB standard must always be referenced when considering the current-limit
threshold
The USB specification defines two types of devices as hubs and functions. A USB hub is a device that contains
multiple ports for different USB devices to connect and can be self-powered (SPH) or bus-powered (BPH). A
function is a USB device that is able to transmit or receive data or control information over the bus. A USB
function can be embedded in a USB hub. A USB function can be one of three types included in the list below.
•
•
•
Low-power, bus-powered function
High-power, bus-powered function
Self-powered function
SPHs and BPHs distribute data and power to downstream functions. The TPS25221 has higher current capability
than required for a single USB port allowing it to power multiple downstream ports.
11 Power Supply Recommendations
11.1 Self-Powered and Bus-Powered Hubs
A SPH has a local power supply that powers embedded functions and downstream ports. This power supply
must provide between 4.75 V to 5.25 V to downstream facing devices under full-load and no-load conditions.
SPHs are required to have current-limit protection and must report over-current conditions to the USB controller.
Typical SPHs are desktop PCs, monitors, printers, and stand-alone hubs.
A BPH obtains all power from an upstream port and often contains an embedded function. It must power up with
less than 100 mA. The BPH usually has one embedded function, and power is always available to the controller
of the hub. If the embedded function and hub require more than 100 mA on power up, keep the power to the
embedded function off until enumeration is completed. This can be accomplished by removing power or by
shutting off the clock to the embedded function. Power-switching the embedded function is not necessary if the
aggregate power draw for the function and controller is less than 100 mA. The total current drawn by the bus-
powered device is the sum of the current to the controller, the embedded function, and the downstream ports,
and it is limited to 500 mA from an upstream port.
11.2 Low-Power Bus-Powered and High-Power Bus-Powered Functions
Both low-power and high-power bus-powered functions obtain all power from upstream ports. Low-power
functions always draw less than 100 mA; high-power functions must draw less than 100 mA at power up and can
draw up to 500 mA after enumeration. If the load of the function is more than the parallel combination of 44 Ω
and 10 µF at power up, the device must implement inrush current limiting.
11.3 Power Dissipation and Junction Temperature
The low ON-resistance of the N-channel MOSFET allows small surface-mount packages to pass large currents.
It is required design practice to determine power dissipation and junction temperature. The below analysis gives
an approximation for calculating junction temperature based on the power dissipation in the package. However, it
is important to note that thermal analysis is strongly dependent on additional system level factors. Such factors
include air flow, board layout, copper thickness and surface area, and proximity to other devices dissipating
power. Good thermal design practice must include all system level factors in addition to individual component
analysis.
Begin by determining the rDS(on) of the N-channel MOSFET relative to the input voltage and operating
temperature. As an initial estimate, use the highest operating ambient temperature expected and read rDS(on)
from the typical characteristics graph. Using this value, the power dissipation can be calculated using 公式 7:
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ZHCSHI4D –JANUARY 2018–REVISED DECEMBER 2019
www.ti.com.cn
Power Dissipation and Junction Temperature (接下页)
2
PD = rDS(on) × IOUT
where
•
•
•
•
PD = Total power dissipation (W)
rDS(on) = Power switch on-resistance (Ω)
IOUT = Maximum current-limit threshold (A)
This step calculates the total power dissipation of the N-channel MOSFET.
(7)
(8)
Finally, calculate the junction temperature:
TJ = PD × θJA + TA
where
•
•
•
TA = Ambient temperature (°C)
θJA = Thermal resistance (°C/W)
PD = Total power dissipation (W)
Compare the calculated junction temperature with the initial estimate. If they are not within a few degrees, repeat
the calculation using the refined rDS(on) from the previous calculation as the new estimate. Two or three iterations
are generally sufficient to achieve the desired result. The final junction temperature is highly dependent on
thermal resistance θJA, and thermal resistance is highly dependent on the individual package and board layout.
The table provides example thermal resistances for specific packages and board layouts.
22
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TPS25221
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ZHCSHI4D –JANUARY 2018–REVISED DECEMBER 2019
12 Layout
12.1 Layout Guidelines
•
•
•
•
TI recommends placing the 100-nF bypass capacitor near the IN and GND pins, and make the connections
using a low-inductance trace.
TI recommends placing a high-value electrolytic capacitor and a 100-nF bypass capacitor on the output pin
when large transient currents are expected on the output.
The traces routing the RILIM resistor to the device must be as short as possible to reduce parasitic effects on
the current limit accuracy.
The thermal pad must be directly connected to PCB ground plane using wide and short copper trace.
12.2 Layout Example
1
6
IN
GND
EN
OUT
2
3
ILIM
5
4
FAULT
图 30. TPS25221DBV Board Layout
1
IN
6
5
OUT
ILIM
2
3
GND
4
EN
FAULT
图 31. TPS25221DRV Board Layout
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ZHCSHI4D –JANUARY 2018–REVISED DECEMBER 2019
www.ti.com.cn
13 器件和文档支持
13.1 器件支持
13.1.1 第三方产品免责声明
TI 发布的与第三方产品或服务有关的信息，不能构成与此类产品或服务或保修的适用性有关的认可，不能构成此类
产品或服务单独或与任何 TI 产品或服务一起的表示或认可。
13.2 文档支持
13.2.1 相关文档
请参阅如下相关文档：
•
《TPS25221 评估模块用户指南》(SLVUBD1)
13.3 接收文档更新通知
要接收文档更新通知，请导航至 ti.com. 上的器件产品文件夹。单击右上角的通知我进行注册，即可每周接收产品
信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
13.4 社区资源
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
13.5 商标
E2E is a trademark of Texas Instruments.
13.6 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
13.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知，且
不会对此文档进行修订。如需获取此数据表的浏览器版本，请查阅左侧的导航栏。
24
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS25221DBVR
TPS25221DBVT
TPS25221DRVR
TPS25221DRVT
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOT-23
SOT-23
WSON
WSON
DBV
DBV
DRV
DRV
6
6
6
6
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
-40 to 125
1B4F
1B4F
1C7H
1C7H
NIPDAU
NIPDAU
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Jul-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS25221DBVR
TPS25221DBVT
TPS25221DBVT
TPS25221DRVR
TPS25221DRVT
SOT-23
SOT-23
SOT-23
WSON
WSON
DBV
DBV
DBV
DRV
DRV
6
6
6
6
6
3000
250
180.0
180.0
180.0
180.0
180.0
8.4
8.4
8.4
8.4
8.4
3.2
3.23
3.2
3.2
3.17
3.2
1.4
1.37
1.4
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q2
Q2
250
3000
250
2.3
2.3
1.15
1.15
2.3
2.3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Jul-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS25221DBVR
TPS25221DBVT
TPS25221DBVT
TPS25221DRVR
TPS25221DRVT
SOT-23
SOT-23
SOT-23
WSON
WSON
DBV
DBV
DBV
DRV
DRV
6
6
6
6
6
3000
250
210.0
183.0
210.0
210.0
210.0
185.0
183.0
185.0
185.0
185.0
35.0
20.0
35.0
35.0
35.0
250
3000
250
Pack Materials-Page 2
PACKAGE OUTLINE
DBV0006A
SOT-23 - 1.45 mm max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR
C
3.0
2.6
0.1 C
1.75
1.45
B
1.45 MAX
A
PIN 1
INDEX AREA
1
2
6
5
2X 0.95
1.9
3.05
2.75
4
3
0.50
6X
0.25
C A B
0.15
0.00
0.2
(1.1)
TYP
0.25
GAGE PLANE
0.22
0.08
TYP
8
TYP
0
0.6
0.3
TYP
SEATING PLANE
4214840/C 06/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Body dimensions do not include mold flash or protrusion. Mold flash and protrusion shall not exceed 0.25 per side.
4. Leads 1,2,3 may be wider than leads 4,5,6 for package orientation.
5. Refernce JEDEC MO-178.
www.ti.com
EXAMPLE BOARD LAYOUT
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
5
2
3
2X (0.95)
4
(R0.05) TYP
(2.6)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:15X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214840/C 06/2021
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBV0006A
SOT-23 - 1.45 mm max height
SMALL OUTLINE TRANSISTOR
PKG
6X (1.1)
1
6X (0.6)
6
SYMM
5
2
3
2X(0.95)
4
(R0.05) TYP
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4214840/C 06/2021
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
GENERIC PACKAGE VIEW
DRV 6
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
Images above are just a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4206925/F
PACKAGE OUTLINE
DRV0006A
WSON - 0.8 mm max height
SCALE 5.500
PLASTIC SMALL OUTLINE - NO LEAD
2.1
1.9
A
B
PIN 1 INDEX AREA
2.1
1.9
0.8
0.7
C
SEATING PLANE
0.08 C
(0.2) TYP
0.05
0.00
1
0.1
EXPOSED
THERMAL PAD
3
4
6
2X
7
1.3
1.6 0.1
1
4X 0.65
0.35
0.25
6X
PIN 1 ID
(OPTIONAL)
0.3
0.2
6X
0.1
C A
C
B
0.05
4222173/B 04/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
DRV0006A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
6X (0.45)
6X (0.3)
(1)
1
7
6
SYMM
(1.6)
(1.1)
4X (0.65)
4
3
SYMM
(1.95)
(R0.05) TYP
(
0.2) VIA
TYP
LAND PATTERN EXAMPLE
SCALE:25X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4222173/B 04/2018
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If some or all are implemented, recommended via locations are shown.
www.ti.com
EXAMPLE STENCIL DESIGN
DRV0006A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
SYMM
7
6X (0.45)
METAL
1
6
6X (0.3)
(0.45)
SYMM
4X (0.65)
(0.7)
4
3
(R0.05) TYP
(1)
(1.95)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD #7
88% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:30X
4222173/B 04/2018
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
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