TPS27SA08CQPWPRQ1 [TI]
具有电流监测功能的汽车级 36V、8mΩ、10A 单通道智能高侧开关 | PWP | 16 | -40 to 125;
| 型号： | TPS27SA08CQPWPRQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有电流监测功能的汽车级 36V、8mΩ、10A 单通道智能高侧开关 | PWP | 16 | -40 to 125 开关 |
| 文件： | 总45页 (文件大小：1863K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ZHCSMM0 – DECEMBER 2020
TPS27SA08-Q1
TPS27SA08-Q1 24V、10A 单通道汽车智能高侧开关
1 特性
3 说明
•
具有典型 9mΩ RON (TJ = 25°C) 的单通道智能高侧
开关
TPS27SA08-Q1 器件是一款适用于 24V 电源系统的单
通道智能高侧开关。该器件集成了强大的保护和诊断功
能，可确保即使在发生短路等不利事件时也能提供输出
端口保护。该器件通过可靠的电流限制来防止故障，即
通过将输出电流调节为设定值（通常为 20A）来应对
过流事件。TPS27SA08-Q1 器件还可提供高精度模拟
电流感应，可在驱动不同负载分布的同时改进诊断。通
过向系统 MCU 报告负载电流、器件温度和电源电压，
该器件可实现预测性维护和负载诊断，从而延长系统寿
命。
•
•
适用于具有 40V 负载突降的 24V 电源系统
通过过流保护提高可靠性：
– 电流限制阈值标称值为 20A
– 在达到阈值时进行电流限制（钳位）
符合汽车应用标准：
– 符合 AEC Q-100 标准
– 器件温度等级 1：–40°C 至 +125°C 环境工作
温度范围
•
TPS27SA08-Q1 器件采用小型的 16 引脚 HTSSOP 封
装，以减小 PCB 尺寸。
– 器件 HBM ESD 分类等级 2
– 器件 CDM ESD 分类等级 C4B
强大的集成输出保护：
器件信息
封装(1)
•
封装尺寸（标称值）
器件型号
– 集成热保护
TPS27SA08-Q1
HTSSOP (16)
5.00mm x 4.40mm
– 接地短路和电源短路保护
– 在电源反向期间 FET 自动导通
– 发生失电和接地失效时自动关闭
– 集成输出钳位对电感负载进行消磁
– 可配置故障处理
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
DIA_EN
SEL1
SEL2
SNS
•
•
可对模拟检测输出进行配置，以精确测量：
– 负载电流
µC
ST
– 电源电压
TPS27SA08-Q1
– 器件温度
LATCH
EN
将 FLT 指示返回到 MCU
– 在关断状态下和发生 GND 短路时进行开路负载
检测
24-V DC
Power Supply
VBB
2 应用
VOUT
GND
•
•
•
•
•
•
交流充电（桩）站
直流充电（桩）站
配电开关
Load
座椅舒适模块
动力总成加热元件
感性负载
简化版原理图
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLVSFZ1
TPS27SA08-Q1
ZHCSMM0 – DECEMBER 2020
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Table of Contents
9.1 Overview...................................................................19
9.2 Functional Block Diagram.........................................19
9.3 Feature Description...................................................20
9.4 Device Functional Modes..........................................31
10 Application and Implementation................................33
10.1 Application Information........................................... 33
10.2 Typical Application.................................................. 35
11 Power Supply Recommendations..............................39
12 Layout...........................................................................40
12.1 Layout Guidelines................................................... 40
12.2 Layout Example...................................................... 40
13 Device and Documentation Support..........................41
13.1 Device Support....................................................... 41
13.2 Trademarks.............................................................41
13.3 Electrostatic Discharge Caution..............................41
13.4 Glossary..................................................................41
14 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Device Summary Table................................................... 3
6 Pin Configuration and Functions...................................4
6.1 Recommended Connections for Unused Pins............5
7 Specifications.................................................................. 6
7.1 Absolute Maximum Ratings ....................................... 6
7.2 ESD Ratings .............................................................. 6
7.3 Recommended Operating Conditions ........................6
7.4 Thermal Information ...................................................7
7.5 Electrical Characteristics ............................................7
7.6 Switching Characteristics .........................................10
7.7 SNS Timing Characteristics ..................................... 10
7.8 Typical Characteristics.............................................. 11
8 Parameter Measurement Information..........................18
9 Detailed Description......................................................19
Information.................................................................... 42
4 Revision History
注：以前版本的页码可能与当前版本的页码不同
DATE
REVISION
NOTES
December 2020
*
Initial release.
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5 Device Summary Table
Full Device Number
Current Limit (ICL
20 A
)
Overcurrent Behavior
Device Qualification
TPS27SA08C-Q1
Clamp Current at ICL until Thermal Shutdown
AEC Q-100 qualified
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6 Pin Configuration and Functions
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
DIA_EN
SEL2
SEL1
NC
SNS
LATCH
EN
VBB
ST
NC
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
图 6-1. PWP Package 16-Pin HTSSOP Top View
表 6-1. Pin Functions
PIN
I/O
DESCRIPTION
NO.
NAME
GND
SNS
1
Device ground
—
O
I
2
Sense output
3
LATCH
EN
Sets fault handling behavior (latched or auto-retry)
Switch control input, active high
Switch diagnostic feedback, active low
Switch output
4
I
5
ST
O
O
--
--
I
6, 7, 8, 9, 10, 11
VOUT
NC
12
No Connect
13
NC
No Connect
14
SEL1
SEL2
DIA_EN
VBB
Diagnostics Select 1
15
16
I
Diagnostics Select 2
I
Diagnostic enable, active high
Power supply input
Exposed pad
I
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6.1 Recommended Connections for Unused Pins
The TPS27SA08-Q1 device is designed to provide an enhanced set of diagnostic and protection features.
However, if the system design only allows for a limited number of I/O connections, some pins may be considered
as optional.
表 6-2. Connections for Optional Pins
PIN NAME
CONNECTION IF NOT USED
IMPACT IF NOT USED
SNS
Analog sense is not available.
Ground through 1-kΩ resistor
With LATCH unused, the device will auto-retry after a fault. If latched
behavior is desired it is possible to use one microcontroller output to control
the latch function of several high-side channels.
Float or ground through RPROT
resistor
LATCH
ST
All faults are indicated by the analog SNS pin. The ST pin provides the
additional benefits:
•
•
•
Provide fault indication when DIA_EN = 0
Float
Provide fault indication regardless of SELx pin conditions
Provide fault indication to a simple digital I/O (rather than ADC or
comparator used with the SNS signal)
Float or ground through RPROT SEL1 selects between the VBB and TJ sensing features. With SEL1 unused,
SEL1
SEL2
resistor
only load diagnostics are available.
Ground through RPROT
resistor
With SEL2 = 0 V, VBB measurement diagnostics are not available.
Float or ground through RPROT With DIA_EN unused, analog sense, open-load and short-to-supply
resistor diagnostics are not available.
DIA_EN
RPROT is used to protect the pins from excess current flow during reverse supply conditions, for more information
please see the section on Reverse Supply protection.
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX UNIT
VBB
Maximum continuous supply voltage
Maxium supply voltage - long tranisent
36
40
V
V
VTR1
Duration < 300 ms
VBB to IC GND
Maxium transient voltage at the supply
input
VTR2
54
V
VRev
V
V
V
V
V
V
Reverse supply voltage, VREV ≤ 3 minutes, with GND network.
Enable pin voltage
–36
–1
–1
–1
–1
–1
VEN
7
7
VLATCH
VST
VDIA_EN
VSNS
LATCH pin voltage
Status pin voltage
7(2)
7
Diagnostic Enable pin voltage
Sense pin voltage
7
VSEL1
VSEL2
,
Select pin voltage
7
V
–1
IGND
TJ
Reverse ground current
Maximum junction temperature
Storage temperature
VBB < 0 V
mA
°C
–50
150
150
Tstg
°C
–65
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
(2) These pins are adjacent to pins that will handle high-voltages. In the event of a pin-to-pin short, there will not be device damage.
7.2 ESD Ratings
VALUE
UNIT
All pins except exposed pad
and pins 6 to 11
±2000
Human-body model (HBM), per AEC Q100-002(1)
Electrostatic
discharge
V(ESD)
V
Exposed pad and pins 6 to 11
All pins
±4000
±750
Charged-device model (CDM), per AEC Q100-011
Contact/Air discharge, per IEC 61000-4-2 (2)
Electrostatic
discharge
VBB (exposed pad) and
VOUT pins
V(ESD1)
±8/±15
±1000
kV
V
Surge protection with 42 Ω, per IEC 61000-4-5;
1.2/50 μs (2)
VBB (exposed pad) and
VOUT pins
V(surge) Transient surge
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
(2) Tested with the application circuit and supply voltage of 24-V DC input.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
8
MAX
36
UNIT
VBB
Nominal supply voltage
Enable voltage
V
V
V
V
VEN
5.5
5.5
5.5
–1
–1
–1
VLATCH
VDIA_EN
LATCH voltage
Diagnostic enable voltage
VSEL1
VSEL2
,
Select voltage
Status voltage
5.5
5.5
V
V
–1
VST
0
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7.3 Recommended Operating Conditions (continued)
over operating free-air temperature range (unless otherwise noted)
MIN
–1
0
MAX
VSNSclamp
10
UNIT
V
VSNS
IMAX
Sense voltage
Continuous load current
TA = 70°C
A
7.4 Thermal Information
TPS27SA08-Q1
THERMAL METRIC(1) (2)
PWP (HTSSOP)
UNIT
16 PINS
32.8
30.7
9.3
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
2.6
ψJT
9.4
ψJB
RθJC(bot)
1.0
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
(2) The thermal parameters are based on a 4-layer PCB according to the JESD51-5 and JESD51-7 standards.
7.5 Electrical Characteristics
VBB = 8 V to 36 V, TJ = –40°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
INPUT VOLTAGE AND CURRENT
VClamp
VDS clamp voltage
40
58
3
V
V
VBB undervoltage lockout
falling
VUVLOF
2.5
2.5
VBB undervoltage lockout
rising
VUVLOR
3
0.8
1
V
VBB = 24 V, TJ = 25°C
VEN = VDIA_EN = 0 V, VOUT = 0 V
µA
µA
µA
µA
µA
mA
Standby current (includes
MOSFET leakage)
VBB = 24 V, TJ = 85°C
VEN = VDIA_EN = 0 V, VOUT = 0 V
ISB
VBB = 24 V, TJ = 125°C,
VEN = VDIA_EN = 0 V, VOUT = 0 V
6
VBB = 24 V, TJ = 25°C
VEN = VDIA_EN = 0 V, VOUT = 0 V
0.01
3
0.5
6
IOUT_OFF
Output leakage current
VBB = 24 V, TJ = 125°C
VEN = VDIA_EN = 0 V, VOUT = 0 V
Current consumption in
diagnostic mode
VBB = 24 V, ISNS = 0 mA
VEN = 0 V, VDIA_EN = 5 V, VOUT = 0 V
IDIA
6
VBB = 24 V
IQ
Quiescent current
2.4
20
5.2
mA
ms
VEN = 5 V VDIA_EN = 0 V, IOUT = 0 A, VSELX = 0 V
tSTBY
Standby mode delay time
VEN = VDIA_EN = 0 V to Standby
RON CHARACTERISTICS
9
TJ = 25°C, 6 V ≤ VBB ≤ 36 V
TJ = 150°C, 6 V ≤ VBB ≤ 36 V
TJ = 25°C, 3 V ≤ VBB ≤ 6 V
mΩ
mΩ
mΩ
On-resistance
Includes MOSFET and
package
RON
20
15
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7.5 Electrical Characteristics (continued)
VBB = 8 V to 36 V, TJ = –40°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
9
TJ = 25°C, -18 V ≤ VBB ≤ –8 V
TJ = 105°C, –18 V ≤ VBB ≤ –8 V
mΩ
On-resistance during
reverse polarity
RON(REV)
20
mΩ
CURRENT SENSE CHARACTERISTICS
Current sense ratio
IOUT / ISNS
KSNS
4600
1.74
Current sense current and
ISNSI
VEN = VDIA_EN = 5 V, VSEL1
VSEL2 = 0 V
=
=
=
=
=
=
=
=
=
=
IOUT = 8 A
mA
%
current sense accuracy
Current sense current and
ISNSI
VEN = VDIA_EN = 5 V, VSEL1
VSEL2 = 0 V
IOUT = 8 A
5
5
–5
–5
current sense accuracy
Current sense current and
ISNSI
VEN = VDIA_EN = 5 V, VSEL1
VSEL2 = 0 V
IOUT = 3 A
0.65
0.217
0.065
0.022
mA
%
current sense accuracy
Current sense current and
ISNSI
VEN = VDIA_EN = 5 V, VSEL1
VSEL2 = 0 V
IOUT = 3 A
current sense accuracy
Current sense current and
ISNSI
VEN = VDIA_EN = 5 V, VSEL1
VSEL2 = 0 V
IOUT = 780 mA
IOUT = 780 mA
IOUT = 300 mA
IOUT = 300 mA
IOUT = 100 mA
IOUT = 100 mA
mA
%
current sense accuracy
Current sense current and
ISNSI
VEN = VDIA_EN = 5 V, VSEL1
VSEL2 = 0 V
5
–5
current sense accuracy
Current sense current and
ISNSI
VEN = VDIA_EN = 5 V, VSEL1
VSEL2 = 0 V
mA
%
current sense accuracy
Current sense current and
ISNSI
VEN = VDIA_EN = 5 V, VSEL1
VSEL2 = 0 V
12
42
–12
–42
current sense accuracy
Current sense current and
ISNSI
VEN = VDIA_EN = 5 V, VSEL1
VSEL2 = 0 V
mA
%
current sense accuracy
Current sense current and
ISNSI
VEN = VDIA_EN = 5 V, VSEL1
VSEL2 = 0 V
current sense accuracy
TJ SENSE CHARACTERISTICS
0.12
0.85
mA
mA
TJ = –40°C
TJ = 25°C
TJ = 85°C
TJ = 150°C
VDIA_EN = 5 V, VSEL1 = 5 V,
VSEL2 = 0 V
ISNST
Temperature sense current
1.52
mA
2.25
mA
dISNST/dT
Coefficient
0.0112
mA/°C
VBB SENSE CHARACTERISTICS
VBB = 3 V
0.26
0.69
mA
mA
VBB = 8 V
VDIA_EN = 5 V, VSEL1 = 5 V,
VSEL2 = 5 V
ISNSV
Voltage sense current
Coefficient
VBB = 13.5 V
VBB = 18 V
VBB = 28 V
1.17
mA
1.56
mA
2.43
mA
dISNSV/dV
0.0867
mA/V
SNS CHARACTERISTICS
ISNSFH
ISNS fault high level
VDIA_EN = 5 V, VSEL1 = 0 V, VSEL2 = 0
VDIA_EN = 0 V
6
0
6.9
7.6
1
mA
µA
V
ISNSleak
VSNSclamp
ISNS leakage
VSNS clamp
5.9
Current threshold at which
current limit loop engages
ICL
17
15
22.2
27.8
25
A
TJ = –40°C
Current threshold at which
current limit loop engages
ICL
TJ = 25°C
TJ = 25°C
20
24
A
A
ICL_REG
Current limit regulation level
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7.5 Electrical Characteristics (continued)
VBB = 8 V to 36 V, TJ = –40°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
Current threshold at which
current limit loop engages
ICL
TJ = 125°C
12.8
16
20
A
CURRENT LIMIT CHARACTERISTICS
FAULT CHARACTERISTICS
VOL
Open-load detection voltage VEN = 0 V, VDIA_EN = 5 V
2
2.5
4
V
From falling edge of EN
VEN= 5 V to 0 V, VDIA_EN = 5 V, VSELx = 00
IOUT = 0 mA, VOUT = 4 V
OL and STB indication time
- switch disabled
tOL1
300
500
700
µs
From rising edge of DIA_EN
VEN = 0 V, VDIA_EN = 0 V to 5 V, VSELx = 00
IOUT = 0 mA, VOUT = 4 V
OL and STB indication time
- switch disabled
tOL2
50
50
µs
µs
From rising edge of VOUT
VEN = 0 V, VDIA_EN = 5 V, VSELx = 00
IOUT = 0 mA, VOUT = 0 V to 4 V
OL and STB indication time
- switch disabled
tOL3
TABS
THYS
Thermal shutdown
160
1
°C
°C
Thermal shutdown
hysteresis
20
2
Minimum time from fault shutdown to switch re-enable
(for thermal shutdown, current limit, and energy limit)
tRETRY
Retry time
3
ms
EN PIN CHARACTERISTICS(1)
VIL, EN
VIH, EN
VIHYS, EN
IIL, EN
Input voltage low level
Input voltage high level
Input voltage hysteresis
Input current low level
Input current high level
Internal pulldown resistor
0.8
V
V
No GND network Diode
No GND network Diode
VEN = 0.8 V
2
250
0.8
2
mV
µA
µA
MΩ
IIH, EN
REN
VEN = 2.0 V
1
DIA_EN PIN CHARACTERISTICS (1)
VIL, DIA_EN Input voltage low level
No GND network Diode
No GND network Diode
0.8
V
V
VIH, DIA_EN Input voltage high level
2
VIHYS,
Input voltage hysteresis
250
mV
DIA_EN
IIL, DIA_EN
IIH, DIA_EN
RDIA_EN
Input current low level
Input current high level
Internal pulldown resistor
VDIA_EN = 0.8 V
VDIA_EN = 2.0 V
0.8
2
µA
µA
1
MΩ
SEL1 AND SEL2 PIN CHARACTERISTICS (1)
VIL, SELx
VIH, SELx
Input voltage low level
Input voltage high level
No GND network Diode
0.8
V
V
2
VIHYS, SELx Input voltage hysteresis
250
0.8
2
mV
µA
µA
MΩ
IIL, SELx
IIH, SELx
RSELx
Input current low level
Input current high level
Internal pulldown resistor
VSELx = 0.8 V
VSELx = 2.0 V
1
LATCH PIN CHARACTERISTICS (1)
VIL, LATCH
VIH, LATCH
Input voltage low level
Input voltage high level
No GND network Diode
No GND network Diode
0.8
V
V
2
VIHYS, LATCH Input voltage hysteresis
250
0.8
2
mV
µA
µA
IIL, LATCH
IIH, LATCH
Input current low level
Input current high level
VLATCH = 0.8 V
VLATCH = 2.0 V
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7.5 Electrical Characteristics (continued)
VBB = 8 V to 36 V, TJ = –40°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
RLATCH
Internal pulldown resistor
1
MΩ
ST PIN CHARACTERISTICS (1)
VOL, ST
ISTleak
Output voltage low level
Leakage current
IST = 1 mA
VST = 5 V
0.4
2
V
µA
(1) VBB = 3 to 28 V
7.6 Switching Characteristics
VBB = 36 V, TJ = –40°C to 150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
20
TYP
70
MAX
UNIT
µs
tDR
tDF
Turn-on delay time
Turn-off delay time
100
125
VBB = 24 V, RL = 8 Ω
VBB = 24 V, RL = 8 Ω
20
50
µs
VBB = 24 V, 20% to 80% of VOUT
RL = 8 Ω
,
SRR
SRF
VOUT rising slew rate
VOUT falling slew rate
0.1
0.2
0.35
0.5
0.8
0.9
V/µs
V/µs
VBB = 24 V, 80% to 20% of VOUT
,
RL = 8 Ω
tON
Turn-on time
39
39
100
90
0
180
180
80
µs
µs
µs
VBB = 24 V, RL = 8 Ω
VBB = 24 V, RL = 8 Ω
200-µs enable pulse
tOFF
Turn-off time
tON - tOFF
Turn-on and off matching
–80
Switching energy losses during
turn-on
EON
0.4
0.4
mJ
mJ
VBB = 24 V, RL = 8 Ω
VBB = 24 V, RL = 8 Ω
Switching energy losses during
turn-off
EOFF
7.7 SNS Timing Characteristics
VBB = 8 to 36 V, TJ = –40°C to 150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
SNS TIMING - CURRENT SENSE
VEN = 5 V, VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ, RL = 2.6 Ω
tSNSION1
tSNSION2
tSNSION3
tSNSIOFF1
tSETTLEH
tSETTLEL
Settling time from rising edge of DIA_EN
Settling time from rising edge of EN
40
180
180
20
µs
µs
µs
µs
µs
µs
VEN = VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ, RL = 2.6 Ω
VEN = 0 V to 5 V, VDIA_EN = 5 V
RSNS = 1 kΩ, RL = 2.6 Ω
Settling time from rising edge of EN
VEN = 5 V, VDIA_EN = 5 V to 0 V
RSNS = 1 kΩ, RL = 2.6 Ω
Settling time from falling edge of DIA_EN
Settling time from rising edge of load step
Settling time from falling edge of load step
VEN = 5 V, VDIA_EN = 5 V
RSNS = 1 kΩ, IOUT = 1 A to 5 A
20
VEN = 5 V, VDIA_EN = 5 V
RSNS = 1 kΩ, IOUT = 5 A to 1 A
20
SNS TIMING - TEMPERATURE SENSE
VEN = 5 V, VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ
tSNSTON1
tSNSTON2
tSNSTOFF
Settling time from rising edge of DIA_EN
40
70
20
µs
µs
µs
VEN = 0 V, VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ
Settling time from rising edge of DIA_EN
Settling time from falling edge of DIA_EN
VEN = X, VDIA_EN = 5 V to 0 V
RSNS = 1 kΩ
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7.7 SNS Timing Characteristics (continued)
VBB = 8 to 36 V, TJ = –40°C to 150°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
SNS TIMING - VOLTAGE SENSE
VEN = 5 V, VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ
tSNSVON1
tSNSVON2
tSNSVOFF
Settling time from rising edge of DIA_EN
Settling time from rising edge of DIA_EN
Settling time from falling edge of DIA_EN
40
70
20
µs
µs
µs
VEN = 0 V, VDIA_EN = 0 V to 5 V
RSNS = 1 kΩ
VEN = X, VDIA_EN = 5 V to 0 V
RSNS = 1 kΩ
SNS TIMING - MULTIPLEXER
Settling time from temperature sense to
VEN= X, VDIA_EN = 5 V
VSEL1 = 5 V to 0 V, VSEL2 = 0 V
RSNS = 1 kΩ, RL = 2.6 Ω
60
60
60
60
60
60
µs
µs
µs
µs
µs
µs
current sense
VEN = X, VDIA_EN = 5 V
VSEL1 = 5 V, VSEL2 = 0 V to 5 V
RSNS = 1 kΩ
Settling time from temperature sense to
voltage sense
VEN = X, VDIA_EN = 5 V
VSEL1 = 5 V, VSEL2 = 5 V to 0 V
RSNS = 1 kΩ
Settling time from voltage sense to
temperature sense
tMUX
VEN = X, VDIA_EN = 5 V
VSEL1 = VSEL2 = 5 V to 0 V,
RSNS = 1 kΩ, RL = 2.6 Ω
Settling time from voltage sense to current
sense
VEN = X, VDIA_EN = 5 V
VSEL1 = 0 V to 5 V, VSEL2 = 0 V
RSNS = 1 kΩ, RL = 2.6 Ω
Settling time from current sense to
temperature sense
VEN = X, VDIA_EN = 5 V
VSEL1 = VSEL2 = 0 V to 5 V
RSNS = 1 kΩ, RL = 2.6 Ω
Settling time from current sense to voltage
sense
7.8 Typical Characteristics
2.7
4
VBB
8 V
3.5
3
13.5 V
18 V
24 V
2.65
2.6
2.5
2
2.55
2.5
1.5
1
0.5
0
2.45
-40
-10
20
50 80
Temperature (°C)
110
140
-40
-20
0
20
40
60
Temperature (°C)
80
100
120
SLVS
SDL0V0S1
VBB = 13.5 V to 0 V
VEN = 5 V
VDIAG__EN = 0 V
ROUT = 1 kΩ
VOUT = 0 V
VEN = 0 V
VDIAG_EN = 0 V
图 7-2. Standby Current (ISB) vs Temperature
图 7-1. Falling Undervoltage Lockout (VUVLOF) vs Temperature
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7.8 Typical Characteristics (continued)
3
5
4
3
2
8 V
13.5 V
18 V
VBB
8 V
13.5 V
18 V
24 V
2.5
28 V
2
1.5
1
0.5
0
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
Temperature (èC)
Temperature (èC)
D002
D003
VOUT = 0 V
VEN = 0 V
VDIAG_EN = 0 V
IOUT = 0 A
RSNS = 1 kΩ
VEN = 5 V
VDIAG_EN = 5 V
VSEL1 = VSEL2 = 0 V
图 7-3. Output Leakage Current (IOUT(standby)) vs Temperature
图 7-4. Quiescent Current (IQ) vs Temperature
18
20
VBB
8 V
13.5 V
24 V
16
16
12
8
14
12
10
8
-40èC
25èC
60èC
85èC
4
105èC
125èC
150èC
0
6
0
4
8
12
16
20
24
28
-40
-15
10
35
60
85
110
135 150
VBB (V)
Temperature (èC)
SLVS
D004
IOUT = 200 mA
VEN = 5 V
VDIAG_EN = 0 V
IOUT = 200 mA
VEN = 5 V
VDIAG_EN = 0 V
VBB = 13.5 V
RSNS = 1 kΩ
RSNS = 1 kΩ
图 7-6. On Resistance (RON) vs VBB
图 7-5. On Resistance (RON) vs Temperature
75
55
54.5
54
73
71
69
67
65
53.5
53
52.5
52
51.5
51
-40
-15
10
35
60
85
110
135 150
-40
-15
10
35
60
85
110
135 150
Temperature (èC)
SLVS
Temperature (èC)
SLVS
VEN = 5 V to 0 V
VBB = 13.5 V
VDIAG_EN = 0 V
ROUT = 2.6 Ω
RSNS = 1 kΩ
VEN = 0 V to 5 V
VBB = 13.5 V
VDIAG_EN = 0 V
ROUT = 2.6 Ω
RSNS = 1 kΩ
图 7-8. Turn-off Delay Time (tDF) vs Temperature
图 7-7. Turn-on Delay Time (tDR) vs Temperature
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7.8 Typical Characteristics (continued)
0.37
0.5
0.495
0.49
0.36
0.35
0.34
0.33
0.32
0.485
0.48
0.475
0.47
0.465
0.46
0.455
0.45
-40
-15
10
35
60
85
110
135 150
-40
-15
10
35
60
85
110
135 150
Temperature (èC)
Temperature (èC)
SLVS
SLVS
VEN = 0 V to 5 V
VBB = 13.5 V
VDIAG_EN = 0 V
VEN = 5 V to 0 V
VBB = 13.5 V
VDIAG_EN = 0 V
ROUT = 2.6 Ω
RSNS = 1 kΩ
ROUT = 2.6 Ω
RSNS = 1 kΩ
图 7-9. VOUT Slew Rate Rising (SRR) vs Temperature
图 7-10. VOUT Slew Rate Falling (SRF) vs Temperature
83
82
81
80
79
78
77
76
75
74
73
72
76.5
75
73.5
72
70.5
-40
-15
10
35
60
85
110
135
-40
-15
10
35
60
85
110
135 150
Temperature (èC)
Temperature (èC)
SLVS
SLVS
VEN = 0 V to 5 V
VBB = 13.5 V
VDIAG_EN = 0 V
VEN = 5 V to 0 V
VBB = 13.5 V
VDIAG_EN = 0 V
ROUT = 2.6 Ω
RSNS = 1 kΩ
ROUT = 2.6 Ω
RSNS = 1 kΩ
图 7-11. Turn-on Time (tON) vs Temperature
图 7-12. Turn-off Time (tOFF) vs Temperature
10
8
0.2
-40èC
25èC
0.18
0.16
0.14
0.12
0.1
60èC
85èC
105èC
125èC
150èC
6
4
0.08
0.06
0.04
0.02
0
2
0
-40
-15
10
35
60
85
110
135 150
0
100 200 300 400 500 600 700 800 900
ILOAD (mA), VBB=13.5
Temperature (èC)
SLVS
SLVS
VEN = 0 V to 5 V
and 5 V to 0 V
VDIAG_EN = 0 V
VSEL1 = VSEL2 = 0 V
VEN = 5 V
VDIAG_EN = 5 V
ROUT = 2.6 Ω
RSNS = 1 kΩ
VBB = 13.5 V
RSNS = 1 kΩ
VBB = 13.5 V
图 7-14. Current Sense Output Current (ISNSI ) vs Load Current
图 7-13. Turn-on and Turn-off Matching (tON - tOFF) vs
(IOUT) across Temperature
Temperature
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7.8 Typical Characteristics (continued)
0.2
3
2.5
2
VBB
8 V
13.5 V
18 V
0.18
8 V
13.5 V
0.16
18 V
0.14
0.12
0.1
1.5
1
0.08
0.06
0.04
0.02
0
0.5
0
0
100 200 300 400 500 600 700 800 900
ILOAD (mA)
-40
-15
10
35
60
85
110
135 150
Temperature (èC)
SLVS
SLVS
VSEL1 = VSEL2 = 0 V
VEN = 5 V
TA = 25°C
VDIAG_EN = 5 V
VSEL1 = 5 V
VSEL2 = 0 V
VEN = 0 V
VDIAG_EN = 5 V
RSNS = 1 kΩ
RSNS = 1 kΩ
图 7-15. Current Sense Output Current (ISNSI) vs Load Current
图 7-16. Temperature Sense Output Current (ISNST) vs
(IOUT) across VBB
Temperature
2.5
6.95
6.9
6.85
-40èC
25èC
8 V
13.5 V
18 V
60èC
2
85èC
105èC
125èC
1.5
150èC
6.8
6.75
6.7
1
0.5
0
6.65
6.6
0
4
8
12
16
20
24
28
-40
-15
10
35
60
85
110
135 150
VBB (V)
Temperature (èC)
SLVS
SLVS
VSEL1 = VSEL2 = 5 V
VEN = 0 V
IOUT = 0 A
VDIAG_EN = 5 V
VSEL1 = VSEL2 = 0 V
VEN = 0 V
VDIAG_EN = 5 V
VOUT Floating
RSNS = 1 kΩ
RSNS = 500 Ω
图 7-17. Voltage Sense Output Current (ISNSV) vs VBB
图 7-18. Fault High Output Current (ISNSFH) vs Temperature
6.4
8 V
13.5 V
18 V
6.3
6.2
6.1
6
5.9
5.8
5.7
-40
-15
10
35
60
85
110
135 150
Temperature (èC)
SLVS
VBB = 13.5 V
VOUT = 0 V
VEN = 5 V
VDIAG_EN = 0 V
VLATCH = 5 V
VSEL1 = VSEL2 = 0 V
VEN = 5 V
IOUT = 4 A
VDIAG_EN = 5 V
Device Version C
RSNS = 10 kΩ
图 7-20. Current Limit (ICL) vs Temperature
图 7-19. Sense Pin Clamp Voltage (VSNSCLAMP) vs Temperature
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7.8 Typical Characteristics (continued)
2.85
VBB
8 V
1.54
1.535
1.53
VBB
8 V
13.5 V
18 V
13.5 V
18 V
2.75
1.525
1.52
2.65
1.515
1.51
2.55
2.45
2.35
1.505
1.5
1.495
1.49
-40
-15
10
35
60
85
110
135 150
-40
-15
10
35
60
85
110
135 150
Temperature (èC)
Temperature (èC)
SLVS
SLVS
VEN = 0 V
VOUT = 0 V to 5 V
IOUT = 0 A
VEN = 3.3 V to 0 V
VOUT = 0 V
VDIAG_EN = 0 V
VDIAG_EN= 5 V VSEL1 = VSEL2 = 0 V
ROUT = 1 kΩ
图 7-21. Open Load Detection Voltage (VOL) vs Temperature
图 7-22. VIL vs Temperature
1.86
VBB
8 V
325
320
315
310
305
300
295
290
VBB
8 V
13.5 V
18 V
1.85
1.84
1.83
1.82
1.81
1.8
13.5 V
18 V
-40
-15
10
35
60
85
110
135 150
-40
-15
10
35
60
85
110
135 150
Temperature (èC)
Temperature (èC)
SLVS
SLVS
VEN = 0 V to 3.3 V
VOUT = 0 V
VDIAG_EN = 0 V
VEN = 0 V to 3.3 V
and 3.3 V to 0 V
VOUT = 0 V
VDIAG_EN = 0 V
ROUT = 1 kΩ
ROUT = 1 kΩ
图 7-23. VIH vs Temperature
图 7-24. VIHYS vs Temperature
1.6
1.4
1.2
1
3.6
3.2
2.8
2.4
2
8 V
13.5 V
18 V
8 V
13.5 V
18 V
0.8
0.6
0.4
1.6
1.2
-40
-15
10
35
60
85
110
135 150
-40
-15
10
35
60
85
110
135 150
Temperature (èC)
Temperature (èC)
SLVS
SLVS
VEN = 0.8 V
VOUT = 0 V
VDIAG_EN = 0 V
VEN = 2 V
VOUT = 0 V
VDIAG_EN = 0 V
ROUT = 1 kΩ
ROUT = 1 kΩ
图 7-25. IIL vs Temperature
图 7-26. IIH vs Temperature
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7.8 Typical Characteristics (continued)
VDIA_EN = 5 V
VDIA_EN = 5 V
VSEL1 = VSEL2 = 0 V
ROUT = 2.6 Ω
RSNS = 1 kΩ
ROUT = 2.6 Ω
RSNS = 1 kΩ
VSEL1 = VSEL2 = 0 V
图 7-27. Turn-on Time (tON
)
图 7-28. Turn-off Time (tOFF) and Sense Settle Time (tSNSION2)
VDIA_EN= 0 V to 5 V
VSEL1 = VSEL2 = 0 V
IOUT = 1 A to 5 A
VDIA_EN = 5 V
ROUT = 2.6 Ω
RSNS = 1 kΩ
RSNS = 1 kΩ
VSEL1 = VSEL2 = 0 V
图 7-29. ISNS Settling Time (tSNSION1) on DIA_EN Transition
图 7-30. ISNS Settling Time (tSETTLEH) on Rising Load Step
30
25
20
15
10
5
24
20
16
12
8
IVBB (A)
ST (V)
SNS (V)
EN (V)
4
0
0
-5
-4
0.00075
0
0.00015
0.0003
0.00045
0.0006
Time (s)
C_Pe
VOUT = VBB
VEN = 0 V
VSEL1 = VSEL2 = 0 V
VBB = 13.5 V
C Device Version
TA = 25°C
VOUT = 0 V
RSNS = 1 kΩ
VEN = 0 V to 5 V
VDIAG_EN = 5 V
图 7-32. Short Circuit Behavior
图 7-31. Open Load Detection Time (tOL2) on Rising DIAG_EN
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7.8 Typical Characteristics (continued)
15
10
5
15
10
5
0
0
-5
-5
-10
-15
-20
-25
-30
-35
-10
-15
-20
-25
-30
-35
IVBB
VBB
VOUT
EN
0.0008 0.0016 0.0024 0.0032 0.004 0.0048 0.0056
Time (s)
Indu
VBB = 13.5 V
TA = 125°C
LOUT = 5 mH
VEN = 0 V to 5 V, 5 V to 0 V
图 7-33. Inductive Load Demagnetization
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8 Parameter Measurement Information
IBB
VBB
SNS
LATCH
EN
DIA_EN
SEL2
IDIA_EN
ISNS
ISEL2
ILATCH
SEL1
ISEL1
IEN
VOUT
IOUT
IST
ST
GND
图 8-1. Parameter Definitions
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9 Detailed Description
9.1 Overview
The TPS27SA08-Q1 device is a single-channel smart high-side power switch intended for use with 24-V supply
automotive systems. Many protection and diagnostic features are integrated in the device. Diagnostics features
include the analog SNS output and the open-drain fault indication (ST). The analog SNS output is capable of
providing a signal that is proportional to device temperature, supply voltage, or load current. The high-accuracy
load current sense allows for diagnostics of complex loads.
This device includes protection through thermal shutdown, current limit, transient withstand, and reverse supply
operation. For more details on the protection features, refer to the Feature Description and Application
Information sections of the document.
9.2 Functional Block Diagram
VBB
VBB to GND
Clamp
Internal Power
Supply
VBB to VOUT
Clamp
GND
VOUT
Gate Driver
Power FET
EN
LATCH
DIA_EN
SEL1
Current Limit
Energy Limit
Thermal
Shutdown
Open-load /
Short-to-Bat
Detection
SEL2
VBB
Voltage Sense
Fault Indication
Current Sense
SNS
SNS Mux
ST
Temperature
Sense
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9.3 Feature Description
9.3.1 Protection Mechanisms
The TPS27SA08-Q1 device is designed to operate in a rugged automotive environment. The protection
mechanisms allow the device to be robust against many system-level events such as reverse supply, short-to-
ground and more.
There are additional protection features which, if triggered, will cause the switch to automatically disable:
• Thermal Shutdown
• Energy Limit
When any of these protections are triggered, the device will enter the FAULT state. In the FAULT state, the fault
indication will be available on both the SNS pin and the ST pin (see the diagnostic section of the data sheet for
more details).
The switch is no longer held off and the fault indication is reset when all of the below conditions are met:
• LATCH pin is low
• tRETRY has expired
• All faults are cleared (thermal shutdown, current limit, energy limit)
9.3.1.1 Thermal Shutdown
The TPS27SA08-Q1 device includes temperature sensors on the FET and inside of the device controller. When
TJ,FET > TABS, the device will see a thermal shutdown fault. After the fault is detected, the switch will turn off. The
fault is cleared when the switch temperature decreases by the hysteresis value, THYS
.
9.3.1.2 Current Limit
When IOUT reaches the current limit threshold, ICL, the device remains enabled and limits the current IOUT to
close to the threshold, ICL . In the case that the device remains enabled and limits IOUT, the thermal shutdown
and/or energy limit protection feature may be triggered due to the high amount of power dissipation in the
device.
During a short circuit event, the device will hit the ICL threshold that is listed in the Specifications and then
regulate the output current close to the threshold value to protect the device. The device will detect a short circuit
event when the output current exceeds ICL, however the measured maximum current may exceed the ICL
threshold due to the finite response time of the TPS27SA08-Q1 device current limit regulation loop. The device
is guaranteed to protect itself during a short circuit event over the nominal supply voltage range (as defined in
the Specifications section) at 125°C.
9.3.1.2.1 Current Limit Foldback
The TPS27SA08-Q1 device implements a current limit foldback feature that is designed to protect the device in
the case of a long-term fault condition. If the device undergoes three consecutive fault shutdown events (any of
thermal shutdown, current limit, or energy limit), the current limit will be reduced to half of the original value. The
device will revert back to the original current limit threshold if either of the following occurs:
• The device goes to Standby Delay.
• The switch turns-on and turns-off without any fault occurring.
9.3.1.2.2 Undervoltage Lockout (UVLO)
The device monitors the supply voltage VBB to prevent unpredicted behaviors in the event that the supply
voltage is too low. When the supply voltage falls down to VUVLOF, the output stage is shut down automatically.
When the supply rises up to VUVLOR, the device turns back on.
During an initial ramp of VBB from 0 V at a ramp rate slower than 1 V/ms, VEN pin will have to be held low until
VBB is above UVLO threshold (with respect to board ground) and the supply voltage to the device has reliably
reached above the UVLO condition. For best operation, ensure that VBB has risen above UVLO before setting
the VEN pin to high.
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9.3.1.2.3 VBB during Short-to-Ground
When VOUT is shorted to ground, the module power supply (VBB) can have a transient decrease. This is caused
by the sudden increase in current flowing through the wiring harness cables. To achieve ideal system behavior, it
is recommended that the module maintain VBB > 3 V during VOUT short-to-ground. This is typically accomplished
by placing bulk capacitance on the power supply node.
9.3.1.3 Energy Limit
The energy limiting feature is implemented to protect the switch from excessive stress. The device will
continuously monitor the amount of energy dissipated in the FET. If the energy limit threshold is reached, the
switch will automatically disable. In practice, the energy limit will only be reached during a fault event such as
short-to-ground.
Energy limit events have the same system-level behavior as thermal shutdown events.
9.3.1.4 Voltage Transients
The TPS27SA08-Q1 device contains two voltage clamps which protect the device against system-level voltage
transients.
The clamp from VBB to GND is primarily used to protect the controller from positive transients on the supply line.
The clamp from VBB to VOUT is primarily used to limit the voltage across the FET when switching off an inductive
load. Both clamp levels are set to protect the device during these fault conditions. If the voltage potential from
VBB to GND exceeds the VBB clamp level, the clamp will allow current to flow through the device from VBB to
GND (Path 2). If the voltage potential from VBB to VOUT exceeds VCLAMP, the power FET will allow current to flow
from VBB to VOUT (Path 3).
Ri
Positive Supply Transient
(e.g. ISO7637 pulse 2a/3b)
(1)
VBB
VDS
Clamp
(3)
(2)
Controller
VBB
Clamp
VOUT
Load
GND
图 9-1. Current Path During Supply Voltage Transient
9.3.1.4.1 Driving Inductive and Capacitive Loads
When switching off an inductive load, the inductor may impose a negative voltage on the output of the switch.
The TPS27SA08-Q1 device includes a voltage clamp to limit voltage across the FET. The maximum acceptable
load inductance is a function of the device robustness. With a 5-mH load, the TPS27SA08-Q1 device can
withstand a single pulse of 95 mJ inductive dissipation at 125°C and can withstand 56 mJ of inductive dissipation
with a 10-Hz repetitive pulse. If the application parameters exceed this device limit, it is necessary to use a
protection device like a freewheeling diode to dissipate the energy stored in the inductor. 图 9-2 shows the
TPS27SA08-Q1 device discharging a 5-mH load that is driven at 5 A.
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15
10
5
15
10
5
0
0
-5
-5
-10
-15
-20
-25
-30
-35
-10
-15
-20
-25
-30
-35
IVBB
VBB
VOUT
EN
0.0008 0.0016 0.0024 0.0032 0.004 0.0048 0.0056
Time (s)
Indu
图 9-2. Inductive Discharge (5 mH, 5 A)
In addition, the TPS27SA08-Q1 device current limit provides an ideal way to charge a capacitive load safely with
limited inrush current. With no protection, charging a large capacitive load can lead to high inrush currents that
pull a supply down, however by using a relatively low current limit value (regulation around 24 A), the capacitive
load can be charged without impact to the power supply.
For more information on driving inductive or capacitive loads, reference TI's "How To Drive Inductive, Capacitive,
and Lighting Loads with Smart High Side Switch application report.
9.3.1.5 Reverse supply
In the reverse supply condition, the switch will automatically be enabled (regardless of EN status) to prevent
power dissipation inside the MOSFET body diode. In many applications (for example, resistive load), the full load
current may be present during reverse supply. In order to activate the automatic switch on feature, the SEL2 pin
must have a path to module ground. This may be path 1 as shown below, or, if the SEL2 pin is unused, the path
may be through RPROT to module ground.
Protection features (for example, thermal shutdown) are not available during reverse supply. Care must be taken
to ensure that excessive power is not dissipated in the switch during the reverse supply condition.
There are two options for blocking reverse current in the system. Option 1 is to place a blocking device (FET or
diode) in series with the supply. This will block all current paths. Option 2 is to place a blocking diode in series
with the GND node of the high-side switch. This method will protect the controller portion of the switch (path 2),
but it will not prevent current from flowing through the load (path 3). The diode used for Option 2 may be shared
amongst multiple high-side switches.
Path 1 shown in 图 9-3 is blocked inside of the device.
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Reverse blocking
FET or diode
Option 1
BAT
VBB
0V
µC
VDD
(3)
(2)
Controller
VOUT
GPIO
GPIO
VBB
Clamp
Load
RPROT
(1)
GND
Option 2
13.5V
图 9-3. Current Path During Reverse supply
9.3.1.6 Fault Event – Timing Diagrams
Note
All timing diagrams assume that the SELx pins are set to 00.
The LATCH, DIA_EN, and EN pins are controlled by the user. The timing diagrams represent a
possible use-case.
图 9-4 shows the active current limiting behavior of TPS27SA08-Q1 device and the LATCH pin functionality. The
switch will not shutdown until either the energy limit or the thermal shutdown is reached.
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µC resets
the latch
LATCH
DIA_EN
SNS
ISNSFH
Current
Sense
Current
Sense
High-z
High-z
High-z
High-z
ST
VOUT
EN
TABS
THYS
TJ
tRETRY
ICL
IOUT
t
Load reaches limit. Current is limited. Temp Switch is disabled. Temp decreases by
reaches limit. THYS
Switch follows EN. Normal
operation.
图 9-4. Current Limit - Latched Behavior
图 9-5 shows the active current limiting behavior of TPS27SA08-Q1 device. The switch will not shutdown until
either thermal shutdown or energy limit is tripped. In this example, LATCH is tied to GND and the switch is
turned ON when the FET temperature is low enough.
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DIA_EN
ISNSFH
ISNSFH
Current
Sense
Current
Sense
High-z
SNS
ST
High-z
High-z
High-z
VOUT
EN
TABS
THYS
TJ
tRETRY
ICL
IOUT
t
Load reaches limit. Current is limited.
Temp reaches limit.
Switch is disabled. TJ decreases by
THYS
Switch follows EN. Normal operation.
图 9-5. Current Limit - LATCH Pin Permanently Low
deWhen the switch retries after a shutdown event, the SNS fault indication will remain until VOUT has risen to
VBB – 1.8 V. Once VOUT has risen, the SNS fault indication is reset and current sensing is available. ST fault
indication is reset as soon as the switch is re-enabled (does not wait for VOUT to rise). If there is a short-to-
ground and VOUT is not able to rise, the SNS fault indication will remain indefinitely. The following diagram
illustrates auto-retry behavior and provides a zoomed-in view of the fault indication during retry.
Note
图 9-6 assumes that tRETRY has expired by the time that TJ reaches the hysteresis threshold.
LATCH = 0 V and DIA_EN = 5 V
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ISNSFH
ISNSFH
ISNSFH
ISNSFH
SNS
ST
VOUT
EN
TABS
THYS
TJ
t
ISNSFH
ISNSI
SNS
ST
VBB œ 1.8 V
VOUT
EN
TABS
THYS
TJ
t
图 9-6. Fault Indication During Retry
9.3.2 Diagnostic Mechanisms
9.3.2.1 VOUT Short-to-supply and Open-Load
9.3.2.1.1 Detection With Switch Enabled
When the switch is enabled, the VOUT short-to-supply and open-load conditions can be detected with the current
sense feature. In both cases, the load current will be measured through the SNS pin and will be below the
expected value.
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9.3.2.1.2 Detection With Switch Disabled
While the switch is disabled, if DIA_EN is high, an internal comparator will detect the condition of VOUT. If the
load is disconnected (open load condition) or there is a short to supply theOUT voltage will be higher than the
open load threshold (VOL,off) and a fault is indicated on the SNS pin. An internal pull-up of 1 MΩ is in series with
an internal MOSFET switch, so no external component is required if only a completely open load needs to be
detected. However, if there is significant leakage or other current draw even when the load is disconnected, a
lower value pull-up resistor and switch can be added externally to set the VOUT voltage above the VOL,off during
open load conditions.
A. This figure assumes that the device ground and the load ground are at the same potential. In application, there may be a ground shift
voltage of 1 V to 2 V.
图 9-7. Short-to-supply and Open-Load Detection
The detection circuitry is only enabled when DIA_EN = HIGH and EN = LOW.
If VOUT > VOL, the SNS pin will go to the fault level.
If VOUT < VOL, then there is no fault indication.
The fault indication will only occur if the SEL1 pin is set to diagnose the channel.
While the switch is disabled and DIA_EN is high, the fault indication mechanisms will continuously represent the
present status. For example, if VOUT decreases from > VOL to < VOL, the fault indication is reset. Additionally, the
fault indication is reset upon the falling edge of DIA_EN or the rising edge of EN.
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DIA_EN
ISNSFH
High-z
High-z
SNS
tOL2
Enabled
VOUT depends on external conditions
VOL
VOUT
EN
t
Switch is disabled and DIA_EN goes
high.
The condition is determined by the
internal comparator.
The open-load fault is
indicated.
Device standby
图 9-8. Open Load
9.3.2.2 SNS Output
The SNS output may be used to sense the load current, supply voltage, or device temperature. The SELx pins
will select the desired sense signal. The sense circuit will provide a current that is proportional to the selected
parameter. This current will be sourced into an external resistor to create a voltage that is proportional to the
selected parameter. This voltage may be measured by an ADC or comparator.
To ensure accurate sensing measurement, the sensing resistor should be connected to the same ground
potential as the μC ADC.
The SNS Output includes an internal clamp, VSNSclamp. This clamp is designed to prevent a high voltage at the
SNS output and the ADC input.
表 9-1. Analog Sense Transfer Function
PARAMETER
TRANSFER FUNCTION
Load current
ISNSI = IOUT / 4600
Supply voltage(1)
Device temperature
ISNSV = (VBB) × dISNSV / dV
ISNST = (TJ – 25°C) × dISNST / dT + 0.85
(1) Voltage potential between the VBB pin and the GND pin.
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The SNS output will also be used to indicate system faults. ISNS will go to the predefined level, ISNSFH, when
there is a fault. This level is defined in the electrical specifications.
9.3.2.2.1 RSNS Value
The following factors should be considered when selecting the RSNS value:
• Current sense ratio
• Largest and smallest diagnosable load current
• Full-scale voltage of the ADC
• Resolution of the ADC
For an example of selecting RISNS value, reference in the applications section of this data sheet.
9.3.2.2.1.1 High Accuracy Load Current Sense
In many systems, it is required that the high-side switch provide diagnostic information about the downstream
load. With more complex loads, high accuracy sensing is required. A few examples follow:
• Solenoid Protection: Often solenoids are precisely controlled by low-side switches. However, in a fault
event, the low-side switch cannot disconnect the solenoid from the power supply. A high-side switch can be
used to continuously monitor several solenoids. If the system current becomes higher than expected, the
high-side switch can disable the module.
9.3.2.2.1.2 SNS Output Filter
To achieve the most accurate current sense value, it is recommended to apply filtering to the SNS output. There
are two methods of filtering:
• Low-Pass RC filter between the SNS pin and the ADC input. This filter is illustrated in 图 10-1 and typical
values for the resistor and capacitor are given. The designer should select a CSNS capacitor value based on
system requirements. A larger value will provide improved filtering. A smaller value will allow for faster
transient response.
• The ADC and microcontroller can also be used for filtering. It is recommended that the ADC collects several
measurements of the SNS output. The median value of this data set should be considered as the most
accurate result. By performing this median calculation, the microcontroller is able to filter out any noise or
outlier data.
9.3.2.3 ST Pin
The ST pin is an open-drain output. The pin indicates the status of the switch channel. The output is high-z when
there is no fault condition. The output is pulled low when there is a fault condition.
9.3.2.4 Fault Indication and SNS Mux
The following faults will be communicated via the SNS and ST outputs:
• Switch shutdown, due to:
– Thermal Shutdown
– Current limit
– Energy limit
• Active current limiting
• Open-Load / VOUT shorted-to-supply
Open-load / Short-to-supply are not indicated while the switch is enabled (though these conditions can be
detected via the sense current). Hence, if there is a fault indication corresponding to an enabled channel, then it
must be either switch shutdown or active current limiting.
The SNS pin will only indicate the fault if the SELx = 00. Switch shutdown fault indication will occur on the ST pin
regardless of the SELx pins; however, OL/STB fault indication is only available when the SELx = 00.
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表 9-2. SNS Mux
INPUTS
OUTPUTS
DIA_EN
SEL1
SEL2
FAULT DETECT(1)
SNS
ST
0
0
1
1
1
1
1
1
1
1
X
X
0
0
1
1
0
0
1
1
X
X
0
1
0
1
0
1
0
1
0
1
0
0
0
0
1
1
1
1
High-z
High-z
High-z
Pull low
High-z
Load current
Not Used
Not Used
High-z
Device temperature
Supply voltage
ISNSFH
High-z
Pull low
Not Used
Pull low
Pull low
Not Used
Device temperature
Supply voltage
(1) Fault Detect encompasses the below conditions:
•
•
•
Switch shutdown and waiting for retry
Active current limiting
OL / STB
9.3.2.5 Resistor Sharing
Multiple high-side switch channels may use the same SNS resistor as shown in 图 9-9 below. This reduces the
total number of passive components in the system and the number of ADC terminals that are required of the
microcontroller.
Microcontroller
GPIO
GPIO
GPIO
DIA_EN
DIA_EN
DIA_EN
DIA_EN
Switch 1
Switch 2
Switch 3
Switch 4
SNS
SNS
SNS
SNS
GPIO
ADC
RPROT
CSNS
RSNS
图 9-9. Sharing RSNS Among Multiple Devices
9.3.2.6 High-Frequency, Low Duty-Cycle Current Sensing
Some applications will operate with a high-frequency, low duty-cycle PWM. Such applications require fast
settling of the SNS output. For example, a 250-Hz, 5% duty cycle PWM will have an on-time of only 200 µs. The
microcontroller ADC may sample the SNS signal after the defined settling time, tSNSION3
.
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DIA_EN
EN
IOUT
SNS
t
tSNSION3
图 9-10. Current Sensing in Low-Duty Cycle Applications
9.4 Device Functional Modes
9.4.1 Off
Off state occurs when the device is not powered.
9.4.2 Standby
Standby state is a low-power mode used to reduce power consumption to the lowest level. Diagnostic
capabilities are not available in Standby mode.
9.4.3 Diagnostic
Diagnostic state may be used to perform diagnostics while the switch is disabled.
9.4.4 Standby Delay
The Standby Delay state is entered when EN and DIA_EN are low. After tSTBY, if the EN and DIA_EN pins are
still low, the device will go to Standby State.
9.4.5 Active
In Active state, the switch is enabled. The diagnostic functions may be turned on or off during Active state.
9.4.6 Fault
The Fault state is entered if a fault shutdown occurs (thermal shutdown, current limit, energy limit). After all faults
are cleared, the LATCH pin is low, and the retry timer has expired, the device will transition out of Fault state. If
the Enable pin is high, the switch will re-enable. If the Enable pin is low, the switch will remain off.
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VBB < UVLO
OFF
ANY STATE
VBB > UVLO
EN = Low
DIA_EN = Low
t > tSTBY
STANDBY
EN = Low
DIA_EN = High
EN = Low DIA_EN = Low
EN = High
DIA_EN = X
DIAGNOSTIC
STANDBY DELAY
EN = Low DIA_EN = High
EN = Low
DIA_EN = High
EN = High
DIA_EN = X
ACTIVE
EN = Low
DIA_EN = Low
EN = High
DIA_EN = X
!OT_ABS & !OT_REL & !ILIM & !ELIMIT &
LATCH = Low & tRETRY expired
OT_ABS || OT_REL || ILIM ||
ELIMIT
FAULT
图 9-11. State Diagram
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10 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification, and TI
does not warrant its accuracy or completeness. TI’s customers are responsible for determining
suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
10.1 Application Information
VBB
DIA_EN
SEL1
RPROT
RPROT
RPROT
RPROT
RPROT
CVBB
BAT
GND
SEL2
EN
RGND
DGND
(1)
Microcontroller
(1)
LATCH
Load
VOUT
COUT
RPU
ST
RPROT
Legend
SNS
ADC
RPROT
RSNS
Chassis GND
Module GND
Device GND
CSNS
(1) With the ground protection network, the
device ground will be offset relative to the
microcontroller ground.
With the ground protection network, the device ground will be offset relative to the microcontroller ground.
图 10-1. System Diagram
表 10-1. Recommended External Components
COMPONENT
RPROT
RSNS
TYPICAL VALUE
PURPOSE
Protect microcontroller and device I/O pins
Translate the sense current into sense voltage
Provide pull-up source for open-drain output
Low-pass filter for the ADC input
15 kΩ
1 kΩ
RPU
10 kΩ
CSNS
100 pF - 10 nF
4.7 kΩ
RGND
Stabilize GND potential during turn-off of inductive load
Protects device during reverse supply
DGND
BAS21 Diode
Filtering of voltage transients (for example, ESD, ISO7637-2) and improved
emissions
220 nF to Device GND
CVBB
100 nF to Module GND Stabilize the input supply and filter out low frequency noise
22 nF Filtering of voltage transients (for example, ESD, ISO7637-2)
COUT
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10.1.1 Ground Protection Network
As discussed in the section regarding Reverse supply, DGND may be used to prevent excessive reverse current
from flowing into the device during a reverse supply event. Additionally, RGND is placed in parallel with DGND if
the switch is used to drive an inductive load. The ground protection network (DGND and RGND) may be shared
amongst multiple high-side switches.
A minimum value for RGND may be calculated by using the absolute maximum rating for IGND. During the reverse
supply condition, IGND = VBB / RGND
:
RGND ≥ VBB / IGND
(1)
• Set VBB = –13.5 V
• Set IGND = –50 mA (absolute maximum rating)
GND ≥ –13.5 V / –50 mA = 270 Ω
R
In this example, it is found that RGND must be at least 270 Ω. It is also necessary to consider the power
dissipation in RGND during the reverse supply event:
PRGND = VBB 2 / RGND
(2)
PRGND = (13.5 V)2 / 270 Ω = 0.675 W
In practice, RGND may not be rated for such a high power. In this case, a larger resistor value should be selected.
10.1.2 Interface With Microcontroller
The ground protection network will cause the device ground to be at a higher potential than the module ground
(and microcontroller ground). This offset will impact the interface between the device and the microcontroller.
Logic pin voltage will be offset by the forward voltage of the diode. For input pins (for example, EN), the designer
must consider the VIH specification of the switch and the VOH specification of the microcontroller. For a system
that does not include DGND, it is required that VOH > VIH. For a system that does include DGND, it is required that
VOH > (VIH + VF). VF is the forward voltage of DGND
.
For use of the status pin, ST, a similar consideration is necessary. The designer must consider the VOL, ST
specification and the VIL specification of the microcontroller. For a system that includes DGND, it is required that
VOL, ST + VF < VIL, µC
.
The sense resistor, RSNS, should be terminated to the microcontroller ground. In this case, the ADC can
accurately measure the SNS signal even if there is an offset between the microcontroller ground and the device
ground.
10.1.3 I/O Protection
RPROT is used to protect the microcontroller I/O pins during system-level voltage transients such as ISO pulses
or reverse supply. A large resistance value ensures that current through the pin is limited to a safe level.
10.1.4 Inverse Current
Inverse current occurs when 0 V < VBB < VOUT. In this case, current may flow from VOUT to VBB. Inverse current
cannot be caused by a purely resistive load. However, a capacitive or inductive load can cause inverse current.
For example, if there is a significant amount of load capacitance and the VBB node has a transient droop, VOUT
may be greater than VBB
.
TPS27SA08-Q1 device will not detect inverse current. When the switch is enabled, inverse current will pass
through the switch. When the switch is disabled, inverse current may pass through the MOSFET body diode.
The device will continue operating in the normal manner during an inverse current event.
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10.1.5 Loss of GND
The ground connection may be lost either on the device level or on the module level. If the ground connection is
lost, both switches will be disabled. If the switch was already disabled when the ground connection was lost, the
switch will remain disabled. When the ground is reconnected, normal operation will resume.
10.1.6 Thermal Information
When outputting current, the TPS27SA08-Q1 device will heat up due to the power dissipation. 图 10-2 shows
the transient thermal impedance curve that can be used to determine the device temperature during 1-W pulse
of a given length.
35
30
25
20
15
10
5
0
0.0001
0.001 0.002 0.005 0.01 0.02
0.05 0.1 0.2 0.3 0.5
Time (s)
1
2
3 4 567 10
20 30 50 100 200 400
TPS1
图 10-2. Transient Thermal Impedance
10.2 Typical Application
This application example demonstrates how the TPS27SA08-Q1 device can be used to power resistive heater
loads as in seat heaters. 图 10-3 shows a typical application where the load is a resistive seat heater. This
document highlights the basics of this type of application, however for a more detailed discussion reference TI's
Smart Power Switch Seat Heater Reference Design.
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12.8 V DC
Power Supply
DIA_EN
SEL1
SEL2
SNS
VBB
µC
ST
LATCH
EN
TPS27SA08
VOUT
Heater
Load
GND
图 10-3. Block Diagram for Powering Heater Loads
10.2.1 Design Requirements
For this design example, use the input parameters shown in 表 10-2.
表 10-2. Design Parameters
DESIGN PARAMETER
VBB
EXAMPLE VALUE
12.8 V
90-W max
Heater Load
Load Current Sense
Ambient temperature
RθJA
100 mA to 20 A
85°C
32.8°C/W (depending on PCB)
10.2.2 Detailed Design Procedure
10.2.2.1 Thermal Considerations
The DC current under maximum load power condition will be around 7.03 A. Power dissipation in the switch is
calculated in 方程式 3. RON is assumed to be 20 mΩ because this is the maximum specification. In practice,
RON will be lower.
PFET = I2 × RON
(3)
(4)
PFET = (7.03 A)2 × 20 mΩ = 0.988 W
The junction temperature of the device can be calculated using 方程式 5 and the RθJA value from the
Specifications section.
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TJ = TA + RθJA × PFET
TJ = 85°C + 32.8°C/W × 0.988 W = 117.4°C
(5)
The maximum junction temperature rating for TPS27SA08-Q1 device is TJ = 150°C. Based on the above
example calculation, the device temperature will stay below the maximum rating.
10.2.2.2 Diagnostics
If the resistive heating load is disconnected (heater malfunction), an alert is desired. Open-load detection can be
performed in the switch-enabled state via the current sense feature of the TPS27SA08-Q1 device. Alternatively,
under open load condition in off-state with diagnostics enabled, the current in the SNS pin will be the fault
current and the can be detected from the sense voltage measurement.
10.2.2.2.1 Selecting the RISNS Value
表 10-3 shows the requirements for the load current sense in this application. The KSNS value is specified for the
device and can be found in the Specifications section.
表 10-3. RSNS Calculation Parameters
PARAMETER
EXAMPLE VALUE
Current Sense Ratio (KSNS
)
4600
20 A
Largest diagnosable load current
Smallest diagnosable load current
Full-scale ADC voltage
50 mA
5 V
ADC resolution
10 bit
The load current measurement requirements of 20 A ensures that current can be sensed up to the 20-A current
limit, while the low level of 100 mA allows for accurate measurement of low load currents.
The RSNS resistor value should be selected such that the largest diagnosable load current puts VSNS at about
90% of the ADC full-scale. With this design, any ADC value above 90% can be considered a fault. Additionally,
the RSNS resistor value should ensure that the smallest diagnosable load current does not cause VSNS to fall
below 1 LSB of the ADC. With the given example values, a 1-kΩ sense resistor satisfies both requirements
shown in 表 10-4.
表 10-4. VSNS Calculation
LOAD (A)
0.050
SENSE RATIO
4600
ISNS (mA)
VSNS (V)
0.011
% OF 5-V ADC
0.22%
RSNS (Ω)
1000
0.011
20.000
4600
4.348
1000
4.348
87%
10.2.3 Application Curves
图 10-4 shows the behavior of the TPS27SA08-Q1 device in this application when the MCU provides an enable
pulse to beginning heating the resistive element. Shortly after the EN pin goes high, the load current begins to
flow and the SNS pin measures the output current.
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图 10-4. Heater Turn-on Time
By measuring the voltage on the SNS pin, the TPS27SA08-Q1 device can communicate back to the system
MCU what the load current is. 图 10-5 shows that when the seat heater approaches full load and IOUT jumps
from a low load current of 1 A up to a 5-A load current, the load step is mirrored on the SNS pin.
图 10-5. SNS Response During Heater Load Step
One common concern in these type of applications is that the heating element can accidentally lose connection,
creating an open load situation. In this case, it is ideal for the TPS27SA08-Q1 device to recognize that the load
has been removed and report a FLT to the MCU. 图 10-6 shows the behavior of the TPS27SA08-Q1 device
when there is no load attached. As soon as the DIAG_EN pin is engaged, the SNS output goes high and the ST
output engages low. By monitoring these pins, the MCU can recognize there is a fault and notify the user that
maintenance is required.
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图 10-6. Open Load Detection if Heating Element is Missing
Importantly, the TPS27SA08-Q1 device will also protect the system in the event of a short-circuit. 图 10-7 shows
the behavior of the device if it is enabled into a short circuit condition. The current will be clamped to near the
current limit threshold (ICL) until it hits an over temperature event, at which point the FET will be turned off. In this
way, the system is protected from unchecked overcurrent in the event of a short circuit.
30
25
20
15
10
5
24
20
16
12
8
IVBB (A)
ST (V)
SNS (V)
EN (V)
4
0
0
-5
-4
0.00075
0
0.00015
0.0003
0.00045
0.0006
Time (s)
C_Pe
图 10-7. Overcurrent Behavior During Short Circuit Event
11 Power Supply Recommendations
The TPS27SA08-Q1 device is designed to operate in a 24-V system. The nominal supply voltage range is 8 V to
36 V. The device is also designed to withstand voltage transients beyond this range. When operating outside of
the nominal voltage range, the device will exhibit normal functional behavior. However, parametric specifications
may not be guaranteed.
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12 Layout
12.1 Layout Guidelines
To achieve optimal thermal performance, connect the exposed pad to a large copper pour. On the top PCB layer,
the pour may extend beyond the pad dimensions as shown in the example below. In addition to this, it is
recommended to also have a VBB plane either on one of the internal PCB layers or on the bottom layer. Vias
should connect this plane to the top VBB pour.
TPS27SA08-Q1 device has 6 VOUT pins. All VOUT pins must be shorted together on the PCB. Additionally, the
layout should ensure that the current path is symmetrical for both sides of the device. If the path is not
symmetrical, there will be some imbalance in current spreading across the power FET. This can impact accuracy
of the current sense measurement.
12.2 Layout Example
GND
SNS
DIA_EN
SEL2
SEL1
NC
To µC
LATCH
EN
To µC
VBB
ST
NC
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
图 12-1. PWP Layout Example
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13 Device and Documentation Support
13.1 Device Support
13.1.1 Related Documentation
For related documentation see the following:
• TI's "How To Drive Inductive, Capacitive, and Lighting Loads with Smart High Side Switch
• Short Circuit Reliability Test for Smart Power Switches
• TI's Smart Power Switch Seat Heater Reference Design
• Reverse Battery Protection for High Side Switches
13.2 Trademarks
所有商标均为其各自所有者的财产。
13.3 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
13.4 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
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14 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS27SA08CQPWPRQ1
PREVIEW
HTSSOP
PWP
16
3000
RoHS-Exempt
& Green
NIPDAU
Level-3-260C-168HRS
-40 to 125
27A08QC
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
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