TPS3106K33 [TI]

Ultralow Supply-Current Voltage Monitor With Optional Watchdog;
TPS3106K33
型号: TPS3106K33
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

Ultralow Supply-Current Voltage Monitor With Optional Watchdog

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TPS3103xxx  
TPS3106xxx  
TPS3110xxx  
www.ti.com  
SLVS363EAUGUST 2001REVISED SEPTEMBER 2007  
UltraLow Supply-Current/Supply-Voltage Supervisory Circuits  
1
FEATURES  
DESCRIPTION  
2
Precision Supply Voltage Supervision Range:  
0.9 V, 1.2 V, 1.5 V, 1.6 V, 2 V, and 3.3 V  
The TPS310x and TPS311x families of supervisory  
circuits provide circuit initialization and timing  
supervision, primarily for DSP and processor-based  
systems.  
High Trip-Point Accuracy: 0.75%  
Supply Current of 1.2 μA (typical)  
RESET Defined With Input Voltages as Low as  
0.4 V  
During power-on, RESET is asserted when the  
supply voltage (VDD) becomes higher than 0.4 V.  
Thereafter, the supervisory circuit monitors VDD and  
keeps the RESET output active as long as VDD  
remains below the threshold voltage (VIT). An internal  
timer delays the return of the output to the inactive  
state to ensure proper system reset. The delay time  
starts after VDD has risen above VIT. When VDD drops  
below VIT, the output becomes active again.  
Power-On Reset Generator With a Delay Time  
of 130 ms  
Push/Pull or Open-Drain RESET Outputs  
SOT23-6 Package  
Package Temperature Range: –40°C to +85°C  
APPLICATIONS  
All the devices of this family have a fixed-sense  
threshold voltage (VIT) set by an internal voltage  
divider.  
Applications Using Low-Power DSPs,  
Microcontrollers, or Microprocessors  
Portable- and Battery-Powered Equipment  
Intelligent Instruments  
Wireless Communication Systems  
Industrial Equipment  
The TPS3103 and TPS3106 have an active-low,  
open-drain RESET output. The TPS3110 has an  
active-low push/pull RESET.  
The product spectrum is designed for supply voltages  
of 0.9 V up to 3.3 V. The circuits are available in  
SOT23-6 packages. The TPS31xx family is  
characterized for operation over a temperature range  
of –40°C to +85°C.  
Notebook/Desktop Computers  
TPS3106  
DBV PACKAGE  
(TOP VIEW)  
TPS3103  
DBV PACKAGE  
(TOP VIEW)  
3.3 V  
1.6 V  
1
2
3
1
2
3
VDD  
6
5
VDD  
6
5
RSTVDD  
GND  
RESET  
GND  
MR  
VDD  
VCORE  
DSP  
RESET  
VIO  
R3  
RSTSENSE  
SENSE  
PFO  
PFI  
TPS3106K33DBV  
R1  
R2  
4
4
MR  
MR  
RSTVDD  
SENSE  
TPS3110  
DBV PACKAGE  
(TOP VIEW)  
RSTSENSE  
GND  
GND  
GND  
1
2
3
6
5
VDD  
RESET  
GND  
WDI  
Typical Application Circuit  
4
SENSE  
MR  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2001–2007, Texas Instruments Incorporated  
TPS3103xxx  
TPS3106xxx  
TPS3110xxx  
www.ti.com  
SLVS363EAUGUST 2001REVISED SEPTEMBER 2007  
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with  
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.  
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more  
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.  
ORDERING INFORMATION(1)  
(2)  
PRODUCT  
NOMINAL SUPPLY VOLTAGE  
THRESHOLD VOLTAGE, VIT  
TPS3103E12DBVR  
TPS3103E15DBVR  
TPS3103H20DBVR  
TPS3103K33DBVR  
TPS3106E09DBVR  
TPS3106E16DBVR  
TPS3106K33DBVR  
TPS3110E09DBVR  
TPS3110E12DBVR  
TPS3110E15DBVR  
TPS3110K33DBVR  
1.2 V  
1.5 V  
2.0 V  
3.3 V  
0.9 V  
1.6 V  
3.3 V  
0.9 V  
1.2 V  
1.5 V  
3.3 V  
1.142 V  
1.434 V  
1.84 V  
2.941 V  
0.86 V  
1.521 V  
2.941 V  
0.86 V  
1.142 V  
1.434 V  
2.941 V  
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI  
web site at www.ti.com.  
(2) Custom threshold voltages are available. Minimum order quantities apply. Contact factory for details and availability.  
AVAILABLE OPTIONS  
DEVICE  
TPS3103  
TPS3106  
TPS3110  
RESET OUTPUT  
RSTSENSE, RSTVDD OUTPUT  
SENSE INPUT  
WDI INPUT  
PFO OUTPUT  
Open-drain  
Open-drain  
Open-drain  
ü
ü
Push-pull  
ü
ABSOLUTE MAXIMUM RATINGS(1)  
Over operating free-air temperature range, unless otherwise noted.  
VALUE  
UNIT  
V
(2)  
Supply voltage, VDD  
–0.3 to +3.6  
MR Pin, VMR  
–0.3 to VDD + 0.3  
V
All other pins(2)  
–0.3 to +3.6  
V
Maximum low output current, IOL  
Maximum high output current, IOH  
5
mA  
mA  
mA  
mA  
–5  
Input clamp current, IIK (VI < 0 or VI > VDD  
)
±10  
±10  
(3)  
Output clamp current, IOK (VO < 0 or VO > VDD  
Continuous total power dissipation  
Operating temperature range, TA  
Storage temperature range, TSTG  
Soldering temperature  
)
See Dissipation Rating Table  
–40 to +85  
–65 to +150  
+260  
°C  
°C  
°C  
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating  
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) All voltage values are with respect to GND. For reliable operation, the device must not be operated at 3.6 V for more than t = 1000h  
continuously.  
(3) Output is clamped for push-pull outputs by the back gate diodes internal to the IC. No clamp exists for the open-drain outputs.  
2
Submit Documentation Feedback  
Copyright © 2001–2007, Texas Instruments Incorporated  
 
TPS3103xxx  
TPS3106xxx  
TPS3110xxx  
www.ti.com  
SLVS363EAUGUST 2001REVISED SEPTEMBER 2007  
DISSIPATION RATINGS  
TA +25°C  
DERATING FACTOR  
TA = +70°C  
TA = +85°C  
PACKAGE  
POWER RATING  
ABOVE TA = +25°C  
POWER RATING  
POWER RATING  
DBV  
437 mW  
3.5 mW/°C  
280 mW  
227 mW  
RECOMMENDED OPERATING CONDITIONS  
Over operating free-air temperature range, unless otherwise noted.  
MIN  
MAX  
3.3  
UNIT  
V
(1)  
Supply voltage, VDD  
0.4  
0
Input voltage, VI  
VDD + 0.3  
V
High-level input voltage, VIH at MR, WDI  
Low-level input voltage, VIL at MR, WDI  
Input transition rise and fall rate at Δt/ΔV at MR, WDI  
Operating temperature range, TA  
0.7 × VDD  
V
0.3 × VDD  
100  
V
ns/V  
°C  
–40  
+85  
(1) For proper operation of SENSE, PFI, and WDI functions: VDD 0.8 V.  
ELECTRICAL CHARACTERISTICS  
Over operating free-air temperature range (unless otherwise noted).  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
VDD = 3.3 V, IOH = –3 mA  
VDD = 1.8 V, IOH = –2 mA  
VDD = 1.5 V, IOH = –1 mA  
VDD = 0.9 V, IOH = –0.4 mA  
VDD = 0.5 V, IOH = –5 μA  
VDD = 3.3 V, IOL = 3 mA  
VDD = 1.5 V, IOL = 2 mA  
VDD = 1.2 V, IOL = 1 mA  
VDD = 0.9 V, IOL = 500 μA  
VDD = 0.4 V, IOL = 5 μA  
0.8 × VDD  
V
V
V
V
VOH  
High-level output voltage  
0.7 × VDD  
VOL  
Low-level output voltage  
Low-level output voltage  
0.3  
VOL  
RESET only  
TPS31xxE09  
TPS31xxE12  
TPS31xxE15  
TPS31xxE16  
TPS31xxH20  
TPS31xxK33  
0.1  
0.866  
1.151  
1.445  
1.534  
1.857  
2.963  
0.854  
1.133  
1.423  
1.512  
1.829  
2.919  
0.860  
1.142  
1.434  
1.523  
1.843  
2.941  
Negative-going input  
threshold voltage(1)  
VIT–  
TA = +25°C  
V
Negative-going input  
threshold voltage(1)  
VIT – (S)  
SENSE, PFI  
VDD 0.8 V, TA = +25°C  
0.542  
0.551  
0.559  
V
0.8 V VIT < 1.5 V  
1.6 V VIT < 2.4 V  
2.5 V VIT < 3.3 V  
20  
30  
50  
VHYS  
Hysteresis at VDD input  
mV  
Temperature coefficient of VIT, PFI,  
SENSE  
T(K)  
TA = –40°C to +85°C  
–0.012  
15  
–0.019  
%/K  
mV  
VHYS  
Hysteresis at SENSE, PFI input  
MR  
VDD 0.8 V  
MR = VDD, VDD = 3.3 V  
–25  
–25  
25  
25  
IIH  
High-level input current  
nA  
SENSE, PFI,  
WDI  
SENSE, PFI, WDI = VDD  
VDD = 3.3 V  
,
(1) To ensure the best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 μF) should be placed close to the supply  
terminals.  
Copyright © 2001–2007, Texas Instruments Incorporated  
Submit Documentation Feedback  
3
TPS3103xxx  
TPS3106xxx  
TPS3110xxx  
www.ti.com  
SLVS363EAUGUST 2001REVISED SEPTEMBER 2007  
ELECTRICAL CHARACTERISTICS (continued)  
Over operating free-air temperature range (unless otherwise noted).  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
MR  
MR = 0 V, VDD = 3.3 V  
–47  
–33  
–25  
μA  
IIL  
Low-level input current  
SENSE, PFI,  
WDI  
SENSE, PFI, WDI = 0 V,  
VDD = 3.3 V  
–25  
25  
nA  
nA  
High-level output current  
at RESET(2)  
IOH  
Open-drain  
VDD = VIT + 0.2 V, VOH = 3.3 V  
200  
3
VDD > VIT (average current),  
VDD < 1.8 V  
1.2  
2
VDD > VIT (average current),  
VDD > 1.8 V  
4.5  
IDD  
Supply current  
μA  
VDD < VIT, VDD < 1.8 V  
VDD < VIT, VDD > 1.8 V  
22  
27  
Internal pull-up resistor at MR  
Input capacitance at MR, SENSE, PFI, WDI VI = 0 V to VDD  
70  
100  
1
130  
kΩ  
CI  
pF  
(2) Also refers to RSTVDD and RSTSENSE.  
SWITCHING CHARACTERISTICS  
At RL = 1 M, CL = 50 pF, and TA = –40°C to +85°C, unless otherwise noted.  
PARAMETER  
TEST CONDITIONS  
DD 1.1 × VIT, MR = 0.7 × VDD, See Timing Diagrams  
MIN  
TYP  
MAX UNIT  
tD  
Delay time  
V
65  
130  
195  
40  
ms  
Propagation delay time,  
high-to-low level output  
VDD to RESET or  
RSTVDD delay  
tPHL  
VIH = 1.1 × VIT, VIL = 0.9 × VIT  
VIH = 1.1 × VIT, VIL = 0.9 × VIT  
μs  
Propagation delay time,  
low-to-high level output  
VDD to RESET or  
RSTVDD delay  
tPLH  
tPHL  
tPLH  
tPHL  
tPLH  
40  
40  
μs  
μs  
μs  
μs  
μs  
Propagation delay time,  
high-to-low level output  
SENSE to RESET or  
RSTSENSE delay  
VDD 0.8 V, VIH = 1.1 × VIT, VIL = 0.9 × VIT  
VDD 0.8 V, VIH = 1.1 × VIT, VIL = 0.9 × VIT  
VDD 0.8 V, VIH = 1.1 × VIT, VIL = 0.9 × VIT  
VDD 0.8 V, VIH = 1.1 × VIT, VIL = 0.9 × VIT  
Propagation delay time,  
high-to-low level output  
SENSE to RESET or  
RSTSENSE delay  
40  
Propagation delay time,  
high-to-low level output  
PFI to PFO delay  
PFI to PFO delay  
40  
Propagation delay time,  
low-to-high level output  
300  
MR to RESET.  
RSTVDD,  
RSTSENSE delay  
Propagation delay time,  
low-to-high level output  
tPHL  
V
DD 1.1 × VIT, VIL = 0.3 × VDD, VIH = 0.7 × VDD  
DD 1.1 × VIT, VIL = 0.3 × VDD, VIH = 0.7 × VDD  
1
1
5
5
μs  
μs  
MR to RESET.  
RSTVDD,  
RSTSENSE delay  
Propagation delay time,  
low-to-high level output  
tPLH  
V
TIMING REQUIREMENTS  
At RL = 1 M, CL = 50 pF, and TA = –40°C to +85°C, unless otherwise noted.  
PARAMETER  
tT(OUT) Time-out period  
TEST CONDITIONS  
MIN  
0.55  
20  
TYP  
1.1  
MAX UNIT  
at WDI  
at VDD  
at MR  
V
DD 0.85 V  
1.65  
s
VIH = 1.1 × VIT, VIL = 0.9 × VIT–, VIT– = 0.86 V  
V
V
V
V
DD VIT + 0.2 V, VIL = 0.3 × VDD, VIH = 0.7 × VDD  
DD VIT, VIH = 1.1 × VIT (S), VIL = 0.9 × VIT (S)  
DD 0.85 V, VIH = 1.1 × VIT (S),VIL = 0.9 × VIT (S)  
DD VIT, VIL = 0.3 × VDD, VIH = 0.7 × VDD  
0.1  
20  
tW  
Pulse width  
at SENSE  
at PFI  
μs  
20  
at WDI  
0.3  
4
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Copyright © 2001–2007, Texas Instruments Incorporated  
TPS3103xxx  
TPS3106xxx  
TPS3110xxx  
www.ti.com  
SLVS363EAUGUST 2001REVISED SEPTEMBER 2007  
FUNCTIONAL BLOCK DIAGRAMS  
TPS3103  
VDD  
VIT-  
+
_
MR  
RESET  
PFO  
Reset Logic  
and Timer  
+
_
PFI  
0.551 V  
GND  
TPS3106  
VDD  
VIT-  
+
_
MR  
RSTVDD  
Reset Logic  
and Timer  
RSTSENSE  
Reset Logic  
and Timer  
+
_
SENSE  
GND  
0.551 V  
Copyright © 2001–2007, Texas Instruments Incorporated  
Submit Documentation Feedback  
5
TPS3103xxx  
TPS3106xxx  
TPS3110xxx  
www.ti.com  
SLVS363EAUGUST 2001REVISED SEPTEMBER 2007  
TPS3110  
VDD  
VIT-  
+
_
MR  
RESET  
Reset Logic  
and Timer  
+
_
SENSE  
0.551 V  
Watchdog  
Logic and  
Control  
WDI  
GND  
Table 1. TPS3103 FUNCTION TABLE  
MR  
L
V(PFI) > 0.551 V  
VDD > VIT  
RESET  
PFO  
L
0
1
0
0
1
1
X(1)  
L
L
L
X
H
H
H
H
H
0
L
L
1
H
L
L
0
H
1
H
H
(1) X = Don’t care.  
Table 2. TPS3106 FUNCTION TABLE  
MR  
L
V(SENSE) > 0.551 V  
VDD > VIT  
RSTVDD  
RSTSENSE  
X(1)  
X
0
1
0
1
L
L
L
L
H
0
H
0
H
L
L
H
1
H
H
H
1
H
(1) X = Don’t care.  
Table 3. TPS3110 FUNCTION TABLE(1)  
MR  
L
V(SENSE) > 0.551 V  
VDD > VIT  
RESET  
X(2)  
X
0
1
0
1
L
L
L
L
H
H
0
H
0
H
1
H
1
(1) Function of watchdog-timer not shown.  
(2) X = Don’t care.  
6
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Copyright © 2001–2007, Texas Instruments Incorporated  
TPS3103xxx  
TPS3106xxx  
TPS3110xxx  
www.ti.com  
SLVS363EAUGUST 2001REVISED SEPTEMBER 2007  
PIN DESCRIPTIONS  
TPS3106  
DBV PACKAGE  
(TOP VIEW)  
TPS3103  
DBV PACKAGE  
(TOP VIEW)  
TPS3110  
DBV PACKAGE  
(TOP VIEW)  
1
2
3
6
5
1
2
3
VDD  
6
5
VDD  
1
2
3
6
5
VDD  
RSTVDD  
GND  
RESET  
GND  
MR  
RESET  
GND  
WDI  
RSTSENSE  
SENSE  
PFO  
PFI  
4
SENSE  
4
MR  
4
MR  
TERMINAL FUNCTIONS  
TERMINAL  
DEVICE  
ALL  
DESCRIPTION  
NAME  
NO.  
GND  
2
GND  
Manual-reset input. Pull low to force a reset. RESET remains low as long as MR is low and for  
the timeout period after MR goes high. Leave unconnected or connect to VDD when unused.  
MR  
ALL  
3
PFI  
TPS3103  
TPS3103  
4
5
Power-fail input compares to 0.551 V with no additional delay. Connect to VDD if not used.  
Power-fail output. Goes high when voltage at PFI rises above 0.551 V.  
PFO  
TPS3103,  
TPS3110  
RESET  
1
5
1
Active-low reset output. Either push-pull or open-drain output stage.  
Active-low reset output. Logic level at RSTSENSE only depends on the voltage at SENSE and  
the status of MR.  
RSTSENSE  
RSTVDD  
TPS3106  
TPS3106  
Active-low reset output. Logic level at RSTVDD only depends on the voltage at VDD and the  
status of MR.  
TPS3106,  
TPS3110  
A reset will be asserted if the voltage at SENSE is lower than 0.551 V. Connect to VDD if  
unused.  
SENSE  
VDD  
4
6
ALL  
Supply voltage. Powers the device and monitors its own voltage.  
Watchdog timer input. If WDI remains high or low longer than the time-out period, then reset is  
triggered. The timer clears when reset is asserted or when WDI sees a rising edge or a falling  
edge.  
WDI  
TPS3110  
5
Copyright © 2001–2007, Texas Instruments Incorporated  
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7
TPS3103xxx  
TPS3106xxx  
TPS3110xxx  
www.ti.com  
SLVS363EAUGUST 2001REVISED SEPTEMBER 2007  
TIMING DIAGRAMS  
Timing Diagrams for TPS3103  
VDD  
VIT  
0.4 V  
t
tD  
SENSE  
VIT - (S) = 0.551 V  
t
tD  
tD  
tD  
tD  
t
RESET  
Output Condition  
Undefined  
Output Condition  
Undefined  
t
MR  
t
PFI  
VIT - (S) = 0.551 V  
t
PFO  
Output Condition  
Undefined  
Output Condition  
Undefined  
t
8
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Copyright © 2001–2007, Texas Instruments Incorporated  
TPS3103xxx  
TPS3106xxx  
TPS3110xxx  
www.ti.com  
SLVS363EAUGUST 2001REVISED SEPTEMBER 2007  
Timing Diagram for TPS3106  
VDD  
VIT  
0.4 V  
tD  
t
tD  
RSTVDD  
Output Condition  
Undefined  
Output Condition  
Undefined  
t
SENSE  
VIT - (S) = 0.551 V  
t
tD  
RSTSENSE  
Output Condition  
Undefined  
Output Condition  
Undefined  
t
tD  
MR  
t
Copyright © 2001–2007, Texas Instruments Incorporated  
Submit Documentation Feedback  
9
TPS3103xxx  
TPS3106xxx  
TPS3110xxx  
www.ti.com  
SLVS363EAUGUST 2001REVISED SEPTEMBER 2007  
Timing Diagram for TPS3110  
VDD  
VIT  
0.4 V  
tD  
t
t
SENSE  
VIT - (S) = 0.551 V  
tD  
tD  
tD  
tD  
tD  
RESET  
Output Condition  
Undefined  
Output Condition  
Undefined  
t(TOUT)  
WDI  
x = Don’t Care  
MR  
t
TYPICAL CHARACTERISTICS  
TPS3110E09  
SUPPLY CURRENT  
vs  
TPS3110E09  
LOW-LEVEL OUTPUT VOLTAGE  
vs  
SUPPLY VOLTAGE  
LOW-LEVEL OUTPUT CURRENT  
20  
18  
16  
14  
12  
10  
8
0.30  
TA = 85°C  
SENSE = VDD  
MR = Open  
VDD = 0.9 V  
SENSE = GND  
MR = GND  
WDI = GND  
0.25  
0.20  
0.15  
0.10  
0.05  
0
RESET = Open  
WDI: Triggered  
TA = 25°C  
TA = 0°C  
TA = 85°C  
TA = 25°C  
TA = 0°C  
TA = -40°C  
6
TA = -40°C  
4
2
0
0
0.5  
1.0  
1.5  
2.0  
2.5  
3.0  
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0  
VDD - Supply Voltage - V  
IOL - Low-Level Output Current - mA  
Figure 1.  
Figure 2.  
10  
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Copyright © 2001–2007, Texas Instruments Incorporated  
TPS3103xxx  
TPS3106xxx  
TPS3110xxx  
www.ti.com  
SLVS363EAUGUST 2001REVISED SEPTEMBER 2007  
TYPICAL CHARACTERISTICS (continued)  
TPS3110E09  
LOW-LEVEL OUTPUT VOLTAGE  
vs  
TPS3110E09  
HIGH-LEVEL OUTPUT VOLTAGE  
vs  
LOW-LEVEL OUTPUT CURRENT  
HIGH-LEVEL OUTPUT CURRENT  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0.90  
0.85  
0.80  
0.75  
0.70  
0.65  
0.60  
VDD = 3.3 V  
SENSE = GND  
MR = GND  
WDI = GND  
TA = 85°C  
TA = 25°C  
TA = 85°C  
TA = 0°C  
TA = -40°C  
TA = 25°C  
TA = 0°C  
VDD = 0.9 V  
TA = -40°C  
SENSE = VDD  
MR = VDD  
WDI : Triggered  
0
0
2
4
6
8
10 12 14 16 18 20  
0
-0.1  
-0.2  
-0.3  
-0.4  
-0.5  
IOL - Low-Level Output Current - mA  
IOH - High-Level Output Current - mA  
Figure 3.  
Figure 4.  
TPS3110K33  
HIGH-LEVEL OUTPUT VOLTAGE  
vs  
MINIMUM PULSE DURATION AT VDD  
vs  
THRESHOLD OVERDRIVE VOLTAGE  
HIGH-LEVEL OUTPUT CURRENT  
3.4  
3.2  
50  
VDD = 3.3 V  
MR : Open  
SENSE = VDD  
45  
40  
35  
30  
25  
20  
15  
10  
SENSE = VDD  
MR = VDD  
WDI : Triggered  
3.0  
2.8  
2.6  
2.4  
2.2  
TA = -40°C  
VDD = 3.3 V  
TA = 0°C  
TA = 25°C  
TA = 85°C  
VDD = 0.9 V  
5
0
2.0  
0
-5  
-10  
-15  
-20  
-25  
0
0.1  
0.2  
0.3  
0.4  
0.5  
VDD - Threshold Overdrive Voltage - V  
IOH - Low-Level Output Current - mA  
Figure 5.  
Figure 6.  
Copyright © 2001–2007, Texas Instruments Incorporated  
Submit Documentation Feedback  
11  
TPS3103xxx  
TPS3106xxx  
TPS3110xxx  
www.ti.com  
SLVS363EAUGUST 2001REVISED SEPTEMBER 2007  
TYPICAL CHARACTERISTICS (continued)  
NORMALIZED THRESHOLD VOLTAGE  
vs  
FREE-AIR TEMPERATURE  
1.008  
1.006  
1.004  
1.002  
1.000  
0.998  
0.996  
0.994  
0.992  
-50  
0
50  
100  
TA - Free-Air Temperature - °C  
Figure 7.  
12  
Submit Documentation Feedback  
Copyright © 2001–2007, Texas Instruments Incorporated  
TPS3103xxx  
TPS3106xxx  
TPS3110xxx  
www.ti.com  
SLVS363EAUGUST 2001REVISED SEPTEMBER 2007  
APPLICATION INFORMATION  
The TPS31xx family has a quiescent current in the 1-μA to 2-μA range. When RESET is active, triggered by the  
voltage monitored at VDD, the quiescent current increases to about 20 μA (see the Electrical Characteristics).  
In some applications it is necessary to minimize the quiescent current even during the reset period. This is  
especially true when the voltage of a battery is supervised and the RESET is used to shut down the system or  
for an early warning. In this case the reset condition will last for a longer period of time. The current drawn from  
the battery should almost be zero, especially when the battery is discharged.  
For this kind of application, either the TPS3103 or TPS3106 is a good fit. To minimize current consumption,  
select a version where the threshold voltage is lower than the voltage monitored at VDD. The TPS3106 has two  
reset outputs. One output (RSTVDD) is triggered from the voltage monitored at VDD. The other output  
(RSTSENSE) is triggered from the voltage monitored at SENSE. In the application shown in Figure 8, the  
TPS3106E09 is used to monitor the input voltage of two NiCd or NiMH cells. The threshold voltage (V(TH) = 0.86  
V) was chosen as low as possible to ensure that the supply voltage is always higher than the threshold voltage  
at VDD. The voltage of the battery is monitored using the SENSE input. The voltage divider was calculated to  
assert a reset using the RSTSENSE output at 2 × 0.8 V = 1.6 V.  
VTRIP  
ǒ Ǔ  
R1 + R2   
* 1  
VIT S  
(
)
(1)  
where:  
VTRIP is the voltage of the battery at which a reset is asserted and  
VIT(S) is the threshold voltage at SENSE = 0.551 V.  
R1 was chosen for a resistor current in the 1-μA range.  
With VTRIP = 1.6 V:  
R1 1.9 × R2  
R1 = 820 k, R2 = 430 kΩ  
VDD  
R3  
TPS3106E09DBV  
R1  
MR  
2 Cell  
NiMH  
RSTVDD  
SENSE  
Reset Output  
RSTSENSE  
GND  
R2  
Figure 8. Battery Monitoring with 3-μA Supply Current for Device and Resistor Divider  
Copyright © 2001–2007, Texas Instruments Incorporated  
Submit Documentation Feedback  
13  
 
TPS3103xxx  
TPS3106xxx  
TPS3110xxx  
www.ti.com  
SLVS363EAUGUST 2001REVISED SEPTEMBER 2007  
WATCHDOG  
The TPS3110 device integrates a watchdog timer that must be periodically triggered by a positive or negative  
transition of WDI. When the supervising system fails to retrigger the watchdog circuit within the time-out interval,  
RESET becomes active for the time period (tD). This event also reinitializes the watchdog timer.  
MANUAL RESET (MR)  
Many μC-based products require manual-reset capability, allowing an operator or logic circuitry to initiate a reset.  
Logic low at MR asserts reset. Reset remains asserted while MR is low and for a time period (tD) after MR  
returns high. The input has an internal 100-kpull-up resistor, so it can be left open if it is unused.  
Connect a normally open momentary switch from MR to GND to create a manual reset function. External  
debounce is not required. If MR is driven from long cables or if the device is used in noisy environments,  
connecting a 0.1-μF capacitor from MR to GND provides additional noise immunity.  
If there is a possibility of transient or DC conditions causing MR to rise above VDD, a diode should be used to  
limit MR to a diode drop above VDD  
.
PFI, PFO  
The TPS3103 has an integrated power-fail (PFI) comparator with a separate open-drain (PFO) output. The PFI  
and PFO can be used for low-battery detection, power-fail warning, or for monitoring a power supply other than  
the main supply, and has no effect on RESET.  
An additional comparator is provided to monitor voltages other than the nominal supply voltage. The power-fail  
input (PFI) will be compared with an internal voltage reference of 0.551 V. If the input voltage falls below the  
power-fail threshold (VIT – (S)), the power-fail output (PFO) goes low. If it goes above 0.551 V plus approximately  
15-mV hysteresis, the output returns to high. By connecting two external resistors, it is possible to supervise any  
voltage above 0.551 V. The sum of both resistors should be approximately 1 M, to minimize power  
consumption and to assure that the current into the PFI pin can be neglected, compared with the current through  
the resistor network. The tolerance of the external resistors should be not more than 1% to ensure minimal  
variation of sensed voltage. If the power-fail comparator is unused, connect PFI to GND and leave PFO  
unconnected. For proper operation of the PFI-comparator, the supply voltage (VDD) must be higher than 0.8 V.  
SENSE  
The voltage at the SENSE input is compared with a reference voltage of 0.551 V. If the voltage at SENSE falls  
below the sense-threshold (VIT (S)), reset is asserted. On the TPS3106, a dedicated RSTSENSE output is  
available. On the TPS3110, the logic signal from SENSE is OR-wired with the logic signal from VDD or MR. An  
internal timer delays the return of the output to the inactive state, once the voltage at SENSE goes above 0.551  
V plus about 15 mV of hysteresis. For proper operation of the SENSE-comparator, the supply voltage must be  
higher than 0.8 V.  
14  
Submit Documentation Feedback  
Copyright © 2001–2007, Texas Instruments Incorporated  
TPS3103xxx  
TPS3106xxx  
TPS3110xxx  
www.ti.com  
SLVS363EAUGUST 2001REVISED SEPTEMBER 2007  
2 V  
VDD  
VDD  
(1) (1)  
MSP430  
Low-Power mC  
TPS3103H20  
R1  
R2  
MR  
PFI  
Px.x  
Analog  
Circuit  
RESET  
PFO  
RESET  
Py.x  
GND  
GND  
-2 V  
R2  
R1  
V(NEG_TH) = 0.551 V -  
(VDD - 0.551 V)  
(1) Resistor may be integrated in mC.  
Figure 9. TPS3103 Monitoring a Negative Voltage  
3.3 V  
1.5 V  
VCORE  
VIO  
VDD  
R1  
R2  
TPS3110K33  
DSP  
RESET  
R1 + R2  
R2  
V(CORE_TH) = 0.551 V x  
MR  
RESET  
SENSE  
Px.y  
WDI  
GND  
GND  
GND  
Figure 10. TPS3110 in a DSP-System Monitoring Both Supply Voltages  
Copyright © 2001–2007, Texas Instruments Incorporated  
Submit Documentation Feedback  
15  
PACKAGE OPTION ADDENDUM  
www.ti.com  
17-Aug-2012  
PACKAGING INFORMATION  
Status (1)  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
SN0402002DBVR  
TPS3103E12DBVR  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
DBV  
DBV  
6
6
TBD  
Call TI  
Call TI  
3000  
3000  
250  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
TPS3103E12DBVRG4  
TPS3103E12DBVT  
TPS3103E12DBVTG4  
TPS3103E15DBVR  
TPS3103E15DBVRG4  
TPS3103E15DBVT  
TPS3103E15DBVTG4  
TPS3103H20DBVR  
TPS3103H20DBVRG4  
TPS3103H20DBVT  
TPS3103H20DBVTG4  
TPS3103K33DBVR  
TPS3103K33DBVRG4  
TPS3103K33DBVT  
TPS3103K33DBVTG4  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
250  
Green (RoHS  
& no Sb/Br)  
3000  
3000  
250  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
250  
Green (RoHS  
& no Sb/Br)  
3000  
3000  
250  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
250  
Green (RoHS  
& no Sb/Br)  
3000  
3000  
250  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
250  
Green (RoHS  
& no Sb/Br)  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
17-Aug-2012  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
TPS3106E09DBVR  
TPS3106E09DBVRG4  
TPS3106E09DBVT  
TPS3106E09DBVTG4  
TPS3106E16DBVR  
TPS3106E16DBVRG4  
TPS3106E16DBVT  
TPS3106E16DBVTG4  
TPS3106K33DBVR  
TPS3106K33DBVRG4  
TPS3106K33DBVT  
TPS3106K33DBVTG4  
TPS3110E09DBVR  
TPS3110E09DBVRG4  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
6
6
6
6
6
6
6
6
6
6
6
6
6
6
3000  
3000  
250  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
Green (RoHS  
& no Sb/Br)  
250  
Green (RoHS  
& no Sb/Br)  
3000  
3000  
250  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
250  
Green (RoHS  
& no Sb/Br)  
3000  
3000  
250  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
250  
Green (RoHS  
& no Sb/Br)  
3000  
3000  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
TPS3110E09DBVT  
TPS3110E09DBVTG4  
TPS3110E12DBVR  
ACTIVE  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
SOT-23  
DBV  
DBV  
DBV  
6
6
6
TBD  
TBD  
Call TI  
Call TI  
Call TI  
Call TI  
3000  
3000  
250  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
TPS3110E12DBVRG4  
TPS3110E12DBVT  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
DBV  
DBV  
6
6
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Addendum-Page 2  
PACKAGE OPTION ADDENDUM  
www.ti.com  
17-Aug-2012  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
TPS3110E12DBVTG4  
TPS3110E15DBVR  
TPS3110E15DBVRG4  
TPS3110E15DBVT  
TPS3110E15DBVTG4  
TPS3110K33DBVR  
TPS3110K33DBVRG4  
TPS3110K33DBVT  
TPS3110K33DBVTG4  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
6
6
6
6
6
6
6
6
6
250  
3000  
3000  
250  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
250  
Green (RoHS  
& no Sb/Br)  
3000  
3000  
250  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
250  
Green (RoHS  
& no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
Addendum-Page 3  
PACKAGE OPTION ADDENDUM  
www.ti.com  
17-Aug-2012  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 4  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
17-Aug-2012  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
TPS3103E12DBVR  
TPS3103E12DBVT  
TPS3103E15DBVR  
TPS3103E15DBVT  
TPS3103H20DBVR  
TPS3103H20DBVT  
TPS3103K33DBVR  
TPS3103K33DBVR  
TPS3103K33DBVT  
TPS3103K33DBVT  
TPS3106E09DBVR  
TPS3106E09DBVT  
TPS3106E16DBVR  
TPS3106E16DBVT  
TPS3106K33DBVR  
TPS3106K33DBVT  
TPS3110E09DBVR  
TPS3110E12DBVR  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
3000  
250  
179.0  
179.0  
179.0  
179.0  
179.0  
179.0  
180.0  
179.0  
180.0  
179.0  
180.0  
180.0  
180.0  
180.0  
178.0  
178.0  
180.0  
180.0  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
9.0  
8.4  
9.0  
8.4  
9.0  
9.0  
9.0  
9.0  
9.0  
9.0  
9.0  
9.0  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
3.17  
3.17  
3.2  
3.2  
1.4  
1.4  
1.4  
1.4  
1.4  
1.4  
1.4  
1.4  
1.4  
1.4  
1.4  
1.4  
1.4  
1.4  
1.37  
1.37  
1.4  
1.4  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
3000  
250  
3.2  
3.2  
3000  
250  
3.2  
3.2  
3000  
3000  
250  
3.15  
3.2  
3.15  
3.2  
250  
3000  
250  
3.15  
3.15  
3.15  
3.15  
3.23  
3.23  
3.15  
3.15  
3000  
250  
3000  
250  
3000  
3000  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
17-Aug-2012  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
TPS3110E12DBVT  
TPS3110E15DBVR  
TPS3110E15DBVT  
TPS3110K33DBVR  
TPS3110K33DBVT  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBV  
DBV  
DBV  
DBV  
DBV  
6
6
6
6
6
250  
3000  
250  
180.0  
180.0  
180.0  
180.0  
180.0  
9.0  
9.0  
9.0  
9.0  
9.0  
3.15  
3.15  
3.15  
3.15  
3.15  
3.2  
3.2  
3.2  
3.2  
3.2  
1.4  
1.4  
1.4  
1.4  
1.4  
4.0  
4.0  
4.0  
4.0  
4.0  
8.0  
8.0  
8.0  
8.0  
8.0  
Q3  
Q3  
Q3  
Q3  
Q3  
3000  
250  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
TPS3103E12DBVR  
TPS3103E12DBVT  
TPS3103E15DBVR  
TPS3103E15DBVT  
TPS3103H20DBVR  
TPS3103H20DBVT  
TPS3103K33DBVR  
TPS3103K33DBVR  
TPS3103K33DBVT  
TPS3103K33DBVT  
TPS3106E09DBVR  
TPS3106E09DBVT  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
6
6
6
6
6
6
6
6
6
6
6
6
3000  
250  
203.0  
203.0  
203.0  
203.0  
203.0  
203.0  
182.0  
203.0  
182.0  
203.0  
182.0  
182.0  
203.0  
203.0  
203.0  
203.0  
203.0  
203.0  
182.0  
203.0  
182.0  
203.0  
182.0  
182.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
20.0  
35.0  
20.0  
35.0  
20.0  
20.0  
3000  
250  
3000  
250  
3000  
3000  
250  
250  
3000  
250  
Pack Materials-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
17-Aug-2012  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
TPS3106E16DBVR  
TPS3106E16DBVT  
TPS3106K33DBVR  
TPS3106K33DBVT  
TPS3110E09DBVR  
TPS3110E12DBVR  
TPS3110E12DBVT  
TPS3110E15DBVR  
TPS3110E15DBVT  
TPS3110K33DBVR  
TPS3110K33DBVT  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
6
6
6
6
6
6
6
6
6
6
6
3000  
250  
182.0  
182.0  
180.0  
180.0  
182.0  
182.0  
182.0  
182.0  
182.0  
182.0  
182.0  
182.0  
182.0  
180.0  
180.0  
182.0  
182.0  
182.0  
182.0  
182.0  
182.0  
182.0  
20.0  
20.0  
18.0  
18.0  
20.0  
20.0  
20.0  
20.0  
20.0  
20.0  
20.0  
3000  
250  
3000  
3000  
250  
3000  
250  
3000  
250  
Pack Materials-Page 3  
IMPORTANT NOTICE  
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