TPS3126E15DBVT [TI]
ULTRA-LOW VOLTAGE PROCESSOR SUPERVISORY CIRCUITS; 超低电压处理器监控电路型号: | TPS3126E15DBVT |
厂家: | TEXAS INSTRUMENTS |
描述: | ULTRA-LOW VOLTAGE PROCESSOR SUPERVISORY CIRCUITS |
文件: | 总12页 (文件大小:214K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TPS3123-xx
TPS3124-xx, TPS3125-xx
TPS3126-xx, TPS3128-xx
www.ti.com
SLVS227B–AUGUST 1999–REVISED FEBRUARY 2004
ULTRA-LOW VOLTAGE PROCESSOR SUPERVISORY CIRCUITS
FEATURES
DBV PACKAGE
(TOP VIEW)
•
Minimum Supply Voltage of 0.75 V
•
Supply Voltage Supervision Range:
– 1.2 V, 1.5 V, 1.8 V (TPS312x)
– 3 V (TPS3125 Devices Only)
– Other Versions on Request
TPS3123/T
PS3128
1
2
3
V
DD
5
RESET
GND
MR
•
Power-On Reset Generator With Fixed Delay
Time of 180 ms
4
WDI
•
•
Manual Reset Input (TPS3123/5/6/8)
Watchdog Timer Retriggers the RESET Output
at VDD≥ VIT
TPS3124
1
2
3
5
V
DD
RESET
GND
•
•
•
•
Supply Current of 14 µA (Typ)
Small SOT23-5 Package
Temperature Range of -40°C to 85°C
4
WDI
RESET
Reset Output Available in Push-Pull (Active
Low and High) and Open-Drain (Active-Low)
TPS3125/
TPS3126
APPLICATIONS
1
2
3
5
V
•
Applications Using Low Voltage DSPs,
Microcontrollers, or Microprocessors
Portable/Battery-Powered Equipment
Wireless Communication Systems
Programmable Controls
Industrial Equipment
Notebook/Desktop Computers
Intelligent Instruments
RESET
GND
DD
•
•
•
•
•
•
4
MR
RESET
1.2 V
CV
DV
DD
DD
TMS320UVC5402
RESET
V
RESET
WDI
DD
MR
XF
GND
TPS3123J12
GND
Figure 1. Typical Low-Voltage DSP Application
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2004, Texas Instruments Incorporated
TPS3123-xx
TPS3124-xx, TPS3125-xx
TPS3126-xx, TPS3128-xx
www.ti.com
SLVS227B–AUGUST 1999–REVISED FEBRUARY 2004
DESCRIPTION
The TPS312x family of ultralow voltage processor supervisory circuits provides circuit initialization and timing
supervision, primarily for DSP and processor-based systems.
During power-on, RESET is asserted when the supply voltage (VDD) becomes higher than 0.75 V. Thereafter, the
supply voltage supervisor monitors VDD and keeps RESET output active as long as VDD remains below the
threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure
proper system reset. The delay time, td = 180 ms, starts after VDD has risen above the threshold voltage (VIT).
When the supply voltage drops below the threshold voltage (VIT), the output becomes active (low) again. No
external components are required. All the devices of this family have a fixed-sense threshold voltage (VIT) set by
a high precision internal voltage divider.
The TPS3123/5/6/8 devices incorporate a manual reset input, MR. A low level at MR causes RESET to become
active. The TPS3124 devices do not have the input MR, but include a high-level output RESET same as the
TPS3125 and TPS3126 devices. In addition, the TPS3123/4/8 have a watchdog timer that needs to be triggered
periodically by a positive or negative transition at WDI. When the supervising system fails to retrigger the
watchdog circuit within the time-out interval ttout= 0.8 s, RESET output becomes active for the time period (td).
This event also reinitializes the watchdog timer.
The circuits are available in a 5-pin SOT23-5 package. The TPS312x devices are characterized for operation
over a temperature range of -40°C to 85°C.
PACKAGE INFORMATION STANDARD VERSIONS(1)
TA
DEVICE NAME
TPS3123J12DBVR(2)
THRESHOLD VOLTAGE
1.08 V
MARKING
PBNI
PBOI
PBPI
PBQI
PBRI
PBSI
PBTI
PBUI
PBVI
PBXI
PFOI
PFPI
PFQI
PFRI
PFSI
PFTI
TPS3123J12DBVT(3)
TPS3123G15DBVT(3)
TPS3123J18DBVT(3)
TPS3124J12DBVT(3)
TPS3124G15DBVT(3)
TPS3124J18DBVT(3)
TPS3125J12DBVT(3)
TPS3125G15DBVT(3)
TPS3125J18DBVT(3)
TPS3125L30DBVT(3)
TPS3126E12DBVT(3)
TPS3126E15DBVT(3)
TPS3126E18DBVT(3)
TPS3128E12DBVT(3)
TPS3128E15DBVT(3)
TPS3128E18DBVT(3)
TPS3123G15DBVR(2)
TPS3123J18DBVR(2)
TPS3124J12DBVR(2)
TPS3124G15DBVR(2)
TPS3124J18DBVR(2)
TPS3125J12DBVR(2)
TPS3125G15DBVR(2)
TPS3125J18DBVR(2)
TPS3125L30DBVR(2)
TPS3126E12DBVR(2)
TPS3126E15DBVR(2)
TPS3126E18DBVR(2)
TPS3128E12DBVR(2)
TPS3128E15DBVR(2)
TPS3128E18DBVR(2)
1.40 V
1.62 V
1.08 V
1.40 V
1.62 V
1.08 V
1.40 V
-40°C to 85°C
1.62 V
2.64 V
1.14 V
1.43 V
1.71 V
1.14 V
1.43 V
1.71 V
(1) Other versions available. Contact Texas Instruments for deetails, minimum order quantities apply.
(2) The DBVR passive indicates tape and reel of 3000 parts.
(3) The DBVT passive indicates tape and reel of 250 parts.
2
TPS3123-xx
TPS3124-xx, TPS3125-xx
TPS3126-xx, TPS3128-xx
www.ti.com
SLVS227B–AUGUST 1999–REVISED FEBRUARY 2004
TPS312
3
J
12 DBV
R
Reel
Package
Nominal Supply Voltage
Typical Reset Threshold Voltage
Functionality
Family
(1)
Table 1. Ordering Information Application Specific Versions
NOMINAL SUPPLY VOLTAGE,
VNOM
TYPICAL RESET THRESHOLD
VOLTAGE-VIT-
DEVICE NAME
DEVICE NAME
TPS312xx12DBV
TPS312xx15DBV
TPS312xx18DBV
TPS312xx30DBV
1.2 V
1.5 V
1.8 V
3.0 V
TPS312xAxxDBV
TPS312xBxxDBV
TPS312xCxxDBV
TPS312xDxxDBV
TPS312xExxDBV
TPS312xFxxDBV
TPS312xGxxDBV
TPS312xHxxDBV
TPS312xIxxDBV
TPS312xJxxDBV
TPS312xKxxDBV
TPS312xLxxDBV
TPS312xMxxDBV
TPS312xNxxDBV
TPS312xOxxDBV
VNOM-1%
VNOM-2%
VNOM-3%
VNOM-4%
VNOM-5%
VNOM-6%
VNOM-7%
VNOM-8%
VNOM-9%
VNOM-10%
VNOM-11%
VNOM-12%
VNOM-13%
VNOM-14%
VNOM-15%
(1) For the application specific versions contact Texas Instruments for availability, lead time, and minimum order quantities.
Table 2. Function Tables
TPS3123/8
TPS3124
TPS3125/6
MR
L
VDD > VIT
RESET
VDD > VIT
RESET
RESET
MR
L
VDD > VIT
RESET
RESET
0
1
0
1
L
L
0
1
L
H
L
0
1
0
1
L
L
H
H
H
L
L
H
L
H
L
H
L
H
H
H
H
Reset Topology
DEVICES
TPS3123
TPS3124
TPS3125
TPS3126
TPS3128
OPEN DRAIN
PUSH-PULL
X
X
X
X
X
3
TPS3123-xx
TPS3124-xx, TPS3125-xx
TPS3126-xx, TPS3128-xx
www.ti.com
SLVS227B–AUGUST 1999–REVISED FEBRUARY 2004
FUNCTIONAL BLOCK DIAGRAM
V
DD
Device Power Supply
R1
†
MR
R2
RESET
Reset Logic
+ Timer
§
RESET
R3
GND
Reference
Voltage
Watchdog
Logic +
Timer
Transition
Detector
‡
WDI
†
‡
§
TPS3123/5/6/8
TPS3123/4/8
TPS3124/5/6
TIMING DIAGRAM TPS3123/5/6/8
G
A
B
C
D
E
F
V
DD
V
IT
<0.85 V
MR
t
t
RESET
t
d
t
d
t
d
t
Output Undefined
Output Undefined
4
TPS3123-xx
TPS3124-xx, TPS3125-xx
TPS3126-xx, TPS3128-xx
www.ti.com
SLVS227B–AUGUST 1999–REVISED FEBRUARY 2004
TIMING DIAGRAM TPS3123/4//8
A
B
V
DD
V
IT
<0.85 V
t
G
MR
(TPS3123)
t
J
C
D
E
F
H
WDI
*
*
*
*
*
t
t
d
t
d
t
d
t
d
t
d
RESET
t
t
t
tout
tout
tout
t
Output Undefined
* = WDI Disabled
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
UNIT
Manual reset, MR
-0.3 V to VDD + 0.6 V
3.6 V
Supply voltage, VDD
Watchdog input, WDI
-0.3 V to VDD+ 6 V
5 mA
Maximum low output current, IOL
Maximum high output current, IOH
-5 mA
Input clamp current, IIK (VI< 0 or VI > VDD
)
±10 mA
Output clamp current, IOK (VO < 0 or VO > VDD
Continuous total power dissipation
Operating free-air temperature range, TA
Storage temperature range, Tstg
Soldering temperature
)
±10 mA
See Dissipation Rating Table
-40°C to 85°C
-65°C to 150°C
260°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
5
TPS3123-xx
TPS3124-xx, TPS3125-xx
TPS3126-xx, TPS3128-xx
www.ti.com
SLVS227B–AUGUST 1999–REVISED FEBRUARY 2004
DISSIPATION RATING TABLE
T
A ≤ 25°C
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
PACKAGE
POWER RATING
DBV
437 mW
3.5 mW/°C
280 mW
227 mW
RECOMMENDED OPERATING CONDITIONS
at specified temperature range
MIN
0.75
0.85
MAX UNIT
TA = 0°C to 85°C
3.3
V
Supply voltage, VDD
TA = -40°C to 85°C
3.3
Manual reset voltage, VDD
0.0 VDD+0.3
V
V
Watchdog input voltage, VWD1
High-level input voltage, VIH
0
VDD +0.3
0.7×VDD
V
Low-level input voltage, VIL
0.3×VDD
V
Input transition rise and fall rate at WDI,∆ t/∆V
Operating free-air temperature range, TA
1
µs/V
°C
40
85
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
UNIT
MR pullup resistor (internal)
27
kΩ
WDI
MR
WDI = VDD = 3.3 V
1
20
1
1
55
IIH
High-level input current
Low-level input current
µA
MR = 0.7 × VDD
,
VDD = 3.3 V
VDD = 3.3 V
VDD = 3.3 V
WDI
MR
WDI = 0 V,
1
IIL
µA
nA
MR = 0 V,
80
170
High-level output current
(leakage into RESET pin)
TPS3126-xx,
TPS3128-xx
IOH
VDD = VOH = 3.3 V
200
VDD = 1.5 V,
VDD = 3.3 V,
VDD = 0.75 V,
VDD = 1.5 V,
VDD = 0.75 V,
VDD = 1.5 V,
VDD = 1.5 V,
VDD = 3.3 V,
IOH = -1 mA
IOH = -4.5 mA
IOH = -8 µA
IOH = -1 mA
IOL = 15 µA
IOL = 1.4 mA
IOL = 1.4 mA
IOL = 3 mA
RESET
RESET
RESET
RESET
High-level output voltage
(TPS3123/4/5 only)
VOH
0.8×VDD
V
V
0.2 × VDD
VOL
Low-level output voltage
0.4
1.12
1.45
1.68
2.71
1.18
1.48
1.77
TPS312xJ12
TPS312xG15
TPS312xJ18
TPS312xL30
TPS312xE12
TPS312xE15
TPS312xE18
1.04 1.08
1.35 1.40
1.56 1.62
2.57 2.64
1.10 1.14
1.38 1.43
1.65 1.71
15
Negative-going input threshold
VIT-
TA = -40°C to 85°C
V
(1)
voltage
1 V < VIT- < 1.4 V
1.4 V < VIT- <2 V
2 V < VIT- < 3 V
Vhys
Hysteresis at VDD input
20
mV
30
(1) To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 µF) should be placed near the supply terminal.
6
TPS3123-xx
TPS3124-xx, TPS3125-xx
TPS3126-xx, TPS3128-xx
www.ti.com
SLVS227B–AUGUST 1999–REVISED FEBRUARY 2004
ELECTRICAL CHARACTERISTICS (continued)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VDD = 0.75 V
MIN TYP
MAX
30
UNIT
µA
TPS3123-xx
TPS3124-xx
TPS3128-xx
14
WDI = VDD
,
MR unconnected
VDD = 3.3 V
22
IDD
Supply current
VDD = 0.75 V
VDD = 3.3 V
14
18
5
TPS3125-xx
TPS3126-xx
MR unconnected
VI = 0 V to 3.3 V
(2)
25
Ci
Input capacitance at MR, WDI
pF
(2) The supply current during delay time td is typical 5 µA higher.
TIMING REQUIREMENTS
at RL = 1 MΩ, CL = 50 pF, TA = 25°C
PARAMETER
TEST CONDITIONS
VIL = VIT - -0.2 V
MIN
6
TYP
MAX UNIT
At VDD
At MR
At WDI
VIH = VIT- + 0.2 V,
DD ≥ VIT- + 0.2 V,
tw
Pulse width
1
µs
V
VIL = 0.3 x VDD
,
VIH = 0.7 × VDD
0.1
SWITCHING CHARACTERISTICS
at RL = 1 MΩ, CL = 50 pF, TA = 25°C
PARAMETER
TEST CONDITIONS
MIN TYP
0.8 1.4
100 180
MAX UNIT
V
DD ≥ VIT- + 0.2 V,
ttout
td
Watchdog time out
Delay time
2.1
260
0.1
s
See timing diagram
VDD > VIT- + 0.2 V,
See timing diagram
ms
MR to RESET delay
(TPS3123/5/6/8)
tPHL Propagation delay time, high-to-low-level output
V
DD ≥ VIT-+ 0.2 V,
VIL = 0.2 × VDD
,
µs
µs
MR to RESET delay
(TPS3125/6)
VIH = 0.8 × VDD
tPLH Propagation delay time, low-to-high-level output
tPHL Propagation delay time, high-to-low-level output
tPLH Propagation delay time, low-to-high-level output
0.1
10
10
VDD to RESET delay
VIL = VIT- - 0.2 V,
VIH = VIT- + 0.2 V
VDD to RESET delay
(TPS3124/5/6)
7
TPS3123-xx
TPS3124-xx, TPS3125-xx
TPS3126-xx, TPS3128-xx
www.ti.com
SLVS227B–AUGUST 1999–REVISED FEBRUARY 2004
TYPICAL CHARACTERISTICS
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
750
25
T
A
= 25°C
TPS3123J12
V
DD
= 0.75 V
TPS3123J12
T
A
= 85°C
20
500
250
0
T
= 25°C
= 0°C
A
15
10
0
T
A
0
50
100
150
200
250
0
1
2
− Supply Voltage − V
3
3.3
I
− Low-Level Output Current − µA
V
OL
DD
Figure 2.
Figure 3.
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
1.5
1.25
1
850
800
TPS3123J12
= 0.85 V
MR = Open
TPS3125L30
V = 1.5 V
DD
MR = Open
V
DD
T
= 85°C
A
T
= 85°C
A
700
600
500
400
T
= 25°C
A
T
= 25°C
A
T
= 0°C
A
T
= 0°C
A
T
= −40°C
A
T
A
= −40°C
0.75
0.5
0.25
0
300
200
100
0
0
1
2
3
4
5
6
0
100
200
300
400
500
I
− Low-Level Output Current − µA
I
− Low-Level Output Current − mA
OL
OL
Figure 4.
Figure 5.
8
TPS3123-xx
TPS3124-xx, TPS3125-xx
TPS3126-xx, TPS3128-xx
www.ti.com
SLVS227B–AUGUST 1999–REVISED FEBRUARY 2004
TYPICAL CHARACTERISTICS (continued)
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
3.3
1.6
TPS3125L30
TPS3123J12
3
V
DD
= 3.3 V
V
DD
= 1.5 V
1.4
1.2
T
= 85°C
MR = Open
2.75
2.5
MR = Open
A
T
= 25°C
= 0°C
A
T
A
2.25
2
1
T
A
= −40°C
T
A
= −40°C
T
= 85°C
A
1.75
1.5
1.25
1
0.8
T
= 25°C
A
0.6
0.4
T
A
= 0°C
0.75
0.5
0.25
0
0.2
0
0
5
10
15
20
25
30
0
−1
−2
−3
−4
−5
I
− Low-Level Output Current − mA
I
− High-Level Output Current − mA
OL
OH
Figure 6.
Figure 7.
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
NORMALIZED INPUT THRESHOLD VOLTAGE
vs
FREE-AIR TEMPERATURE
3.4
3
1.005
1.004
TPS3123J12
= 3.3 V
MR = Open
TPS312xJ12
V
DD
2.75
2.5
2.25
2
1.003
1.002
T
A
= 85°C
1.75
1.5
1.25
1
T
A
= −40°C
T
= 25°C
A
1.001
1
T
A
= 0°C
0.75
0.5
0.999
0.25
0
0.998
0
−5
OH
−10
−15
−20
−25
−30
−40
−20
0
20
40
60
80
I
− High-Level Output Current − mA
T
A
− Free-Air Temperature − °C
Figure 8.
Figure 9.
9
TPS3123-xx
TPS3124-xx, TPS3125-xx
TPS3126-xx, TPS3128-xx
www.ti.com
SLVS227B–AUGUST 1999–REVISED FEBRUARY 2004
TYPICAL CHARACTERISTICS (continued)
NORMALIZED INPUT THRESHOLD VOLTAGE
MINIMUM PULSE DURATION
vs
THRESHOLD OVERDRIVE
vs
FREE-AIR TEMPERATURE
4.5
4
1.005
MR = Open
= 2.64 V
TPS312xL30
V
IT
1.004
1.003
1.002
T
= 25°C
TPS312xL30
A
3.5
3
2.5
2
1.001
1
1.5
1
0.5
0
0.999
0.998
0
50
100
150
200
250
300
−40
−20
0
20
40
60
80
V
DD
− Threshold Overdrive − mV
T
A
− Free-Air Temperature − °C
Figure 10.
Figure 11.
MINIMUM PULSE DURATION
vs
THRESHOLD OVERDRIVE
3.5
3
MR = Open
V
IT
= 1.08 V
T
A
= 25°C
TPS312xJ12
2.5
2
1.5
1
0.5
0
0
50
100
150
200
250
300
V
DD
− Threshold Overdrive − mV
Figure 12.
10
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相关型号:
TPS3126E18DBVR
ULTRA-LOW VOLTAGE PROCESSOR SUPERVISORY CIRCUITSWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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TPS3126E18DBVRG4
1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5, GREEN, PLASTIC, SOT-23, 5 PINWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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ULTRA-LOW VOLTAGE PROCESSOR SUPERVISORY CIRCUITSWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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TPS3126E18DBVT
1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5, GREEN, PLASTIC, SOT-23, 5 PINWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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ULTRA-LOW VOLTAGE PROCESSOR SUPERVISORY CIRCUITSWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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ULTRA-LOW VOLTAGE PROCESSOR SUPERVISORY CIRCUITSWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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ULTRA-LOW VOLTAGE PROCESSOR SUPERVISORY CIRCUITSWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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TPS3128E12DBVT
ULTRA-LOW VOLTAGE PROCESSOR SUPERVISORY CIRCUITSWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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TPS3128E12DBVT
1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO5, GREEN, PLASTIC, SOT-23, 5 PINWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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ULTRA-LOW VOLTAGE PROCESSOR SUPERVISORY CIRCUITSWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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ULTRA-LOW VOLTAGE PROCESSOR SUPERVISORY CIRCUITSWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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