TPS3307-25DG4 [TI]
三路处理器电压监控器 | D | 8 | -40 to 85;
| 型号： | TPS3307-25DG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 三路处理器电压监控器 | D | 8 | -40 to 85 监控 输入元件 光电二极管 电源管理电路 电源电路 |
| 文件： | 总14页 (文件大小：426K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS3307-18, TPS3307-25, TPS3307-33
www.ti.com
SLVS199B–DECEMBER 1998–REVISED OCTOBER 2004
TRIPLE PROCESSOR SUPERVISORS
FEATURES
D OR DGN PACKAGE
(TOP VIEW)
•
Triple Supervisory Circuits for DSP and
Processor-Based Systems
SENSE1
SENSE2
SENSE3
GND
V
DD
1
2
3
4
8
7
6
5
•
Power-On Reset Generator With Fixed Delay
Time of 200ms, No External Capacitor Needed
MR
RESET
RESET
•
•
•
•
•
•
Temperature-Compensated Voltage Reference
Maximum Supply Current of 40µA
Supply Voltage Range: 2V to 6V
Defined RESET Output From VDD≥ 1.1V
MSOP-8 and SO-8 Packages
Temperature Range : – 40°C to 85°C
Typical Applications
Figure 1 lists some of the typical applications for the TPS3307 family, and a schematic diagram for a
processor-based system application. This application uses TI part numbers TPS3307-33 and MSP430C325.
2.5V
5V
3.3V
• Applications using DSPs,
Microcontrollers or Microprocessors
V
V
DD
DD
w Industrial Equipment
100nF
SENSE 1
MSP430C325
RESET
w Programmable Controls
w Automotive Systems
SENSE 2
RESET
470kΩ
TPS3307−33
w Portable/Battery Powered Equipment
w Intelligent Instruments
GND
SENSE 3
GND
w Wireless Communication Systems
w Notebook/Desktop Computers
620kΩ
Figure 1. Applications Using the TPS3307 Family
DESCRIPTION
The TPS3307 family is a series of micropower supply voltage supervisors designed for circuit initialization
primarily in DSP and processor-based systems, which require more than one supply voltage.
The product spectrum of the TPS3307-xx is designed for monitoring three independent supply voltages:
3.3V/1.8V/adj, 3.3V/2.5V/adj or 3.3V/5V/adj. The adjustable SENSE input allows the monitoring of any supply
voltage >1.25V.
The various supply voltage supervisors are designed to monitor the nominal supply voltage as shown in the
following supply voltage monitoring table.
During power-on, RESET is asserted when the supply voltage VDD becomes higher than 1.1V. Thereafter, the
supply voltage supervisor monitors the SENSEn inputs and keeps RESET active as long as SENSEn remain
below the threshold voltage VIT+
.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1998–2004, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TPS3307-18, TPS3307-25, TPS3307-33
www.ti.com
SLVS199B–DECEMBER 1998–REVISED OCTOBER 2004
An internal timer delays the return of the RESET output to the inactive state (high) to ensure proper system
reset. The delay time, td (typ) = 200ms, starts after all SENSEn inputs have risen above the threshold voltage VIT+
.
When the voltage at any SENSE input drops below the threshold voltage VIT-, the RESET output becomes active
(low) again.
The TPS3307-xx family of devices incorporates a manual reset input, MR. A low level at MR causes RESET to
become active. In addition to the active-low RESET output, the TPS3307-xx family includes an active-high
RESET output.
The devices are available in either 8-pin MSOP or standard 8-pin SO packages.
The TPS3307-xx devices are characterized for operation over a temperature range of –40°C to 85°C.
SUPPLY VOLTAGE MONITORING
NOMINAL SUPERVISED VOLTAGE
THRESHOLD VOLTAGE (TYP)
DEVICE
SENSE1
3.3V
SENSE2
1.8V
SENSE3
SENSE1
2.93V
SENSE2
1.68V
SENSE3
1.25V(1)
1.25V(1)
1.25V(1)
TPS3307-18
TPS3307-25
TPS3307-33
User defined
User defined
User defined
3.3V
2.5V
2.93V
2.25V
5V
3.3V
4.55V
2.93V
(1) The actual sense voltage has to be adjusted by an external resistor divider according to the application requirements.
AVAILABLE OPTIONS
PACKAGED DEVICES
MARKING
DGN PACKAGE
CHIP FORM
(Y)
PowerPAD™
µ-SMALL OUTLINE
(DGN)
TA
SMALL OUTLINE
(D)
TPS3307-18D
TPS3307-25D
TPS3307-33D
TPS3307-18DGN
TPS3307-25DGN
TPS3307-33DGN
TIAAP
TIAAQ
TIAAR
TPS3307-18Y
TPS3307-25Y
TPS3307-33Y
-40°C to 85°C
FUNCTION/TRUTH TABLES
MR
L
SENSE1 > VIT1
SENSE2 > VIT2
SENSE3 > VIT3
RESET
RESET
X(1)
X(1)
X
0
1
0
1
0
1
0
1
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
L
H
H
H
H
H
H
H
H
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
(1) X = Don't care
2
TPS3307-18, TPS3307-25, TPS3307-33
www.ti.com
SLVS199B–DECEMBER 1998–REVISED OCTOBER 2004
Functional Block Diagram
V
DD
TPS3307
14 kΩ
MR
R1
R3
+
_
SENSE 1
RESET
R2
RESET
Logic + Timer
+
_
SENSE 2
GND
R4
RESET
Reference
Voltage
of 1.25V
_
+
Oscillator
SENSE 3
Timing Diagram
SENSEn
V
(nom)
V
IT–
t
t
t
MR
1
0
RESET
1
0
t
d
t
d
t
d
RESET Because of SENSE Below V
RESET Because of MR
IT
RESET Because of SENSE Below V
IT–
RESET Because of SENSE Below V
IT–
TPS3307Y Chip Information
These chips, when properly assembled, display characteristics similar to those of the TPS3307. Thermal
compression or ultrasonic bonding may take place on the doped aluminium bonding pads. The chips may be
mounted with conductive epoxy or a gold-silicon preform.
3
TPS3307-18, TPS3307-25, TPS3307-33
www.ti.com
SLVS199B–DECEMBER 1998–REVISED OCTOBER 2004
(1)
(2)
(3)
(4)
(8)
(7)
(6)
TPS3307Y
(5)
48
CHIP THICKNESS: 10 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
T max = 150°C
J
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS
56
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
GND
NO.
4
Ground
MR
7
I
O
O
I
Manual reset
RESET
RESET
SENSE1
SENSE2
SENSE3
VDD
5
Active-low reset output
Active-high reset output
Sense voltage input 1
Sense voltage input 2
Sense voltage input 3
Supply voltage
6
1
2
I
3
I
8
4
TPS3307-18, TPS3307-25, TPS3307-33
www.ti.com
SLVS199B–DECEMBER 1998–REVISED OCTOBER 2004
Absolute Maximum Ratings(1)
Over operating free-air temperature range (unless otherwise noted).
UNIT
(2)
Supply voltage, VDD
All other pins(2)
7V
-0.3V to 7V
5mA
Maximum low output current, IOL
Maximum high output current, IOH
-5mA
Input clamp current, IIK (VI < 0 or VI > VDD
)
±20mA
Output clamp current, IOK (VO < 0 or VO > VDD
Continuous total power dissipation
Operating free-air temperature range, TA
Storage temperature range, Tstg
Soldering temperature
)
±20mA
See Dissipation Rating Table
-40°C to 85°C
-65°C to 150°C
260°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to GND. For reliable operation the device must not be operated at 7V for more than t = 1000h
continuously.
Dissipation Rating Table
T
A ≤ 25°C
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
PACKAGE
POWER RATING
DGN
D
2.14W
17.1mW/°C
5.8mW/°C
1.37W
1.11W
725mW
464mW
377mW
Recommended Operating Conditions
At specified temperature range.
MIN
MAX
UNIT
Supply voltage, VDD
2
6
VDD + 0.3
V
V
Input voltage at MR and SENSE3, VI
Input voltage at SENSE1 and SENSE2, VI
High-level input voltage at MR, VIH
Low-level input voltage at MR, VIL
Input transition rise and fall rate at MR, ∆t/∆V
Operating free-air temperature range, TA
0
0
(VDD+0.3)VIT/1.25V
V
0.7 x VDD
V
0.3 × VDD
V
50
85
ns/V
°C
-40
5
TPS3307-18, TPS3307-25, TPS3307-33
www.ti.com
SLVS199B–DECEMBER 1998–REVISED OCTOBER 2004
Electrical Characteristics
Over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VDD = 2V to 6V, IOH = -20 µA
VDD = 3.3V, IOH = -2mA
VDD = 6V, IOH = -3mA
MIN
TYP
MAX
UNIT
VDD - 0.2V
VDD - 0.4V
VDD - 0.4V
VOH
High-level output voltage
V
VDD = 2V to 6V, IOL = 20µA
VDD = 3.3V, IOL = 2mA
VDD = 6V, IOL = 3mA
0.2
0.4
VOL
Low-level output voltage
Power-up reset voltage(1)
V
V
0.4
VDD ≥ 1.1V, IOL = 20µA
0.4
VSENSE3
VDD = 2V to 6V, TA = 0°C to 85°C
1.22
1.64
2.20
2.86
4.46
1.25
1.28
1.72
2.30
3
1.68
2.25
2.93
4.55
V
VSENSE1,
VSENSE2
4.64
Negative-going input threshold volt-
age(2)
VIT-
VDD = 2V to 6V,
TA = -40°C to 85°C
VSENSE3
1.22
1.25
1.29
V
V
1.64
2.20
2.86
4.46
1.68
2.25
2.93
4.55
10
1.73
2.32
3.02
4.67
VSENSE1,
VSENSE2
VIT- = 1.25V
VIT- = 1.68V
15
Vhys
Hysteresis at VSENSEn input
VIT- = 2.25V
20
mV
µA
VIT- = 2.93V
30
VIT- = 4.55V
40
MR
MR = 0.7 × VDD, VDD = 6 V
VSENSE1 = VDD = 6V
VSENSE2 = VDD = 6V
VSENSE3 = VDD
MR = 0V, VDD = 6V
VSENSE1,2,3 = 0V
-130
5
-180
8
SENSE1
SENSE2
SENSE3
MR
IH
High-level input current
Low-level input current
6
9
-25
-25
25
-600
25
40
nA
µA
nA
µA
pF
-430
IL
SENSEn
IDD
Ci
Supply current
Input capacitance
VI = 0V to VDD
10
(1) The lowest supply voltage at which RESET becomes active. tr, VDD ≥ 15µs/V
(2) To ensure best stability of the threshold voltage, a bypass capacitor (ceramic 0.1µF) should be placed close to the supply terminals.
6
TPS3307-18, TPS3307-25, TPS3307-33
www.ti.com
SLVS199B–DECEMBER 1998–REVISED OCTOBER 2004
Timing Requirements
At VDD = 2V to 6V, RL = 1MΩ, CL = 50pF, TA = 25°C.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
µs
SENSEn
MR
VSENSEnL = VIT- - 0.2V, VSENSEnH = VIT+ +0.2V
6
tw
Pulse width
VIH = 0.7 × VDD, VIL = 0.3 × VDD
100
ns
Switching Characteristics
At VDD = 2V to 6V, RL = 1MΩ, CL = 50pF, TA = 25°C.
PARAMETER
TEST CONDITIONS
I(SENSEn) ≥ VIT+ + 0.2V,
MR ≥ 0.7 × VDD. See Timing Diagram.
MIN
TYP
200
MAX
UNIT
V
td
Delay time
140
280
ms
Propagation (delay) time,
high-to-low level output
MR to RESETMR to
RESET
tPHL
tPLH
tPHL
tPLH
VI(SENSEn) ≥ VIT+ +0.2V,
VIH = 0.7 × VDD, VIL = 0.3 × VDD
200
1
500
5
ns
µs
Propagation (delay) time,
low-to-high level output
MR to RESETMR to
RESET
Propagation (delay) time,
high-to-low level output
SENSEn to RESET
SENSEn to RESET
VIH = VIT+ +0.2V, VIL = VIT- -0.2V,
MR ≥ 0.7 × VDD
Propagation (delay) time,
low-to-high level output
SENSEn to RESET
SENSEn to RESET
7
TPS3307-18, TPS3307-25, TPS3307-33
www.ti.com
SLVS199B–DECEMBER 1998–REVISED OCTOBER 2004
Typical Characteristics
NORMALIZED SENSE THRESHOLD VOLTAGE
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
vs
FREE-AIR TEMPERATURE AT VDD
18
16
14
12
10
8
1.005
1.004
1.003
1.002
1.001
1
V
= 2V
DD
MR = Open
TPS3307−33
6
4
2
0.999
0.998
0.997
0
−2
−4
SENSEn = V
DD
−6
MR = Open
= 25°C
−8
T
A
0.996
0.995
−10
−0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7
−40
−15
10
35
60
85
V
DD
− Supply Voltage − V
T
A
− Free-Air Temperature − °C
Figure 2.
Figure 3.
INPUT CURRENT
vs
INPUT VOLTAGE AT MR
MINIMUM PULSE DURATION AT SENSE
vs
THRESHOLD OVERDRIVE
100
0
10
9
V
T
= 6V
= 25°C
DD
V
= 6V
DD
A
MR = Open
8
−100
−200
−300
−400
−500
−600
−700
7
6
5
4
3
2
−800
−900
1
0
4.5
−1−0.5 0 0.5 1 1.5 2 2.5 3 3.5 4
5 5.5 6 6.5
0
100 200 300 400 500 600 700 800 900 1000
SENSE − Threshold Overdrive − mV
V − Input Voltage at MR − V
I
Figure 4.
Figure 5.
8
TPS3307-18, TPS3307-25, TPS3307-33
www.ti.com
SLVS199B–DECEMBER 1998–REVISED OCTOBER 2004
Typical Characteristics (continued)
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
2.5
6.5
6
V
= 2V
V
DD
= 6V
DD
MR = Open
MR = Open
5.5
5
2
1.5
1
4.5
4
−40°C
3.5
3
−40°C
85°C
2.5
2
85°C
1.5
1
0.5
0
0.5
0
0 −0.5 −1 −1.5 −2 −2.5 −3 −3.5 −4 −4.5 −5 −5.5 −6
0
−5 −10 −15 −20 −25 −30 −35 −40 −45 −50
I
− High-Level Output Current − mA
I
− High-Level Output Current − mA
OH
OH
Figure 6.
Figure 7.
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
2.5
2
6.5
6
V
= 2V
V
= 6V
DD
DD
MR = Open
MR = Open
5.5
5
4.5
4
1.5
1
3.5
3
85°C
85°C
2.5
2
1.5
0.5
0
−40°C
−40°C
1
0.5
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
0
5
10 15 20 25 30 35 40 45 50 55 60
I
− Low-Level Output Current − mA
I
− Low-Level Output Current − mA
OL
OL
Figure 8.
Figure 9.
9
PACKAGE OPTION ADDENDUM
www.ti.com
4-Mar-2005
PACKAGING INFORMATION
Orderable Device
TPS3307-18D
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
8
75
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TPS3307-18DGN
MSOP-
Power
PAD
DGN
DGN
8
80
None
CU NIPDAU Level-1-220C-UNLIM
TPS3307-18DGNR
ACTIVE
MSOP-
Power
PAD
8
2500
2500
None
CU NIPDAU Level-1-220C-UNLIM
TPS3307-18DR
TPS3307-18DRG4
TPS3307-25D
ACTIVE
PREVIEW
ACTIVE
SOIC
SOIC
SOIC
D
D
8
8
8
8
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
75
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TPS3307-25DGN
ACTIVE
MSOP-
Power
PAD
DGN
80
None
CU NIPDAU Level-1-220C-UNLIM
TPS3307-25DGNR
ACTIVE
ACTIVE
MSOP-
Power
PAD
DGN
DGN
8
8
2500
None
CU NIPDAU Level-1-220C-UNLIM
TPS3307-25DGNRG4
MSOP-
Power
PAD
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS3307-25DR
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
D
D
8
8
2500
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TPS3307-25DRG4
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS3307-33D
ACTIVE
ACTIVE
D
8
8
75
80
None
None
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
TPS3307-33DGN
MSOP-
Power
PAD
DGN
TPS3307-33DGNR
ACTIVE
MSOP-
Power
PAD
DGN
8
2500
2500
None
None
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
TPS3307-33DR
ACTIVE
ACTIVE
SOIC
SOIC
D
D
8
8
TPS3307-33DRG4
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
4-Mar-2005
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
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Addendum-Page 2
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