TPS3620-33MDGKTEP [TI]
适用于 RAM 保持模式的增强型产品电池备份监控器 | DGK | 8 | -55 to 125;
| 型号： | TPS3620-33MDGKTEP |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 适用于 RAM 保持模式的增强型产品电池备份监控器 | DGK | 8 | -55 to 125 电池 监控 电源管理电路 电源电路 |
| 文件： | 总18页 (文件大小：618K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS3619-33-EP, TPS3619-50-EP
TPS3620-33-EP, TPS3620-50-EP
www.ti.com
SGLS350C –JULY 2006–REVISED SEPTEMBER 2010
BACKUP-BATTERY SUPERVISORS FOR RAM RETENTION
Check for Samples: TPS3619-33-EP, TPS3619-50-EP, TPS3620-33-EP, TPS3620-50-EP
1
FEATURES
APPLICATIONS
•
•
•
•
•
•
•
•
•
Fax Machines
Set-Top Boxes
Advanced Voice-Mail Systems
Portable Battery-Powered Equipment
Computer Equipment
Advanced Modems
Automotive Systems
Portable Long-Time Monitoring Equipment
Point-of-Sale Equipment
•
•
•
Supply Current of 40 mA (Max)
Battery-Supply Current of 100 nA (Max)
Precision Supply-Voltage Monitor 3.3 V, 5 V,
and Other Options on Request
•
•
Backup-Battery Voltage Can Exceed VDD
Power-On Reset Generator with Fixed 100-ms
Reset Delay Time
•
Voltage Monitor for Power-Fail or Low-Battery
Monitoring
•
•
Battery Freshness Seal (TPS3619)
DESCRIPTION
Pin-to-Pin Compatible With MAX819, MAX703,
and MAX704
The TPS3619 and TPS3620 families of supervisory
circuits monitor and control processor activity by
providing backup-battery switchover for data retention
of CMOS RAM.
•
8-Pin Mini Small-Outline Package (MSOP)
Package
During power on, RESET is asserted when the
supply voltage (VDD or VBAT) becomes higher than 1.1
V. Thereafter, the supply voltage supervisor monitors
VDD and keeps RESET output active as long as VDD
remains below the threshold voltage (VIT). An internal
timer delays the return of the output to the inactive
state (high) to ensure proper system reset. The delay
time starts after VDD has risen above VIT. When the
supply voltage drops below VIT, the output becomes
active (low) again.
SUPPORTS DEFENSE, AEROSPACE,
AND MEDICAL APPLICATIONS
•
•
•
•
Controlled Baseline
One Assembly/Test Site
One Fabrication Site
Available in Military (–55°C/125°C)
Temperature Range(1)
•
•
•
Extended Product Life Cycle
Extended Product-Change Notification
Product Traceability
The product spectrum is designed for supply voltages
of 3.3 V and 5 V. The TPS3619 and TPS3620 are
available in an 8-pin MSOP package and are
characterized for operation over a temperature range
of –55°C to 125°C.
(1) Additional temperature ranges available - contact factory
DGK PACKAGE
(TOP VIEW)
VBAT
8
7
6
5
VOUT
VDD
GND
PFI
1
2
3
4
RESET
MR
ACTUAL SIZE
3,05 mm x 4,98 mm
PFO
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2010, Texas Instruments Incorporated
TPS3619-33-EP, TPS3619-50-EP
TPS3620-33-EP, TPS3620-50-EP
SGLS350C –JULY 2006–REVISED SEPTEMBER 2010
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
TYPICAL OPERATING CIRCUIT
Power
Supply
TPS3619
TPS3620
Microcontroller
or
Microprocessor
Backup
Battery
0.1 µF
V
V
BAT
DD
External
Source
RESET
I/O
RESET
PFO
R
R
x
PFI
MR
Switchover
Capacitor
y
V
OUT
V
CC
0.1 µF
Manual
Reset
GND
GND
PACKAGE INFORMATION(1)
PACKAGE
MARKING
TRANSPORT MEDIA,
TA
PRODUCT
ORDERABLE PART NUMBER
QUANTITY
TPS3619-33MDGKEP(2)
TPS3619-33MDGKREP
TPS3619-50MDGK(2)
TPS3619-50MDGKREP(2)
TPS3620-33MDGKTEP
TPS3620-33MDGKREP
TPS3620-50MDGKTEP(2)
TPS3620-50MDGKREP(2)
Tube, 80
TPS3619-33
BZP
Tape and reel, 2500
Tube, 80
TPS3619-50
TPS3620-33
TPS3620-50
TBD
BTY
TBD
Tape and reel, 2500
Tape and reel, 250
Tape and reel, 2500
Tape and reel, 250
Tape and reel, 2500
–55°C to 125°C
(1) For the most current specifications and package information, see the Package Option Addendum located at the end of this data sheet or
see the TI web site at www.ti.com.
(2) Product Preview. Parameters in electrical characteristics are subject to change.
Standard and Application-Specific Versions
TPS361
9
33
M
DGK
R
EP
DEVICE NAME
TPS3619-33 DGK
TPS3619-50 DGK
TPS3620-33 DGK
TPS3620-50 DGK
NOMINAL VOLTAGE(1), VNOM
3.3 V
5 V
Designator
Reel
3.3 V
5 V
Package
Temperature Range
Nominal Supply Voltage
Functionality
(1) For other threshold voltage versions, contact the local TI sales
office for availability and lead time.
Family
2
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TPS3620-33-EP, TPS3620-50-EP
www.ti.com
SGLS350C –JULY 2006–REVISED SEPTEMBER 2010
Absolute Maximum Ratings
over operating free-air temperature (unless otherwise noted)(1)
UNIT
7 V
(2)
VDD
Supply voltage
MR and PFI pins(2)
–0.3 V to (VDD + 0.3 V)
400 mA
VOUT
Continuous output current, IO
All other pins(2)
±10 mA
Continuous total power dissipation
See Dissipation Ratings Table
–55°C to 125°C
–65°C to 150°C
260°C
Operating free-air temperature range, TA
Storage temperature range, Tstg
Lead temperature soldering 1,6 mm (1/16 in) from case for 10 s
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to GND. For reliable operation, the device must not be continuously operated at 7 V for more than
t = 1000 h.
Dissipation Ratings
TA < 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
TA = 125°C
POWER RATING
PACKAGE
DGK
470 mW
3.76 mW/°C
301 mW
241 mW
93.98 mW
Recommended Operating Conditions
at specified temperature range
MIN
1.65
MAX
5.5
UNIT
V
VDD
VBAT
VI
Supply voltage
Battery supply voltage
1.5
5.5
V
Input voltage
0
VDD + 0.3
V
VIH
VIL
IO
High-level input voltage
Low-level input voltage
Continuous output current at VOUT
Input transition rise and fall rate at MR
Slew rate at VDD or VBAT
Operating free-air temperature
0.7 × VDD
V
0.3 × VDD
300
V
mA
ns/V
V/ms
°C
100
Δt/ΔV
1
TA
–55
125
Copyright © 2006–2010, Texas Instruments Incorporated
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TPS3619-33-EP, TPS3619-50-EP
TPS3620-33-EP, TPS3620-50-EP
SGLS350C –JULY 2006–REVISED SEPTEMBER 2010
www.ti.com
Electrical Characteristics
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP
VDD – 0.4
MAX
UNIT
VDD = 3.3 V, IOH = –2 mA
VDD = 5 V, IOH = –3 mA
VDD = 1.8 V, IOH = –20 mA
VDD = 3.3 V, IOH = –80 mA
VDD = 5 V, IOH = –120 mA
VDD = 1.8 V, IOL = –400 mA
RESET
PFO
VDD – 0.4
VDD – 0.3
VDD – 0.4
VDD – 0.4
VOH
High-level output voltage
V
0.2
0.4
VOL
Low-level output voltage
Power-up reset voltage(1)
RESET, PFO VDD = 3.3 V, IOL = 2 mA
VDD = 5 V, IOL = 3 mA
V
V
0.4
IOL = 20 mA, VBAT > 1.1 V or
VDD > 1.1 V
Vres
0.4
IOUT = 8.5 mA, VBAT = 0 V,
VDD = 1.8 V
VDD – 50
VDD – 150
VDD – 200
IOUT = 125 mA, VBAT = 0 V,
VDD = 3.3 V
Normal mode
VOUT
IOUT = 190 mA, VBAT = 0 V,
VDD = 5 V
mV
IOUT = 0.5 mA, VBAT = 1.5 V,
VDD = 0 V
VBAT – 50
Battery-backup mode
IOUT = 7.5 mA, VBAT = 3.3 V
VDD = 5 V
VBAT – 150
VDD to VOUT on resistance
VBAT to VOUT on resistance
0.6
8
1
20
rDS(on)
Ω
VDD = 3.3 V
TPS36XX-33
2.88 2.93
3.05
4.64
1.185
VIT–
VPFI
TA = –55°C to 125°C
TPS36XX-50
V
V
Negative-going input threshold
voltage(2)
4.46 4.55
TA = –55°C to 125°C
1.65 V < VIT < 2.5 V
1.13 1.15
20
VIT
2.5 V < VIT < 3.5 V
3.5 V < VIT < 5.5 V
40
Vhys
Hysteresis
60
mV
PFI
VBSW(3)
12
55
VDD = 1.8 V
IIH
IIL
II
High-level input current
Low-level input current
Input current
MR
MR = 0.7 × VDD
,
VDD = 5 V
VDD = 5 V
–30
–76
–255
25
mA
mA
nA
MR
MR = 0 V,
–110
–25
PFI
VDD = 1.8 V
VDD = 3.3 V
VDD = 5 V
–0.3
–1.1
–2.4
40
IOS
Short-circuit current
VDD supply current
PFO
PFO = 0 V
mA
VOUT = VDD
VOUT = VBAT
VOUT = VDD
VOUT = VBAT
VI = 0 V to 5 V
IDD
mA
40
–0.1
0.1
I(BAT)
CI
VBAT supply current
Input capacitance
mA
0.5
5
pF
(1) The lowest supply voltage at which RESET becomes active. tr,VDD ≥ 15 ms/V.
(2) To ensure the best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 mF) should be placed near the supply terminals.
(3) For VDD < 1.6 V, VOUT switches to VBAT, regardless of VBAT
.
4
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Product Folder Link(s): TPS3619-33-EP TPS3619-50-EP TPS3620-33-EP TPS3620-50-EP
TPS3619-33-EP, TPS3619-50-EP
TPS3620-33-EP, TPS3620-50-EP
www.ti.com
SGLS350C –JULY 2006–REVISED SEPTEMBER 2010
Timing Requirements
at RL = 1 MΩ, CL = 50 pF, TA = 25°C
PARAMETER
TEST CONDITIONS
VIH = VIT + 0.2 V, VIL = VIT – 0.2 V
VDD = VIT + 0.2 V, VIL = 0.3 x VDD, VIH = 0.7 × VDD
MIN
6
MAX
UNIT
ms
at VDD
tw
Pulse width
at MR
100
ns
Switching Characteristics
at RL = 1 MΩ, CL= 50 pF, TA= –55°C to 125°C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
V
DD ≥ VIT + 0.2 V, MR ≥ 0.7 × VDD,
td
Delay time
60
100
140
ms
See timing diagram
VDD to RESET
VIL = VIT – 0.4 V, VIH = VIT + 0.4 V
2
3
5
5
Propagation (delay) time,
high-to-low-level output
PFI to PFO delay
VIL = VPFI – 0.35 V, VIH = VPFI + 0.35 V
DD ≥ VIT + 0.2 V, VIL = 0.3 × VDD
tPHL
ms
V
,
MR to RESET
0.1
1
VIH = 0.7 × VDD
Timing Diagram
V
BAT
V
DD
V
IT
t
t
t
V
OUT
RESET
t
d
t
d
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TPS3619-33-EP, TPS3619-50-EP
TPS3620-33-EP, TPS3620-50-EP
SGLS350C –JULY 2006–REVISED SEPTEMBER 2010
www.ti.com
Table 1. FUNCTION TABLE
VDD > VIT
VDD > VBAT
MR
L
VOUT
VBAT
VBAT
VDD
VDD
VDD
VDD
VDD
VDD
RESET
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
L
L
L
L
L
H
L
H
H
L
H
L
H
L
H
PFI > VPFI
PFO
L
0
1
H
CONDITION: VDD > VDD(MIN)
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
GND
MR
NO.
3
I
I
Ground
6
Manual reset
PFI
4
I
Power-fail comparator input
Power-fail comparator output
Active-low reset
PFO
RESET
VBAT
VDD
5
O
O
I
7
8
Backup battery
2
I
Supply input voltage
Supply output voltage
VOUT
1
O
6
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Product Folder Link(s): TPS3619-33-EP TPS3619-50-EP TPS3620-33-EP TPS3620-50-EP
TPS3619-33-EP, TPS3619-50-EP
TPS3620-33-EP, TPS3620-50-EP
www.ti.com
SGLS350C –JULY 2006–REVISED SEPTEMBER 2010
FUNCTIONAL BLOCK DIAGRAM
V
BAT
+
_
Switch
Control
V
OUT
V
DD
RESET
Logic
+
MR
RESET
+
_
Timer
PFI
+
_
PFO
Reference
Voltage
of 1.15 V
Copyright © 2006–2010, Texas Instruments Incorporated
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TPS3619-33-EP, TPS3619-50-EP
TPS3620-33-EP, TPS3620-50-EP
SGLS350C –JULY 2006–REVISED SEPTEMBER 2010
www.ti.com
TYPICAL CHARACTERISTICS
STATIC DRAIN-SOURCE ON-STATE RESISTANCE
STATIC DRAIN-SOURCE ON-STATE RESISTANCE
(VDD to VOUT
vs
)
(VBAT to VOUT
vs
)
OUTPUT CURRENT
OUTPUT CURRENT
1000
900
800
700
20
V
V
= 3.3 V
V
BAT
= 3.3 V
DD
= GND
BAT
17.5
15
T
= 85°C
A
T
A
= 85°C
12.5
10
T
A
= 25°C
T
A
= 25°C
T
= 0°C
A
T
= 0°C
A
T
= −40°C
A
600
500
7.5
5
T
A
= −40°C
50
75
100
125
150
175
200
2.5
4.5
6.5
8.5
10.5
12.5
14.5
I
O
− Output Current − mA
I
O
− Output Current − mA
Figure 1.
Figure 2.
SUPPLY CURRENT
vs
NORMALIZED THRESHOLD AT RESET
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
30
25
20
15
10
5
1.001
1
V
BAT
V
BAT
Mode
= 2.6 V
V
Mode
DD
V
BAT
= GND
or
T
A
= 0°C
0.999
0.998
0.997
T
= 25°C
A
T
A
= 85°C
T
A
= −40°C
0.996
0.995
0
−40 −30 −20 −10
0 10 20 30 40 50 60 70 80
0
1
2
3
4
5
6
T
A
− Free-Air Temperature −° C
V
DD
− Supply Voltage − V
Figure 3.
Figure 4.
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Product Folder Link(s): TPS3619-33-EP TPS3619-50-EP TPS3620-33-EP TPS3620-50-EP
TPS3619-33-EP, TPS3619-50-EP
TPS3620-33-EP, TPS3620-50-EP
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SGLS350C –JULY 2006–REVISED SEPTEMBER 2010
TYPICAL CHARACTERISTICS (continued)
HIGH-LEVEL OUTPUT VOLTAGE AT RESET
HIGH-LEVEL OUTPUT VOLTAGE AT RESET
vs
vs
HIGH-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT CURRENT
6
5
4
3
2
1
0
5.1
5
V
V
= 5 V
DD
Expanded View
= GND
BAT
T
= −40°C
T
= −40°C
A
A
T
= 25°C
A
4.9
T
A
= 25°C
T
= 0°C
A
T
A
= 0°C
4.8
4.7
T
= 85°C
A
T
A
= 85°C
V
V
= 5 V
DD
4.6
4.5
= GND
BAT
0
−0.5 −1 −1.5 −2 −2.5 −3 −3.5 −4 −4.5 −5
0
−5
−10
−15
−20
−25
−30
−35
I
− High-Level Output Current − mA
I
− High-Level Output Current − mA
OH
OH
Figure 5.
Figure 6.
HIGH-LEVEL OUTPUT VOLTAGE AT PFO
HIGH-LEVEL OUTPUT VOLTAGE AT PFO
vs
vs
HIGH-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT CURRENT
6
5
5.55
5.50
5.45
5.40
5.35
5.30
5.25
5.20
Expanded View
T
= −40°C
T = −40°C
A
A
T
A
= 25°C
T
A
= 25°C
4
3
2
T = 0°C
A
T
A
= 0°C
T
= 85°C
T
A
= 85°C
A
V
= 5.5 V
PFI = 1.4 V
= GND
DD
V
= 5.5 V
PFI = 1.4 V
= GND
DD
1
0
V
BAT
5.15
5.10
V
BAT
0
−0.5
−1
−1.5
−2
−2.5
0
−20 −40 −60 −80 −100 −120 −140−160−180 −200
I
− High-Level Output Current − mA
OH
I
− High-Level Output Current − µA
OH
Figure 7.
Figure 8.
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TPS3620-33-EP, TPS3620-50-EP
SGLS350C –JULY 2006–REVISED SEPTEMBER 2010
www.ti.com
TYPICAL CHARACTERISTICS (continued)
LOW-LEVEL OUTPUT VOLTAGE AT RESET
LOW-LEVEL OUTPUT VOLTAGE AT RESET
vs
vs
LOW-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT CURRENT
3.5
3
500
400
300
200
100
0
Expanded View
V
V
= 3.3 V
DD
= GND
BAT
T = 85°C
A
V
V
= 3.3 V
DD
= GND
BAT
2.5
2
T
A
= 25°C
T
= 0°C
A
T
A
= 0°C
T
A
= 25°C
1.5
1
T
A
= 85°C
T
= −40°C
A
T
= −40°C
A
0.5
0
0
5
10
15
20
25
1
2
3
4
5
0
I
− Low-Level Output Current − mA
I
− Low-Level Output Current − mA
OL
OL
Figure 9.
Figure 10.
MINIMUM PULSE DURATION AT VDD
vs
MINIMUM PULSE DURATION AT PFI
vs
THRESHOLD OVERDRIVE AT VDD
THRESHOLD OVERDRIVE AT PFI
10
5
4.6
4.2
3.8
3.4
3
9
8
7
6
5
V
DD
= 1.65 V
2.6
2.2
1.8
1.4
1
4
3
2
1
0
0.6
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
1
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Threshold Overdrive at PFI − V
Figure 12.
Threshold Overdrive at V − V
DD
Figure 11.
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SGLS350C –JULY 2006–REVISED SEPTEMBER 2010
DETAILED DESCRIPTION
Battery Freshness Seal (TPS3619)
The battery freshness seal of the TPS3619 family disconnects the backup battery from internal circuitry until it is
needed. This function prevents the backup battery from being discharged until the final product is put to use. The
following steps explain how to enable the freshness seal mode.
1. Connect VBAT (VBAT > VBAT min)
2. Ground PFO
3. Connect PFI to VDD (PFI = VDD
)
4. Connect VDD to power supply (VDD > VIT) and retain for 5 ms < t < 35 ms
The battery freshness seal mode is removed automatically by the positive-going edge of RESET when VDD is
applied.
Power-Fail Input/Output Comparator (PFI and PFO)
An additional comparator is provided to monitor voltages other than the nominal supply voltage. The PFI is
compared with an internal voltage reference of 1.15 V. If the input voltage falls below the power-fail threshold
(VIT(PFI)) of 1.15 V (typ), the PFO goes low. If VIT(PFI) goes above V(PFI) plus about 12-mV hysteresis, the output
returns to high. By connecting two external resistors, it is possible to supervise any voltages above V(PFI). The
sum of both resistors should be about 1 MΩ, to minimize power consumption and also to ensure that the current
in the PFI pin can be ignored, compared with the current through the resistor network. The tolerance of the
external resistors should be not more than 1%, to ensure minimal variation of sensed voltage. If the power-fail
comparator is unused, PFI should be connected to ground and PFO left unconnected.
Backup-Battery Switchover
In case of a brownout or power failure, it may be necessary to preserve the contents of RAM. If a backup battery
is installed at VBAT, the device automatically switches the connected RAM to backup power when VDD fails. In
order to allow the backup battery (e.g., a 3.6-V lithium cell) to have a higher voltage than VDD, these supervisors
do not connect VBAT to VOUT when VBAT is greater than VDD. VBAT only connects to VOUT (through a 15-Ω switch)
when VDD falls below the VIT and VBAT is greater than VDD. When VDD recovers, switchover is deferred, either
until VDD crosses VBAT or until VDD rises above VIT. VOUT connects to VDD through a 1-Ω (max) PMOS switch
when VDD crosses the reset threshold.
Table 2. FUNCTION TABLE
VDD > VBAT
VDD > VIT
VOUT
VDD
1
1
0
0
1
0
1
0
VDD
VDD
VBAT
Copyright © 2006–2010, Texas Instruments Incorporated
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Product Folder Link(s): TPS3619-33-EP TPS3619-50-EP TPS3620-33-EP TPS3620-50-EP
TPS3619-33-EP, TPS3619-50-EP
TPS3620-33-EP, TPS3620-50-EP
SGLS350C –JULY 2006–REVISED SEPTEMBER 2010
www.ti.com
V
DD
Mode
V
IT
Hysteresis
V
BAT
Mode
VBSW Hysteresis
Undefined
V
BAT
– Backup-Battery Supply Voltage – V
Figure 13. Normal Supply Voltage vs Backup-Battery Supply Voltage
12
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Copyright © 2006–2010, Texas Instruments Incorporated
Product Folder Link(s): TPS3619-33-EP TPS3619-50-EP TPS3620-33-EP TPS3620-50-EP
PACKAGE OPTION ADDENDUM
www.ti.com
16-Aug-2012
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
TPS3619-33MDGKREP
TPS3620-33MDGKREP
TPS3620-33MDGKTEP
V62/06670-01XE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
DGK
DGK
DGK
DGK
DGK
8
8
8
8
8
2500
2500
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
Green (RoHS
& no Sb/Br)
2500
2500
Green (RoHS
& no Sb/Br)
V62/06670-03XE
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
16-Aug-2012
OTHER QUALIFIED VERSIONS OF TPS3619-33-EP, TPS3620-33-EP :
Catalog: TPS3619-33, TPS3620-33
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Aug-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS3619-33MDGKREP VSSOP
TPS3620-33MDGKREP VSSOP
TPS3620-33MDGKTEP VSSOP
DGK
DGK
DGK
8
8
8
2500
2500
250
330.0
330.0
177.8
12.4
12.4
12.4
5.3
5.3
5.3
3.4
3.4
3.4
1.4
1.4
1.4
8.0
8.0
8.0
12.0
12.0
12.0
Q1
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Aug-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS3619-33MDGKREP
TPS3620-33MDGKREP
TPS3620-33MDGKTEP
VSSOP
VSSOP
VSSOP
DGK
DGK
DGK
8
8
8
2500
2500
250
358.0
358.0
202.0
335.0
335.0
201.0
35.0
35.0
28.0
Pack Materials-Page 2
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