TPS3820-33-Q1_技术文档

TPS3820-xx-Q1, TPS3823-xx-Q1, TPS3824-xx-Q1, TPS3825-xx-Q1, TPS3828-xx-Q1

PROCESSOR SUPERVISORY CIRCUITS

SGLS143A – DECEMBER 2002 – REVISED JANUARY 2003

TPS3820, TPS3823, TPS3828 . . . DBV PACKAGE

(TOP VIEW)

features

D

Qualification in Accordance With

AEC-Q100

†

1

2

3

5

V

DD

RESET

GND

D

Qualified for Automotive Applications

D

Customer-Specific Configuration Control

Can Be Supported Along With

Major-Change Approval

4

WDI

MR

†

D

ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Using Human

Body Model (C = 100 pF, R = 1500 Ω)

TPS3824 . . . DBV PACKAGE

(TOP VIEW)

1

2

3

5

V

DD

RESET

GND

Power-On Reset Generator With Fixed

Delay Time of 200 ms (TPS3823/4/5/8)

or 25 ms (TPS3820)

D

Manual Reset Input (TPS3820/3/5/8)

4

WDI

RESET

Reset Output Available in Active-Low

(TPS3820/3/4/5), Active-High (TPS3824) and

Open-Drain (TPS3828)

TPS3825 . . . DBV PACKAGE

(TOP VIEW)

D

Supply Voltage Supervision Range

2.5 V, 3 V, 3.3 V, 5 V

1

2

3

5

V

DD

RESET

GND

Watchdog Timer (TPS3820/3/4/8)

Supply Current of 15 µA (Typ)

SOT23-5 Package

4

MR

RESET

typical application

applications

3.3 V

D

Applications Using Automotive DSPs,

Microcontrollers, or Microprocessors

100 nF

V

DD

D

Industrial Equipment

DD

Programmable Controls

Automotive Systems

RESET

TPS3823-33

MSP430C325

GND

Battery-Powered Equipment

Intelligent Instruments

MR

WDI

I/O

Wireless Communications Systems

GND

†

Contact factory for details. Q100 qualification data available on

request.

description

The TPS382x family of supervisors provides circuit initialization and timing supervision, primarily for DSP and

processor-based systems.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS3820-xx-Q1, TPS3823-xx-Q1, TPS3824-xx-Q1, TPS3825-xx-Q1, TPS3828-xx-Q1

PROCESSOR SUPERVISORY CIRCUITS

SGLS143A – DECEMBER 2002 – REVISED JANUARY 2003

description (continued)

During power-on, RESET is asserted when supply voltage V

becomes higher than 1.1 V. Thereafter, the

DD

supply voltage supervisor monitors V

and keeps RESET active as long as V

remains below the threshold

DD

voltage V . An internal timer delays the return of the output to the inactive state (high) to ensure proper system

IT–

reset. The delay time, t , starts after V

has risen above the threshold voltage V . When the supply voltage

d

DD

IT–

drops below the threshold voltage V , the output becomes active (low) again. No external components are

IT–

required. All the devices of this family have a fixed-sense threshold voltage V

divider.

set by an internal voltage

IT–

The TPS3820/3/5/8 devices incorporate a manual reset input, MR. A low level at MR causes RESET to become

active. The TPS3824/5 devices include a high-level output RESET. TPS3820/3/4/8 have a watchdog timer that

isperiodicallytriggeredbyapositiveornegativetransitionatWDI. Whenthesupervisingsystemfailstoretrigger

the watchdog circuit within the time-out interval, t , RESET becomes active for the time period t . This event

tout

d

also reinitializes the watchdog timer. Leaving WDI unconnected disables the watchdog.

In applications where the input to the WDI pin may be active (transitioning high and low) when the

TPS3820/3/4/8 is asserting RESET, the TPS3820/3/4/8 does not return to a non-reset state when the input

voltage is above Vt. If the application requires that input to WDI is active when RESET is asserted, WDI must

be decoupled from the active signal. This can be accomplished by using an N-channel FET in series with the

WDI pin, with the gate of the FET connected to the RESET output as shown in Figure 1.

TPS3824

WDI

WDI External

RESET

Figure 1

The product spectrum is designed for supply voltages of 2.5 V, 3 V, 3.3 V, and 5 V. The circuits are available

in a 5-pin SOT23-5 package. The TPS382x-xxQ-Q1 devices are characterized for operation over a temperature

range of –40°C to 125°C, and are qualified in accordance with AEC-Q100 stress test qualification for integrated

circuits.

2

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TPS3820-xx-Q1, TPS3823-xx-Q1, TPS3824-xx-Q1, TPS3825-xx-Q1, TPS3828-xx-Q1

PROCESSOR SUPERVISORY CIRCUITS

SGLS143A – DECEMBER 2002 – REVISED JANUARY 2003

PACKAGE INFORMATION

DEVICE NAME

THRESHOLD VOLTAGE

MARKING

PDEQ

PDDQ

PAPQ

PAQQ

PARQ

PASQ

PATQ

†

TPS3820-33QDBVRQ1

TPS3820-50QDBVRQ1

TPS3823-25QDBVRQ1

TPS3823-30QDBVRQ1

TPS3823-33QDBVRQ1

TPS3823-50QDBVRQ1

TPS3824-25QDBVRQ1

TPS3824-30QDBVRQ1

TPS3824-33QDBVRQ1

TPS3824-50QDBVRQ1

2.93 V

4.55 V

2.25 V

2.63 V

2.93 V

4.55 V

2.25 V

2.63 V

2.93 V

4.55 V

PAUQ

PAVQ

PAWQ

†

TPS3825-33QDBVRQ1

TPS3825-50QDBVRQ1

TPS3828-33QDBVRQ1

TPS3828-50QDBVRQ1

2.93 V

4.55 V

2.93 V

4.55 V

PDGQ

PDFQ

PDIQ

PDHQ

†

The DBVR package indicates tape and reel of 3000 parts.

FUNCTION/TRUTH TABLE

INPUTS

OUTPUTS

‡

MR

§

V >V

DD IT

RESET

L

0

1

0

1

L

H

L

H

L

H

‡

§

TPS3820/3/5/8

TPS3824/5

3

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PROCESSOR SUPERVISORY CIRCUITS

SGLS143A – DECEMBER 2002 – REVISED JANUARY 2003

functional block diagram

V

DD

†

Reset

Watchdog

Timer Logic

Reset

Logic

Reset

52 kΩ

+

_

‡

MR

40 kΩ

V

ref

Transition

Detector

WDI

†

‡

TPS3824/5

TPS3820/3/5/8

timing diagram

V

IT

V

DD

1.1 V

t

d

t(out)

undefined

RESET

WDI

4

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TPS3820-xx-Q1, TPS3823-xx-Q1, TPS3824-xx-Q1, TPS3825-xx-Q1, TPS3828-xx-Q1

PROCESSOR SUPERVISORY CIRCUITS

SGLS143A – DECEMBER 2002 – REVISED JANUARY 2003

†

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, V

(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V

DD

RESET, RESET, MR, WDI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (V

Maximum low output current, I

Maximum high output current, I

Input clamp current range, I (V < 0 or V > V )

Output clamp current range, I

Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table

+ 0.3 V)

DD

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –5 mA

OL

OH

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA

(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10 mA

IK

OK

I

DD

O

DD

Operating free-air temperature range, T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 125°C

A

Storage temperature range, T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C

stg

Soldering temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltage values are with respect to GND.

DISSIPATION RATING TABLE

OPERATING FACTOR = 70°C

T

≤ 25°C

T

A

T

= 85°C

T = 125°C

A

POWER RATING

A

PACKAGE

POWER RATING

ABOVE T = 25°C

POWER RATING

A

DBV

437 mW

3.5 mW/°C

280 mW

227 mW

87 mW

recommended operating conditions

MIN

1.1

0

MAX

UNIT

V

Supply voltage, V

DD

5.5

Input voltage, V

V

+ 0.3

V

I

DD

High-level input voltage at MR and WDI, V

IH

0.7 × V

V

DD

Low-level input voltage, V

0.3 × V

100

V

IL

Input transition rise and fall rate at MR or WDI, ∆t/∆V

Operating free-air temperature range, T

DD

ns/V

°C

–40

125

A

5

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PROCESSOR SUPERVISORY CIRCUITS

SGLS143A – DECEMBER 2002 – REVISED JANUARY 2003

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

= V + 0.2 V

MIN

TYP

MAX

UNIT

V

DD

IT–

= –20 µA

TPS382x-25

I

OH

0.8 × V

DD

TPS382x-30

TPS382x-33

V

= V + 0.2 V

DD

IT–

= –30 µA

RESET

V

I

OH

V

I

= V + 0.2 V

= –120 µA

DD

OH

IT–

TPS382x-50

V

DD

– 1.5 V

TPS3824-25

TPS3825-25

V

≥ 1.8 V, I

= –100 µA

= –150 µA

V

OH

High-level output voltage

DD

OH

TPS3824-30

TPS3825-30

RESET

0.8 × V

V

DD

TPS3824-33

TPS3825-33

V

≥ 1.8 V, I

OH

DD

TPS3824-50

TPS3825-50

TPS3824-25

TPS3825-25

= V

+ 0.2 V

DD

IT–

= 1 mA

I

OL

TPS3824-30

TPS3825-30

V

I

= V

IT–

DD

= 1.2 mA

RESET

0.4

V

TPS3824-33

TPS3825-33

OL

TPS3824-50

TPS3825-50

V

= V

+ 0.2 V

IT–

DD

= 3 mA

V

OL

Low-level output voltage

I

OL

V

= V

– 0.2 V

IT–

DD

= 1 mA

TPS382x-25

I

OL

TPS382x-30

TPS382x-33

V

I

= V

= 1.2 mA

–0.2 V

IT–

DD

OL

RESET

0.45

V

= V

– 0.2 V

IT–

DD

= 3 mA

TPS382x-50

I

OL

Power-up reset voltage (see Note 2)

V

≥ 1.1 V, I

= 20 µA

OL

0.4

2.30

2.69

3

V

DD

TPS382x-25

TPS382x-30

TPS382x-33

TPS382x-50

TPS382x-25

TPS382x-30

TPS382x-33

TPS382x-50

TPS382x-25

TPS382x-30

TPS382x-33

TPS382x-50

2.21

2.59

2.88

4.49

2.19

2.55

2.84

4.44

2.25

2.63

2.93

4.55

2.25

2.63

2.93

4.55

T

A

= 0°C to 85°C

4.64

2.30

2.69

3

Negative-going input threshold

voltage (see Note 3)

V

IT–

T

A

= –40°C to 125°C

V

4.65

30

50

V

hys

Hysteresis at V

DD

input

mV

NOTES: 2. The lowest supply voltage at which RESET becomes active. t

≥ 15 µs/V

r, VDD

3. To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 µF) should be placed near the supply terminals.

6

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TPS3820-xx-Q1, TPS3823-xx-Q1, TPS3824-xx-Q1, TPS3825-xx-Q1, TPS3828-xx-Q1

PROCESSOR SUPERVISORY CIRCUITS

SGLS143A – DECEMBER 2002 – REVISED JANUARY 2003

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted) (continued)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

WDI = V

,

DD

time average (dc = 88%)

I

Average high-level input current

120

IH(AV)

WDI

WDI = 0.3 V, V = 5.5 V

DD

time average (dc = 12%)

Average low-level input current

High-level input current

–15

140

–40

IL(AV)

WDI

MR

WDI = V

MR = V

190

DD

× 0.7,

µA

I

IH

IL

DD

–60

V

= 5.5 V

DD

WDI = 0.3 V, V

WDI

= 5.5 V

140

190

DD

= 5.5 V

I

Low-level input current

MR

MR = 0.3 V, V

–110

–160

DD

TPS382x-25

TPS382x-30

TPS382x-33

TPS382x-50

–400

Output short-circuit current

(see Note 4)

V

= V

+ 0.2 V,

IT, max

DD

= 0 V

I

RESET

µA

OS

O

–800

WDI and MR unconnected,

Outputs unconnected

Supply current

15

25

DD

Internal pullup resistor at MR

Input capacitance at MR, WDI

52

5

kΩ

C

V = 0 V to 5.5 V

I

pF

i

NOTE 4: The RESET short-circuit current is the maximum pullup current when RESET is driven low by a µP bidirectional reset pin.

timing requirements at R = 1 MΩ, C = 50 pF, T = 25°C

L

A

PARAMETER

at V

TEST CONDITIONS

MIN

MAX

UNIT

µs

V

DD

V

DD

V

DD

= V

≥ V

+ 0.2 V,

V

= V - 0.2 V

6

DD

IT–

DD IT-

t

w

Pulse width

at MR

+ 0.2 V,

= 0.3 x V

,

V

= 0.7 x V

1

µs

IL

DD

IH

DD

at WDI

= 0.3 x V

100

ns

IH

switching characteristics at R = 1 MΩ, C = 50 pF, T = 25°C

L

A

PARAMETER

TEST CONDITIONS

≥ V + 0.2 V,

MIN

TYP

200

1.6

MAX

310

2.5

UNIT

ms

s

TPS3820

112

0.9

15

V

DD

IT–

t

Watchdog time out

Delay time

tout

See Timing Diagram

TPS3823/4/8

TPS3820

25

37

V

≥ V

+ 0.2 V,

DD

IT–

ms

d

See timing diagram

TPS3823/4/5/8

120

200

300

V

≥ V

+ 0.2 V,

= 0.3 x V

DD

IT–

MR to RESET delay

(TPS3820/3/5/8)

,

0.1

25

IL

DD

= 0.7 x V

Propagation (delay) time,

high-to-low-level output

t

IH

DD

µs

PHL

PLH

V

= V - 0.2 V,

IL

IH

IT-

= V + 0.2 V

V

DD

to RESET delay

IT-

≥ V

V

+ 0.2 V,

DD

IL

IH

IT–

MR to RESET delay (TPS3824/5)

= 0.3 x V

,

0.1

25

DD

= 0.7 x V

Propagation (delay) time,

low-to-high-level output

DD

t

µs

V

= V - 0.2 V,

IL

IH

IT-

= V + 0.2 V

V

DD

to RESET delay (TPS3824/5)

IT-

7

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS3820-xx-Q1, TPS3823-xx-Q1, TPS3824-xx-Q1, TPS3825-xx-Q1, TPS3828-xx-Q1

PROCESSOR SUPERVISORY CIRCUITS

SGLS143A – DECEMBER 2002 – REVISED JANUARY 2003

TYPICAL CHARACTERISTICS

NORMALIZED INPUT THRESHOLD VOLTAGE

vs

SUPPLY CURRENT

vs

SUPPLY VOLTAGE

FREE-AIR TEMPERATURE AT V

DD

1.001

1

19

17

15

MR = Open

WDI = Open

T

= 25°C

A

13

11

9

0.999

0.998

TPS382x-33

7

5

0.997

0.996

0.995

3

1

–1

–0.5

–40

–15

10

35

60

85

0.5

1.5

2.5

3.5

4.5

5.5

6.5

T

A

– Free-Air Temperature – °C

V

DD

– Supply Voltage – V

Figure 2

Figure 3

INPUT CURRENT

vs

INPUT VOLTAGE AT MR

LOW-LEVEL OUTPUT VOLTAGE

vs

LOW-LEVEL OUTPUT CURRENT

50

0

3

2.5

2

V

= 2.66 V

V

= 5.5 V

DD

WDI = Open

MR = Open

WDI = Open

–50

–40°C

1.5

85°C

–100

–150

–200

1

0.5

0

85°C

–40°C

–1

0

1

2

3

4

5

6

0

1

2

3

4

5

6

7

8

9

10

V – Input Voltage at MR – V

I

– Low-Level Output Current – mA

OL

Figure 4

Figure 5

8

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TYPICAL CHARACTERISTICS

HIGH-LEVEL OUTPUT VOLTAGE

vs

HIGH-LEVEL OUTPUT CURRENT

HIGH-LEVEL OUTPUT VOLTAGE

vs

HIGH-LEVEL OUTPUT CURRENT

3.5

3

6

5

4

3

V

= 3.2 V

DD

V

= 5.5 V

DD

WDI = Open

MR = Open

WDI = Open

MR = Open

2.5

2

–40°C

1.5

85°C

2

1

0

1

0.5

0

–50

–100

–150

–200

–250

0

–100 –200 –300 –400 –500 –600

–700

I

– High-Level Output Current – µA

OH

I

– High-Level Output Current – µA

OH

Figure 6

Figure 7

MINIMUM PULSE DURATION AT V

vs

DD

V

THRESHOLD OVERDRIVE

DD

10

8

WDI = Open

MR = Open

6

4

2

0

200

400

600

800

1000

V

DD

– Threshold Overdrive – mV

Figure 8

9

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TPS3820-xx-Q1, TPS3823-xx-Q1, TPS3824-xx-Q1, TPS3825-xx-Q1, TPS3828-xx-Q1

PROCESSOR SUPERVISORY CIRCUITS

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MECHANICAL DATA

DBV (R-PDSO-G5)

PLASTIC SMALL-OUTLINE

0,50

0,30

M

0,20

0,95

5

5X

4

0,15 NOM

1,70

1,50

3,00

2,60

1

3

Gage Plane

3,00

2,80

0,25

0°–8°

0,55

0,35

Seating Plane

0,10

1,45

0,95

0,05 MIN

4073253-4/G 01/02

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion.

D. Falls within JEDEC MO-178

10

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PACKAGE OPTION ADDENDUM

www.ti.com

25-Feb-2005

PACKAGING INFORMATION

Orderable Device

Status ⁽¹⁾

Package Package

Type

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Drawing

DBV

TPS3820-33QDBVRQ1

TPS3820-50QDBVRQ1

TPS3823-25QDBVRQ1

TPS3823-30QDBVRQ1

TPS3823-33QDBVRQ1

TPS3823-50QDBVRQ1

TPS3824-25QDBVRQ1

TPS3824-30QDBVRQ1

TPS3824-33QDBVRQ1

TPS3824-50QDBVRQ1

TPS3825-33QDBVRQ1

TPS3825-50QDBVRQ1

TPS3828-33QDBVRQ1

TPS3828-50QDBVRQ1

ACTIVE

SOT-23

5

3000

None

Call TI

Level-1-220C-UNLIM

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional

product content details.

None: Not yet available Lead (Pb-Free).

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,

including bromine (Br) or antimony (Sb) above 0.1% of total product weight.

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder

temperature.

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Addendum-Page 1

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型号：	TPS3820-33-Q1
厂家：	TEXAS INSTRUMENTS
描述：	Voltage Monitor With Watchdog Timer
文件：	总13页 (文件大小：224K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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