TPS3836-EP [TI]

增强型产品毫微功耗监控电路;
TPS3836-EP
型号: TPS3836-EP
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

增强型产品毫微功耗监控电路

监控 电源管理电路 电源电路
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TPS3836E18-EP / J25-EP / H30-EP / L30-EP / K33-EP  
TPS3837E18-EP / J25-EP / L30-EP / K33-EP  
TPS3838E18-EP / J25-EP / L30-EP / K33-EP  
www.ti.com.................................................................................................................................................... SGLS322DMAY 2006REVISED NOVEMBER 2008  
NANOPOWER SUPERVISORY CIRCUITS  
1
FEATURES  
TPS3836, TPS3838  
DBV PACKAGE  
(TOP VIEW)  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
1
2
3
5
4
VDD  
CT  
Supply Current of 220 nA (Typ)  
Precision Supply Voltage Supervision Range:  
1.8 V, 2.5 V, 3 V, 3.3 V  
GND  
RESET  
MR  
Power-On Reset Generator With Selectable  
Delay Time of 10 ms or 200 ms  
Push/Pull RESET Output (TPS3836), RESET  
Output (TPS3837), or  
Open-Drain RESET Output (TPS3838)  
TPS3837  
DBV PACKAGE  
(TOP VIEW)  
Manual Reset  
1
2
3
VDD  
5
CT  
5-Pin SOT-23 Package  
GND  
SUPPORTS DEFENSE, AEROSPACE,  
AND MEDICAL APPLICATIONS  
4
RESET  
MR  
Controlled Baseline  
One Assembly/Test Site  
One Fabrication Site  
Available in Military (–55°C/125°C)  
Temperature Range(1)  
Extended Product Life Cycle  
Extended Product-Change Notification  
Product Traceability  
APPLICATIONS  
Applications Using Automotive Low-Power  
DSPs, Microcontrollers, or Microprocessors  
Battery-Powered Equipment  
Intelligent Instruments  
Wireless Communication Systems  
Automotive Systems  
(1) Custom temperature ranges available  
DESCRIPTION  
The TPS3836, TPS3837, TPS3838 families of supervisory circuits provide circuit initialization and timing  
supervision, primarily for digital signal processing (DSP) and processor-based systems.  
During power on, RESET is asserted when the supply voltage VDD becomes higher than 1.1 V. Thereafter, the  
supervisory circuit monitors VDD and keeps RESET output active as long as VDD remains below the threshold  
voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system  
reset. The delay time starts after VDD has risen above VIT.  
When CT is connected to GND, a fixed delay time of typical 10 ms is asserted. When connected to VDD, the  
delay time is typically 200 ms.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2006–2008, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
TPS3836E18-EP / J25-EP / H30-EP / L30-EP / K33-EP  
TPS3837E18-EP / J25-EP / L30-EP / K33-EP  
TPS3838E18-EP / J25-EP / L30-EP / K33-EP  
SGLS322DMAY 2006REVISED NOVEMBER 2008.................................................................................................................................................... www.ti.com  
When the supply voltage drops below VIT, the output becomes active (low) again.  
All the devices of this family have a fixed-sense VIT set by an internal voltage divider.  
The TPS3836 has an active-low push-pull RESET output. The TPS3837 has active-high push-pull RESET, and  
the TPS3838 integrates an active-low open-drain RESET output.  
TPS3836K33  
MSP430  
V
DD  
V
CC  
CT  
Xin  
Lithium  
Battery  
3.6 V  
RST  
RESET  
MR  
Xout  
Quartz  
32 kHz  
T
V
SS  
GND  
Figure 1. Typical Operating Circuit  
The product spectrum is designed for supply voltages of 1.8 V, 2.5 V, 3 V, and 3.3 V. The circuits are available in  
a 5-pin SOT-23 package. The TPS3836, TPS3837, and TPS3838 families are characterized for operation over a  
temperature range of –55°C to 125°C.  
2
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Copyright © 2006–2008, Texas Instruments Incorporated  
Product Folder Link(s): TPS3836E18-EP / J25-EP / H30-EP / L30-EP / K33-EP TPS3837E18-EP / J25-EP / L30-EP /  
K33-EP TPS3838E18-EP / J25-EP / L30-EP / K33-EP  
TPS3836E18-EP / J25-EP / H30-EP / L30-EP / K33-EP  
TPS3837E18-EP / J25-EP / L30-EP / K33-EP  
TPS3838E18-EP / J25-EP / L30-EP / K33-EP  
www.ti.com.................................................................................................................................................... SGLS322DMAY 2006REVISED NOVEMBER 2008  
ORDERING INFORMATION  
ORDERABLE PART  
TA  
THRESHOLD VOLTAGE  
SYMBOL  
NUMBER(1)  
TPS3836J25MDBVTEP  
TPS3836L30MDBVREP  
TPS3837K33MDBVREP  
2.25 V  
2.64 V  
2.93 V  
PKRM  
BTX  
–55°C to 125°C  
PKZM  
(1) DBVR indicates reel of 3000 parts, DBVT indicates tape of 250 parts.  
ORDERING INFORMATION  
TPS383 6 E 18 M DBV R/T EP  
EP Designator  
Reel/Tape  
Package  
M-Temperature Designator  
Nominal Supply Voltage  
Typical Reset Threshold Voltage  
Functionality  
Family  
FUNCTION TABLE  
(1)  
MR  
L
VDD > VIT  
RESET  
RESET(2)  
0
1
0
1
L
L
H
H
H
L
L
H
L
H
H
(1) TPS3836 and TPS3838  
(2) TPS3837  
Copyright © 2006–2008, Texas Instruments Incorporated  
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3
Product Folder Link(s): TPS3836E18-EP / J25-EP / H30-EP / L30-EP / K33-EP TPS3837E18-EP / J25-EP / L30-EP /  
K33-EP TPS3838E18-EP / J25-EP / L30-EP / K33-EP  
TPS3836E18-EP / J25-EP / H30-EP / L30-EP / K33-EP  
TPS3837E18-EP / J25-EP / L30-EP / K33-EP  
TPS3838E18-EP / J25-EP / L30-EP / K33-EP  
SGLS322DMAY 2006REVISED NOVEMBER 2008.................................................................................................................................................... www.ti.com  
FUNCTIONAL BLOCK DIAGRAM  
V
DD  
R3  
C
T
MR  
C1  
C2  
RESET (TPS3837-Push-Pull)  
R1  
Reset Logic  
and Timer  
+
RESET (TPS3836-Push-Pull  
TPS3838-Open-Drain)  
S1  
R2  
S2  
S3  
Band-Gap  
Reference  
C3  
Refresh  
Timer  
GND  
4
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Copyright © 2006–2008, Texas Instruments Incorporated  
Product Folder Link(s): TPS3836E18-EP / J25-EP / H30-EP / L30-EP / K33-EP TPS3837E18-EP / J25-EP / L30-EP /  
K33-EP TPS3838E18-EP / J25-EP / L30-EP / K33-EP  
TPS3836E18-EP / J25-EP / H30-EP / L30-EP / K33-EP  
TPS3837E18-EP / J25-EP / L30-EP / K33-EP  
TPS3838E18-EP / J25-EP / L30-EP / K33-EP  
www.ti.com.................................................................................................................................................... SGLS322DMAY 2006REVISED NOVEMBER 2008  
TIMING DIAGRAM  
A
B
C
D
E
F
G
V
DD  
V
IT  
< 1.1 V  
MR  
t
t
RESET  
t
t
d
t
d
t
d
Undefined  
Output  
Undefined  
Output  
Absolute Maximum Ratings  
over operating free-air temperature range (unless otherwise noted)  
(1)  
VDD  
Supply voltage(2)  
7 V  
All other pins(2)  
–0.3 V to 7 V  
5 mA  
IOL  
IOH  
IIK  
Maximum low output current  
Maximum high output current  
Input clamp current (VI < 0 or VI > VDD  
–5 mA  
)
±10 mA  
IOK  
TA  
Output clamp current (VO < 0 or VO > VDD  
Operating free-air temperature range  
Storage temperature range  
)
±10 mA  
–55°C to 125°C  
–65°C to 150°C  
150°C  
Tstg  
TJ  
Maximum junction temperature  
Soldering temperature  
260°C  
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating  
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) All voltage values are with respect to GND. For reliable operation, the device must not be continuously operated at 7 V for more than  
t = 1000 h.  
Copyright © 2006–2008, Texas Instruments Incorporated  
Submit Documentation Feedback  
5
Product Folder Link(s): TPS3836E18-EP / J25-EP / H30-EP / L30-EP / K33-EP TPS3837E18-EP / J25-EP / L30-EP /  
K33-EP TPS3838E18-EP / J25-EP / L30-EP / K33-EP  
TPS3836E18-EP / J25-EP / H30-EP / L30-EP / K33-EP  
TPS3837E18-EP / J25-EP / L30-EP / K33-EP  
TPS3838E18-EP / J25-EP / L30-EP / K33-EP  
SGLS322DMAY 2006REVISED NOVEMBER 2008.................................................................................................................................................... www.ti.com  
Thermal Resistance Table  
RESISTANCE  
θJC (°C/W)  
HIGH  
130.9  
205.6  
LOW  
148.1  
347  
θJA (°C/W)  
Recommended Operating Conditions  
MIN  
1.6  
MAX  
6
UNIT  
V
VDD  
VI  
Supply voltage  
Input voltage  
0
VDD + 0.3  
V
VIH  
VIL  
High-level input voltage  
Low-level input voltage  
0.7 × VDD  
V
0.3 × VDD  
100  
V
Δt/Δv  
TA  
Input transition rise and fall rate at MR  
Operating free-air temperature  
ns/V  
°C  
–55  
125  
Electrical Characteristics  
over recommended operating conditions (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX UNIT  
VDD = 3.3 V, IOH = –2 mA  
VDD = 6 V, IOH = –3 mA  
VDD = 2 V, IOH = –1 mA  
VDD = 3.3 V, IOH = –2 mA  
VDD = 2 V, IOL = 1 mA  
VDD = 3.3 V, IOL = 2 mA  
VDD = 3.3 V, IOL = 2 mA  
VDD = 6 V, IOL = 3 mA  
RESET  
(TPS3836)  
High-level output  
voltage  
VOH  
0.8 × VDD  
V
RESET  
(TPS3837)  
RESET  
(TPS3836/8)  
Low-level output  
voltage  
VOL  
0.4  
0.2  
V
V
RESET  
(TPS3837)  
TPS3836/8  
TPS3837  
VDD 1.1 V, IOL = 50 µA  
Power-up reset  
voltage(1)  
TA = 25°C  
0.8 × VDD  
0.6 × VDD  
1.64  
VDD 1.1 V, IOH = –50 µA  
TA = Full range  
TPS383xE18  
TPS383xJ25  
TPS383xH30  
TPS383xL30  
1.71  
2.25  
2.79  
2.64  
2.93  
2.93  
30  
1.73  
2.31  
2.85  
2.71  
3.1  
2.16  
Negative-going  
input threshold  
voltage(2)  
2.7  
VIT  
V
2.54  
TA = 25°C  
2.82  
TPS383xK33  
TA = Full range  
1.7 V < VIT < 2.5 V  
2.5 V < VIT < 3.5 V  
3.5 V < VIT < 5 V  
2.72  
3.2  
Vhys Hysteresis at VDD input  
40  
mV  
50  
TA = 25°C  
–30  
–20  
–60  
–60  
–90  
–120  
25  
(3)  
(3)  
MR  
MR = 0.7 × VDD, VDD = 6 V  
CT = VDD = 6 V  
µA  
nA  
µA  
High-level input  
current  
IIH  
TA = Full range  
CT  
MR  
CT  
–25  
TA = 25°C  
–130  
–90  
–200  
–200  
–340  
–350  
25  
MR = 0 V, VDD = 6 V  
Low-level input  
current  
IIL  
TA = Full range  
CT = 0 V, VDD = 6 V  
–25  
nA  
nA  
High-level output  
current  
IOH  
TPS3838  
VDD = VIT + 0.2 V, VOH = VDD  
25  
(1) The lowest voltage at which RESET output becomes active, tr, VDD 15 µs/V  
(2) To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 µF) should be placed near the supply terminal.  
(3) If manual reset is unused, MR should be connected to VDD to minimize current consumption.  
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Product Folder Link(s): TPS3836E18-EP / J25-EP / H30-EP / L30-EP / K33-EP TPS3837E18-EP / J25-EP / L30-EP /  
K33-EP TPS3838E18-EP / J25-EP / L30-EP / K33-EP  
TPS3836E18-EP / J25-EP / H30-EP / L30-EP / K33-EP  
TPS3837E18-EP / J25-EP / L30-EP / K33-EP  
TPS3838E18-EP / J25-EP / L30-EP / K33-EP  
www.ti.com.................................................................................................................................................... SGLS322DMAY 2006REVISED NOVEMBER 2008  
Electrical Characteristics (continued)  
over recommended operating conditions (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
TA = 25°C  
MIN  
TYP  
MAX UNIT  
220  
500  
VDD > VIT, VDD < 3 V  
VDD > VIT, VDD > 3 V  
VDD < VIT  
TA = Full range  
TA = 25°C  
600  
nA  
250  
10  
550  
IDD  
Supply current  
TA = Full range  
TA = 25°C  
650  
25  
µA  
30  
TA = Full range  
Internal pullup resistor at MR  
Input capacitance at MR, CT  
33  
5
kΩ  
CI  
VI = 0 V to VDD  
pF  
Timing Requirements  
RL = 1 M, CL = 50 pF, TA = 25°C  
PARAMETER  
TEST CONDITIONS  
TYP UNIT  
At VDD  
VIH = VIT + 0.2 V, VIL = VIT – 0.2 V  
6
1
µs  
µs  
tw  
Pulse width  
At MR  
VDD VIT + 0.2 V, VIL = 0.3 × VDD, VIH = 0.7 × VDD  
Switching Characteristics  
RL = 1 M, CL = 50 pF, TA = 25°C  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP MAX UNIT  
CT = GND  
CT = VDD  
5
10  
200  
10  
15  
V
DD VIT + 0.2 V, MR = 0.7 × VDD  
,
td  
Delay time  
ms  
See timing diagram  
Propagation (delay)  
VDD to RESET delay VIL = VIT – 0.2 V, VIH = VIT + 0.2 V  
tPHL time, high- to low-level (TPS3836,  
µs  
VIL = 1.6 V  
50  
10  
50  
output  
TPS3838)  
Propagation (delay)  
tPLH time, low- to high-level  
output  
VIL = VIT – 0.2 V, VIH = VIT + 0.2 V  
VIL = 1.6 V  
VDD to RESET delay  
(TPS3837)  
µs  
µs  
µs  
Propagation (delay)  
MR to RESET delay  
tPHL time, high- to low-level (TPS3836,  
V
DD VIT + 0.2 V, VIL = 0.3 × VDD, VIH = 0.7 × VDD  
DD VIT + 0.2 V, VIL = 0.3 × VDD, VIH = 0.7 × VDD  
0.3  
0.3  
output  
TPS3838)  
Propagation (delay)  
tPLH time, low- to high-level  
output  
MR to RESET delay  
(TPS3837)  
V
Copyright © 2006–2008, Texas Instruments Incorporated  
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Product Folder Link(s): TPS3836E18-EP / J25-EP / H30-EP / L30-EP / K33-EP TPS3837E18-EP / J25-EP / L30-EP /  
K33-EP TPS3838E18-EP / J25-EP / L30-EP / K33-EP  
TPS3836E18-EP / J25-EP / H30-EP / L30-EP / K33-EP  
TPS3837E18-EP / J25-EP / L30-EP / K33-EP  
TPS3838E18-EP / J25-EP / L30-EP / K33-EP  
SGLS322DMAY 2006REVISED NOVEMBER 2008.................................................................................................................................................... www.ti.com  
TYPICAL CHARACTERISTICS  
Table of Graphs  
FIGURE  
IDD  
Supply current  
vs Supply voltage  
2
3
4
5
6
7
IMR  
VOL  
VOH  
Manual reset current  
vs Manual reset voltage  
vs Low-level output current  
vs High-level output current  
vs Free-air temperature  
vs VDD threshold overdrive  
Low-level output voltage  
High-level output voltage  
Normalized reset threshold voltage  
Minimum pulse duration at VDD  
SUPPLY CURRENT  
vs  
SUPPLY VOLTAGE  
MANUAL RESET CURRENT  
vs  
MANUAL RESET VOLTAGE  
100  
10  
8
V
= 6 V  
DD  
MR = Open  
CT = GND  
CT = GND  
T
= 85°C  
= 25°C  
A
0
−100  
−200  
−300  
−400  
−500  
T
A
= −40°C  
T
= 0°C  
T
A
A
6
T
= 0°C  
A
T
A
= 25°C  
4
T
A
= 85°C  
T
A
= −40°C  
2
0
−2  
0
2
4
6
0
2
4
6
V
MR  
− Manual Reset Voltage − V  
V
DD  
− Supply Voltage − V  
Figure 2.  
Figure 3.  
8
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Copyright © 2006–2008, Texas Instruments Incorporated  
Product Folder Link(s): TPS3836E18-EP / J25-EP / H30-EP / L30-EP / K33-EP TPS3837E18-EP / J25-EP / L30-EP /  
K33-EP TPS3838E18-EP / J25-EP / L30-EP / K33-EP  
TPS3836E18-EP / J25-EP / H30-EP / L30-EP / K33-EP  
TPS3837E18-EP / J25-EP / L30-EP / K33-EP  
TPS3838E18-EP / J25-EP / L30-EP / K33-EP  
www.ti.com.................................................................................................................................................... SGLS322DMAY 2006REVISED NOVEMBER 2008  
LOW-LEVEL OUTPUT VOLTAGE  
vs  
LOW-LEVEL OUTPUT CURRENT  
HIGH-LEVEL OUTPUT VOLTAGE  
vs  
HIGH-LEVEL OUTPUT CURRENT  
2.0  
1.5  
1.0  
0.5  
0.0  
2.0  
1.5  
1.0  
0.5  
0.0  
V
= 2 V  
DD  
V
= 2 V  
DD  
MR = Open  
CT = GND  
MR = Open  
CT = GND  
T
= 85°C  
A
T
= 25°C  
A
T
= 25°C  
A
T = 0°C  
A
T
A
= 85°C  
T
= 0°C  
A
T
= −40°C  
A
T
A
= −40°C  
0
1
2
3
4
5
6
7
0
1
2
3
4
5
I
− Low-Level Output Current − mA  
I
− High-Level Output Current − mA  
OL  
OH  
Figure 4.  
Figure 5.  
NORMALIZED RESET THRESHOLD VOLTAGE  
MINIMUM PULSE DURATION AT VDD  
vs  
vs  
FREE-AIR TEMPERATURE  
VDD THRESHOLD OVERDRIVE  
1.001  
1
22  
20  
18  
16  
14  
12  
10  
8
MR = Open  
CT = GND  
T
= 25°C  
A
0.999  
0.998  
0.997  
CT = GND  
MR = Open  
6
4
0.996  
0.995  
2
0
−40  
−15  
10  
35  
60  
85  
0
0.2 0.4 0.6 0.8  
1
1.2 1.4 1.6 1.8  
2
T
A
− Free-Air Temperature − °C  
V
DD  
− Threshold Overdrive − V  
Figure 6.  
Figure 7.  
Copyright © 2006–2008, Texas Instruments Incorporated  
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Product Folder Link(s): TPS3836E18-EP / J25-EP / H30-EP / L30-EP / K33-EP TPS3837E18-EP / J25-EP / L30-EP /  
K33-EP TPS3838E18-EP / J25-EP / L30-EP / K33-EP  
PACKAGE OPTION ADDENDUM  
www.ti.com  
8-Dec-2008  
PACKAGING INFORMATION  
Orderable Device  
2T36L30MDBVREPG4  
TPS3836J25MDBVTEP  
TPS3836L30MDBVREP  
TPS3837K33MDBVREP  
TPS3837K33QDBVREP  
V62/06637-09XE  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
SOT-23  
DBV  
5
5
5
5
5
5
5
5
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
V62/06637-15XE  
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
V62/06637-17XE  
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
V62/06637-22XE  
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
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incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
OTHER QUALIFIED VERSIONS OF TPS3836J25-EP, TPS3836L30-EP, TPS3837K33-EP :  
Catalog: TPS3836J25, TPS3836L30, TPS3837K33  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
8-Dec-2008  
Automotive: TPS3836J25-Q1, TPS3836L30-Q1, TPS3837K33-Q1  
NOTE: Qualified Version Definitions:  
Catalog - TI's standard catalog product  
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Dec-2008  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0 (mm)  
B0 (mm)  
K0 (mm)  
P1  
W
Pin1  
Diameter Width  
(mm) W1 (mm)  
(mm) (mm) Quadrant  
TPS3836J25MDBVTEP SOT-23  
TPS3836L30MDBVREP SOT-23  
TPS3837K33MDBVREP SOT-23  
TPS3837K33QDBVREP SOT-23  
DBV  
DBV  
DBV  
DBV  
5
5
5
5
250  
180.0  
180.0  
180.0  
180.0  
9.0  
9.0  
9.0  
9.0  
3.15  
3.15  
3.15  
3.15  
3.2  
3.2  
3.2  
3.2  
1.4  
1.4  
1.4  
1.4  
4.0  
4.0  
4.0  
4.0  
8.0  
8.0  
8.0  
8.0  
Q3  
Q3  
Q3  
Q3  
3000  
3000  
3000  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Dec-2008  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
TPS3836J25MDBVTEP  
TPS3836L30MDBVREP  
TPS3837K33MDBVREP  
TPS3837K33QDBVREP  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBV  
DBV  
DBV  
DBV  
5
5
5
5
250  
182.0  
182.0  
182.0  
182.0  
182.0  
182.0  
182.0  
182.0  
20.0  
20.0  
20.0  
20.0  
3000  
3000  
3000  
Pack Materials-Page 2  
IMPORTANT NOTICE  
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