TPS40090PWRG4 [TI]
HIGH-FREQUENCY, MULTIPHASE CONTROLLER; 高频率，多相控制器
| 型号： | TPS40090PWRG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | HIGH-FREQUENCY, MULTIPHASE CONTROLLER |
| 文件： | 总31页 (文件大小：962K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS40090
PW
RHD
TPS40091
www.ti.com
SLUS578B –OCTOBER 2003–REVISED MAY 2006
HIGH-FREQUENCY, MULTIPHASE CONTROLLER
Check for Samples: TPS40090, TPS40091
1
FEATURES
PW PACKAGE
(TOP VIEW)
2
•
•
•
Two-, Three-, or Four-Phase Operation
5-V to 15-V Operating Range
1
24
CS1
CS2
EN/SYNC
VIN
Programmable Switching Frequency Up to
1-MHz/Phase
2
23
22
21
20
19
18
17
16
15
14
13
3
CS3
BP5
4
•
Current Mode Control With Forced Current
Sharing(1)
CS4
PWM1
PWM2
PWM3
PWM4
GND
5
CSCN
ILIM
6
(1)
Patent pending.
7
DROOP
REF
8
•
•
•
•
•
•
•
1% Internal 0.7-V Reference
Resistive Divider Set Output Voltage
True Remote Sensing Differential Amplifier
Resistive or DCR Current Sensing
Current Sense Fault Protection
Programmable Load Line
9
COMP
FB
RT
10
11
12
SS
DIFFO
VOUT
PGOOD
GNDS
RHD PACKAGE
(BOTTOM VIEW)
Compatible with UCC37222 Predictive Gate
Drive™ Technology Drivers
•
•
•
•
24-Pin Space-Saving TSSOP Package
28-Pin QFN Package
28
27
26
25
24
23
22
8
9
FB
CS2
CS1
DIFFO
TPS40090: Binary Outputs
TPS40091: 3-State Outputs
10 VOUT
11 NC
NC
NC
12
GNDS
EN/SYNC
APPLICATIONS
13
PGOOD
VIN
14
NC
BP5
•
•
•
•
Internet Servers
Network Equipment
Telecommunications Equipment
DC Power Distributed Systems
DESCRIPTION
The TPS4009x is a two-, three-, or four-phase programmable synchronous buck controller that is optimized for
low-voltage, high-current applications powered by a 5-V to 15-V distributed supply. A multi-phase converter offers
several advantages over a single power stage including lower current ripple on the input and output capacitors,
faster transient response to load steps, improved power handling capabilities, and higher system efficiency.
Each phase can be operated at a switching frequency up to 1-MHz, resulting in an effective ripple frequency of
up to 4-MHz at the input and the output in a four-phase application. A two-phase design operates 180 degrees
out-of-phase, a three-phase design operates 120 degrees out-of-phase, and a four-phase design operates 90
degrees out-of-phase as shown in Figure 1.
The number of phases is programmed by connecting the de-activated phase PWM output to the output of the
internal 5-V LDO. In two-phase operation the even phase outputs should be de-activated.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
Predictive Gate Drive is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2006, Texas Instruments Incorporated
TPS40090
TPS40091
SLUS578B –OCTOBER 2003–REVISED MAY 2006
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DESCRIPTION CONTINUED
The TPS4009x uses fixed frequency, peak current mode control with forced phase current balancing. When
compared to voltage mode control, current mode results in a simplified feedback network and reduced input line
sensitivity. Phase current is sensed by using either current sense resistors installed in series with output
inductors or, for improved efficiency, by using the DCR (direct current resistance) of the filter inductors. The latter
method involves generation of a current proportional signal with an R-C circuit (shown in Figure 10).
The R-C values are selected by matching the time constants of the R-C circuit and the inductor; R-C = L/DCR.
With either current sense method, the current signal is amplified and superimposed on the amplified voltage error
signal to provide current mode PWM control.
An output voltage droop can be programmed to improve the transient window and reduce size of the output filter.
Other features include a single voltage operation, a true differential sense amplifier, a programmable current
limit, soft-start and a power good indicator.
SIMPLIFIED TWO-PHASE APPLICATION DIAGRAM
TPS40090PW
R
CS3
2
4
3
5
CS2
CS3
C
CS3
CS4
14
PGOOD
CSCN
C
BP5
22 BP5
C
CS1
R
CS1
6
1
ILIM
CS1
VIN
V
IN
(4.5 V to 15 V)
17 GND
C
SS
23
15
C
IN
SS
R
R
ILIM2
L1
R
RT
TI
16
7
RT
Synchronous
Buck
R
DROOP
21
PWM1
DROOP
Driver
ILIM1
BP5
8
REF
C
REF
20
18
PWM2
PWM4
24
9
EN/SYNC
COMP
R
C
FB1
FB3
L2
10 FB
TI
Synchronous
Buck
R
FB1
V
OUT
(0.7 V to 3.5 V)
PWM3 19
R
FB2
Driver
11 DIFFO
C
OUT
13
12
GNDS
VOUT
2
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Product Folder Link(s): TPS40090 TPS40091
TPS40090
TPS40091
www.ti.com
SLUS578B –OCTOBER 2003–REVISED MAY 2006
ORDERING INFORMATION
TA
PACKAGE(1)
OUTPUT
PART NUMBER
TPS40090PW
Binary
Plastic TSSOP (PW)(2)
3-State
TPS40091PW
40°C to 85°C
TPS40090RHDR
TPS40091RHDR
QFN (RHD)(3)
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
(2) The PWP package is available taped and reeled. Add a R suffix to the device type (i.e., TPS40090PWR).
(3) The RHD package is available taped and reeled. Add a R suffix to the device type (i.e., TPS40090RHDR) to order quantities of 3000
parts per reel. Add a T suffix to the device type (i.e., TPS40090RHDT) to order quantities of 250 parts per reel.
ABSOLUTE MAXIMUM RATING
over operating free-air temperature range unless otherwise noted(1)
TPS40090
TPS40091
EN/SYNC, VIN,
16.5 V
VIN
Input voltage range
Output voltage range
CS1, CS2, CS3, CS4, CSCN, DROOP, FB, GNDS, ILIM, VOUT
REF, COMP, DIFFO, PGOOD, SS, RT, PWM1, PWM2, PWM3, PWM4, BP5
-0.3 V to 6 V
-0.3 V to 6 V
-40°C to 125°C
-5°C to 150°C
VOUT
TJ
Operating junction temperature range
Storage temperature
Tstg
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
MIN NOM
MAX UNIT
VIN
TA
Input voltage
4.5
-40
15
85
V
Operating free-air temperature
°C
Copyright © 2003–2006, Texas Instruments Incorporated
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ELECTRICAL CHARACTERISTICS
TA = -40°C to 85°C, VIN = 12 V, R(RT) = 64.9 kΩ, TJ = TA (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
INPUT SUPPLY
VIN
VIN
VIN
IIN
Operating voltage range, VIN
UVLO
UVLO(1)
4.5
4.25
4.1
15
Rising VIN
Falling VIN
4.45
4.35
10
V
Shutdown current, VIN
Quiescent current switching
2
4
μA
IIN
Four channels, 400 kHz each, no load
6
mA
OSCILLATOR/SYNCHRONIZATION
Phase frequency accuracy
Phase frequency set range(1)
Synchronization frequency range(1)
Synchronization input threshold(1)
PWM
Four channels, RRT = 64.9 kΩ
Four channels
370
100
800
415
455
1200
9600
kHz
V
Four channels
Four channels
VBP5/2
4-phase operation
87.5%
83.3%
Maximum duty cycle per channel
2- and 3-phase operation
Minimum duty cycle per channel(1)
Minimum controllable on-time(1)
ERROR AMPLIFIER
0
50
100
ns
Feedback input voltage
0.693
2.5
0.700
25
0.707
150
V
Feedback input bias current
VFB = 0.7 V
nA
VOH
VOL
High-level output voltage
low-level output voltage
Gain bandwidth(1)
ICOMP = -1 mA
ICOMP = 1 mA
2.9
0.5
5
V
0.8
GBW
AVOL
MHz
dB
Open loop gain(1)
90
SOFT START
ISS
Soft-start source current
3.5
5
6
μA
VSS
Soft-start clamp voltage
0.95
1.00
1.05
V
ENABLE
Enable threshold voltage
Enable voltage capability(1)
0.8
2
2.5
V
VIN(max)
PWM OUTPUT
PWM pull-up resistance
IOH = 5 mA
IOL = 10 mA
3-State
27
27
45
45
1
Ω
PWM pull-down resistance
PWM output leakage(1) (2)
Ilkg
μA
5V REGULATOR
VOUT Output voltage
External ILOAD = 2 mA on BP5
4.8
10
5
5.2
200
30
V
Pass device voltage drop
Short circuit current
VIN = 4.5 V, No external load on BP5
mV
mA
(1) Specified by design. Not production tested.
(2) TPS40091 only.
4
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TPS40091
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SLUS578B –OCTOBER 2003–REVISED MAY 2006
ELECTRICAL CHARACTERISTICS (continued)
TA = -40°C to 85°C, VIN = 12 V, R(RT) = 64.9 kΩ, TJ = TA (unless otherwise noted)
PARAMETER
CURRENT SENSE AMPLIFIER
Gain transfer
TEST CONDITIONS
MIN
TYP
5.4
0
MAX UNIT
100 mV ≤ V(CS) ≤ 100 mV, VCSRTN = 1.5 V
VCS = 100 mV
4.9
-4%
-3.5
0
5.9
4%
3.5
4
V/V
Gain variance between phases
Input offset variance at zero current
Input common mode(3)
Bandwidth(3)
VCS = 0 V
mV
V
18
MHz
DIFFERENTIAL AMPLIFIER
Gain
1
V/V
Gain tolerance
VOUT 4 V vs 0.7 V, VGNDS = 0 V
-0.5%
60
0.5%
CMRR Common mode rejection ratio(3)
Bandwidth(3)
0.7 V ≤ VOUT ≤ 4 V
dB
5
MHz
RAMP
Ramp amplitude(3)
0.4
0.5
0.6
V
POWER GOOD
PGOOD high threshold
PGOOD low threshold
wrt VREF
10%
14%
-10%
0.60
80
wrt VREF
-14%
VOL
Ilkg
Low-level output voltage
PGOOD output leakage
IPGOOD = 4 mA
VPGOOD = 5 V
0.35
50
V
μA
OUTPUT OVERVOLTAGE/UNDERVOLTAGE FAULT
VOV
VUV
Overvoltage threshold voltage
Undervoltage threshold voltage
VFBK relative to VREF
VFBK relative to VREF
15%
19%
-18%
-14%
LOAD LINE PROGRAMMING
IDROOP Pull-down current on DROOP
4-phase, VCS = 100 mV
40
μA
(3) Specified by design. Not production tested.
Copyright © 2003–2006, Texas Instruments Incorporated
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Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
BP5
RHD
PW
Output of an internal 5V regulator. A 4.7-μF capacitor should be connected from this pin to ground. For 5V applications,
22
22
O
this pin should be connected to VDD.
COMP
CS1
7
27
28
1
9
1
2
3
4
5
O
I
Output of the error amplifier. The voltage at this pin determines the duty cycle for the PWM.
Used to sense the inductor current in the phases. Inductor current can be sensed with an external current sense
resistor or by using an external circuit and the inductor's DC resistance. They are also used for overcurrent protection
and forced current sharing between the phases.
CS2
I
CS3
I
CS4
2
I
CSCN
3
I
Common point of current sense resistors or filter inductors
Output of the differential amplifier. The voltage at this pin represents the true output voltage without drops that result
from high current in the PCB traces
DIFFO
9
5
11
7
O
I
DROOP
Used to program droop function. A resistor between this pin and the REF pin sets the desired droop value.
A logic high signal on this input enables the controller operation. A pulsing signal to this pin synchronizes the main
oscillator to the rising edge of an external clock source. These pulses must be of higher frequency than the free
running frequency of the main oscillator set by the resistor from the RT pin.
EN/SYNC
FB
24
8
24
10
I
I
Inverting input of the error amplifier. In closed loop operation, the voltage at this pin is the internal reference level of
700 mV. This pin is also used for the PGOOD and OVP comparators.
GND
17
12
17
13
Ground connection to the device.
GNDS
I
I
Inverting input of the differential amplifier. This pin should be connected to ground at the point of load.
Used to set the cycle-by-cycle current limit threshold. If ILIM threshold is reached, the PWM cycle is terminated and the
converter delivers limited current to the output. Under these conditions the undervoltage threshold is reached
eventually and the controller enters the hiccup mode. The controller stays in hiccup mode for seven consecutive cycles.
At the eighth cycle the controller attempts a full start-up sequence.
ILIM
4
6
PGOOD
PWM1
PWM2
PWM3
PWM4
REF
13
21
20
19
18
6
14
21
20
19
18
8
O
O
O
O
O
O
I
Power good indicator of the output voltage. This open-drain output connects to the supply via an external resistor.
Phase shifted PWM outputs which control the external drivers. The high output signal commands a PWM cycle. The
low output signal commands controlled conduction of the synchronous rectifiers. These pins are also used to program
various operating modes as follows: for three-phase mode, PWM4 is connected to 5 V; for two-phase mode, PWM2
and PWM4 are connected to 5 V.
Output of an internal 0.7-V reference voltage.
RT
16
23
10
15
16
23
12
15
Connecting a resistor from this pin to ground sets the oscillator frequency.
Power input for the chip. De-coupling of this pin is required.
VIN
I
VOUT
SS
I
Noninverting input of the differential amplifier. This pin should be connected to VOUT at the point of load.
Provides user programmable soft-start by means of a capacitor connected to the pin.
I
11, 14,
25, 26
NC
-
-
No connect pins
6
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Product Folder Link(s): TPS40090 TPS40091
TPS40090
TPS40091
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SLUS578B –OCTOBER 2003–REVISED MAY 2006
FUNCTIONAL BLOCK DIAGRAM
RT
16
TPS40090PW
COMP
9
CLOCK
FB 10
+
5 mA
+
01
21 PWM1
A = -(K +Y)
B = +1
A
SS 15
DROOP
7
8
I
DROOP
B
02
1/N
REF
+
700 mV
+
20 PWM2
PH2
PH4
A
B
A
B
A
DIFFO 11
GNDS 13
VOUT 12
03
04
+
+
19 PWM3
+
18 PWM4
CSCN
CS1
CS2
CS3
CS4
5
1
2
3
4
PHDET
I
PH1
gM
+
PH2
PH4
I
PH2
gM
I
I
I
I
+
PH1
PH2
PH3
PH4
B
23 VIN
22 BP5
17 GND
Σ IPH x K
5V
REG
I
CURRENT
LIMIT
PH3
gM
+
POWER
GOOD
PH2
PH4
I
PH4
gM
+
14
16
24
18
PGOOD
ILIM
EN/SYNC
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APPLICATION INFORMATION
FUNCTIONAL DESCRIPTION
The TPS4009x is a multiphase, synchronous, peak current mode, buck controller. The controller uses external
gate drivers to operate N-channel power MOSFETs. The controller can be configured to operate in a two-, three-,
or four-phase power supply.
The controller accepts current feedback signals from either current sense resistors placed in series with the filter
inductors or current proportional signals derived from the inductors' DCR.
Other features include an LDO regulator with UVLO to provide single voltage operation, a differential input
amplifier for precise output regulation, user programmable operation frequency for design flexibility, external
synchronization capability, programmable pulse-by-pulse overcurrent protection, output overvoltage protection,
and output undervoltage shutdown.
DIFFERENTIAL AMPLIFIER
The unity gain differential amplifier with high bandwidth allows improved regulation at a user-defined point and
eases layout constraints. The output voltage is sensed between the VOUT and GNDS pins. The output voltage
programming divider is connected to the output of the amplifier (DIFFO). The differential amplifier can be used
only for output voltages lower then 3.3 V.
If there is no need for a differential amplifier, or if the output voltage required is higher than 3.3-V, the differential
amplifier can be disabled by connecting the GNDS pin to the BP5 pin. The voltage programming divider in this
case should be connected directly to the output of the converter.
CURRENT SENSING AND BALANCING
The controller employs a peak current-mode control scheme, which naturally provides a certain degree of current
balancing. With current mode, the level of current feedback should comply with certain guidelines depending on
duty factor, known as slope compensation to avoid sub-harmonic instability. This requirement can prohibit
achieving a higher degree of phase current balance. To avoid the controversy, a separate current loop that
forces phase currents to match is added to the proprietary control scheme. This effectively provides high degree
of current sharing independently of properties of controller's small signal response.
High-bandwidth current amplifiers can accept as an input voltage either voltage drop across dedicated precise
current-sense resistors, or inductor's DCR voltage derived by an R-C network, or thermally compensated voltage
derived from the inductor's DCR. The wide range of current-sense settings eases the cost and complexity
constraints and provides performance superior to those found in controllers using low-side MOSFET current
sensing.
8
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TPS40091
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SLUS578B –OCTOBER 2003–REVISED MAY 2006
SETTING CONTROLLER CONFIGURATION
By default, the controller operates at four-phase configuration. The alternate number of active phases is
programmed by connecting unused PWM outputs to BP5. (See Figure 1) For example, for three-phase
operation, the unused fourth phase output, PWM4, should be connected to BP5. For two-phase operation, the
second, PWM2, and the fourth, PWM4, outputs should be connected to BP5.
POWER UP
Capacitors connected to the BP5 pin and the soft-start pin set the power-up time. When EN is high, the capacitor
connected to the BP5 pin gets charged by the internal LDO as shown in Figure 2.
4.5 C
BP5
t
+
BPS
*3
8 10
(1)
EN
1
2
BP5
4-Phase
Operation
3
4
SS
1.0
0.7
1
2
3
4
3-Phase
Operation
VOUT
BP5
PGOOD
1
2
3
4
t - Time
BP5
2-Phase
Operation
BP5
Figure 1. Programming Controller Configuration
Figure 2. Power-Up Waveforms
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When the BP5 pin voltage crosses its lower undervoltage threshold and the power-on reset function is cleared,
the calibrated current source starts charging the soft start capacitor. The PGOOD pin is held low during the start
up. The rising voltage across the capacitor serves as a reference for the error amplifier assuring start-up in a
closed loop manner. When the soft start pin voltage reaches the level of the reference voltage VREF = 0.7 V, the
converter's output reaches the regulation point and further rise of the soft start voltage has no effect on the
output.
0.7 C
SS
t
+
SS
*6
5 10
(2)
When the soft-start voltage reaches level of 1 V, the power good (PGOOD) function is cleared and reported on
the PGOOD pin. Normally, the PGOOD pin goes high at this moment. The time from when SS begins to rise to
when PGOOD is reported is:
t
+ 1.43 T
SS
PG
(3)
OUTPUT VOLTAGE PROGRAMMING
The converter output voltage is programmed by the R1/R2 divider from the output of the differential amplifier. The
center point of the divider is connected to the inverting output of the error amplifier (FB), as shown in Figure 5.
R1
R2
ǒ Ǔ
V
+ 0.7 V
) 1
OUT
(4)
CURRENT SENSE FAULT PROTECTION
Multiphase controllers with forced current sharing are inherently sensitive to failure of a current sense
component. In the event of such failure, the whole load current can be steered with catastrophic consequences
into a single channel where the fault has happened. The dedicated circuit in the TPS4009x controller prevents it
from starting up if any current sense pin is open or shorted to ground. The current-sense fault detection circuit is
active only during device initialization, and it does not provide protection should a current-sense failure happen
during normal operation.
OVERVOLTAGE PROTECTION
If the voltage at the FB pin (VFB) exceeds VREF by more than 16%, the TPS4009x enters into an overvoltage
state. In this condition, the output signals from the controller to the external drivers is pulled low, causing the
drivers to force all of the upper MOSFETs to the OFF position and all the lower MOSFETs to the ON position. As
soon as VFB returns to regulation, the normal operating state resumes.
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OVERCURRENT PROTECTION
The overcurrent function monitors the voltage level separately on each current sense input and compares it to
the voltage on the ILIM pin set by a divider from the controller's reference. In case a threshold of V(ILIM)/2.7 is
exceeded the PWM cycle on the associated phase is terminated. The voltage level on the ILIM pin is determined
by the following expression:
V
+ 2.7 I
R
ILIM
PH(max)
CS
(5)
ǒV
IN
2 L f
Ǔ
* V
V
OUT
OUT
I
+ I
)
PH(max)
OUT
V
IN
SW
where:
•
•
IPH(max) is a maximum value of the phase current allowed
RCS is a value of the current sense resistor used
(6)
If the overcurrent condition continues, each phase's PWM cycle is terminated by the overcurrent signals. This
puts a converter in a constant current mode with the output current programmed by the ILIM voltage. Eventually,
the supply and demand equilibrium on the converter output fails and the output voltage declines. When the
undervoltage threshold is reached, the converter enters a hiccup mode. The controller is stopped and the output
is not regulated any more, the softstart pin function changes. It now serves as a timing capacitor for a fault
control circuit. The soft-start pin is periodically charged and discharged by the fault control circuit. After seven
hiccup cycles expire, the controller attempts to restore normal operation. If the overload condition is not cleared,
the controller stays in the hiccup mode indefinitely. In such conditions, the average current delivered to the load
is roughly 1/8 of the set overcurrent value.
UNDERVOLTAGE PROTECTION
If the FB pin voltage falls lower than the undervoltage protection threshold (84.5%), the controller enters the
hiccup mode as it is described in the Overcurrent Protection section.
FAULT-FREE OPERATION
If the SS pin voltage is prevented from rising above the 1-V threshold, the controller does not execute nor report
most faults and the PGOOD output remains low. Only the overcurrent function and current-sense fault remain
active. The overcurrent protection continues to terminate PWM cycle every time when the threshold is exceeded
but the hiccup mode is not entered.
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SETTING THE SWITCHING FREQUENCY
The clock frequency is programmed by the value of the timing resistor connected from the RT pin to ground.
3
*1.041
PH
ǒ39.2 10 f
* 7Ǔ
R
+ K
PH
RT
(7)
where:
KPH is a coefficient that depends on the number of active phases. For two-phase and three-phase
configurations, KPH= 1.333. For four-phase configurations, KPH= 1. fPH is a single phase frequency, kHz. The
RT resistor value is returned by the last expression in kΩ.
To calculate the output ripple frequency, use the following equation:
F
+ N f
PH PH
RPL
where:
•
NPH is a number of phases used in the converter.
(8)
The switching frequency of the controller can be synchronized to an external clock applied to the EN/SYNC pin.
The external frequency should be somewhat higher than the free-running clock frequency for synchronization to
take place.
SWITCHING FREQUENCY
vs
TIMING RESISTANCE
10000
100
0
50
100
150
200
250
300
R
T
- Timing Resistance - kΩ
Figure 3.
12
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SETTING THE OUTPUT VOLTAGE DROOP
In many applications, the output voltage of the converter is intentionally allowed to droop as load current
increases. This approach (sometimes referred to as active load line programming) allows for better use of the
regulation window and reduces the amount of the output capacitors required to handle the same load current
step. A resistor from the REF pin to the DROOP pin sets the desired value of the output voltage droop.
2500 N V
2500 N V
V
PH
DROOP
CS
PH DROOP
REF
OUT
R2
R1 ) R2
R
+
+
DROOP
I
R
V
V
) V
) V
) V
CS4
OUT
CS1
CS2
CS3
where:
(9)
•
•
•
•
•
VDROOP is the value of droop at maximum load current IOUT
NPH is number of phases
RCS is the current-sense resistor value
2500 Ω is the inversed value of transconductance from the current sense pins to DROOP
VCSx, are the average voltages on the current sense pins
OUTPUT VOLTAGE
GNDS
Differential
Amplifier
vs
OUTPUT CURRENT
13
12
11
9
VOUT
DIFFO
COMP
+
VOUT
VDROOP
R1
I
DROOP
C1
Error
R3 FB
DROOP
Amplifier
10
7
+
R2
I
DROOP
R
DROOP
0
IOUT(max)
REF
IOUT - Output Current - A
8
700 mV
Figure 4.
Figure 5.
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FEEDBACK LOOP COMPENSATION
The TPS4009x operates in a peak current mode and the converter exhibits a single pole response with ESR zero
for which Type II compensation network is usually adequate, as shown in Figure 7.
The following equations show where the load pole and ESR zero calculations are situated.
1
1
f
+
f
+
OP
ESRZ
2p R
C
2p R
C
OUT
OUT
ESR OUT
(10)
To achieve desired bandwidth the error amplifier must compensate for modulator gain loss on the crossover
frequency and this is facilitated by placing the zero over the load pole. The ESR zero alters the modulator's -1
slope at higher frequencies. To compensate for that alteration, the pole in-error amplifier transfer function should
be added at frequency of the ESR zero as shown in Figure 6.
Figure 6.
The following equations help in choosing components of the error amplifier compensation network. Fixing the
value of the resistor R1 first is recommended as it simplifies further adjustments of the output voltage without
altering the compensation network.
*GOMAG
R2 + R1 10ǒ Ǔ;
1
1
20
C1 +
C2 +
ǒ
R2Ǔ;
ǒ
R2Ǔ
2p F
2p F
OP
ESRZ
where:
•
GOMAG is the control to output gain at desired system crossover frequency.
(11)
Introduction of output voltage droop as a measure to reduce amount of filter capacitors changes the transfer
function of the modulator as it is shown in the Figure 8.
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GAIN AND PHASE
vs
FREQUENCY WITH DROOP
GAIN AND PHASE
vs
FREQUENCY WITHOUT DROOP
80
60
80
60
Converter Overall
EA
40
20
40
20
Type II
Droop Zero
Modulator
0
0
Load Pole
Load Pole
ESR Zero
-20
-20
ESR Zero
-40
-40
200
200
150
100
50
150
Phase
100
50
0
0
-50
-50
-100
10
-100
10
100
1 k
10 k
100 k
1 M
100
1 k
10 k
100 k
1 M
f - Frequency - Hz
f - Frequency - Hz
Figure 7.
Figure 8.
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The droop function, as well as the output capacitor ESR, introduces zero on some frequency left of the crossover
point.
1
F
+
DROOPZ
V
DROOP
ǒ Ǔ
2p
C
OUT
I
OUT(max)
(12)
To compensate for this zero, pole on the same frequency should be added to the error amplifier transfer function.
With Type II compensation network a new value for the capacitor C2 is required compared to the case without
droop.
C1
C2 +
2p R2 C1 ǒF
* 1Ǔ
DROOPZ
(13)
When attempting to close the feedback loop at frequency that is near the theoretical limit, use the above
considerations as a first approximation and perform on bench measurements of closed loop parameters as
effects of switching frequency proximity and finite bandwidth of voltage and current amplifiers may substantially
alter them as it is shown in Figure 9.
GAIN AND PHASE
vs
FREQUENCY
60
50
40
80
Phase
60
40
20
30
20
10
0
Gain
0
V
V
= 12 V
= 1.5 V
= 100 A
IN
OUT
-10
I
OUT
-20
100
-20
1 M
1 k
10 k
100 k
f - Frequency - Hz
Figure 9.
16
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THERMAL COMPENSATION OF DCR CURRENT SENSING
Inductor DCR current sensing is a known lossless technique to retrieve a current proportional signal. Equation 14
and Equation 15 show the calculation used to determine the DCR voltage drop for any given frequency. (See
Figure 10)
DCR
DCR w L
+ ǒV
Ǔ
V
* V
DCR
IN
OUT
(14)
1
+ ǒV
Ǔ
* V
OUT
V
C
IN
1
w C ǒR )
Ǔ
wC
(15)
Voltage across the capacitor is equal to voltage drop across the inductor DCR, VC = VDCR when time constant of
the inductor and the time constant of the R-C network are equal:
DCR
DCR ) w L DCR
1
L
V
+
;
+ R C;
t
+ t
DCRL RC
w C ǒR ) Ǔ +
C
1
wC
(16)
The output signal generated by the network shown in Figure 10 is temperature dependant due to positive thermal
coefficient of copper specific resistance as determined using Equation 17. The temperature variation of the
inductor coil can exceed 100°C in a practical application leading to approximately 40% variation in the output
signal and in turn, respectively move the overcurrent threshold and the load line.
(
)
K(T) + 1 ) 0.0039 T * 25
(17)
The relatively simple network shown in Figure 11 (made of passive components including one NTC resistor) can
provide almost complete compensation for copper thermal variations.
L
DCR
C
R
R2
R1
R
NTC
R
THE
Figure 10.
Figure 11.
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The following algorithm and expressions help to determine components of the network.
1. Calculate the equivalent impedance of the network at 25°C that matches the inductor parameters in
Equation 18. Use of COG type capacitors for this application is recommended. For example, for L = 0.4 μH,
DCR = 1.22 mΩ, C = 10 nF; RE = 33.3 kΩ. It is recommended to keep RE < 50 kΩ as higher values may
produce false triggering of the current sense fault protection.
L
DCR
C
R +
E
(18)
2. It is necessary to set the network attenuation value KDIV(25) at 25°C. For example, KDIV(25) = 0.85. The
attenuation values KDIV(25) > 0.9 produces higher values for NTC resistors that are harder to get from
suppliers. Attenuation values lower 0.7 substantially reduce the network output signal.
3. Based on calculated RE and KDIV(25) values, calculate and pick the closest standard value for the resistor R
= RE/KDIV(25). For the given example R = 33 kΩ/ 0.85 = 38.8 kΩ. The closest standard value from 1% line is
R = 39.2 kΩ.
4. Pick two temperature values at which curve fitting is made. For example T1 = 50°C and T2 = 90°C.
5. Find the relative values of RTHE required on each of these temperatures.
R
(T1)
R
(T2)
THE
THE
THE
THE
R
+
R
+
THE1
THE2
R
(25)
R
(25)
(19)
(20)
K
(T)
K
(25)
DIV
DIV
R +
R
K
(T) +
DIV
T
1 * K (T)
1 ) 0.0039 (t * 25)
DIV
For the given example RTHE1= 0.606, RTHE2=0.372.
6. From the NTC resistor datasheet get the relative resistance for resistors with desired curve. For the given
example and curve 17 for NTHS NTC resistors from Vishay RNTC1= 0.3507 and RNTC2= 0.08652.
7. Calculate relative values for network resistors including the NTC resistor.
ǒR
Ǔ
ǒ1 * RNTC2Ǔ ) R
ǒ1 * RNTC1Ǔ
E1
* R
R R * R
R
R
NTC2
NTC1
NTC2
E1
E2
NTC1
E2
R1
+
R
ǒ1 * RNTC2Ǔ * R
ǒ1 * RNTC1Ǔ * ǒR
NTC1
NTC2Ǔ
* R
R
R
R
NTC1
E1
NTC2
E2
(21)
*1
R
NTC1
1
+ ǒ1 * R
Ǔ
ƪ
ƫ
R2
*
R
NTC1
1 * R1
R
* R1
R
R
E1
(22)
(23)
*1
ǒ
RǓ*1 * ǒR2RǓ*1
+ ƪ1 * R1
ƫ
RNTC
R
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For the given example R1R= 0.281, R2R = 2.079, and RNTCR = 1.1.
8. Calculate the absolute value of the NTC resistor as RTHE(25). In given example RNTC = 244.3 kΩ.
9. Find a standard value for the NTC resistor with chosen curve type. In case the close value does not exist in a
desired form factor or curve type. Chose a different type of the NTC resistor and repeat steps 6 to 9. In the
example, the NTC resistor with the part number NTHS0402N17N2503J with RNTCS(25) = 250 kΩ is close
enough to the calculated value.
10. Calculate a scaling factor for the chosen NTC resistor as a ratio between selected and calculated NTC value
and. In the example k = 1.023.
RNTC
S
k +
RNTC
C
(24)
11. Calculate values of the remaining network resistors.
ƪǒ(
RǓƫ
)
(25) 1 * k ) k R1
R1 + R
C
THE
(25)
For the given example, R1C= 58.7 kΩ and R2C = 472.8 kΩ. Pick the closest available 1% standard values:
R1 = 39.2 kΩ, and R2 = 475 kΩ, thus completing the design of the thermally compensated network for the
DCR current sensor.
Figure 12 illustrates the fit of the designed network to the required function.
CURRENT SENSE IMPEDANCE
vs
AMBIENT TEMPERATURE
40
r
Measured
Acquired
30
20
10
r
r
r
10 20
40
60
80
100
120
T
A
- Ambient Temperature - °C
Figure 12.
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Operation with Output Voltages Higher Than 3.3 V
The TPS40090/91 controllers are designed to operate in power supplies with output voltages ranging from 0.7 V
to 3.3 V. To support higher output voltages, mainly in 12 V to 5 V power supplies, the BP5 voltage needs to be
increased slightly to provide enough headroom to ensure linearity of current sense amplifiers. The simple circuit
on Figure 13 shows a configuration that generates a 6-V voltage source to power the controller with increased
bias voltage. Both the VIN and BP5 pins should be connected to this voltage source. The differential amplifier
normally excessive for higher-output voltages can be disabled by connecting GNDS pin to the BP5 pin.
12 V
TPS4009x
1.1 kW
EN/SYNC 24
13.7 kW
VIN 23
6 V
BP5 22
4.7 mF
TLA431
10 kW
Figure 13. Biasing the TPS4009x with a 5-V Power Supply
High-Impedance State of TPS40091 Outputs
The TPS40091 controller has 3-state enabled outputs to interface various gate drivers and DRMOS devices
capable of turning all MOSFETs in the power supply into high-impedance state while remaining active. The
common binary output commands the control MOSFET on when the PWM signal is high. Alternatively, the
synchronous MOSFET is commanded on when the PWM signal is low.
The 3-state output can command both MOSFETs off when the PWM output is in the high-impedance state. This
feature simplifies design of power supplies capable of starting into precharged output or allows in VR modules
use of gate drivers that do not have the enable input to put VR module off line. Some DRMOS devices like the
Philips PIP202 are also compatible with 3-state outputs of the multiphase controller.
The TPS40091 outputs have high impedance when the EN pin is high but the soft-start sequence has not been
initiated yet. The output impedance is also high when controller is in undervoltage fault condition or disabled.
Figure 14 shows a 12-V, 80-A, all-ceramic power supply capable to start into precharged outputs.
DESIGN EXAMPLE
A design example is available. See the TPS40090EVM−001 user’s guide (SLUU175).
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Figure 14. 12-V, 80-A ASIC All-Ceramic, Power Supply
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PACKAGE OPTION ADDENDUM
www.ti.com
8-Dec-2009
PACKAGING INFORMATION
Orderable Device
TPS40090PW
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TSSOP
PW
24
24
24
24
28
28
28
28
24
24
24
24
28
28
28
28
60 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS40090PWG4
TPS40090PWR
TSSOP
TSSOP
TSSOP
VQFN
PW
PW
60 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS40090PWRG4
TPS40090RHDR
TPS40090RHDRG4
TPS40090RHDT
TPS40090RHDTG4
TPS40091PW
PW
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
RHD
RHD
RHD
RHD
PW
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
VQFN
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
VQFN
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
VQFN
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
VQFN
60 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS40091PWG4
TPS40091PWR
PW
60 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PW
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS40091PWRG4
TPS40091RHDR
TPS40091RHDRG4
TPS40091RHDT
TPS40091RHDTG4
PW
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
RHD
RHD
RHD
RHD
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
VQFN
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
VQFN
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
VQFN
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
8-Dec-2009
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS40090 :
Automotive: TPS40090-Q1
•
NOTE: Qualified Version Definitions:
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS40090PWR
TPS40090RHDR
TPS40090RHDT
TPS40091PWR
TPS40091RHDR
TPS40091RHDT
TSSOP
VQFN
VQFN
TSSOP
VQFN
VQFN
PW
RHD
RHD
PW
24
28
28
24
28
28
2000
3000
250
330.0
330.0
180.0
330.0
330.0
180.0
16.4
12.4
12.4
16.4
12.4
12.4
6.95
5.3
8.3
5.3
5.3
8.3
5.3
5.3
1.6
1.5
1.5
1.6
1.5
1.5
8.0
8.0
8.0
8.0
8.0
8.0
16.0
12.0
12.0
16.0
12.0
12.0
Q1
Q2
Q2
Q1
Q2
Q2
5.3
2000
3000
250
6.95
5.3
RHD
RHD
5.3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS40090PWR
TPS40090RHDR
TPS40090RHDT
TPS40091PWR
TPS40091RHDR
TPS40091RHDT
TSSOP
VQFN
VQFN
TSSOP
VQFN
VQFN
PW
RHD
RHD
PW
24
28
28
24
28
28
2000
3000
250
367.0
367.0
210.0
367.0
367.0
210.0
367.0
367.0
185.0
367.0
367.0
185.0
38.0
35.0
35.0
38.0
35.0
35.0
2000
3000
250
RHD
RHD
Pack Materials-Page 2
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