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TPS4H000-Q1

ZHCSET1B –DECEMBER 2015–REVISED MARCH 2018

TPS4H000-Q1 40V、1000mΩ 四通道智能高侧开关

1 特性

•

诊断：

–

过流和接地短路检测

1

•

符合汽车应用标准

具有符合 AEC-Q100 标准的下列特性：

负载开路和电池短路检测

用于实现快速中断的全局故障

–

器件温度 1 级：–40°C 至 125°C 的环境工作温

度范围

•

20 引脚耐热增强型 PWP 封装

器件人体放电模型 (HBM) 静电防护 (ESD) 分类

等级 H2

2 应用

器件 CDM ESD 分类等级 C4B

•

四通道 LED 驱动器

•

具有丰富诊断功能的四通道 1000mΩ 智能高侧开关

适用于子模块的四通道高侧开关

四通道高侧继电器驱动器

–

版本 A：开漏状态输出

版本 B：电流检测模拟输出

3 说明

•

宽工作电压范围：3.4V 至 40V

超低待机电流：< 500nA

高精度电流检测：

TPS4H000-Q1 系列是受到全面保护的四通道智能高侧

开关，具有集成式 1000mΩ NMOS 功率 FET。

–

> 5mA 负载下为 ±15%

该器件具有丰富的诊断功能和高精度电流检测功能，

可对负载进行智能控制。

•

可使用外部电阻调节电流限值，> 100mA 的负载条

件下为 ±20%

该器件可从外部调节电流限值以限制浪涌或过载电流，

从而提升整个系统的可靠性。

保护：

–

通过（内部或外部）电流限制实现接地短路保护

具有锁闭选项的热关断以及热调节

感性负载负电压钳位，已优化转换率

失地保护和失电保护

器件信息⁽¹⁾

器件型号

封装

通道

TPS4H000-Q1 版本A

TPS4H000-Q1 版本B

HTSSOP (20)

4

(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附

录。

典型应用原理图

驱动具有可调节电流限制的电容性负载

3.4-V to 40-V

Supply Voltage

VS

IN1, 2, 3, 4

LED Strings

Relays

DIAG_EN

THER

OUT1

OUT2

OUT3

OUT4

SEH

SEL

ST1

ST2

Sub-Modules:

Cameras, Sensors

FAULT ST3

CS

CL

ST4

General Resistive, Capacitive,

Inductive Loads

GND

1

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

English Data Sheet: SLVSD73

TPS4H000-Q1

ZHCSET1B –DECEMBER 2015–REVISED MARCH 2018

www.ti.com.cn

8.3 Feature Description................................................. 14

8.4 Device Functional Modes........................................ 24

Application and Implementation ........................ 26

9.1 Application Information............................................ 26

9.2 Typical Application ................................................. 26

1

2

3

4

5

6

7

特性.......................................................................... 1

应用.......................................................................... 1

说明.......................................................................... 1

修订历史记录 ........................................................... 2

Device Comparison Table..................................... 3

Pin Configuration and Functions......................... 3

Specifications......................................................... 5

7.1 Absolute Maximum Ratings ...................................... 5

7.2 ESD Ratings.............................................................. 5

7.3 Recommended Operating Conditions....................... 5

7.4 Thermal Information ................................................. 6

7.5 Electrical Characteristics........................................... 6

7.6 Switching Characteristics.......................................... 8

7.7 Typical Characteristics............................................ 10

Detailed Description ............................................ 13

8.1 Overview ................................................................. 13

8.2 Functional Block Diagram ....................................... 14

9

10 Power Supply Recommendations ..................... 29

11 Layout................................................................... 29

11.1 Layout Guidelines ................................................. 29

11.2 Layout Examples................................................... 29

12 器件和文档支持 ..................................................... 31

12.1 接收文档更新通知 ................................................. 31

12.2 社区资源................................................................ 31

12.3 商标....................................................................... 31

12.4 静电放电警告......................................................... 31

12.5 Glossary................................................................ 31

13 机械、封装和可订购信息....................................... 31

8

4 修订历史记录

注：之前版本的页码可能与当前版本有所不同。

Changes from Revision A (October 2016) to Revision B

Page

•

Added footnote 2 to the Electrical Characteristics table ........................................................................................................ 7

Added reverse current protection information to the Reverse-Current Protection section .................................................. 23

Changes from Original (December 2015) to Revision A

Page

•

已将数据表状态由“产品预览”改为“量产数据” .......................................................................................................................... 1

2

TPS4H000-Q1

www.ti.com.cn

ZHCSET1B –DECEMBER 2015–REVISED MARCH 2018

5 Device Comparison Table

PART NUMBER

FAULT REPORTING MODE

Open-drain digital output

TPS4H000-Q1 Version A

TPS4H000-Q1 Version B

Current-sense analog output

6 Pin Configuration and Functions

PWP PowerPAD™ Package

20-Pin HTSSOP With Exposed Thermal Pad

TPS4H000-Q1 Version A Top View

IN1

IN2

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

OUT1

OUT2

VS

IN3

IN4

VS

ST1

ST2

ST3

ST4

CL

OUT3

OUT4

NC

Thermal

Pad

NC

THER

DIAG_EN

GND

Not to scale

NC – No internal connection

3

TPS4H000-Q1

ZHCSET1B –DECEMBER 2015–REVISED MARCH 2018

www.ti.com.cn

PWP PowerPAD Package

20-Pin HTSSOP With Exposed Thermal Pad

TPS4H000-Q1 Version B Top View

IN1

IN2

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

OUT1

OUT2

VS

IN3

IN4

VS

SEH

SEL

FAULT

CS

OUT3

OUT4

NC

Thermal

Pad

NC

CL

THER

DIAG_EN

GND

Not to scale

NC – No internal connection

Pin Functions

NO.

I/O

DESCRIPTION

NAME

VERSION A VERSION B

Adjustable current limit. Connect to device GND if external current limit is not

used.

CL

9

O

CS

—

8

O

I

Current-sense output

DIAG_EN

11

Enable-disable pin for diagnostics; internal pulldown

Global fault report with open-drain structure, ORed logic for quad-channel fault

conditions

FAULT

—

7

O

GND

IN1

10

1

10

1

—

I

Ground pin

Input control for channel 1 activation; internal pulldown

Input control for channel 2 activation; internal pulldown

Input control for channel 3 activation; internal pulldown

Input control for channel 4 activation; internal pulldown

No internal connection

IN2

2

I

IN3

3

I

IN4

4

I

NC

13, 14

5

13, 14

—

O

I

ST1

ST2

ST3

ST4

SEH

SEL

THER

OUT1

OUT2

OUT3

OUT4

VS

Open-drain diagnostic status output for channel 1

Open-drain diagnostic status output for channel 2

Open-drain diagnostic status output for channel 3

Open-drain diagnostic status output for channel 4

CS channel-selection bit; internal pulldown

6

—

7

—

8

—

12

20

19

16

15

17, 18

5

6

I

CS channel-selection bit; internal pulldown

12

20

19

16

15

17, 18

I

Thermal shutdown behavior control, latch off or auto-retry; internal pulldown

Output of the channel 1 high side-switch, connected to the load

Output of the channel 2 high side-switch, connected to the load

Output of the channel 3 high side-switch, connected to the load

Output of the channel 4 high side-switch, connected to the load

Power supply

O

I

4

TPS4H000-Q1

www.ti.com.cn

ZHCSET1B –DECEMBER 2015–REVISED MARCH 2018

Pin Functions (continued)

NO.

VERSION A VERSION B

I/O

DESCRIPTION

NAME

Thermal

pad

—

Connect to device GND or leave floating

7 Specifications

7.1 Absolute Maximum Ratings

over operating ambient temperature range (unless otherwise noted)

(1)(2)

MIN

MAX

UNIT

V

Supply voltage

t < 400 ms

45

Reverse polarity voltage⁽³⁾

–36

–100

–0.3

–10

–0.3

–30

–2.7

—

V

Current on GND pin

t < 2 minutes

250

7

mA

V

Voltage on INx, DIAG_EN, SEL, and THER pins

Current on INx, DIAG_EN, SEL, and THER pins

Voltage on STx or FAULT pins

Current on STx or FAULT pins

Voltage on CS pin

—

7

mA

V

10

7

mA

V

Current on CS pin

30

7

mA

V

Voltage on CL pin

–0.3

—

Current on CL pin

6

mA

mJ

°C

Inductive load switch-off energy dissipation, single pulse, single channel⁽⁴⁾

Operating junction temperature, T_J

Storage temperature, T_stg

—

40

150

–40

–65

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to the ground plane.

(3) Reverse polarity condition: t < 60 s, reverse current < I_R(2), V_INx= 0 V, all channels reverse, GND pin 1-kΩ resistor in parallel with diode.

(4) Test condition: V_VS= 13.5 V, L = 300 mH, T_J= 150°C. FR4 2s2p board, 2 × 70-μm Cu, 2 × 35-µm Cu. 600 mm²thermal pad copper

area.

7.2 ESD Ratings

VALUE

±4000

±750

UNIT

Human-body model (HBM), per AEC

Q100-002⁽¹⁾

All pins

V_(ESD)

Electrostatic discharge

V

Charged-device model (CDM), per AEC

Q100-011

Corner pins (1, 8, 9, and

16)

±750

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

7.3 Recommended Operating Conditions

over operating ambient temperature range (unless otherwise noted)

MIN

MAX

40

UNIT

V

V_VS

Supply operating voltage

4

0

Voltage on INx, DIAG EN, SEL, and THER pins

Voltage on STx and FAULT pins

Nominal dc load current

5

V

0

5

V

0

0.75

125

A

T_A

Operating ambient temperature

–40

°C

5

TPS4H000-Q1

ZHCSET1B –DECEMBER 2015–REVISED MARCH 2018

www.ti.com.cn

7.4 Thermal Information

TPS4H000-Q1

THERMAL METRIC⁽¹⁾

PWP (HTSSOP)

UNIT

20 PINS

38.5

24.5

20.7

0.7

R_θJA

Junction-to-ambient thermal resistance

°C/W

R_θJC(top)

R_θJB

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

ψ_JT

Junction-to-top characterization parameter

Junction-to-board characterization parameter

Junction-to-case (bottom) thermal resistance

ψ_JB

20.5

1.7

R_θJC(bot)

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

7.5 Electrical Characteristics

5 V < V_VS< 40 V; −40°C < T_J< 150°C, unless otherwise specified)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

OPERATING VOLTAGE

V_VS(nom)

V_VS(uvr)

V_VS(uvf)

V_(uv,hys)

Nominal operating voltage

Undervoltage turnon

4

3.5

3

40

4

V

V_VSrises up

3.7

3.2

0.5

Undervoltage shutdown

V_VSfalls down

3.4

Undervoltage shutdown, hysteresis

OPERATING CURRENT

V_VS= 13.5 V, V_INx= 5 V, V_{DIAG_EN}= 0 V, I_OUTx= 0.1 A,

current limit = 0.5 A, all channels on

I_(op)

Nominal operating current⁽¹⁾

7

mA

µA

V_VS= 13.5 V, V_INx= V_{DIAG_EN}= V_CS= V_CL= V_OUTx

THER = 0 V,

=

0.5

T_J= 25°C

I_(off)

Standby current

V_VS= 13.5 V, V_INx= V_{DIAG_EN}= V_CS= V_CL= V_OUTx

THER = 0 V,

=

3

T_J= 125°C

Standby current with diagnostic

enabled

V_VS= 13.5 V, V_INx= 0 V, V_{DIAG_EN}= 5 V, V_VS– V_OUTx

V_(ol,off), not in open-load mode

>

I_(off,diag)

mA

IN from high to low, if deglitch time > t_(off,deg), the device

enters into standby mode.

t_(off,diag)

I_lkg(out)

Standby mode deglitch time⁽¹⁾

10

12.5

15

2

ms

µA

Output leakage current in off-state

V_VS= 13.5 V, V_INx= V_OUTx= 0, V_{DIAG_EN}= 5 V

POWER STAGE

r_DS(on)

On-state resistance⁽¹⁾

I_CL(int)

V

_VS≥ 3.5 V, T_J= 25°C

_VS≥ 3.5 V, T_J= 150°C

1000

mΩ

V

2000

1.6

Internal current limit

Internal current limit value, CL pin connected to GND

Internal current limit value under thermal shutdown

1

A

0.8

Current limit during thermal

shutdown⁽¹⁾

I_CL(TSD)

External current limit value under thermal shutdown. The

percentage of the external current limit setting value

60%

V_DS(clamp)

Drain-to-source internal clamp voltage

46

65

1

V

OUTPUT DIODE CHARACTERISTICS

V_F

Drain−source diode voltage

IN = 0, I_OUTx= −0.15 A.

0.3

0.8

1

t < 60 s, V_INx= 0 V, T_J= 25°C, single channel reversed,

short-to-battery condition

Continuous reverse current from

source to drain⁽¹⁾

I_R(1),I_R(2)

A

t < 60 s, V_INx= 0 V, GND pin 1-kΩ resistor in parallel with

diode. T_J= 25°C. Reverse-polarity condition, all channels

reversed

1

LOGIC INPUT (INx, DIAG_EN, SEL, THER)

V_IH

V_IL

Logic high-level voltage

Logic low-level voltage

2

V

0.8

250

400

INx, SEL, THER, V_INx= V_SEL= V_THER= 5 V

DIAG_EN. V_VS= V_{DIAG_EN}= 5 V

100

150

175

275

R_(logic,pd)

Logic-pin pulldown resistor

kΩ

(1) Value specified by design, not subject to production test

6

TPS4H000-Q1

www.ti.com.cn

ZHCSET1B –DECEMBER 2015–REVISED MARCH 2018

Electrical Characteristics (continued)

5 V < V_VS< 40 V; −40°C < T_J< 150°C, unless otherwise specified)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

DIAGNOSTICS

Output leakage current under GND

loss condition

I_{lkg(GND_loss)}

V_(ol,off)

100

2.6

µA

V

IN = 0 V, when V_VS– V_OUTx< V_(ol,off), duration longer than

t_(ol,off), then open load is detected, off state

Open-load detection threshold

1.6

300

–75

Open-load detection threshold deglitch IN = 0 V, when V_VS– V_OUTx< V_(ol,off), duration longer than

time (see Figure 3)

t_d(ol,off)

600

800

µs

µA

t_(ol,off), then open load is detected, off state

V_INx= 0 V, V_{DIAG_EN}= 5 V, V_VS= V_OUTx= 13.5 V, T_J

125°C, open load

=

I_(ol,off)

Off-state output sink current

V_OL(STx)

Status low-output voltage

Fault low-output voltage

I_STx= 2 mA, version A only

I_FAULT= 2 mA, version B only

0.2

V

V_OL(FAULT)

Deglitch time when current limit

occurs⁽¹⁾

Thermal shutdown threshold⁽¹⁾

V_INx= V_{DIAG_EN}= 5 V, the deglitch time from current limit

toggling to FAULT, STx, CS report.

t_CL(deg)

T_(SD)

T_(SD,rst)

T_(SW)

80

180

µs

°C

160

175

155

60

Thermal shutdown status reset

threshold⁽¹⁾

Thermal swing shutdown threshold⁽¹⁾

Hysteresis for resetting the thermal

shutdown or thermal swing⁽¹⁾

T_(hys)

10

CURRENT SENSE (Version B) AND CURRENT LIMIT

K_(CS)

K_(CL)

Current-sense ratio

80

300

0.8

Current-limit ratio

Current limit internal threshold⁽¹⁾

V_CL(th)

V

V_VS= 13.5 V, I_OUTx≥ 1 mA

V_VS= 13.5 V, I_OUTx≥ 2 mA

V_VS= 13.5 V, I_OUTx≥ 5 mA

V_VS= 13.5 V, I_OUTx≥ 25 mA

V_VS= 13.5 V, I_OUTx≥ 100 mA

V_VS= 13.5 V, I_(limit)≥ 50 mA

–70%

–45%

–15%

–5%

70%

45%

15%

5%

dK_(CS)

K_(CS)

/

Current-sense accuracy, (I_CS× K_(CS)

I_OUTx) /I_OUTx× 100

–

–3%

3%

–25%

–20%

–15%

–10%

0

25%

20%

15%

10%

4

External current limit accuracy⁽²⁾

(I_OUTx– I_CL× K_(CL)) × 100 / (I_CL× K_(CL)

I

_(limit)≥ 100 mA

_(limit)≥ 200 mA

dK_(CL)/ K_(CL)

)

I

V_VS= 13.5 V, 0.5 A ≤ I_(limit)≤ 0.9 A

_VS≥ 6.5 V

V

V_CS(lin)

I_OUTx(lin)

V_CS(H)

Current-sense voltage linear range⁽¹⁾

Output-current linear range⁽¹⁾

V

A

V_VS

–

5 V ≤ V_VS< 6.5 V

0

2.5

0.75

0.5

V_VS= 13.5 V, V_CS(lin)≤ 4 V

0

5 V ≤ V_VS< 6.5 V, V_CS(lin)≤ V_VS– 2.5 V

V_VS≥ 7 V, fault mode

4.5

6.5

V

Current sense pin output voltage⁽¹⁾

Current-sense pin output current

Min(V_VS– 2,

4.5)

5 V ≤ V_VS< 7 V, fault mode

V_CS= 4.5 V, V_VS= 13.5 V

V_{DIAG_EN}= 0 V, T_J= 125ºC

6.5

0.5

I_CS(H)

15

mA

µA

Current-sense leakage current in

disabled mode

I_lkg(CS)

(2) External current limit accuracy is only applicable to overload conditions greater than 1.5 x the current limit setting

7

TPS4H000-Q1

ZHCSET1B –DECEMBER 2015–REVISED MARCH 2018

www.ti.com.cn

7.6 Switching Characteristics

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Delay time, V_OUTx10% after V_INx↑ (See

Figure 1.)

V_VS= 13.5 V, V_{DIAG_EN}= 5 V, I_OUTx= 0.1 A, IN rising

edge to 10% of V_OUTx

t_d(on)

10

30

60

µs

Delay time, V_OUTx90% after V_INx↓ (See

Figure 1.)

V_VS= 13.5 V, V_{DIAG_EN}= 5 V, I_OUTx= 0.1 A, IN falling

edge to 90% of V_OUTx

t_d(off)

10

0.1

0.3

30

0.25

0.5

60

0.5

0.9

µs

V_VS= 13.5 V, V_{DIAG_EN}= 5 V, I_OUTx= 0.1 A, V_OUTxfrom

10% to 90%

dV/dt(on)

dV/dt(off)

Turnon slew rate

Turnoff slew rate

V/µs

V_VS= 13.5 V, V_{DIAG_EN}= 5 V, I_OUTx= 0.1 A, V_OUTxfrom

90% to 10%

V_VS= 13.5 V, I_L= 0.1 A. t_{d, rise}is the IN rising edge to

V_OUTx= 90%.

t_d(match)

t_d(rise)– t_d(fall)(See Figure 1.)

–60

60

µs

t_d(fall)is the IN falling edge to V_OUTx= 10%.

CURRENT-SENSE CHARACTERISTICS (See Figure 2.)

V_VS= 13.5 V, V_INx= 5 V, I_OUTx= 0.1 A. current limit = 0.5

t_CS(off1)

t_CS(on1)

t_CS(off2)

t_CS(on2)

t_SEL

CS settling time from DIAG_EN disabled⁽¹⁾

CS settling time from DIAG_EN enabled⁽¹⁾

CS settling time from IN falling edge

CS settling time from IN rising edge

20

µs

A. DIAG_EN falling edge to 10% of V_CS

.

V_VS= 13.5 V, V_INx= 5 V, I_OUTx= 0.1 A. current limit is 0.5

A. DIAG_EN rising edge to 90% of V_CS

.

V_VS= 13.5 V, V_{DIAG_EN}= 5 V, I_OUTx= 0.1 A. current limit =

0.5 A. IN falling edge to 10% of V_CS

70

V_VS= 13.5 V, V_{DIAG_EN}= 5 V, I_OUTx= 0.1 A. current limit =

0.5 A. IN rising edge to 90% of V_CS

40

120

50

Multi-sense transition delay from channel to V_{DIAG_EN}= 5 V, current sense output delay when multi-

channel sense pin SEL transitions from channel to channel

(1) Value specified by design, not subject to production test

V_INx

90%

dV/dt(off)

10%

dV/dt(on)

V_OUTx

10%

t_d(on)

t_d(off)

t_d(rise)

t_d(fall)

Figure 1. Output Delay Characteristics

V_INx

I_OUTx

V_{DIAG_EN}

V_CS

t_CS(on2)

t_CS(off1)

t_CS(on1)

t_CS(off2)

Figure 2. CS Delay Characteristics

8

TPS4H000-Q1

www.ti.com.cn

ZHCSET1B –DECEMBER 2015–REVISED MARCH 2018

Open Load

V_INx

V_CS(H)

V_CS

t_d(ol,off)

V_STx,V_FAULT

t_d(ol,off)

Figure 3. Open-Load Blanking-Time Characteristics

SEL

t_SEL

V_CS(CH2)

V_CS(CH1)

V_CS

Figure 4. Multi-Sense Transition Delay

9

TPS4H000-Q1

ZHCSET1B –DECEMBER 2015–REVISED MARCH 2018

www.ti.com.cn

7.7 Typical Characteristics

1.6

1.5

1.4

1.3

1.2

1.1

1

4.5

4

3.5

3

2.5

2

1.5

1

IN1 High

IN1 Low

IN2 High

IN2 Low

IN3 High

IN3 Low

IN4 High

IN4 Low

UVLO High

UVLO Low

0.5

0

-45 -30 -15

0

15 30 45 60 75 90 105 120 135

-45 -30 -15

0

15 30 45 60 75 90 105 120 135

Ambient Temperature (èC)

D004

D001

Figure 5. UVLO Voltage Threshold

Figure 6. INx Voltage Threshold

1.7

1.6

1.5

1.4

1.3

1.2

1.1

1

1.6

1.5

1.4

1.3

1.2

1.1

1

DIAG_EN High

DIAG_EN Low

SEL High

SEL Low

SEH High

SEH Low

-45 -30 -15

0

15 30 45 60 75 90 105 120 135

-45 -30 -15

0

15 30 45 60 75 90 105 120 135

Ambient Temperature (èC)

D002

D003

A

Figure 7. DIAG_EN Voltage Threshold

Figure 8. SEL and SEH Voltage Thresholds

0.9

0.85

0.8

59

58

57

56

55

54

53

52

51

50

OUT1

OUT2

OUT3

OUT4

0.75

0.7

0.65

0.6

Ch 1

Ch 2

Ch 3

Ch 4

0.55

0.5

-45 -30 -15

0

15 30 45 60 75 90 105 120 135

-45 -30 -15

0

15 30 45 60 75 90 105 120 135

Ambient Temperature (èC)

D006

D005

Figure 10. Drain-to-Source Clamp Voltage

Figure 9. Body-Diode Forward Voltage

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Typical Characteristics (continued)

1.8

1.6

1.4

1.2

1

1.8

1.6

1.4

1.2

1

0.8

0.6

0.4

0.2

0

0.8

0.6

0.4

0.2

0

3.5 V

5 V

40 V

3.5 V

5 V

40 V

-45 -30 -15

0

15 30 45 60 75 90 105 120 135

-45 -30 -15

0

15 30 45 60 75 90 105 120 135

Ambient Temperature (èC)

D007

D008

Figure 11. Channel-1 FET On-Resistance

Figure 12. Channel-2 FET On-Resistance

1.8

1.6

1.4

1.2

1

1.8

1.6

1.4

1.2

1

0.8

0.6

0.4

0.2

0

0.8

0.6

0.4

0.2

0

3.5 V

5 V

40 V

3.5 V

5 V

40 V

-45 -30 -15

0

15 30 45 60 75 90 105 120 135

-45 -30 -15

0

15 30 45 60 75 90 105 120 135

Ambient Temperature (èC)

D009

D010

Figure 13. Channel-3 FET On-Resistance

Figure 14. Channel-4 FET On-Resistance

8

7

6

5

4

3

2

1

0

1.8

1.6

1.4

1.2

1

Ch 1

Ch 2

Ch 3

Ch 4

Ch 2

Ch 3

Ch 4

0.8

0.6

0.4

0.2

0

-0.2

-0.4

-45 -30 -15

0

15 30 45 60 75 90 105 120 135

0

15 30 45 60 75 90 105 120 135

Ambient Temperature (èC)

D011

D012

Figure 15. Current-Sense Ratio at 5 mA

Figure 16. Current-Sense Ratio at 25 mA

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Typical Characteristics (continued)

1

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

Ch 1

Ch 2

Ch 3

Ch 4

Ch 1

Ch 2

Ch 3

Ch 4

0.8

0.6

0.4

0.2

0

-0.1

-0.2

-0.3

-0.4

-0.2

-0.4

-45 -30 -15

0

15 30 45 60 75 90 105 120 135

-45 -30 -15

0

15 30 45 60 75 90 105 120 135

Ambient Temperature (èC)

D013

D014

Figure 17. Current-Sense Ratio at 50 mA

Figure 18. Current-Sense Ratio at 100 mA

2

1

2

1

Ch 1

Ch 2

Ch 3

Ch 4

Ch 2

Ch 3

Ch 4

0

-1

-2

-3

-4

-5

-6

-1

-2

-3

-4

-45 -30 -15

0

15 30 45 60 75 90 105 120 135

-45 -30 -15

0

15 30 45 60 75 90 105 120 135

Ambient Temperature (èC)

D015

D016

Figure 19. Current-Limit Ratio at 50 mA

Figure 20. Current-Limit Ratio at 100 mA

1.5

1

0.5

0

Ch 1

Ch 2

Ch 3

Ch 4

Ch 2

Ch 3

Ch 4

0.5

0

-0.5

-1

-0.5

-1

-1.5

-2

-1.5

-2

-2.5

-3

-2.5

-3

-3.5

-4

-3.5

-45 -30 -15

0

15 30 45 60 75 90 105 120 135

Ambient Temperature (èC)

-45 -30 -15

0

15 30 45 60 75 90 105 120 135

Ambient Temperature (èC)

D017

D018

Figure 21. Current-Limit Ratio at 200 mA

Figure 22. Current-Limit Ratio at 500 mA

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8 Detailed Description

8.1 Overview

The TPS4H000-Q1 device is a smart high-side switch, with internal charge pump and quad-channel integrated

NMOS power FETs. Full diagnostics and high-accuracy current-sense features enable intelligent control of the

load. The adjustable current-limit function greatly improves the reliability of whole system. The device has two

versions with different diagnostic reporting, the open-drain digital output (version A) and the current-sense analog

output (version B).

For version A, the device implements the digital fault report with an open-drain structure. When a fault occurs,

the device pulls STx down to GND. A 3.3- or 5-V external pullup is required to match the microcontroller supply

level. The digital status of each channel can report individually, or globally by connecting the STx pins together.

For version B, high-accuracy current sense makes the diagnostics more accurate without further calibration. One

integrated current mirror can source 1 / K_(CS)of the load current. The mirrored current flows into the CS-pin

resistor to become a voltage signal. K_(CS)is a constant value across temperature and supply voltage. A wide

linear region from 0 V to 4 V allows a better real-time load-current monitoring. The CS pin can also report a fault

with pullup voltage of V_CS(H)

.

The external high-accuracy current limit allows setting the current-limit value by applications. When overcurrent

occurs, the device improves system reliability by clamping the inrush current effectively. The device can also

save system cost by reducing the size of PCB traces and connectors, and the capacity of the preceding power

stage. Besides, the device also implements an internal current limit with a fixed value.

For inductive loads (relays, solenoids, valves), the device implements an active clamp between drain and source

to protect itself. During the inductive switching-off cycle, both the energy of the power supply and the load are

dissipated on the high-side switch. The device also optimizes the switching-off slew rate when the clamp is

active, which helps the system design by keeping the effects of transient power and EMI to a minimum.

The TPS4H000-Q1 device is a smart high-side switch for a wide variety of resistive, inductive, and capacitive

loads, including LEDs, relays, and sub-modules.

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8.2 Functional Block Diagram

VS

Internal LDO

Internal Reference

Auxiliary Charge Pump

Output

Clamp

Temperature Sensor

Gate Driver

and

Charge Pump

4

INx

OUT1

OUT2

OUT3

OUT4

Oscillator

Protection

and

Diagnostics

THER

CS

Current

Sense

Current-Sense

Mux

SEH, SEL

CL

ESD

Protection

Current Limit

Reference

FAULT

DIAG_EN

GND

STx

Diagnosis

Temperature

Sensor

4

OTP

8.3 Feature Description

8.3.1 Pin Current and Voltage Conventions

For reference purposes throughout the data sheet, current directions on their respective pins are as shown by

the arrows in Figure 23. All voltages are measured relative to the ground plane.

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Feature Description (continued)

I_INx

I_VS

V_INx

V_STx, V_FAULT

V_{DIAG_EN}

V_CL

V_VS

INx

VS

I_STx

STx,

I_FAULT

FAULT

I_{DIAG_EN}

DIAG_EN

CL

I_OUTx

V_OUTx

OUTx

I_CL

I_CS

V_CS

CS

I_THER

I_SEx

SEL,

SEH

V_THER

V_SEx

THER

GND

I_GND

V_GND

Ground Plane

Figure 23. Voltage and Current Conventions

8.3.2 Accurate Current Sense

High-accuracy current sense is implemented in the version-B device. It allows a better real-time monitoring effect

and more-accurate diagnostics without further calibration.

One integrated current mirror can source 1 / K_(CS)of the load current, and the mirrored current flows into the

external current sense resistor to become a voltage signal. The current mirror is shared by the quad channels.

K_(CS)is the ratio of the output current and the sense current. It is a constant value across the temperature and

supply voltage. Each device is calibrated accurately during production, so post-calibration is not required. See

Figure 24 for more details.

V_BAT

VS

I_OUT/ K_(CS)

I_OUT

OUTx

V_CS(H)

FAULT

2´

CS

R_(CS)

Figure 24. Current-Sense Block Diagram

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Feature Description (continued)

When a fault occurs, the CS pin also works as a fault report with a pullup voltage, V_CS(H). See Figure 25 for more

details.

V_CS

V_CS(H)

V_CS(lin)

Fault Report

Current Monitor

I_OUTx

Normal Operating

On-State: Current Limit, Thermal Fault

Off-State: Open Load or Short to Battery

or Reverse Polarity

Figure 25. Current-Sense Output-Voltage Curve

Use Equation 1 to calculate R_(CS)

.

V

_CS´ K_(CS)

V_CS

I_CS

R_(CS)

=

I_OUTx

(1)

Take the following points into consideration when calculating R_(CS)

.

•

Ensure V_CSis within the current-sense linear region (V_CS, I_OUTx(lin)) across the full range of the load current.

Check R_(CS)with Equation 2.

V_CS(lin)

V_CS

I_CS

R_(CS)

=

£

I_CS

(2)

(3)

•

In fault mode, ensure I_CSis within the source capacity of the CS pin (I_CS(H)). Check R_(CS)with Equation 3.

V_CS(H,min)

V_CS

I_CS

R_(CS)

=

³

I_CS(H,min)

8.3.3 Adjustable Current Limit

A high-accuracy current limit allows high reliability of the design. It protects the load and the power supply from

overstressing during short-circuit-to-GND or power-up conditions. The current limit can also save system cost by

reducing the size of PCB traces and connectors, and the capacity of the preceding power stage.

When a current-limit threshold is hit, a closed loop activates immediately. The output current is clamped at the

set value, and a fault is reported out. The device heats up due to the high power dissipation on the power FET. If

thermal shutdown occurs, the current limit is set to I_CL(TSD)to reduce the power dissipation on the power FET.

See Figure 26 for more details.

The device has two current-limit thresholds.

•

Internal current limit – The internal current limit is fixed at I_CL(int). Tie the CL pin directly to the device GND for

large-transient-current applications.

•

External adjustable current limit – An external resistor is used to set the current-limit threshold. Use the

Equation 4 to calculate the R_(CL). V_CL(th)is the internal band-gap voltage. K_(CL)is the ratio of the output current

and the current-limit set value. It is constant across the temperature and supply voltage. The external

adjustable current limit allows the flexibility to set the current limit value by applications.

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Feature Description (continued)

V_CL(th)

I_OUT

I_CL

=

R_(CL)

K_(CL)

V

_CL(th)´ K_(CL)

R_(CL)

=

I_OUT

(4)

V_BAT

VS

I_OUT/ K_(CL)

Internal Current Limit

‐

+

‐

+

I_OUT

V_CL(th)

2´

OUT

External Current Limit

‐

+

V_CL(th)

CL

Figure 26. Current-Limit Block Diargam

Note that if using a GND network which causes a level shift between the device GND and board GND, the CL

pin must be connected with device GND.

For better protection from a hard short-to-GND condition (when the INx pins are enabled, a short to GND occurs

suddenly), the device implements a fast-trip protection to turn off the related channel before the current-limit

closed loop is set up. The fast-trip response time is less than 1 μs, typically. With this fast response, the device

can achieve better inrush current-suppression performance.

8.3.4 Inductive-Load Switching-Off Clamp

When switching an inductive load off, the inductive reactance tends to pull the output voltage negative. Excessive

negative voltage could cause the power FET to break down. To protect the power FET, an internal clamp

between drain and source is implemented, namely V_DS(clamp)

V_DS(clamp)= V_VS- V_OUT

.

(5)

During the period of demagnetization (t_decay), the power FET is turned on for inductance-energy dissipation. The

total energy is dissipated in the high-side switch. Total energy includes the energy of the power supply (E_(VS)

and the energy of the load (E_(load)). If resistance is in series with inductance, some of the load energy is

dissipated on the resistance.

)

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Feature Description (continued)

E

_(HSS)= E_(VS)+ E_(load)= E_(VS)+ E_(L)- E_(R)

(6)

When an inductive load switches off, E_(HSS)causes high thermal stressing on the device.. The upper limit of the

power dissipation depends on the device intrinsic capacity, ambient temperature, and board dissipation condition.

V_BAT

VS

V_DS(clamp)

IN

L

–

OUT

R

GND

+

Figure 27. Drain-to-Source Clamping Structure

IN

V_VS

V_OUT

V_DS(clamp)

E_(HSS)

I_OUT

t_(decay)

Figure 28. Inductive Load Switching-Off Diagram

From the perspective of the high-side switch, E_(HSS)equals the integration value during the demagnetization

period.

t_(decay)

E_(HSS)

=

V_DS(clamp)´I_OUT(t)dt

ò

0

æ

ö

÷

ø

R´I_OUT(max)+ V_OUT

L

t_(decay)

=

´lnç

ç

è

R

V_OUT

é

ù

ú

æ

ö

÷

ø

R´I_OUT(max)+ V_OUT

V_VS+ V_OUT

ê

E_(HSS)= L ´

´ R´I_OUT(max)- V_OUTlnç

R²

ç

V_OUT

ê

ú

è

ë

û

(7)

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Feature Description (continued)

When R approximately equals 0, E_(HSD)can be given simply as:

V_VS+ V_OUT

1

2

E_(HSS)

=

´L ´I_O²_UT(max

)

V_OUT

(8)

Note that for PWM-controlled inductive loads, it is recommended to add the external free-wheeling circuitry

shown in Figure 29 to protect the device from repetitive power stressing. TVS is used to achieve the fast decay.

See Figure 29 for more details.

VS

Output

Clamp

OUTx

D

GND

L

TVS

Figure 29. Protection With External Circuitry

8.3.5 Fault Detection and Reporting

8.3.5.1 Diagnostic Enable Function

The DIAG_EN pin enables or disables the diagnostic functions. If multiple devices are used, but the ADC

resource is limited in the microcontroller, the MCU can use GPIOs to set DIAG_EN high to enable the

diagnostics of one device while disabling the diagnostics of the other devices by setting DIAG_EN low. In

addition, the device can keep the power consumption to a minimum by setting DIAG_EN and INx low.

8.3.5.2 Multiplexing of Current Sense

For version B, SEL is used to multiplex the shared current-sense function between the two channels. See

Table 1 for more details.

Table 1. Diagnosis Configuration Table

CS ACTIVATED

DIAG_EN

INx

SEH

SEL

CS, FAULT, STx

PROTECTIONS AND DIAGNOSTICS

CHANNEL

H

L

Diagnostics disabled, full protection

Diagnostics disabled, no protection

L

—

High impedance

0

1

0

1

0

1

Channel 1

Channel 2

Channel 3

Channel 4

H

—

See Table 2

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8.3.5.3 Fault Table

Table 2 applies when the DIAG_EN pin is enabled.

Table 2. Fault Table

STx

CS

FAULT

CONDITIONS

Normal

INx

L

OUTx THER CRITERION

FAULT RECOVERY

(VER. A) (VER. B) (VER. B)

L

—

H

0

H

—

In linear

region

H

Current limit

triggered

Overlaod, short to ground

H

L

—

L

V_CS(H)

L

Auto

Open load⁽¹⁾, short to battery,

reverse polarity

V_VS– V_OUTx

V_(ol,off)

<

H

Output auto-retry. Fault

recovers when T_J< T_(SD,rst)or

when INx toggles.

L

Thermal shutdown

Thermal swing

H

—

T_SDtriggered

T_SWtriggered

L

V_CS(H)

L

Output latch off. Fault recovers

when INx toggles.

H

—

V_CS(H)

Auto

(1) An external pullup is required for open-load detection.

8.3.5.4 STx and FAULT Reporting

For version A, two individual STx pins report the fault conditions, each pin for its respective channel. When a

fault condition occurs, it pulls STx down to GND. A 3.3- or 5-V external pullup is required to match the supply

level of the microcontroller. The digital status of each channel can be reported individually, or globally by

connecting all the STx pins together.

For version B, a global FAULT pin is used to monitor the global fault condition among all the channels. When a

fault condition occurs on any channel, the FAULT pin is pulled down to GND. A 3.3-V or 5-V external pullup is

required to match the supply level of the microcontroller.

After the FAULT report, the microcontroller can check and identify the channel in fault status by multiplexed

current sensing. The CS pin also works as a fault report with an internal pullup voltage, V_CS(H)

.

8.3.6 Full Diagnostics

8.3.6.1 Short-to-GND and Overload Detection

When a channel is on, a short to GND or overload condition causes overcurrent. If the overcurrent triggers either

the internal or external current-limit threshold, the fault condition is reported out. The microcontroller can handle

the overcurrent by turning off the switch. The device heats up if no actions are taken. If a thermal shutdown

occurs, the current limit is I_CL(TSD)to keep the power stressing on the power FET to a minimum. The device

automatically recovers when the fault condition is removed.

8.3.6.2 Open-Load Detection

8.3.6.2.1 Channel On

When a channel on, benefiting from the high-accuracy current sense in a small current range, if an open-load

event occurs, it can be detected as an ultralow V_CSand handled by the microcontroller. Note that the detection is

not reported on the STx or FAULT pins. The microcontroller must set the SEL pin to detect the channel-on open-

load fault proactively.

8.3.6.2.2 Channel Off

When a channel is off, if a load is connected, the output is pulled down to GND. But if an open load occurs, the

output voltage is close to the supply voltage (V_VS– V_OUTx< V_(ol,off)), and the fault is reported out.

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There is always a leakage current I_(ol,off)present on the output due to internal logic control path or external

humidity, corrosion, and so forth. Thus, TI recommends an external pullup resistor to offset the leakage current

when an open load is detected. The recommended pullup resistance is 20 kΩ.

V_BAT

Open-Load Detection in Off State

R_(PU)

V_(ol,off)

V_DS

Load

Figure 30. Open-Load Detection in Off-State

8.3.6.3 Short-to-Battery Detection

Short-to-battery has the same detection mechanism and behavior as open-load detection, in both the on-state

and off-state. See Table 2 for more details.

In the on-state, reverse current flows through the FET instead of the body diode, leading to less power

dissipation. Thus, the worst case occurs in the off-state.

•

If V_OUTx– V_VS< V_(F)(body diode forward voltage), no reverse current occurs.

If V_OUTx– V_VS> V_(F), reverse current occurs. The current must be limited to less than I_R(1). Setting an INx pin

high can minimize the power stress on its channel. Also, for external reverse protection, see Reverse-Current

Protection for more details.

8.3.6.4 Reverse Polarity Detection

Reverse polarity detection has the same detection mechanism and behavior as open-load detection both in the

on-state and off-state. See Table 2 for more details.

In the on-state, the reverse current flows through the FET instead of the body diode, leading to less power

dissipation. Thus, the worst case occurs in the off-state. The reverse current must be limited to less than I_R(2)

.

Set the related INx pin high to keep the power dissipation to a minimum. For external reverse-blocking circuitry,

see Reverse-Current Protection for more details.

8.3.6.5 Thermal Fault Detection

To protect the device in severe power stressing cases, the device implements two types of thermal fault

detection, absolute temperature protection (thermal shutdown) and dynamic temperature protection (thermal

swing). Respective temperature sensors are integrated close to each power FET, so the thermal fault is reported

by each channel. This arrangement can help the device keep the cross-channel effect to a minimum when some

channels are in a thermal fault condition.

8.3.6.5.1 Thermal Shutdown

Thermal shutdown is active when the absolute temperature T_J> T_(SD). When thermal shutdown occurs, the

respective output turns off. The THER pin is used to configure the behavior after the thermal shutdown occurs.

•

When the THER pin is low, thermal shutdown operates in the auto-retry mode. The output automatically

recovers when T_J< T_(SD)– T_(hys), but the current is limited to I_CL(TSD)to avoid repetitive thermal shutdown. The

thermal shutdown fault signal is cleared when T_J< T_(SD,rst)or after toggling the related INx pin.

•

When the THER pin is high, thermal shutdown operates in the latch mode. The output latches off when

thermal shutdown occurs. When the THER pin goes from high to low, thermal shutdown changes to auto-retry

mode. The thermal shutdown fault signal is cleared after toggling the related INx pin.

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Thermal swing activates when the power FET temperature is increasing sharply, that is, when ΔT = T_(FET)

–

T_(Logic)> T_(sw), then the output turns off. The output automatically recovers and the fault signal clears when ΔT =

T_(FET)– T_(Logic)< T_(sw)– T_(hys). Thermal swing function improves the device reliability when subjected to repetitive

fast thermal variation. As shown in Figure 31, multiple thermal swings are triggered before thermal shutdown

occurs.

Thermal Behavior After Short to GND

V_THER

V_INx

T_(SD)

T_(SD,rst)

T_(hys)

T_J

T_(hys)

T_(SW)

I_CL

I_OUTx

I_CL(TSD)

V_CS(H)

V_CS

V_FAULT

or V_ST

Figure 31. Thermal Behavior Diagram

8.3.7 Full Protections

8.3.7.1 UVLO Protection

The device monitors the supply voltage V_VS, to prevent unpredicted behaviors when V_VSis too low. When V_VS

falls down to V_VS(uvf), the device shuts down. When V_VSrises up to V_VS(uvr), the device turns on.

8.3.7.2 Loss-of-GND Protection

When loss of GND occurs, output is shut down regardless of whether the INx pin is high or low. The device can

protect against two ground-loss conditions, loss of device GND and loss of module GND.

8.3.7.3 Protection for Loss of Power Supply

When loss of supply occurs, the output is shut down regardless of whether the INx pin is high or low. For a

resistive or a capacitive load, loss of supply has no risk. But for a charged inductive load, the current is driven

from all the I/O pins to maintain the inductance current. To protect the system in this condition, TI recommends

the external free-wheeling diode as shown in Figure 32.

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V_BAT

VS

I/Os

High-Side Switch

MCU

OUT

L

Figure 32. Protection for Loss of Power Supply

8.3.7.4 Reverse-Current Protection

Reverse current occurs in two conditions: short to battery and reverse polarity.

•

When a short to the battery occurs, there is only reverse current through the body diode. I_R(1)specifies the

limit of the reverse current.

•

In a reverse-polarity condition, there are reverse currents through the body diode and the device GND pin.

I_R(2)specifies the limit of the reverse current. The GND pin maximum current is specified in the Absolute

Maximum Ratings.

To protect the device, TI recommends two types of external circuitry.

•

Adding a blocking diode. Both the IC and load are protected when in reverse polarity.

V_BAT

VS

´

OUT

Load

Figure 33. Reverse-Current External Protection, Method 1

•

Adding a GND network. The reverse current through the device GND is blocked. The reverse current through

the FET is limited by the load itself. TI recommends a resistor in parallel with the diode as a GND network.

The recommended selection are 1-kΩ resistor in parallel with an >100-mA diode. If multiple high-side

switches are used, the resistor and diode can be shared among devices. The reverse current protection diode

in the GND network forward voltage should be less than 0.6 V in any circumstances. In addition a minimum

resistance of 4.7 K is recommended on the I/O pins.

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V_BAT

VS

OUT

Load

Figure 34. Reverse-Current External Protection, Method 2

8.3.7.5 MCU I/O Protection

In some severe conditions, such as the ISO7637-2 test or the loss of battery with inductive loads, a negative

pulse occurs on the GND pin This pulse can cause damage on the connected microcontroller. TI recommends

serial resistors to protect the microcontroller, for example, 4.7-kΩ when using a 3.3-V microcontroller and 10-kΩ

for a 5-V microcontroller.

V_BAT

VS

I/Os

High-Side Switch

MCU

OUT

Load

Figure 35. MCU I/O External Protection

8.4 Device Functional Modes

8.4.1 Working Modes

The device has three working modes, the normal mode, the standby mode, and the standby mode with

diagnostics.

Note that IN must be low for t > t_(off,deg)to enter the standby mode, where t_(off,deg)is the standby mode deglitch

time used to avoid false triggering. Figure 36 shows a working-mode diagram.

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Device Functional Modes (continued)

Standby Mode

(INx Low, DIAG Low)

DIAG_EN Low

AND

INx High to Low

for

t > t_(off,deg)

DIAG_EN Low to High

DIAG_EN High to Low

INx Low to High

Standby Mode

With Diagnostics

(INx Low, DIAG High)

INx low to high

Normal Mode

(INx High)

DIAG_EN High

AND

INx High to Low

for

t > t_(off,deg)

Figure 36. Working Modes

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9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

9.1 Application Information

The TPS4H000-Q1 device is capable of driving a wide variety of resistive, inductive, and capacitive loads,

including LEDs, relays, and sub-modules. Full diagnostics and high-accuracy current-sense features enable

intelligent control of the load. An external adjustable current limit improves the reliability of the whole system by

clamping the inrush or overload current.

9.2 Typical Application

The following figure shows an example of the external circuitry connections based on the version-B device.

V_BAT

VS

R_(ser)

INx

R_(ser)

LED Strings

DIAG_EN

R_(ser)

SEL, SEH

OUT1

Relays

OUT2

MCU

5 V

OUT3

Power Module:

Cameras, Sensors

R_(pu)

OUT4

R_(ser)

FAULT

General Resistive, Capacitive,

InductiveLoads

CS

R_(CS)

CL

GND

THER

R_(CL)

Figure 37. Typical Application Diagram

9.2.1 Design Requirements

•

V_VSrange from 9 V to 16 V

Load range is from 0.1 A to 0.25 A for each channel

Current sense for fault monitoring

Expected current-limit value of 0.5 A

Automatic recovery mode when thermal shutdown occurs

Full diagnostics with 5-V MCU

Reverse-voltage protection with a blocking diode in the power-supply line

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Typical Application (continued)

9.2.2 Detailed Design Procedure

To keep the 0.25-A nominal current in the 0 to 4-V current-sense range, calculate the R_(CS)resistor using

Equation 9. To achieve better current-sense accuracy, a 1% tolerance or better resistor is preferred.

V

_CS´ K_(CS)

V_CS

I_CS

4´ 80

R_(CS)

=

= 1280 W

I_OUT

0.25

(9)

To set the adjustable current limit value at 2.5-A, calculate R_(CL)using Equation 10.

V

_CL(th)´ K_(CL)

0.8´300

R_(CL)

=

= 480 W

I_OUT

0.5

(10)

TI recommends R_(ser)= 10 kΩ for 5-V MCU, and R_(pu)= 10 kΩ as the pullup resistor.

9.2.3 Application Curves

Figure 38 shows a test example of soft-start when driving a big capacitive load. Figure 39 shows an expanded

waveform of the output current.

Load current = 0.2 A

Current limit = 0.5 A

C_L= 2.3 mF

CH2 = FAULT

CH3 = output voltage

CH4 = output current

INx = ↑

CH1 = INx

V_S= 12 V

Load current = 0.2 A

Current limit = 0.5 A

C_L= 2.3 mF

CH2 = FAULT

CH3 = output voltage

CH4 = output current

INx = ↑

CH1 = INx

V_VS= 12 V

Figure 38. Driving a Capacitive Load

Figure 39. Driving a Capacitive Load, Expanded Waveform

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Typical Application (continued)

Figure 40 shows a test example of PWM-mode driving. Figure 41 shows the expanded waveform of the rising

edge. Figure 42 shows the expanded waveform of the falling edge.

INx = 200-Hz PWM, 50% duty cycle

V_VS= 13.5 V

CH2 = CS voltage

CH3 = output voltage

CH4 = output current

INx = 200-Hz PWM, 50% duty cycle

V_VS= 13.5 V

CH2 = CS voltage

CH3 = output voltage

CH4 = output current

CH1 = INx signal

Figure 40. PWM Signal Driving

Figure 41. Expanded Waveform of Rising Edge

INx = 200-Hz PWM, 50% duty cycle

V_VS= 13.5 V

CH2 = CS voltage

CH3 = output voltage

CH4 = output current

CH1 = INx signal

Figure 42. Expanded Waveform of Falling Edge

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10 Power Supply Recommendations

The device is qualified for both automotive and industrial applications. The normal power supply connection is a

12-V automotive system or 24-V industrial system. Detailed supply voltage should be within the range specified

in the Recommended Operating Conditions.

11 Layout

11.1 Layout Guidelines

To prevent thermal shutdown, T_Jmust be less than 150°C. The HTSSOP package has good thermal impedance.

However, the PCB layout is very important. Good PCB design can optimize heat transfer, which is absolutely

essential for the long-term reliability of the device.

•

Maximize the copper coverage on the PCB to increase the thermal conductivity of the board. The major heat

flow path from the package to the ambient is through the copper on the PCB. Maximum copper is extremely

important when there are not any heat sinks attached to the PCB on the other side of the package.

•

Add as many thermal vias as possible directly under the package ground pad to optimize the thermal

conductivity of the board.

All thermal vias should either be plated shut or plugged and capped on both sides of the board to prevent

solder voids. To ensure reliability and performance, the solder coverage should be at least 85%.

11.2 Layout Examples

11.2.1 Without a GND Network

Without a GND network, tie the thermal pad directly to the board GND copper for better thermal performance.

1

2

20

19

18

17

16

15

14

13

12

11

OUT1

OUT2

VS

3

4

VS

Thermal

Pad

(GND)

5

OUT3

OUT4

6

7

8

9

GND

10

Figure 43. Layout Example Without a GND Network

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Layout Examples (continued)

11.2.2 With a GND Network

With a GND network, tie the thermal pad as one trace to the board GND copper.

1

2

20

19

18

17

16

15

14

13

12

11

OUT1

OUT2

VS

3

4

VS

Thermal

Pad

(GND)

5

OUT3

OUT4

6

7

8

GND

Network

9

10

GND

Figure 44. Layout Example With a GND Network

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12 器件和文档支持

12.1 接收文档更新通知

要接收文档更新通知，请导航至 TI.com.cn 上的器件产品文件夹。请单击右上角的提醒我进行注册，即可每周接收

产品信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。

12.2 社区资源

下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范，

并且不一定反映 TI 的观点；请参阅 TI 的《使用条款》。

TI E2E™ 在线社区 TI 的工程师对工程师 (E2E) 社区。此社区的创建目的在于促进工程师之间的协作。在

e2e.ti.com 中，您可以咨询问题、分享知识、拓展思路并与同行工程师一道帮助解决问题。

设计支持

TI 参考设计支持可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。

12.3 商标

PowerPAD, E2E are trademarks of Texas Instruments.

All other trademarks are the property of their respective owners.

12.4 静电放电警告

这些装置包含有限的内置 ESD 保护。存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损

伤。

12.5 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

13 机械、封装和可订购信息

以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知和修

订此文档。如需获取此数据表的浏览器版本，请查看左侧的导航面板。

31

PACKAGE MATERIALS INFORMATION

www.ti.com

21-Oct-2021

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

A0

B0

K0

P1

W

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

TPS4H000AQPWPRQ1 HTSSOP PWP

TPS4H000BQPWPRQ1 HTSSOP PWP

20

2000

330.0

16.4

6.95

7.1

1.6

8.0

16.0

Q1

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

21-Oct-2021

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

TPS4H000AQPWPRQ1

TPS4H000BQPWPRQ1

HTSSOP

PWP

20

2000

350.0

43.0

Pack Materials-Page 2

重要声明和免责声明

TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，

不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担

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这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验

证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。

这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。

您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成

本、损失和债务，TI 对此概不负责。

TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改

TI 针对 TI 产品发布的适用的担保或担保免责声明。

TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE

邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265


型号：	TPS4H000-Q1
厂家：	TEXAS INSTRUMENTS
描述：	具有可调节电流限制的 40V、1Ω、4 通道汽车类智能高侧开关开关
文件：	总39页 (文件大小：1778K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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