TPS60204DGSG4 [TI]
Regulated 3.3-V Low Ripple Charge Pump with Low Battery Indicator 10-VSSOP -40 to 85;型号: | TPS60204DGSG4 |
厂家: | TEXAS INSTRUMENTS |
描述: | Regulated 3.3-V Low Ripple Charge Pump with Low Battery Indicator 10-VSSOP -40 to 85 电池 光电二极管 |
文件: | 总21页 (文件大小:590K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ꢀ ꢁꢂꢃ ꢄ ꢅ ꢄ ꢆ ꢇ ꢀꢁ ꢂ ꢃꢄ ꢅꢄ ꢈ
ꢉꢊ ꢋꢌꢍ ꢎꢀ ꢊꢏ ꢐ ꢑꢐ ꢒꢓꢇ ꢔ ꢄ ꢄ ꢒꢕꢎ ꢍ ꢖꢗꢒꢉꢘ ꢁꢁꢍ ꢊ ꢙꢚꢎ ꢉꢋ ꢊ ꢁ ꢌꢛ ꢁ
ꢍ ꢖꢗ ꢁꢖ ꢗ ꢊꢉ ꢏꢙꢜ ꢏꢙ ꢙꢖ ꢝꢓ ꢊꢉ ꢀꢊ ꢉ ꢂ
SLVS354A − FEBRUARY 2001 − REVISED SEPTEMBER 2001
D
D
Compact Converter Solution in UltraSmall
10-pin MSOP With Only Four External
Capacitors Required
features
D
Regulated 3.3-V Output Voltage With up to
100-mA Output Current From a 1.8-V to
3.6-V Input Voltage
Evaluation Module Available
(TPS60200EVM-145)
D
D
D
D
Less Than 5-mV
Achieved With Push-Pull Topology
Output Voltage Ripple
(PP)
applications
Integrated Low-Battery and Power-Good
Detector
D
Replaces DC/DC Converters With Inductors
in Battery Powered Applications Like:
− Two Battery Cells to 3.3-V Conversion
− MP3 Portable Audio Players
− Battery-Powered Microprocessor
Systems
− Backup-Battery Boost Converters
− PDA’s, Organizers, and Cordless Phones
− Handheld Instrumentation
Switching Frequency Can Be Synchronized
to External Clock Signal
Extends Battery Usage With up to 90%
Efficiency and 35-µA Quiescent Supply
Current
D
D
Easy-to-Design, Low Cost, Low EMI Power
Supply Since No Inductors Are Used
− Glucose Meters and Other Medical
Instruments
0.05-µA Shutdown Current, Battery is
Isolated From Load in Shutdown Mode
·
description
The TPS6020x step-up, regulated charge pumps generate a 3.3-V 4% output voltage from a 1.8-V to 3.6-V
input voltage. The devices are typically powered by two Alkaline, NiCd, or NiMH battery cells and operate down
to a minimum supply voltage of 1.6 V. Continuous output current is a minimum of 100 mA from a 2-V input. Only
four external capacitors are needed to build a complete low-ripple dc/dc converter. The push-pull operating
mode of two single-ended charge pumps assures the low output voltage ripple, as current is continuously
transferred to the output.
TPS60204
OUTPUT
3.3 V, 100 mA
INPUT
1.6 V to 3.6 V
PEAK OUTPUT CURRENT
vs
TPS60204
5
7
1
IN
OUT
INPUT VOLTAGE
C
2.2 µF
o
R1
R2
350
300
250
C
i
2.2 µF
R3
LBI
10
LBO
Low Battery
Warning
4
6
8
C1+
C2+
C2−
C1
1 µF
200
150
100
50
3
9
C2
1 µF
C1−
EN
GND
2
OFF/ON
Figure 1. Typical Application Circuit
With Low-Battery Warning
0
1.6
2.0
2.4
2.8
3.2
3.6
V − Input Voltage − V
I
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2001, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢄ ꢆ ꢇ ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢄ ꢈ
ꢉꢊ ꢋ ꢌꢍ ꢎꢀ ꢊꢏ ꢐ ꢑꢐ ꢒꢓꢇ ꢔ ꢄ ꢄ ꢒꢕꢎ ꢍꢖ ꢗꢒꢉꢘ ꢁ ꢁ ꢍꢊ ꢙꢚꢎ ꢉꢋ ꢊ ꢁꢌꢛ ꢁ
ꢍ ꢖꢗ ꢁꢖꢗ ꢊꢉ ꢏ ꢙꢜ ꢏ ꢙ ꢙꢖ ꢝꢓ ꢊ ꢉꢀꢊ ꢉꢂ
SLVS354A − FEBRUARY 2001 − REVISED SEPTEMBER 2001
description (continued)
The devices operate in the newly developed LinSkip mode. In this operating mode, the device switches
seamlessly from the power saving pulse-skip mode at light loads to the low-noise constant-frequency,
linear-regulation mode once the output current exceeds the LinSkip threshold of about 7 mA. Even in pulse-skip
mode, the output ripple is maintained at a very low level because the output resistance of the charge pump is
still regulated.
Three operating modes can be programmed using the EN pin. EN = low disables the device, shuts down all
internal circuits, and disconnects the output from the input. EN = high enables the device and programs it to run
from the internal oscillator. The devices operate synchronized to an external clock signal if EN is clocked; thus,
switching harmonics can be controlled and minimized. The devices include a low-battery detector that issues a
warning if the battery voltage drops below a user-defined threshold voltage, or a power-good detector that goes
active when the output voltage reaches about 90% of its nominal value.
Device options with either a low-battery or power good detector are available. This dc/dc converter requires no
inductors, therefore, EMI of the system is reduced to a minimum. It is available in the small 10-pin MSOP
package (DGS).
DGS PACKAGES
TPS60204
TPS60205
LBO
EN
PG
EN
C2−
IN
LBI
GND
C1−
GND
GND
C1−
1
2
3
4
5
10
9
1
2
3
4
5
10
9
C2−
IN
8
8
C1+
7
C1+
7
C2+
C2+
6
6
OUT
OUT
ACTUAL SIZE
3,05 mm x 4,98 mm
AVAILABLE OPTIONS
MARKING
DGS
PACKAGE
OUTPUT
CURRENT VOLTAGE
OUTPUT
†
T
PART NUMBER
DEVICE FEATURES
A
(mA)
(V)
3.3
3.3
TPS60204DGS
TPS60205DGS
AFB
AFC
100
Low-battery detector
Power-good detector
−40°C to 85°C
100
†
The DGS package is available taped and reeled. Add R suffix to device type (e.g., TPS60204DGSR) to order
quantities of 2500 devices per reel.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢉꢊ ꢋꢌꢍ ꢎꢀ ꢊꢏ ꢐ ꢑꢐ ꢒꢓꢇ ꢔ ꢄ ꢄ ꢒꢕꢎ ꢍ ꢖꢗꢒꢉꢘ ꢁꢁꢍ ꢊ ꢙꢚꢎ ꢉꢋ ꢊ ꢁ ꢌꢛ ꢁ
ꢍ ꢖꢗ ꢁꢖ ꢗ ꢊꢉ ꢏꢙꢜ ꢏꢙ ꢙꢖ ꢝꢓ ꢊꢉ ꢀꢊ ꢉ ꢂ
SLVS354A − FEBRUARY 2001 − REVISED SEPTEMBER 2001
functional block diagrams
TPS60204 with low-battery detector
Charge Pump 1
IN
0°
Oscillator
180°
C1+
C1
C1−
EN
Charge Pump 2
C2+
Control
Circuit
_
+
C2
C2−
+
−
OUT
V
REF
Shutdown/
Start-Up
Control
_
_
LBI
+
+
+
0.8 x V
+
I
−
V
REF
−
LBO
GND
TPS60205 with power-good detector
Charge Pump 1
Charge Pump 2
0°
180°
IN
Oscillator
C1+
C1−
C1
C2
EN
Control
Circuit
C2+
C2−
_
+
+
−
OUT
V
REF
Shutdown/
Start-Up
Control
_
_
+
+
+
0.8 x V
+
I
−
V
REF
−
PG
GND
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢍ ꢖꢗ ꢁꢖꢗ ꢊꢉ ꢏ ꢙꢜ ꢏ ꢙ ꢙꢖ ꢝꢓ ꢊ ꢉꢀꢊ ꢉꢂ
SLVS354A − FEBRUARY 2001 − REVISED SEPTEMBER 2001
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
C1+
NO.
4
Positive terminal of the flying capacitor C1
Negative terminal of the flying capacitor C1
Positive terminal of the flying capacitor C2
Negative terminal of the flying capacitor C2
C1−
C2+
C2−
3
6
8
Device-enable input. Three operating modes can be programmed with the EN pin.
−
−
−
EN = Low disables the device. Output and input are isolated in the shutdown.
EN = High lets the device run from the internal oscillator.
EN
9
I
If an external clock signal is applied to the EN pin, the device is in syncmode and runs synchronized at the
frequency of the external clock signal.
GND
IN
2
7
Ground
I
I
Supply input. Bypass IN to GND with a capacitor of the same size as C .
o
Low-battery detector input for the TPS60204. A low-battery warning is generated at the LBO pin when the voltage
on LBI drops below the threshold of 1.18 V. Connect LBI to GND if the low-battery detector function is not used. For
the TPS60205, this pin has to be connected to ground (GND pin).
LBI/GND
1
Open-drain low-battery detector output for the TPS60204. This pin is pulled low if the voltage on LBI drops below
the threshold of 1.18 V. A pullup resistor should be connected between LBO and OUT or any other logic supply rail
that is lower than 3.6 V.
LBO/PG
OUT
10
5
O
O
Open-drain power-good detector output for the TPS60205. As soon as the voltage on OUT reaches about 90% of
it is nominal value this pin goes active high. A pullup resistor should be connected between PG and OUT or any
other logic supply rail that is lower than 3.6 V.
Regulated 3.3-V power output. Bypass OUT to GND with the output filter capacitor C .
o
detailed description
operating principle
The TPS6020x charge pumps provide a regulated 3.3-V output from a 1.8-V to 3.6-V input. They deliver up to
100-mA load current while maintaining the output at 3.3 V 4%. Designed specifically for space critical battery
powered applications, the complete converter requires only four external capacitors. The device is using the
push-pull topology to achieve lowest output voltage ripple. The converter is also optimized for smallest board
space. It makes use of small sized capacitors, with the highest output current rating per output capacitance and
package size.
The TPS6020x circuits consist of an oscillator, a 1.18-V voltage reference, an internal resistive feedback circuit,
an error amplifier, two charge pump power stages with high current MOSFET switches, a shutdown/start-up
circuit, and a control circuit (see functional block diagrams).
push-pull operating mode
The two single-ended charge pump power stages operate in the so-called push-pull operating mode, i.e., they
operate with a 180°C phase shift. Each single-ended charge pump transfers charge into its transfer capacitor
(C1 or C2) in one half of the period. During the other half of the period (transfer phase), the transfer capacitor
is placed in series with the input to transfer its charge to C . While one single-ended charge pump is in the charge
o
phase, the other one is in the transfer phase. This operation assures an almost constant output current which
ensures a low output ripple.
If the clock were to run continuously, this process would eventually generate an output voltage equal to two times
the input voltage (hence the name voltage doubler). In order to provide a regulated fixed output voltage of 3.3 V,
the TPS6020x devices use either pulse-skip or constant-frequency linear-regulation control mode. The mode
is automatically selected based on the output current. If the load current is below the LinSkip current threshold,
it switches into the power-saving pulse-skip mode to boost efficiency at low output power.
4
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SLVS354A − FEBRUARY 2001 − REVISED SEPTEMBER 2001
detailed description (continued)
constant-frequency mode
When the output current is higher then the LinSkip current threshold, the charge pump runs continuously at the
switching frequency f . The control circuit, fed from the error amplifier, controls the charge on C1 and C2
(OSC)
by controlling the gates and hence the r
of the integrated MOSFETs. When the output voltage decreases,
DS(ON)
the gate drive increases, resulting in a larger voltage across C1 and C2. This regulation scheme minimizes
output ripple. Since the device switches continuously, the output signal contains well-defined frequency
components, and the circuit requires smaller external capacitors for a given output ripple. However,
constant-frequency mode, due to higher operating current, is less efficient at light loads. For this reason, the
device switches seamlessly into the pulse-skip mode when the output current drops below the LinSkip current
threshold.
pulse-skip mode
The regulator enters the pulse-skip mode when the output current is lower than the LinSkip current threshold
of 7 mA. In the pulse-skip mode, the error amplifier disables switching of the power stages when it detects an
output voltage higher than 3.3 V. The controller skips switching cycles until the output voltage drops below 3.3 V.
Then the error amplifier reactivates the oscillator and switching of the power stages starts again. A 30-mV output
voltage offset is introduced in this mode.
The pulse-skip regulation mode minimizes operating current because it does not switch continuously and
deactivates all functions except the voltage reference and error amplifier when the output is higher than 3.3 V.
Even in pulse-skip mode the r
of the MOSFETs is controlled. This way the energy per switching cycle that
DS(ON)
is transferred by the charge pump from the input to the output is limited to the minimum that is necessary to
sustain a regulated output voltage, with the benefit that the output ripple is kept to a minimum. When switching
is disabled from the error amplifier, the load is also isolated from the input.
start up and shutdown
During start-up, i.e. when EN is set from logic low to logic high, the output capacitor is directly connected to IN
and charged up with a limited current until the output voltage V reaches 0.8 × V . When the start-up comparator
O
I
detects this limit, the converter begins switching. This precharging of the output capacitor guarantees a short
start-up time. In addition, the inrush current into an empty output capacitor is limited. The converter can start
into a full load, which is defined by a 33-Ω or 66-Ω resistor, respectively.
Driving EN low disables the converter. This disables all internal circuits and reduces the supply current to only
0.05 µA. The device exits shutdown once EN is set high. When the device is disabled, the load is isolated from
the input. This is an important feature in battery operated products because it extends the products shelf life.
synchronization to an external clock signal
The operating frequency of the charge pump is limited to 400 kHz in order to avoid interference in the sensitive
455-kHz IF band. The device can either run from the integrated oscillator, or an external clock signal can be used
to drive the charge pump. The maximum frequency of the external clock signal is 800 kHz. The switching
frequency used internally to drive the charge pump power stages is half of the external clock frequency. The
external clock signal is applied to the EN pin. The device will switch off if the signal on EN is hold low for more
than 10 µs.
When the load current drops below the LinSkip current threshold, the devices will enter the pulse-skip mode
but stay synchronized to the external clock signal.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢍ ꢖꢗ ꢁꢖꢗ ꢊꢉ ꢏ ꢙꢜ ꢏ ꢙ ꢙꢖ ꢝꢓ ꢊ ꢉꢀꢊ ꢉꢂ
SLVS354A − FEBRUARY 2001 − REVISED SEPTEMBER 2001
detailed description (continued)
low-battery detector (TPS60204)
The low-battery comparator trips at 1.18 V 4% when the voltage on pin LBI ramps down. The voltage V
(TRIP)
at which the low-battery warning is issued can be adjusted with a resistive divider as shown in Figure 2. The
sum of resistors R1 and R2 is recommended to be in the 100-kΩ to 1-MΩ range. When choosing R1 and R2,
be aware of the input leakage current into the LBI pin.
LBO is an open drain output. An external pullup resistor to OUT, or any other voltage rail in the appropriate range,
in the 100-kΩ to 1-MΩ range is recommended. During start-up, the LBO output signal is invalid for the first
500 µs. LBO is high impedance when the device is disabled. If the low-battery comparator function is not used,
connect LBI to ground and leave LBO unconnected. The low-battery detector is disabled when the device is
switched off.
V
O
IN
V
BAT
R3
LBO
R1
R2
R1
R2
+ 1.18 V ǒ1 )
Ǔ
LBI
V(TRIP)
_
+
+
−
V
REF
Figure 2. Programming of the Low-Battery Comparator Trip Voltage
A 100-nF ceramic capacitor should be connected in parallel to R2 if large line transients are expected. These
voltage drops can inadvertently trigger the low-battery comparator and produce a wrong low-battery warning
signal at the LBO pin.
Formulas to calculate the resistive divider for low-battery detection, with V
= 1.13 V to 1.23 V and the sum
LBI
of resistors R1 and R2 equal 1 MΩ:
V
LBI
R2 + 1 MW
(1)
(2)
V
Bat
R1 + 1 MW * R2
Formulas to calculate the minimum and maximum battery voltage:
R1
) R2
(min)
R2
(max)
V
+ V
(3)
(4)
Bat(min)
LBI(min)
(max)
R1
) R2
(max)
R2
(min)
V
+ V
Bat(max)
LBI(max)
(min)
6
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ꢍ ꢖꢗ ꢁꢖ ꢗ ꢊꢉ ꢏꢙꢜ ꢏꢙ ꢙꢖ ꢝꢓ ꢊꢉ ꢀꢊ ꢉ ꢂ
SLVS354A − FEBRUARY 2001 − REVISED SEPTEMBER 2001
detailed description (continued)
Table 1. Recommended Values for the Resistive Divider From the E96 Series ( 1%)
V
/V
R1/kΩ
267
R2/kΩ
750
V
/V
V
/V
IN
TRIP(MIN)
TRIP(MAX)
1.6
1.7
1.8
1.9
2.0
1.524
1.677
301
681
1.620
1.710
1.799
1.903
1.785
1.887
1.988
2.106
340
649
374
619
402
576
power-good detector (TPS60205)
The power-good output is an open-drain output that pulls low when the output is out of regulation. When the
output rises to within 90% of its nominal voltage, the power-good output is released. Power-good is high
impedance in shutdown. In normal operation, an external pullup resistor must be connected between PG and
OUT, or any other voltage rail in the appropriate range. The resistor should be in the 100-kΩ to 1-MΩ range.
If the PG output is not used, it should remain unconnected.
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Voltage range: IN, OUT, EN, LBI, LBO, PG to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 3.6 V
C1+, C2+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to (V + 0.3 V)
O
C1−, C2− to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to (V + 0.3 V)
I
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See dissipation rating table
Continuous output current TPS60204, TPS60205 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150 mA
Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 150°C
stg
Maximum junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
J
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING FACTOR
T
= 70°C
T = 85°C
A
POWER RATING
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING
A
DGS
424 mW
3.4 mW/_C
187 mW
136 mW
The thermal resistance junction to ambient of the DGS package is R
= 294°C/W.
TH−JA
recommended operating conditions
MIN
1.6
NOM MAX
UNIT
V
Input voltage range, V
3.6
I
Input capacitor, C
2.2
1
µF
µF
µF
°C
i
Flying capacitors, C1, C2
Output capacitor, C
2.2
o
Operating junction temperature, T
−40
125
J
7
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ꢍ ꢖꢗ ꢁꢖꢗ ꢊꢉ ꢏ ꢙꢜ ꢏ ꢙ ꢙꢖ ꢝꢓ ꢊ ꢉꢀꢊ ꢉꢂ
SLVS354A − FEBRUARY 2001 − REVISED SEPTEMBER 2001
electrical characteristics at C = 2.2 µF, C1 = C2 = 1 µF, C = 2.2 µF, T = −40°C to 85°C, V = 2.4 V,
i
O
A
I
EN = V (unless otherwise noted)
I
PARAMETER
TEST CONDITIONS
MIN
100
3
TYP
MAX
UNIT
I
Maximum continuous output current
V = 2 V
mA
O(MAX)
I
1.6 V < V < 1.8 V, 0 < I < 0.25 × I
I
O
O(MAX)
1.8 V < V < 2 V, 0 < I < 0.5 × I
O(MAX)
3.17
3.17
3.17
3.43
3.43
3.47
I
O
V
O
Output voltage
V
2 V < V < 3.3 V,
0 < I < I
O
I
O(MAX)
O(MAX)
3.3 V < V < 3.6 V, 0 < I < I
I
O
V
Output voltage ripple
I
I
= I
5
35
mV
PP
PP
O
O(MAX)
I
I
f
f
Quiescent current (no-load input current)
Shutdown supply current
Internal switching frequency
External clock signal frequency
External clock signal duty cycle
EN input low voltage
= 0 mA, V = 1.8 V to 3.6 V
70
1
(Q)
O
I
µA
EN = 0 V
0.05
300
600
(SD)
200
400
400
800
70%
(OSC)
(SYNC)
kHz
30%
V
V
V = 1.6 V to 3.6 V
0.3 × V
I
IL
I
V
EN input high voltage
V = 1.6 V to 3.6 V
0.7 × V
I
IH
I
I
EN input leakage current
EN = 0 V or V
0.01
0.6
0.1
µA
ms
lkg(EN)
I
EN is set from V to GND,
I
Output capacitor auto discharge time
Output leakage current in shutdown
Time until V < 0.5 V
O
EN = 0 V,
EN = 0 V,
T
= −40 to 85°C
≤ 65°C
5
3
A
µA
T
A
LinSkip threshold
V = 2.2 V
I
7
mA
Output load regulation
10 mA < I < I
O(MAX)
; T = 25°C
0.01
%/mA
O
A
2 V < V < 3.3 V, = 0.5 x I
I
,
I
O
O(MAX)
Output line regulation
Short circuit current
0.6
60
%/V
mA
T
A
= 25°C
I
V = 2.4 V,
I
V
O
= 0 V
(SC)
electrical characteristics for low-battery comparator of devices TPS60204 at T = −40°C to 85°C,
A
V = 2.4 V and EN = V (unless otherwise noted)
I
I
PARAMETER
TEST CONDITIONS
V = 1.6 V to 2.2 V, T = 0°C to 70°C
MIN
TYP
1.18
10
MAX
UNIT
V
V
(LBI)
LBI trip voltage
1.13
1.23
I
c
LBI trip voltage hysteresis
LBI input current
For rising voltage at LBI
mV
nA
V
I
V
(LBI)
V
(LBI)
V
(LBI)
= 1.3 V
= 0 V,
2
50
0.4
0.1
I(LBI)
V
LBO output voltage low
LBO leakage current
I
= 1 mA
= 3.3 V
(LBO)
O(LBO)
(LBO)
I
= 1.3 V,
V
0.01
µA
lkg(LBO)
NOTE: During start-up of the converter the LBO output signal is invalid for the first 500 µs.
electrical characteristics for power-good comparator of devices TPS60205 at T = −40°C to 85°C,
A
V = 2.4 V and EN = V (unless otherwise noted)
I
I
PARAMETER
TEST CONDITIONS
T = 0°C to 70°C
MIN
TYP
MAX
UNIT
V
V
V
Power-good trip voltage
0.87 × V
0.91 × V
0.95 × V
O
V
(PG)
c
O
O
Power-good trip voltage hysteresis
Power-good output voltage Low
Power-good leakage current
V
decreasing, T = 0°C to 70°C
1%
hys(PG)
O(PG)
lkg(PG)
O
O
O
c
V
V
= 0 V,
I
= 1 mA
= 3.3 V
0.4
0.1
V
(PG)
I
= 3.3 V,
V
(PG)
0.01
µA
NOTE: During start-up of the converter the PG output signal is invalid for the first 500 µs.
8
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SLVS354A − FEBRUARY 2001 − REVISED SEPTEMBER 2001
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURES
vs Output current (TPS60204, TPS60205)
vs Input voltage
3
η
Efficiency
4
I
Quiescent supply current
vs Input voltage
5
6
Q
vs Output current
V
Output voltage
O
O
vs Input voltage
7
V
Output voltage ripple
Start-up timing
vs Time
8, 9, 10
11
Load transient response
Peak output current
12, 13
14
I
O
vs Input voltage
NOTE: All typical characteristics were measured using the typical application circuit of Figure 14 (unless otherwise noted).
TPS60204, TPS60205
EFFICIENCY
vs
INPUT VOLTAGE
EFFICIENCY
vs
OUTPUT CURRENT
100
100
90
80
70
60
90
80
70
60
50
V = 1.8 V
I
50
40
V = 2.4 V
I
O
= 50 mA
I
40
30
20
V = 2.7 V
I
30
20
10
0
10
0
1.6
2.0
2.4
2.8
3.2
3.6
0.1
1
10
100
1000
V − Input Voltage − V
I
I
O
− Output Current − mA
Figure 3
Figure 4
9
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ꢍ ꢖꢗ ꢁꢖꢗ ꢊꢉ ꢏ ꢙꢜ ꢏ ꢙ ꢙꢖ ꢝꢓ ꢊ ꢉꢀꢊ ꢉꢂ
SLVS354A − FEBRUARY 2001 − REVISED SEPTEMBER 2001
TYPICAL CHARACTERISTICS
QUIESCENT SUPPLY CURRENT
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
vs
INPUT VOLTAGE
40
38
36
34
32
30
28
26
3.5
I
O
= 0 mA
3.4
3.3
V = 3.6 V
I
3.2
3.1
3.0
2.9
V = 1.8 V
I
V = 2.7 V
I
V = 2.4 V
I
24
22
20
1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6
1
10
100
1000
V − Input Voltage − V
I
I
O
− Output Current − mA
Figure 5
Figure 6
OUTPUT VOLTAGE RIPPLE
OUTPUT VOLTAGE
vs
vs
TIME
INPUT VOLTAGE
3.38
3.36
3.4
V = 2.4 V
I
3.3
3.2
I
O
= 1 mA
3.34
3.32
3.30
3.28
3.26
1 mA
50 mA
3.1
3.0
100 mA
2.9
2.8
2.7
3.24
3.22
0
5
10 15 20 25 30 35 40 45 50
1.6
2.0
2.4
2.8
3.2
3.6
t − Time − µs
V − Input Voltage − V
I
Figure 8
Figure 7
10
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ꢍ ꢖꢗ ꢁꢖ ꢗ ꢊꢉ ꢏꢙꢜ ꢏꢙ ꢙꢖ ꢝꢓ ꢊꢉ ꢀꢊ ꢉ ꢂ
SLVS354A − FEBRUARY 2001 − REVISED SEPTEMBER 2001
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE RIPPLE
OUTPUT VOLTAGE RIPPLE
vs
vs
TIME
TIME
3.38
3.36
3.34
3.32
3.30
3.28
3.26
3.38
3.36
V = 2.4 V
V = 2.4 V
I
I
I
O
= 10 mA
I
O
= 100 mA
3.34
3.32
3.30
3.28
3.26
3.24
3.22
3.24
3.22
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
t − Time − µs
t − Time − µs
Figure 10
Figure 9
START-UP TIMING
LOAD TRANSIENT RESPONSE
3.5
1400
1200
1000
800
600
400
200
0
V = 2.4 V
I
V = 2.4 V
I
3
2.5
2
3.30
3.28
3.26
3.24
V
O
I
I
1.5
1
EN
0.5
0
100 mA
10 mA
0
50 100 150 200 250 300 350 400 450 500
0
50 100 150 200 250 300 350 400 450 500
t − Time − µs
t − Time − µs
Figure 12
Figure 11
11
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ꢍ ꢖꢗ ꢁꢖꢗ ꢊꢉ ꢏ ꢙꢜ ꢏ ꢙ ꢙꢖ ꢝꢓ ꢊ ꢉꢀꢊ ꢉꢂ
SLVS354A − FEBRUARY 2001 − REVISED SEPTEMBER 2001
TYPICAL CHARACTERISTICS
PEAK OUTPUT CURRENT
vs
LINE TRANSIENT RESPONSE
INPUT VOLTAGE
350
300
250
I
O
= 50 mA
3.32
3.30
3.28
3.26
2.8 V
200
150
100
50
2.2 V
0
1.6
0
1
2
3
4
5
6
7
8
9
10
2.0
2.4
2.8
3.2
3.6
t − Time − ms
V − Input Voltage − V
I
Figure 13
Figure 14
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ꢍ ꢖꢗ ꢁꢖ ꢗ ꢊꢉ ꢏꢙꢜ ꢏꢙ ꢙꢖ ꢝꢓ ꢊꢉ ꢀꢊ ꢉ ꢂ
SLVS354A − FEBRUARY 2001 − REVISED SEPTEMBER 2001
APPLICATION INFORMATION
capacitor selection
The TPS6020x devices require only four external capacitors to achieve a very low output voltage ripple. The
capacitor values are closely linked to the required output current. Low ESR (<0.1 Ω) capacitors should be used
at input and output. In general, the transfer capacitors (C1 and C2) will be the smallest; a 1-µF value is
recommended for maximum load operation. With smaller capacitor values, the maximum possible load current
is reduced and the LinSkip threshold is lowered.
The input capacitor improves system efficiency by reducing the input impedance. It also stabilizes the input
current of the power source. The input capacitor should be chosen according to the power supply used and the
distance from the power source to the converter IC. C is recommended to be about two to four times as large
i
as the flying capacitors C1 and C2.
The output capacitor (C ) should be at minimum the size of the input capacitor. The minimum required
o
capacitance is 2.2 µF. Larger values will improve the load transient performance and will reduce the maximum
output ripple voltage.
Only ceramic capacitors are recommended for input, output, and flying capacitors. Depending on the material
used to manufacture them, ceramic capacitors might lose their capacitance over temperature and voltage.
Ceramic capacitors of type X7R or X5R material will keep their capacitance over temperature and voltage,
whereas Z5U- or Y5V-type capacitors will decrease in capacitance. Table 2 lists the recommended capacitor
values.
Table 2. Recommended Capacitor Values (Ceramic X5R and X7R)
FLYING
CAPACITORS,
C1/C2
INPUT
CAPACITOR,
OUTPUT
CAPACITOR,
OUTPUT VOLTAGE
RIPPLE IN LINEAR MODE,
OUTPUT VOLTAGE
RIPPLE IN SKIP MODE,
LOAD CURRENT,
I
L
C
C
V
(mV)
V
(P-P)
i
o
(P-P)
(mA)
(µF)
(µF)
2.2
4.7
2.2
4.7
2.2
2.2
2.2
(µF)
2.2
4.7
10
(mV)
20
10
7
0−100
0−100
0−100
0−100
0−50
1
1
3
3
3
3
3
5
5
1
2.2
0.47
0.22
0.1
4.7
2.2
2.2
2.2
10
20
15
15
0−25
0−10
Table 3. Recommended Capacitor Types
MANUFACTURER
PART NUMBER
UMK212BJ104MG
EMK212BJ224MG
EMK212BJ474MG
LMK212BJ105KG
LMK212BJ225MG
EMK316BJ225KL
LMK316BJ475KL
JMK316BJ106ML
0805ZC105KAT2A
1206ZC225KAT2A
SIZE
0805
0805
0805
0805
0805
1206
1206
1206
0805
1206
CAPACITANCE
0.1 µF
TYPE
Taiyo Yuden
Ceramic
Ceramic
Ceramic
Ceramic
Ceramic
Ceramic
Ceramic
Ceramic
Ceramic
Ceramic
0.22 µF
0.47 µF
1 µF
2.2 µF
2.2 µF
4.7 µF
10 µF
AVX
1 µF
2.2 µF
13
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ꢍ ꢖꢗ ꢁꢖꢗ ꢊꢉ ꢏ ꢙꢜ ꢏ ꢙ ꢙꢖ ꢝꢓ ꢊ ꢉꢀꢊ ꢉꢂ
SLVS354A − FEBRUARY 2001 − REVISED SEPTEMBER 2001
APPLICATION INFORMATION
Table 4. Recommended Capacitor Manufacturers
MANUFACTURER
Taiyo Yuden
AVX
CAPACITOR TYPE
X7R/X5R ceramic
X7R/X5R ceramic
INTERNET SITE
http://www.t−yuden.com/
http://www.avxcorp.com/
OUTPUT
3.3 V, 100 mA
INPUT
1.6 V to 3.6 V
TPS60204
5
7
IN
OUT
C
2.2
o
R1
R2
C
i
F
R3
C2
µ
F
1
4
µ
2.2
LBI
10
6
LBO
C2+
Low Battery
Warning
C1+
C1
µ
3
9
8
1 F
C1−
EN
C2−
µ
1 F
GND
2
OFF/ON
Figure 15. Typical Operating Circuit TPS60204 With Low-Battery Detector
OUTPUT
3.3 V, 100 mA
INPUT
1.6 V to 3.6 V
TPS60205
5
7
IN
OUT
C
2.2 F
o
C
i
R1
C2
µ
µ
2.2
F
10
6
PG
Power-Good
Signal
4
C1+
C2+
3
9
8
1
C1−
EN
C2−
µ
1
F
GND
1,2
OFF/ON
Figure 16. Typical Operating Circuit TPS60205 With Power-Good Detector
14
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ꢍ ꢖꢗ ꢁꢖ ꢗ ꢊꢉ ꢏꢙꢜ ꢏꢙ ꢙꢖ ꢝꢓ ꢊꢉ ꢀꢊ ꢉ ꢂ
SLVS354A − FEBRUARY 2001 − REVISED SEPTEMBER 2001
APPLICATION INFORMATION
power dissipation
The power dissipated in the TPS6020x devices depends mainly on input voltage and output current and is
approximated by:
x ǒ2 x V * VOǓ
P
+ I
for I
t I
(5)
(DISS)
O
I
(Q)
O
By observing equation 5, it can be seen that the power dissipation is worst for highest input voltage V and
I
highest output current I . For an input voltage of 3.6 V and an output current of 100 mA the calculated power
O
dissipation P
is 390 mW. This is also the point where the charge pump operates with its lowest efficiency.
(DISS)
With the recommended maximum junction temperature of 125°C and an assumed maximum ambient operating
temperature of 85°C, the maximum allowed thermal resistance junction to ambient of the system can be
calculated.
T
* T
J(MAX)
P
A
125°C * 85°C
R
+
+
+ 102°CńW
(6)
QJA(max)
390 mW
DISS(max)
P
must be less than that allowed by the package rating. The thermal resistance junction to ambient of the
DISS
used 10-pin MSOP is 294°C/W for an unsoldered package. The thermal resistance junction to ambient with
the IC soldered to a printed circuit using a board layout as described in the application information section, the
R
is typically 200°C/W, which is higher than the maximum value calculated above. However, in a battery
ΘJA
powered application, both V and T will typically be lower than the worst case ratings used in equation 6 , and
power dissipation should not be a problem in most applications.
I
A
layout and board space
Careful board layout is necessary due to the high transient currents and switching frequency of the converter.
All capacitors should be placed in close proximity to the device. A PCB layout proposal for a one-layer board
is given in Figure 17. There is no specific EVM available for the TPS60204. However, the TPS60200EVM−145
can be used to evaluate the device.
The evaluation module for the TPS60200 can be ordered under product code TPS60200EVM−145. The EVM
uses the layout shown in Figure 17. All components including the pins are shown. The EVM is built so that it
can be connected to a 14-pin dual inline socket, therefore, the space needed for the IC, the external parts, and
2
eight pins is 17,9 mm x 10,2 mm = 182,6 mm .
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢄ ꢆ ꢇ ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢄ ꢈ
ꢉꢊ ꢋ ꢌꢍ ꢎꢀ ꢊꢏ ꢐ ꢑꢐ ꢒꢓꢇ ꢔ ꢄ ꢄ ꢒꢕꢎ ꢍꢖ ꢗꢒꢉꢘ ꢁ ꢁ ꢍꢊ ꢙꢚꢎ ꢉꢋ ꢊ ꢁꢌꢛ ꢁ
ꢍ ꢖꢗ ꢁꢖꢗ ꢊꢉ ꢏ ꢙꢜ ꢏ ꢙ ꢙꢖ ꢝꢓ ꢊ ꢉꢀꢊ ꢉꢂ
SLVS354A − FEBRUARY 2001 − REVISED SEPTEMBER 2001
APPLICATION INFORMATION
Figure 17. Recommended Component Placement and Board Layout
Table 5. Component Identification
IC1
C1, C2
C3
TPS60204
Flying capacitors
Input capacitors
C4
Output capacitors
C5
Stabilization capacitor for LBI
Resistive divider for LBI
Pullup resistor for LBO
Pullup resistor for EN
R1, R2
R3
R4
Capacitor C5 should be included if large line transients are expected. This capacitor suppresses toggling of the
LBO due to these line changes.
device family products
Other charge pump dc-dc converters in this family are:
Table 6. Product Identification
PART NUMBER
TPS60100
TPS60101
TPS60110
TPS60111
TPS60120
TPS60121
TPS60122
TPS60123
TPS60130
TPS60131
TPS60132
TPS60133
TPS60140
TPS60141
DESCRIPTION
2-cell to regulated 3.3 V, 200-mA low-noise charge pump
2-cell to regulated 3.3 V, 100-mA low-noise charge pump
3-cell to regulated 5.0 V, 300-mA low-noise charge pump
3-cell to regulated 5.0 V, 150-mA low-noise charge pump
2-cell to regulated 3.3 V, 200-mA high efficiency charge pump with low battery comparator
2-cell to regulated 3.3 V, 200-mA high efficiency charge pump with power-good comparator
2-cell to regulated 3.3 V, 100-mA high efficiency charge pump with low battery comparator
2-cell to regulated 3.3 V, 100-mA high efficiency charge pump with power-good comparator
3-cell to regulated 5.0 V, 300-mA high efficiency charge pump with low battery comparator
3-cell to regulated 5.0 V, 300-mA high efficiency charge pump with power-good comparator
3-cell to regulated 5.0 V, 150-mA high efficiency charge pump with low battery comparator
3-cell to regulated 5.0 V, 150-mA high efficiency charge pump with power-good comparator
2-cell to regulated 5.0 V, 100-mA charge pump voltage tripler with low battery comparator
2-cell to regulated 5.0 V, 100-mA charge pump voltage tripler with power-good comparator
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂꢃ ꢄ ꢅ ꢄ ꢆ ꢇ ꢀꢁ ꢂ ꢃꢄ ꢅꢄ ꢈ
ꢉꢊ ꢋꢌꢍ ꢎꢀ ꢊꢏ ꢐ ꢑꢐ ꢒꢓꢇ ꢔ ꢄ ꢄ ꢒꢕꢎ ꢍ ꢖꢗꢒꢉꢘ ꢁꢁꢍ ꢊ ꢙꢚꢎ ꢉꢋ ꢊ ꢁ ꢌꢛ ꢁ
ꢍ ꢖꢗ ꢁꢖ ꢗ ꢊꢉ ꢏꢙꢜ ꢏꢙ ꢙꢖ ꢝꢓ ꢊꢉ ꢀꢊ ꢉ ꢂ
SLVS354A − FEBRUARY 2001 − REVISED SEPTEMBER 2001
MECHANICAL DATA
DGS (S-PDSO-G10)
PLASTIC SMALL-OUTLINE PACKAGE
0,27
0,17
M
0,08
0,50
10
6
0,15 NOM
3,05
2,95
4,98
4,78
Gage Plane
0,25
0°−ā6°
1
5
0,69
0,41
3,05
2,95
Seating Plane
0,10
0,15
0,05
1,07 MAX
4073272/B 08/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion.
D. Falls within JEDEC MO-187
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
5-Feb-2007
PACKAGING INFORMATION
Orderable Device
TPS60204DGS
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
MSOP
DGS
10
10
10
10
10
10
10
10
80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS60204DGSG4
TPS60204DGSR
TPS60204DGSRG4
TPS60205DGS
MSOP
MSOP
MSOP
MSOP
MSOP
MSOP
MSOP
DGS
DGS
DGS
DGS
DGS
DGS
DGS
80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS60205DGSG4
TPS60205DGSR
TPS60205DGSRG4
80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Jul-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
TPS60204DGSR
TPS60205DGSR
MSOP
MSOP
DGS
DGS
10
10
2500
2500
330.0
330.0
12.4
12.4
5.3
5.3
3.4
3.4
1.4
1.4
8.0
8.0
12.0
12.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
29-Jul-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS60204DGSR
TPS60205DGSR
MSOP
MSOP
DGS
DGS
10
10
2500
2500
340.5
340.5
338.1
338.1
20.6
20.6
Pack Materials-Page 2
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相关型号:
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