TPS60503DGSG4 [TI]
HIGH EFFICIENCY, 250-mA STEP-DOWN CHARGE PUMP; 高效率, 250 mA的降压充电泵![TPS60503DGSG4](http://pdffile.icpdf.com/pdf1/p00185/img/icpdf/TPS605_1044673_icpdf.jpg)
型号: | TPS60503DGSG4 |
厂家: | ![]() |
描述: | HIGH EFFICIENCY, 250-mA STEP-DOWN CHARGE PUMP |
文件: | 总24页 (文件大小:1124K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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ꢀ ꢁꢂꢃ ꢄ ꢅ ꢄ ꢄ ꢆ ꢀꢁ ꢂ ꢃꢄ ꢅꢄ ꢇ
ꢀ ꢁꢂꢃ ꢄ ꢅ ꢄ ꢈ ꢆ ꢀꢁ ꢂ ꢃꢄ ꢅꢄ ꢉ
SLVS391B − OCTOBER 2001 − REVISED FEBRUARY 2002
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D
DSP Core Supply
FEATURES
D
D
D
D
D
Cellular Phones
D
Regulated 3.3-V, 1.8-V, 1.5-V, or Adjustable
Output Voltage
Portable Instruments
Internet Audio Player
PC Peripherals
D
D
D
D
Up to 250-mA Output Current
1.8-V to 6.5-V Input Voltage
Up to 90% Efficiency
USB Powered Applications
Output Voltage Tolerance 3% Over Line, Load,
and Temperature Variation
DESCRIPTION
The TPS6050x devices are a family of step-down
charge pumps that generate a regulated, fixed 3.3-V,
1.8-V, 1.5-V, or adjustable output voltage. Only four
small ceramic capacitors are required to build a
complete high efficiency dc/dc charge pump converter.
To achieve the high efficiency over a wide input voltage
range, the charge pump automatically selects between
three different conversion modes. The output can
deliver a maximum of 250-mA output current. The
power good function supervises the output voltage and
goes high when the output voltage rises to 97% of its
nominal value.
D
Device Quiescent Current Less Than 40 µA
Output Voltage Supervisor Included
(Power Good)
D
D
D
D
D
D
Internal Soft Start
Load Isolated From Battery During Shutdown
Overtemperature and Overcurrent Protected
Micro-Small 10-Pin MSOP Package
EVM Available, TPS60500EVM-193
APPLICATIONS
D
Personal Digital Assistants
Typical Application Circuit
TPS60503
EFFICIENCY
vs
C1F
1 µF
C2F
1 µF
INPUT VOLTAGE
100
100 mA
50 mA
8
6
3
4
90
C1F− C1F+ C2F− C2F+
1.8 V
150 mA
80
70
7
INPUT
OUT
60
+
Li-ion cell
5
1
C
150 mA
o
VIN
50
10 µF
LDO
C
i
40
30
20
10
0
TPS60502
FB
2.2 µF
10
R
EN
OFF/ON
2
2
2.5
3
3.5
4
4.5
5
5.5
6
6.5
PG
GND
V − Input Voltage − V
I
9
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2002, Texas Instruments Incorporated
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1
www.ti.com
ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢄ ꢄ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢄ ꢇ
ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢄ ꢈꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢄ ꢉ
SLVS391B − OCTOBER 2001 − REVISED FEBRUARY 2002
pin assignments
DGS PACKAGES
(TOP VIEW)
FB
EN
PG
1
2
3
4
5
10
9
GND
C1F−
OUT
C1F+
C2F−
C2F+
VIN
8
7
6
ACTUAL SIZE
3,05 mm x 4,98 mm
AVAILABLE OPTIONS
MARKING DGS
PACKAGE
OUTPUT VOLTAGE
[V]
MINIMUM INPUT VOLTAGE
FOR I = 150 mA
†
PART NUMBER
O
Adjustable
(0.8 V to 3.3 V)
TPS60500DGS
AVB
V > V + 1
I O
TPS60501DGS
TPS60502DGS
TPS60503DGS
AVC
AVD
AVE
3.3
1.8
1.5
V > 4.3 V
I
V > 2.8 V
I
V > 2.5 V
I
†
The DGS package is available taped and reeled. Add R suffix to device type (e.g. TPS60500DGSR) to order
quantities of 2500 devices per reel.
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
C1F+
NO.
6
Positive terminal of the flying capacitor C1F
Negative terminal of the flying capacitor C1F
Positive terminal of the flying capacitor C2F
Negative terminal of the flying capacitor C2F
Device-enable Input.
C1F−
C2F+
C2F−
EN
8
4
3
1
I
− EN = High disables the device. Output and input are isolated in shutdown mode.
− EN = Low enables the device.
GND
FB
9
Ground
10
O
O
O
I
TPS60500: connect via voltage divider to V
O
TPS60501 to TPS60503: connect directly to V
O
OUT
PG
7
2
5
Regulated 3.3 V, 1.8 V, 1.5 V, or adjustable power output
Bypass OUT to GND with the output filter capacitor C .
o
Open drain power good detector output. As soon as the voltage on OUT reaches about 97% of its nominal value this
pin goes high.
VIN
Supply Input. Connect to an input supply in the 1.8-V to 6.5-V range.
2
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SLVS391B − OCTOBER 2001 − REVISED FEBRUARY 2002
†
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Voltage range at VIN, EN, PG to GND (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 7 V
Voltage range at OUT, FB to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 3.6 V
Voltage range at C1F+, C1F−, C2F+, C2F− to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 7 V
Continuous power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Output current at OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300 mA
Storage temperature range, T
Maximum junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 150°C
J
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The voltage at EN, and PG can exceed VIN up to the maximum rated voltage without increasing the leakage current drawn by these
mode select inputs.
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING FACTOR
T
= 70°C
T = 85°C
A
POWER RATING
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING
A
DGS
555 mW
5.56 mW/°C
305 mW
221 mW
NOTE: The thermal resistance junction to ambient of the DGS package when soldered on a PCB is R
≈ 180°C/W.
θJA
recommended operating conditions
MIN
NOM MAX
UNIT
V
Input voltage range at VIN, V
1.8
6.5
I
Output current range at OUT, I
250
mA
µF
µF
µF
µF
°C
O
Input capacitor, C
2.2
i
Flying capacitors, C1F, C2F
Output capacitor, C for I ≤ 150 mA
1
4.7
22
o
O
Output capacitor, C for 150 mA < I < 250 mA
o
O
Operating junction temperature, T
−40
125
J
RECOMMENDED CAPACITOR VALUES
I
C
C
C
o
O, max
[mA]
i
(xF)
[µF]
2.2
4.7
4.7
[µF]
0.22
1
[µF]
4.7
10
50
150
250
1
22
3
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SLVS391B − OCTOBER 2001 − REVISED FEBRUARY 2002
electrical characteristics at C = 4.7 µF, C1F = C2F = 1 µF, C = 10 µF, T = −40°C to 85°C,
i
o
A
V = 5 V, V
= GND (unless otherwise noted)
I
(EN)
PARAMETER
TEST CONDITIONS
MIN
1.8
TYP
MAX
6.5
UNIT
V
I
Supply voltage range
V
V = 1.8 V to 2.7 V, V −V > 1 V
50
150
250
250
250
0.8
I
O
I
V ≥ 2.7 V, V −V > 1 V
I
O
I
V
O =
1.5 V, V ≥ 3.1 V
I
Maximum output current
mA
I
O
V ≥ 3.7 V, 1.8 V ≤ V ≤ 2.5 V
I
O
V
O
> 2.5 V, V > V + 1.2 V
O
I
TPS60500
TPS60501
TPS60502
TPS60503
TPS60500
TPS60501
3.3
3.30
1.80
1.50
0.8
V > 2.7V; V −V > 1 V at I
≤ 150 mA
≤ 50mA
I
O
OUT
OUT
I
V
Output voltage
V
V
O
V > 1.8 V; V −V > 1 V at I
I
O
I
V
(FB)
Feedback voltage
I
O
I
O
I
O
I
O
I
O
I
O
= 0 mA to 150 mA,
= 0 mA to 150 mA,
= 0 mA to 150 mA,
= 0 mA to 250 mA,
C
C
C
C
= 47 µF
= 47 µF
= 10 µF
= 47 µF
−4%
3%
3%
4%
4%
o
o
o
o
TPS60500
TPS60502
TPS60503
Tolerance of output voltage
Output voltage ripple at OUT
V
pp
= 150 mA, V = 1.5 V
O
30
40
mV
PP
I
Q
Quiescent current (no-load input current)
Thermal shutdown temperature
Shutdown supply current
= 0 mA
75
µA
T
(SD)
150
0.05
800
°C
µA
kHz
V
I
f
V
= V
I
0.5
1200
O(SD)
(OSC)
(EN)
(EN)
Internal switching frequency
EN input low voltage
600
V
IL
0.3 x V
I
V
IH
EN input high voltage
0.7 x V
V
I
I
I
EN input leakage current
V
= 0 V or V
0.01
0.1
0.1
µA
µA
lkg(SD)
lkg(FB)
I
FB input leakage current
TPS60500
Maximum resistance of the
external voltage divider
R
TPS60500 R1 + R2 at FB pin
1
MΩ
(max)
Short circuit current (start-up current)
Output current limit
V = 6.5V,
V
O
= 0 V
100
300
500
mA
mA
I
V
O
> 0.6 V
No load start-up time
80
µs
electrical characteristics for power good comparator of devices TPS6050x at T = −40°C to 85°C,
A
V = 5 V and V
= GND (unless otherwise noted)
(EN)
I
PARAMETER
TEST CONDITIONS
See Note 2
MIN
TYP
V – 2%
ml
MAX
UNIT
V
V
(PG)
Power good trip voltage
t
t
V
V
V
V
ramping positive
ramping negative
100
50
200
100
0.3
0.1
µs
µs
V
d,r
O
O
O
O
Power good delay time
d,f
V
Power good output voltage low
Power good leakage current
= 0 V,
I
= 1 mA
OL
(PG)
I
= 3.3 V,
V
(PG)
= 3.3 V
0.01
µA
lkg
NOTE 2:
V
ml
is the output voltage at the maximum load current. V is not a JEDEC symbol.
ml
4
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ꢀ ꢁꢂꢃ ꢄ ꢅ ꢄ ꢈ ꢆ ꢀꢁ ꢂ ꢃꢄ ꢅꢄ ꢉ
SLVS391B − OCTOBER 2001 − REVISED FEBRUARY 2002
functional block diagram TPS6050x
VIN
VIN
2/3
Skip
800 KHz
CLK
Gear
1/2
EN
Logic
Driver
1/3
C1F
C2F
EN
=
ON/OFF
OUT
Thermal and
Short-Circuit
Current Limit
EN
Start−up
OUT
PG
FB
Skip
V_REG
PG
Regulator
Amplifier
Bandgap
0.8 V
EN
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
1−4
5−8
9−12
13
V
V
Minimum input voltage
Efficiency
vs Output current
vs Input voltage
vs Output current
vs Input voltage
vs Output current
vs Time
I
Output voltage
O
Quiescent current
Efficiency
14−17
18
V
O
Output voltage (ripple)
Line transient response
Load transient response
19
20
5
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ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢄ ꢈꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢄ ꢉ
SLVS391B − OCTOBER 2001 − REVISED FEBRUARY 2002
TYPICAL CHARACTERISTICS
TPS60503
MINIMUM INPUT VOLTAGE
vs
TPS60502
MINIMUM INPUT VOLTAGE
vs
TPS60501
MINIMUM INPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT CURRENT
OUTPUT CURRENT
3.40
3.20
3
3.6
3.4
3.2
3
4.3
4.2
4.1
4
V
V
Threshold:
nom −3% = 1.455 V
O
O
V
V
Threshold:
nom −3% = 3.201 V
V
V
Threshold:
nom −3% = 1.746 V
O
O
O
O
−40°C
T
A
= 85°C
2.80
2.60
2.40
2.20
2
25°C
T
A
= 25°C
3.9
3.8
3.7
3.6
3.5
2.8
2.6
2.4
2.2
−40°C
25°C
85°C
T
A
= −40°C
85°C
1.80
1.60
2
3.4
3.3
1.8
0
50
100
150
200
250
250
6.5
0
50
100
150
200
250
0
50
100
150
200
250
I
− Output Current − mA
O
I
− Output Current − mA
I
− Output Current − mA
O
O
Figure 1
Figure 2
Figure 3
TPS60500
TPS60503
EFFICIENCY
vs
TPS60502
EFFICIENCY
vs
MINIMUM INPUT VOLTAGE
vs
OUTPUT CURRENT
INPUT VOLTAGE
INPUT VOLTAGE
2.6
2.5
2.4
2.3
2.2
2.1
2
100
90
80
70
60
50
40
30
20
100
90
10 mA
100 mA
V
V
Threshold:
nom −3% = 0.776 V
O
O
150 mA
200 mA
80
70
60
50
40
30
20
10
0
85°C
200 mA
250 mA
10 mA
150 mA
25°C
250 mA
100 mA
1.9
1.8
1.7
1.6
1.5
1.4
−40°C
10
0
0
50
100
150
200
2
2.5
3
3.5
4
4.5
5
5.5
6
6.5
2
2.5
3
3.5
4
4.5
5
5.5
6
6.5
I
− Output Current − mA
V − Input Voltage − V
I
O
V − Input Voltage − V
I
Figure 4
Figure 5
Figure 6
TPS60500
EFFICIENCY
vs
TPS60503
TPS60501
EFFICIENCY
vs
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
INPUT VOLTAGE
INPUT VOLTAGE
100
90
80
70
60
50
40
30
20
10
0
1.55
1.54
1.53
1.52
1.51
1.5
100
90
80
70
60
50
40
30
20
C
= 10 µF,
o
10 mA
10 mA
200 mA
250 mA
150 mA
200 mA
V = 3.6 V
I
V = 5 V
100 mA
I
150 mA
250 mA
1.49
1.48
1.47
100 mA
50 mA
V = 3.3 V
I
V
Adjusted to 0.8 V,
O
C
= 47 µF,
o
1.46
1.45
10
0
1.5
2
2.5
3
3.5
4
4.5
5
5.5 6 6.5
0.1
1
10
100
1000
3.5
4
4.5
5
5.5
6
V − Input Voltage − V
I
I
O
− Output Current − mA
V − Input Voltage − V
I
Figure 7
Figure 8
Figure 9
6
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ꢀ ꢁꢂꢃ ꢄ ꢅ ꢄ ꢄ ꢆ ꢀꢁ ꢂ ꢃꢄ ꢅꢄ ꢇ
ꢀ ꢁꢂꢃ ꢄ ꢅ ꢄ ꢈ ꢆ ꢀꢁ ꢂ ꢃꢄ ꢅꢄ ꢉ
SLVS391B − OCTOBER 2001 − REVISED FEBRUARY 2002
TYPICAL CHARACTERISTICS
TPS60502
OUTPUT VOLTAGE
vs
TPS60500
OUTPUT VOLTAGE
vs
TPS60501
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
OUTPUT CURRENT
OUTPUT CURRENT
1.84
1.83
1.82
1.81
1.80
1.79
1.78
1.77
1.76
3.36
3.34
3.32
3.30
3.28
3.26
3.24
0.86
0.85
0.84
0.83
0.82
0.81
0.80
0.79
0.78
C
= 10 µF,
o
V = 5 V
V
Adjusted to 0.8 V
I
O
C
= 10 µF
V = 5 V
I
o
V = 3.6 V
I
V = 3.6 V
I
V = 5 V
I
V = 3.3 V
I
V = 2.4 V
I
V = 3.3 V
I
3.22
3.20
1.75
1.74
0.77
0.76
0.1
1
10
100
1000
0.1
1
10
100
1000
0.1
1
10
100
1000
I
O
− Output Current − mA
I
O
− Output Current − mA
I
O
− Output Current − mA
Figure 10
Figure 11
Figure 12
TPS60503
EFFICIENCY
vs
TPS60502
EFFICIENCY
vs
QUIESCENT CURRENT
vs
INPUT VOLTAGE
OUTPUT CURRENT
OUTPUT CURRENT
45
40
35
30
90
80
70
60
50
40
90
80
70
60
50
V = 3.3 V
I
V = 3.6 V
I
V = 3.3 V
I
V = 5 V
I
T
= 85°C
A
T
A
= 25°C
V = 5 V
I
V = 3.6 V
I
T
A
= −40°C
25
20
40
30
30
20
1.8 2.3 2.8 3.3 3.8 4.3 4.8 5.3 5.8 6.3
0.1
1
10
100
1000
0.1
1
10
100
1000
V − Input Voltage − V
I
I
O
− Output Current − mA
I
O
− Output Current − mA
Figure 13
Figure 14
Figure 15
TPS60501
TPS60500
EFFICIENCY
vs
EFFICIENCY
vs
OUTPUT CURRENT
OUTPUT CURRENT
100
90
80
70
60
50
40
80
70
60
50
40
30
20
V = 3.3 V
I
V = 5 V
I
V = 2.4 V
I
V = 3.6 V
I
V = 5 V
I
30
20
V
Adjusted to 0.8 V
100
O
0.1
1
10
100
1000
0.1
1
10
1000
I
O
− Output Current − mA
I
O
− Output Current − mA
Figure 16
Figure 17
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SLVS391B − OCTOBER 2001 − REVISED FEBRUARY 2002
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE (RIPPLE)
vs
LINE TRANSIENT RESPONSE
TIME
LOAD TRANSIENT RESPONSE
C
= 10 µF,
I
V
T
= 50 mA
o
C
= 10 µF,
O
C = 10 µF,
o
V = 3.3 V
V = 3.3 V
o
I
I
= 1.5 V
O
V
T
= 1.5 V
= 25°C
V
I
= 1.5 V
= 100 mA
O
O
O
= 25°C
A
A
V
50 mV/division
T
A
= 25°C
50 mV/division
O
V
O
I
O
= 15 mA to 135 mA to 15 mA
V = 2.5 V to 3.5 V to 2.5 V
I
10 mV/division
1 V/division
100 mA/division
10 µs / division
10 µs / division
1 µs / division
Figure 18
Figure 19
Figure 20
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SLVS391B − OCTOBER 2001 − REVISED FEBRUARY 2002
PRINCIPLES OF OPERATION
The TPS6050x charge pumps provide a regulated output voltage in the range of 0.8 V to 3.3 V from an input
voltage of 1.8 V to 6.5 V. The devices use switched capacitor fractional conversion to achieve high efficiency
over the entire input and output voltage range. Regulation is achieved by sensing the output voltage and
enabling the internal switches as needed to maintain the selected output voltage. This skip-mode regulation is
used over a load range from 0 mA to 150 mA. At a higher output current, the device works in a linear regulation
mode.
The TPS6050x circuits consist of an oscillator, a voltage reference, an internal resistive feedback circuit (fixed
voltage version only), an error amplifier, two charge pump stages with MOSFET switches, a shutdown/start-up
circuit, and a control circuit.
short-circuit current limit and thermal protection
When the output voltage is lower than 0.6 V, the output current is limited to 300 mA typically. The device also
has a thermal protection which reduces the output current when the temperature of the chip exceeds 150°C.
The output current declines to 0 mA when the chip temperature rises to 160°C.
enable
Driving EN high disables the converter. This disables all internal circuits, reducing input current to only 0.05µA.
Leakage current drawn from the output pin OUT is a maximum of 1 µA. The device exits shutdown once EN
is set low (see start up procedure described below). The typical no-load start-up time is 80 µs. When the device
is disabled, the load is isolated from the input, an important feature in battery-operated products because it
extends the battery shelf life.
start-up procedure
The device is enabled when EN is set from logic high to logic low. The charge pump stages immediately start
switching to transfer energy to the output. In start-up until the output voltage has reached 0.6 V, the input current
is limited to 300 mA typically.
power good detector
The power good (PG) output is an open-drain output on all TPS6050x devices. The PG output pulls low when
the output is out of regulation. When the output rises to within 97% of regulation, the power good output goes
high. In shutdown, power good is pulled low. In normal operation, an external pullup resistor is typically used
to connect the PG pin to V or V . If the PG output is not used, it should remain unconnected.
O
I
V
O
V
(NOM)
V
IT
t
t
t
d,r
t
t
d,f
PG
1
d,r
0
EN
1
0
t
Figure 21. Power Good Timing Diagram
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SLVS391B − OCTOBER 2001 − REVISED FEBRUARY 2002
PRINCIPLES OF OPERATION
The TPS6050x devices use fractional conversion to achieve high efficiency over a wide input and output voltage
range. Depending on the input to output voltage ratio and output current, internal circuitry switches between an
LDO mode, a 2/3x mode, a 0.5x mode, and a 1/3x mode.
LDO conversion mode
In the LDO mode, the flying capacitors are no longer used for transferring energy. The switches 1, 2, 5, and 6
are closed and connect the input directly with the output. This mode is automatically selected if the input to output
voltage ratio does not allow the use of another conversion mode with higher efficiency. In LDO mode, the
regulation is done by switching off MOSFET 2 and 6 until the output current reaches the linear-skip current (150
mA typ). At a higher output current, the output voltage is regulated by controlling the resistance of the switch.
The minimum input to output voltage difference required for regulation is 1 V.
VIN
SW1
SW3
C1F
+
SW5
SW9
SW7
C2F
+
SW2
SW4
SW6
SW8
OUT
+
C
o
Figure 22. LDO Conversion Mode
2/3x conversion mode
In the first cycle, the two flying capacitors are connected in parallel and are charged up in series with the output
capacitor. In the second cycle, the flying capacitors are connected in series. This mode provides higher
efficiency than the LDO mode because the current into VIN is only 2/3 of the output current. The mode is
automatically selected if the input voltage is higher than 3/2 of the selected output voltage.
VIN
SW1
VIN
SW3
C1F
+
SW5
SW9
SW7
C2F
+
SW1
SW3
C1F
+
SW5
SW9
SW7
C2F
+
SW2
SW4
SW6
SW8
SW2
SW4
SW6
SW8
OUT
OUT
+
+
C
C
o
o
Phase 1: Charging of Flying Caps
Phase 2: Discharging of Flying Caps
Figure 23. 2/3x Conversion Mode
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SLVS391B − OCTOBER 2001 − REVISED FEBRUARY 2002
PRINCIPLES OF OPERATION
0.5x conversion mode
This conversion mode is internally selected if the input to output voltage ratio is greater than two (e.g. 3.6 V to
1.5 V conversion). In the 0.5x mode, the flying capacitors and the switches always work in parallel, which
reduces the resistance of the circuit compared to the other modes. In the first cycle, the flying capacitors are
charged in series with the output capacitors. In the second cycle, the flying capacitors are connected in parallel
with the output capacitor, which discharges the flying capacitors.
VIN
SW1
VIN
SW3
C1F
+
SW5
SW9
SW7
C2F
+
SW1
SW3
C1F
+
SW5
SW9
SW7
C2F
+
SW2
SW4
SW6
SW8
SW2
SW4
SW6
SW8
OUT
OUT
+
+
C
C
o
o
Phase 1: Charging of Flying Caps
Phase 2: Discharging of Flying Caps
Figure 24. 0.5x Conversion Mode
1/3x conversion mode
This mode was implemented to provide high efficiency even with an input to output voltage ratio greater than
three (e.g. 5 V to 1.5 V conversion). In the first cycle, the two flying capacitors are charged in series with the
output capacitor. In the next step, the flying capacitors which are charged to VIN/3, are connected in parallel
to the output capacitor.
VIN
SW1
VIN
SW1
SW5
SW3
C1F
+
SW7
C2F
+
SW3
C1F
+
SW5
SW9
SW7
C2F
+
SW9
SW2
SW4
SW8
SW2
SW4
SW6
SW8
SW6
OUT
OUT
+
+
C
C
o
o
Phase 1: Charging of Flying Caps
Phase 2: Discharging of Flying Caps
Figure 25. 1/3x Conversion Mode
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SLVS391B − OCTOBER 2001 − REVISED FEBRUARY 2002
DESIGN PROCEDURE
capacitor selection
Designed specifically for space-critical battery-powered applications, the complete converter requires only four
external capacitors. The capacitor values are closely linked to the required output current, output noise, and
ripple requirements. The input capacitor improves system efficiency by reducing the input impedance, and it
also stabilizes the input current. The value of the output capacitor, C , influences the stability of the voltage
o
regulator. The minimum required capacitance for C is 4.7 µF. Depending on the maximum allowed output ripple
o
voltage and load current, larger values can be chosen. For an output current greater than 150 mA, a minimum
output capacitor of 22 µF is required. Table 1 shows ceramic capacitor values recommended for low output
voltage ripple.
Table 1. Recommended Capacitors
MANUFACTURER
PART NUMBER
SIZE
CAPACITANCE
TYPE
LMK212BJ105KG
LMK212BJ225MG
EMK316BJ225KL
LMK316BJ475KL
JMK316BJ106KL
0805
0805
1206
1206
1206
1 µF
Ceramic
Ceramic
Ceramic
Ceramic
Ceramic
2.2 µF
2.2 µF
4.7 µF
10 µF
Taiyo Yuden
C2012X5R1C105M
C2012X5R1A225M
C2012X5R0J106M
0805
0805
0805
1 µF
2.2 µF
10 µF/6.3 V
Ceramic
Ceramic
Ceramic
TDK
Table 2 contains a list of manufacturers of ceramic capacitors. Ceramic capacitors provide the lowest output
voltage ripple because they typically have the lowest ESR-rating.
Table 2. Recommended Capacitor Manufacturers
MANUFACTURER
Taiyo Yuden
TDK
CAPACITOR TYPE
X7R/X5R ceramic
X7R/X5R ceramic
X7R/X5R ceramic
X7R/X5R ceramic
INTERNET
www.t−yuden.com
www.component.tdk.com
www.vishay.com
Vishay
Kemet
www.kemet.com
APPLICATION INFORMATION
typical application circuit for fixed voltage and adjustable voltage versions
Figure 26 shows the typical operation circuit. The TPS60501 to TPS60503 devices use an internal resistor
divider for sensing the output voltage. The FB pin must be connected externally with the output. For maximum
output current and best performance, 4 ceramic capacitors are recommended. For lower currents or higher
allowed output voltage ripple, other capacitors can also be used. It is recommended that the output capacitor
has a minimum value of 4.7 µF. This value is necessary to maintain a stable operation of the system. Flying
capacitors lower than 1 µF can be used, but this decreases the maximum output power. This means that the
device works in linear mode with lower output currents. The device works in the linear mode for an output current
of greater than 150 mA. With an output current greater than 150 mA, an output capacitor of ≥22 µF must be used.
Figure 26 shows that two 10-µF capacitors can also be used in parallel.
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SLVS391B − OCTOBER 2001 − REVISED FEBRUARY 2002
APPLICATION INFORMATION
C1F
C2F
C1F
C2F
1 µF
1 µF
1 µF
1 µF
8
6
3
4
8
6
3
4
C1F− C1F+ C2F−C2F+
C1F− C1F+ C2F− C2F+
max 150 mA
1.5 V
max 150 mA
INPUT
7
7
INPUT
1.8 V to 6.5 V
OUT
OUT
V
O
C
10 µF
+
2.5 V to 6.5 V
+
o
5
1
5
1
C
o
VIN
VIN
C
10 pF
c
10 µF
C
i
TPS60503
C
i
TPS60500
R1
10
2.2 µF
10
2.2 µF
FB
FB
R
R
R2
EN
EN
OFF/ON
2
OFF/ON
2
PG
PG
GND
GND
9
9
V
O
R1 + R2 ǒ Ǔ–R2
V
FB
(
)
R1 ) R2
Nominal Output Voltage Equation
Possible E24 Resistor Combination
R1 = 100 kΩ, R2 = 200 kΩ (1.20 V)
R1 = 160 kΩ, R2 = 180 kΩ (1.51 V)
Any
V
+
VFB
O
R2
1.2 V
1.5 V
1.6 V
1.8 V
2.5 V
R1 = 0.5R2
R1 = 0.875R2
R1 = R2
VFB = 0.8 V
R1 = 1.25R2
R1 = 2.125R2
R1 = 150 kΩ, R2 = 120 kΩ (1.80 V)
R1 = 510 kΩ, R2 = 240 kΩ (2.50 V)
R1 = 470 kΩ, R2 = 220 kΩ (2.51 V)
C1F
C2F
1 µF
1 µF
8
6
3
4
C1F− C1F+ C2F− C2F+
max 250 mA
7
INPUT
3.15 V to 6.5 V
OUT
+
+
5
1
C
C
1.5 V
VIN
out1
10 µF
out2
10 µF
C
TPS60503
i
10
4.7 µF
FB
R
EN
OFF/ON
2
PG
GND
9
Power supply with 1,4 mm maximum height for 250-mA output current
Figure 26. Typical Operating Circuit
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SLVS391B − OCTOBER 2001 − REVISED FEBRUARY 2002
APPLICATION INFORMATION
DSP supply with sequencing
This application shows a power supply for a typical DSP. DSPs usually have core voltages in the 1-V to 2.5-V
range, whereas the voltage at the I/O-pins (I/O voltage) is typically 3.3 V to interface with external logic and
converters. Therefore, a power supply with two output voltages is required. The application works with an input
voltage in the range of 3.5 V to 6.5 V. The maximum output current is 150 mA on each output.
The supply is enabled by pulling the enable pin (EN of the TPS60503) to GND. The step-down charge pump
starts and its power good (PG) output goes high. This enables the LDO which powers the I/O lines and generates
a reset signal for the DSP. Figure 27 shows the timing diagram of the start-up/shutdown procedure.
V
I/O
(NOM)
V
V
IT
TPS77133
V
VIN
VIN
OUT
OUT
I
t
V
(CORE)
47 kΩ
10 MΩ 1 MΩ
V
(NOM)
FB
V
IT
EN
RESET
GND
3.3 V
V
t
t
I/O
‡
1
RS
10 µF†
TPS60503
RESET
0
VIN
t
d
PG
PG
1
t
t
d
d
47 µF
1 MΩ
FB
OUT
1.5 V
V
(CORE)
C1F+
10 µF†
0
ENABLE
GND
EN
t
t
C1F−
1 µF
1 µF
EN
1
C2F+
C2F−
GND
0
†
‡
Recommended value for stability, DSP may require higher capacitance.
RS is the RESET output of the TPS77133.
Figure 27. DSP Supply With Sequencing
14
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SLVS391B − OCTOBER 2001 − REVISED FEBRUARY 2002
APPLICATION INFORMATION
LC-post filter
If the output voltage ripple of the stepdown charge pump is to high, an LC post filter can be used.
C1F
C2F
1 µF
1 µF
8
6
3
4
C1F− C1F+ C2F− C2F+
L
(P)
max 150 mA
7
INPUT
OUT
+
2.5 V to 6.5 V
5
1
C
10 µF
o
VIN
V
P(out)
C
(P)
C
2.2 µF
i
TPS60503
FB
10
R
EN
OFF/ON
2
PG
GND
9
Figure 28. LC-Post Filter
Table 3. Measurement Results on Different C , C , L Combinations; BW = 500 MHz
(fly) (P) (P)
C
[µF]
C
C
[µF]
C
(P)
I
(XF)
[µF]
O
TYPICAL
TYPICAL
V
[V]
I
L
[µH]
V
O
I
O
(P)
[µF]
V
V
P(Out)
[mV]
O(RMS)
[mV]
[mA]
[V]
V
PP
CERAMIC CERAMIC CERAMIC
CERAMIC
0.1 (X7R)
0.1 (X7R)
0.1 (X7R)
0.1 (X7R)
0.1 (X7R)
5
5
5
5
5
50
50
2.2
2.2
4.7
4.7
4.7
0.22
0.22
1
4.7
4.7
—
—
3.3
1.5
1.5
1.5
1.5
50
8
9
6
8
4
30
50
45
20
150
250
100
10
—
1
2 x 10
10
—
1
0.1
power supply with dynamic voltage scaling
Dynamic voltage scaling of the core can be used to reduce power consumption of a digital signal processor
(DSP). During the periods, in which the maximum DSP performance is not required, the core voltage can be
reduced when the DSP operates at a lower clock-rate. This idea is called runtime power control (RPC) and is
supported by modern DSPs. RPC extends battery-life time in handheld applications, like MP3 players, digital
cameras, PDA.
The supply of DSPs is separated into I/O interface and core supply. Interface is mostly powered by a 3.3-V
system supply, whereas core supply achieves voltages far below 1.5 V. The TPS60500 is powered by the 3.3-V
system supply. The DSP itself selects the applied core voltage.
The core voltage is switched between 1.5 V and 1.1 V by changing the feedback resistor network. A MOSFET
modifies the voltage divider at the feedback (FB) pin by switching a resistor. In this application, a general
purpose MOSFET BSS138 is used with a V
resistor network consists of R2, R3 and R4. C is the fast forward capacitor for improved line regulation.
of 1.6 V. A DSP 3.3-V I/O port drives the gate. The feedback
GS(th)
(ff)
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SLVS391B − OCTOBER 2001 − REVISED FEBRUARY 2002
APPLICATION INFORMATION
power supply with dynamic voltage scaling (continued)
General requirements for the application:
D
D
D
D
Output voltage1 (DSP core):
Output voltage 2 (DSP core):
Input voltage:
1.5 V 0.08 V
1.1 V +0.1 V –0.05 V
3 V to 3.3 V
Output current:
150 mA (10R load)
C1F
C2F
1 µF
1 µF
8
6
3
4
C1F− C1F+ C2F− C2F+
7
1.5 V / 1.1 V
150 mA
Input
3.3 V
OUT
5
1
C
C
10 µF
(ff)
150 pF
o
R2
R3
VIN
C
2.2 µF
i
TPS60500
FB
10
R4
T1
BSS138
R1
EN
DVS in
OFF/ON
R5
330 kΩ
2
PG
GND
C6
470 pF
9
Figure 29. Dynamic Voltage Scaling Application
To keep current through the adjustment resistor network as low as possible, the resistors are calculated to:
V
adjusted by R2 and R3
(1)
out1
V
= 1.1 V,
out1
V
FB
R3 +
R2 = 180 kΩ,
= 0.80 V,
V
*V
out1
FB
V
ref
R2
→R3 = 470 kΩ
(2)
(3)
V
adjusted by R2 and Rx = R3||R4
out2
V
= 1.5 V,
V
R2
out2
FB
Rx + ǒV
FBǓ
→Rx = 206 kΩ
* V
out2
1
Rx
1
1
1
→R4 = 360 kΩ
+
)
³ R4 +
R3 R4
1
1
*
Rx R3
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SLVS391B − OCTOBER 2001 − REVISED FEBRUARY 2002
APPLICATION INFORMATION
internet audio power supply
The input voltage from a single or dual NiCd, NiMH or alkaline cell is boosted to 3.3 V. This voltage is used as
system supply for the application and as an input voltage for the step-down charge pump which is used to
provide the core voltage for a DSP.
L1
10 µH
C
i
10 µF
7
SW
5
V
= 3.3 V
≥ 100 mA
6
9
O
VOUT
LBO
VBAT
LBI
I
O
C
22 µF
o
R1
R5
R3
10
Low Battery
Output
R2
TPS61010
FB
1
8
EN
Single or dual
NiCd,
R4
R
(C)
2
NiMH or
ADEN
COMP
Alkaline Cell
GND
9
C
100 kΩ
C
c2
10 nF
c1
10 pF
C1F
1 µF
C2F
1 µF
8
6
3
4
C1F− C1F+ C2F− C2F+
7
OUT
V
I
= 1.5 V
≤ 150 mA
O
O
5
1
C
o
10 µF
VIN
C
2.2 µF
i
TPS60503
FB
10
R
EN
OFF/ON
2
Power Good
Output
PG
GND
9
Figure 30. Internet Audio Power Supply
17
www.ti.com
ꢀ ꢁ ꢂ ꢃ ꢄꢅ ꢄ ꢄ ꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢄ ꢇ
ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢄ ꢈꢆ ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢄ ꢉ
SLVS391B − OCTOBER 2001 − REVISED FEBRUARY 2002
APPLICATION INFORMATION
layout and board space
All capacitors should be soldered as close as possible to the IC. A PCB layout proposal for a two-layer board
is shown in Figure 31. Care has been taken to connect all capacitors as close as possible to the circuit to achieve
optimized output voltage ripple performance.
Figure 31. Recommended PCB Layout for TPS6050x (top layer)
Figure 32. Recommended PCB Layout for TPS6050x (bottom layer)
18
www.ti.com
PACKAGE OPTION ADDENDUM
www.ti.com
19-Nov-2012
PACKAGING INFORMATION
Orderable Device
TPS60500DGS
Status Package Type Package Pins Package Qty
Eco Plan Lead/Ball Finish
MSL Peak Temp
Samples
Drawing
(1)
(2)
(3)
(Requires Login)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
VSSOP
DGS
DGS
DGS
DGS
DGS
DGS
DGS
DGS
DGS
DGS
DGS
DGS
DGS
DGS
10
10
10
10
10
10
10
10
10
10
10
10
10
10
80
80
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
TPS60500DGSG4
TPS60500DGSR
Green (RoHS
& no Sb/Br)
2500
2500
80
Green (RoHS
& no Sb/Br)
TPS60500DGSRG4
TPS60501DGS
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
TPS60501DGSG4
TPS60501DGSR
80
Green (RoHS
& no Sb/Br)
2500
2500
80
Green (RoHS
& no Sb/Br)
TPS60501DGSRG4
TPS60502DGS
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
TPS60502DGSG4
TPS60502DGSR
80
Green (RoHS
& no Sb/Br)
2500
2500
80
Green (RoHS
& no Sb/Br)
TPS60502DGSRG4
TPS60503DGS
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
TPS60503DGSG4
80
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
19-Nov-2012
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Nov-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS60500DGSR
TPS60501DGSR
TPS60502DGSR
VSSOP
VSSOP
VSSOP
DGS
DGS
DGS
10
10
10
2500
2500
2500
330.0
330.0
330.0
12.4
12.4
12.4
5.3
5.3
5.3
3.4
3.4
3.4
1.4
1.4
1.4
8.0
8.0
8.0
12.0
12.0
12.0
Q1
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Nov-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS60500DGSR
TPS60501DGSR
TPS60502DGSR
VSSOP
VSSOP
VSSOP
DGS
DGS
DGS
10
10
10
2500
2500
2500
340.5
340.5
340.5
338.1
338.1
338.1
20.6
20.6
20.6
Pack Materials-Page 2
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