TPS61014DGS [TI]
HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS; 高效率， 1节和2节电池升压转换器
| 型号： | TPS61014DGS |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS |
| 文件： | 总25页 (文件大小：452K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS61010, TPS61011
TPS61012, TPS61013
TPS61014, TPS61015, TPS61016
www.ti.com
SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
HIGH-EFFICIENCY, 1-CELL AND 2-CELL BOOST CONVERTERS
An autodischarge function allows discharging the out-
put capacitor during shutdown mode. This is especially
useful when a microcontroller or memory is supplied,
where residual voltage across the output capacitor can
cause malfunction of the applications. When program-
ming the ADEN-pin, the autodischarge function can be
disabled. A low-EMI mode is implemented to reduce
interference and radiated electromagnetic energy
when the converter enters the discontinuous conduc-
tion mode. The device is packaged in the micro-small
space saving 10-pin MSOP package.
FEATURES
•
Integrated Synchronous Rectifier for Highest
Power Conversion Efficiency (>95%)
•
Start-Up Into Full Load With Supply Voltages
as Low as 0.9 V, Operating Down to 0.8 V
•
•
200-mA Output Current From 0.9-V Supply
Powersave-Mode for Improved Efficiency at
Low Output Currents
•
Autodischarge Allows to Discharge Output
Capacitor During Shutdown
•
•
Device Quiescent Current Less Than 50 µA
Ease-of-Use Through Isolation of Load From
Battery During Shutdown of Converter
(TOP VIEW)
LBO
LBI
ADEN
SW
EN
COMP
FB
1
2
3
4
5
10
9
•
•
•
•
Integrated Antiringing Switch Across Inductor
Integrated Low Battery Comparator
Micro-Small 10-Pin MSOP Package
Applications Include All Single- or Dual-Cell
Battery Operated Products Like Internet Audio
Players, Pager, Portable Medical Diagnostic
Equipment, Remote Control, Wireless
Headsets
8
GND
VOUT
7
VBAT
6
ACTUAL SIZE
(3,05mm x 4,98mm)
•
EVM Available (TPS6101xEVM-157)
EFFICIENCY
vs
DESCRIPTION
OUTPUT CURRENT
100
The TPS6101x devices are boost converters intended
for systems that are typically operated from a single- or
dual-cell nickel-cadmium (NiCd), nickel-metal hydride
(NiMH), or alkaline battery. The converter output volt-
age can be adjusted from 1.5 V to a maximum of 3.3 V,
by an external resistor divider or, is fixed internally on
the chip. The devices provide an output current of 200
mA with a supply voltage of only 0.9 V. The converter
starts up into a full load with a supply voltage of only 0.9
V and stays in operation with supply voltages down to
0.8 V.
VBAT = 2.4 V,
= 3.3 V
V
O
90
80
70
60
50
40
The converter is based on a fixed frequency, current
mode, pulse-width-modulation (PWM) controller that
goes automatically into power save mode at light load.
It uses a built-in synchronous rectifier, so, no external
Schottky diode is required and the system efficiency is
improved. The current through the switch is limited to a
maximum value of 1300 mA. The converter can be
disabled to minimize battery drain. During shutdown,
the load is completely isolated from the battery.
0.1
1
10
100
1000
I
O
− Output Current − mA
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily in-
cludetestingofallparameters.
Copyright © 2000–2003, Texas Instruments Incorporated
TPS61010, TPS61011
TPS61012, TPS61013
TPS61014, TPS61015, TPS61016
www.ti.com
SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
L1
10 µH
C
IN
7
10 µF
SW
5
6
9
VBAT
VOUT = 3.3 V
VOUT
LBO
C
OUT
R3
22 µF
R1
10
LBI
Low Battery Warning
R2
TPS61016
ON 1
ON 8
3
2
OFF
OFF
EN
FB
COMP
R
C
100 kΩ
ADEN
GND
4
C
10 pF
C
C2
10 nF
C1
Figure 1. Typical Application Circuit for Fixed Output Voltage Option
AVAILABLE OUTPUT VOLTAGE OPTIONS
(1)
TA
OUTPUT VOLTAGE
PART NUMBER
MARKING DGS PACKAGE
Adjustable from 1.5 V to 3.3 V
TPS61010DGS
TPS61011DGS
TPS61012DGS
TPS61013DGS
TPS61014DGS
TPS61015DGS
TPS61016DGS
AIP
AIQ
AIR
AIS
AIT
AIU
AIV
1.5 V
1.8 V
2.5 V
2.8 V
3.0 V
3.3 V
-40°C to 85°C
(1)
The DGS package is available taped and reeled. Add R suffix to device type (e.g. TPS61010DGSR) to order quantities of 3000
devices per reel.
2
TPS61010, TPS61011
TPS61012, TPS61013
TPS61014, TPS61015, TPS61016
www.ti.com
SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
FUNCTIONAL BLOCK DIAGRAMS
fixed output voltage versions TPS61011 to TPS61016
L1
SW
C
IN
Bias
Antiringing
Comparator
and Switch
Control
_
+
VOUT
VBAT
EN
C
OUT
ADEN
Current Sense,
Current Limit, Slope
Compensation
UVLO
Control Logic
Oscillator
Gate Drive
ADEN
_
ADEN
LBI
+
_
_
FB
Error
Comparator
Bandgap
Reference
+
Error
Amplifier
LBO
+
VREF
GND
COMP
adjustable output voltage version TPS61010
L1
SW
C
IN
Bias
Antiringing
Comparator
and Switch
Control
_
+
VOUT
OUT
VBAT
EN
C
ADEN
Current Sense,
Current Limit, Slope
Compensation
UVLO
Control Logic
Oscillator
Gate Drive
ADEN
_
ADEN
LBI
FB
+
_
_
Error
Comparator
Bandgap
Reference
+
Error
Amplifier
LBO
+
VREF
GND
COMP
3
TPS61010, TPS61011
TPS61012, TPS61013
TPS61014, TPS61015, TPS61016
www.ti.com
SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
Terminal Functions
terminal
I/O
description
name
no.
ADEN
8
I
Autodischarge input. The autodischarge function is enabled if this pin is connected to VBAT, it is disabled if ADEN
is tied to GND.
COMP
EN
2
1
I
I
Compensation of error amplifier. Connect an R/C/C network to set frequency response of control loop.
Chip-enable input. The converter is switched on if this pin is set high, it is switched off if this pin is connected to
GND.
FB
3
I
Feedback input for adjustable output voltage version TPS61010. Output voltage is programmed depending on the
output voltage divider connected there. For the fixed output voltage versions, leave FB-pin unconnected.
GND
LBI
4
9
Ground
I
Low-battery detector input. A low battery warning is generated at LBO when the voltage on LBI drops below the
threshold of 500 mV. Connect LBI to GND or VBAT if the low-battery detector function is not used. Do not leave
this pin floating.
LBO
10
O
Open-drain low-battery detector output. This pin is pulled low if the voltage on LBI drops below the threshold of
500 mV. A pullup resistor must be connected between LBO and VOUT.
SW
7
5
6
I
O
I
Switch input pin. The inductor is connected to this pin.
VOUT
VBAT
Output voltage. Internal resistor divider sets regulated output voltage in fixed output voltage versions.
Supply pin
DETAILED DESCRIPTION
Controller Circuit
The device is based on a current-mode control topology using a constant frequency pulse-width modulator to
regulate the output voltage. The controller limits the current through the power switch on a pulse by pulse basis.
The current-sensing circuit is integrated in the device, therefore, no additional components are required. Due to
the nature of the boost converter topology used here, the peak switch current is the same as the peak inductor
current, which will be limited by the integrated current limiting circuits under normal operating conditions.
The control loop must be externally compensated with an R-C-C network connected to the COMP-pin.
Synchronous Rectifier
The device integrates an N-channel and a P-channel MOSFET transistor to realize a synchronous rectifier. There
is no additional Schottky diode required. Because the device uses a integrated low rDS(on) PMOS switch for
rectification, the power conversion efficiency reaches 95%.
A special circuit is applied to disconnect the load from the input during shutdown of the converter. In conventional
synchronous rectifier circuits, the backgate diode of the high-side PMOS is forward biased in shutdown and
allows current flowing from the battery to the output. This device, however, uses a special circuit to disconnect
the backgate diode of the high-side PMOS and so, disconnects the output circuitry from the source when the
regulator is not enabled (EN = low).
The benefit of this feature for the system design engineer, is that the battery is not depleted during shutdown of
the converter. So, no additional effort has to be made by the system designer to ensure disconnection of the
battery from the output of the converter. Therefore, design performance will be increased without additional costs
and board space.
Power-Save Mode
The TPS61010 is designed for high efficiency over a wide output current range. Even at light loads, the efficiency
stays high because the switching losses of the converter are minimized by effectively reducing the switching
frequency. The controller enters a powersave-mode if certain conditions are met. In this mode, the controller only
switches on the transistor if the output voltage trips below a set threshold voltage. It ramps up the output voltage
with one or several pulses, and goes again into powersave-mode once the output voltage exceeds a set
threshold voltage.
4
TPS61010, TPS61011
TPS61012, TPS61013
TPS61014, TPS61015, TPS61016
www.ti.com
SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
DETAILED DESCRIPTION (continued)
Device Enable
The device is shut down when EN is set to GND. In this mode, the regulator stops switching, all internal control
circuitry including the low-battery comparator, is switched off, and the load is disconnected from the input (as
described above in the synchronous rectifier section). This also means that the output voltage may drop below
the input voltage during shutdown.
The device is put into operation when EN is set high. During start-up of the converter, the duty cycle is limited in
order to avoid high peak currents drawn from the battery. The limit is set internally by the current limit circuit and
is proportional to the voltage on the COMP-pin.
Under-Voltage Lockout
An under-voltage lockout function prevents the device from starting up if the supply voltage on VBAT is lower
than approximately 0.7 V. This under-voltage lockout function is implemented in order to prevent the
malfunctioning of the converter. When in operation and the battery is being discharged, the device will
automatically enter the shutdown mode if the voltage on VBAT drops below approximately 0.7 V.
Autodischarge
The autodischarge function is useful for applications where the supply voltage of a µC, µP, or memory has to be
removed during shutdown in order to ensure a defined state of the system.
The autodischarge function is enabled when the ADEN is set high, and is disabled when the ADEN is set to
GND. When the autodischarge function is enabled, the output capacitor will be discharged after the device is
shut down by setting EN to GND. The capacitors connected to the output are discharged by an integrated switch
of 300 Ω, hence the discharge time depends on the total output capacitance. The residual voltage on VOUT is
less than 0.4 V after autodischarge.
Low-Battery Detector Circuit (LBI and LBO)
The low-battery detector circuit is typically used to supervise the battery voltage and to generate an error flag
when the battery voltage drops below a user-set threshold voltage. The function is active only when the device is
enabled. When the device is disabled, the LBO-pin is high impedance. The LBO-pin goes active low when the
voltage on the LBI-pin decreases below the set threshold voltage of 500 mV ±15 mV, which is equal to the
internal reference voltage. The battery voltage, at which the detection circuit switches, can be programmed with a
resistive divider connected to the LBI-pin. The resistive divider scales down the battery voltage to a voltage level
of 500 mV, which is then compared to the LBI threshold voltage. The LBI-pin has a built-in hysteresis of 10 mV.
See the application section for more details about the programming of the LBI-threshold.
If the low-battery detection circuit is not used, the LBI-pin should be connected to GND (or to VBAT) and the
LBO-pin can be left unconnected. Do not let the LBI-pin float.
Antiringing Switch
The device integrates a circuit that removes the ringing that typically appears on the SW-node when the
converter enters the discontinuous current mode. In this case, the current through the inductor ramps to zero and
the integrated PMOS switch turns off to prevent a reverse current from the output capacitors back to the battery.
Due to remaining energy that is stored in parasitic components of the semiconductors and the inductor, a ringing
on the SW pin is induced. The integrated antiringing switch clamps this voltage internally to VBAT and therefore,
dampens this ringing.
Adjustable Output Voltage
The devices with fixed output voltages are trimmed to operate with an output voltage accuracy of ±3%.
5
TPS61010, TPS61011
TPS61012, TPS61013
TPS61014, TPS61015, TPS61016
www.ti.com
SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
The accuracy of the adjustable version is determined by the accuracy of the internal voltage reference, the
controller topology, and the accuracy of the external resistor. The reference voltage has an accuracy of ±4% over
line, load, and temperature. The controller switches between fixed frequency and pulse-skip mode, depending on
load current. This adds an offset to the output voltage that is equivalent to 1% of VO. The tolerance of the
resistors in the feedback divider determine the total system accuracy.
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range (unless otherwise noted)
UNIT
-0.3 V to 3.6 V
-0.3 V to 7 V
3.6 V
Input voltage range on VBAT, VOUT, SW, EN, LBI, FB, ADEN
SW
Voltage range on: LBO, COMP
Peak current into SW
1300 mA
Continuous total power dissipation
Operating free-air temperature range, TA
Maximum junction temperature, TJ
Storage temperature range, Tstg
Lead temperature 1,6 mm (1/16 inch) from case for 10s
See Dissipation Rating Table
-40°C to 85°C
150°C
-65°C to 150°C
260°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
DISSIPATION RATING TABLE
PACKAGE
DGS
TA <25°C POWER
DERATING FACTORABOVE TA TA = 70°C POWER
= 25°C RATING
TA = 85°C POWER
RATING
RATING
424 mW
3.4 mW/°C
271 mW
220 mW
RECOMMENDED OPERATING CONDITIONS
MIN
0.8
NOM MAX
VOUT
UNIT
Supply voltage at VBAT, VI
Maximum output current at VIN = 1.2 V, IO
Maximum output current at VIN = 2.4 V, IO
Inductor, L1
V
100
200
10
mA
mA
µH
µF
µF
°C
33
10
22
Input capacitor, Ci
Output capacitor, Co
10
47
Operating virtual junction temperature, TJ
-40
125
6
TPS61010, TPS61011
TPS61012, TPS61013
TPS61014, TPS61015, TPS61016
www.ti.com
SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range, VBAT = 1.2 V, EN = VBAT (unless otherwise noted)
PARAMETER
TEST CONDITIONS
RL = 33 Ω
MIN
TYP
0.85
MAX
UNIT
0.9
3.3
Minimum input voltage for
start-up
VI
RL = 3 kΩ, TA = 25 °C
IO = 100 mA
0.8
0.8
V
Input voltage once started
Programmable output
voltage range
TPS61010, IOUT = 100 mA
1.5
V
V
TPS61011, 0.8 V < VI < VO, IO = 0 to 100 mA
TPS61012, 0.8 V < VI < VO, IO = 0 to 100 mA
TPS61013, 0.8 V < VI < VO, IO = 0 to 100 mA
TPS61013, 1.6 V < VI < VO, IO = 0 to 200 mA
TPS61014, 0.8 V < VI < VO, IO = 0 to 100 mA
TPS61014, 1.6 V < VI < VO, IO = 0 to 200 mA
TPS61015, 0.8 V < VI < VO, IO = 0 to 100 mA
TPS61015, 1.6 V < VI < VO, IO = 0 to 200 mA
TPS61016, 0.8 V < VI < VO, IO = 0 to 100 mA
TPS61016, 1.6 V < VI < VO, IO = 0 to 200 mA
VI ≥ 0.8 V
1.45
1.74
2.42
2.42
2.72
2.72
2.9
1.5
1.8
2.5
2.5
2.8
2.8
3.0
3.0
3.3
3.3
1.55
1.86
2.58
2.58
2.88
2.88
3.1
V
V
V
V
V
V
V
V
VO
Output voltage
2.9
3.1
3.2
3.4
3.2
3.4
100
250
0.39
0.54
0.85
0.95
1
Maximum continuous output
current
IO
mA
VI ≥ 1.8 V
TPS61011, once started
0.48
0.56
0.93
1.01
1.06
1.13
500
500
85%
0.37
0.45
0.2
TPS61012, once started
TPS61013, once started
I(SW)
Switch current limit
A
TPS61014, once started
TPS61015, once started
TPS61016, once started
1.07
480
420
V(FB)
Feedback voltage
520
780
mV
f
Oscillator frequency
kHz
D
Maximum duty cycle
NMOS switch on-resistance
PMOS switch on-resistance
NMOS switch on-resistance
PMOS switch on-resistance
0.51
0.54
0.37
0.45
rDS(on)
VO = 1.5 V
VO = 3.3 V
Ω
Ω
rDS(on)
0.3
(1)
Line regulation
Load regulation
VI = 1.2 V to 1.4 V, IO = 100 mA
VI = 1.2 V; IO = 50 mA to 100 mA
0.3
%/V
(1)
0.1
Autodischarge switch
resistance
300
400
Ω
Residual output voltage
after autodischarge
ADEN = VBAT; EN = GND
V(LBI) voltage decreasing
0.4
V
(2)
VIL
LBI voltage threshold
LBI input hysteresis
LBI input current
480
500
10
520
mV
mv
0.01
0.04
0.03
0.2
VOL
LBO output low voltage
V(LBI) = 0 V, VO = 3.3 V, I(OL) = 10 µA
V
LBO output leakage current V(LBI) = 650 mV, V(LBO) = VO
0.03
µA
FB input bias current
V(FB) = 500 mV
I(FB)
0.01
0.03
(TPS61010 only)
(1)
(2)
Line and load regulation is measured as a percentage deviation from the nominal value (i.e., as percentage deviation from the nominal
output voltage). For line regulation, x %/V stands for ±x% change of the nominal output voltage per 1-V change on the input/supply
voltage. For load regulation, y% stands for ±y% change of the nominal output voltage per the specified current change.
For proper operation the voltage at LBI may not exceed the voltage at VBAT
.
7
TPS61010, TPS61011
TPS61012, TPS61013
TPS61014, TPS61015, TPS61016
www.ti.com
SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
ELECTRICAL CHARACTERISTICS (continued)
over recommended operating free-air temperature range, VBAT = 1.2 V, EN = VBAT (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
EN and ADEN input low
voltage
VIL
VIH
0.8 V < VBAT < 3.3 V
0.2 × VBAT
V
EN and ADEN input high
voltage
0.8 V < VBAT < 3.3 V
0.8 × VBAT
V
EN and ADEN input current EN and ADEN = GND or VBAT
0.01
0.03
46
8
µA
VBAT/SW
VO
31
5
Quiescent current into pins
VBAT/SW and VOUT
Iq
IL = 0 mA, VEN = VI
µA
µA
Shutdown current from
power source
Ioff
VEN = 0 V, ADEN = VBAT, TA= 25°C
1
3
PARAMETER MEASUREMENT INFORMATION
L1
10 µH
C
10 µF
IN
List of Components:
IC1: Only Fixed Output Versions
(Unless Otherwise Noted)
7
SW
5
6
9
VBAT
VOUT = 3.3 V
VOUT
LBO
L1:
SUMIDA CDRH6D38 – 100
X7R/X5R Ceramic
: X7R/X5R Ceramic
C
22 µF
OUT
C
IN
C
OUT
:
R3
R1
R2
10
LBI
Low Battery Warning
TPS61016
8
3
2
ADEN
EN
FB
COMP
R
C
100 kΩ
ON 1
OFF
GND
4
C
10 pF
C
C2
10 nF
C1
Figure 2. Circuit Used for Typical Characteristics Measurements
8
TPS61010, TPS61011
TPS61012, TPS61013
TPS61014, TPS61015, TPS61016
www.ti.com
SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
vs Input voltage for VO = 2.5 V, 3.3 V
3
4
5
6
7
8
9
Maximum output current
vs Input voltage for VO = 1.5 V, 1.8 V
vs Output current for VI = 1.2 VVO = 1.5 V, L1 = Sumida CDR74, 10 µH
vs Output current for VI = 1.2 VVO = 2.5 V, L1 = Sumida CDR74, 10 µH
vs Output current for VIN = 1.2 VVO = 3.3 V, L1 = Sumida CDR74, 10 µH
vs Output current for VI = 2.4 VVO = 3.3 V, L1 = Sumida CDR74, 10 µH
vs Input voltage for IO = 10 mA, IO = 100 mA, IOUT = 200 mAVO = 3.3 V, L1
= Sumida CDR74, 10 µH
TPS61016, VBAT = 1.2 V, IO = 100 mA
Sumida CDRH6D38 - 10 µH
Sumida CDRH5D18 - 10 µH
Sumida CDRH74 - 10 µH
Sumida CDRH74B - 10 µH
Efficiency
Coilcraft DS 1608C - 10 µH
Coilcraft DO 1608C - 10 µH
Coilcraft DO 3308P - 10 µH
Coilcraft DS 3316 - 10 µH
10
Coiltronics UP1B - 10 µH
Coiltronics UP2B - 10 µH
Murata LQS66C - 10 µH
Murata LQN6C - 10 µH
TDK SLF 7045 - 10 µH
TDK SLF 7032 - 10 µH
vs Output current TPS61011
vs Output current TPS61013
vs Output current TPS61016
vs Load resistance
11
12
13
14
15
16
17
18
19
20
21
Output voltage
Minimum supply start-up voltage
No-load supply current
Shutdown supply current
Switch current limit
vs Input voltage
vs Input voltage
vs Output voltage
Output voltage (ripple) in continuous modeInductor current
Output voltage (ripple) in discontinuous modeInductor current
Load transient response for output current step of 50 mA to 100 mA
Waveforms
Line transient response for supply voltage step from 1.08 V to 1.32 V at
IO = 100 mA
Converter start-up time after enable
22
9
TPS61010, TPS61011
TPS61012, TPS61013
TPS61014, TPS61015, TPS61016
www.ti.com
SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
TYPICAL CHARACTERISTICS
MAXIMUM OUTPUT CURRENT
MAXIMUM OUTPUT CURRENT
vs
vs
INPUT VOLTAGE
INPUT VOLTAGE
0.9
0.8
0.7
0.6
1.4
1.2
1
V
O
= 1.8 V
V
O
= 2.5 V
0.8
0.6
0.4
V
O
= 3.3 V
0.5
0.4
V
O
= 1.5 V
0.3
0.2
0.1
0
0.2
0
0.5
1
1.5
2
2.5
3
0.5
1
1.5
2
V − Input Voltage − V
I
V − Input Voltage − V
I
Figure 3.
Figure 4.
EFFICIENCY
vs
OUTPUT CURRENT
EFFICIENCY
vs
OUTPUT CURRENT
100
100
VBAT = 1.2 V,
= 1.5 V
VBAT = 1.2 V,
= 2.5 V
V
O
V
O
90
80
70
60
50
40
90
80
70
60
50
40
0.1
1
10
100
1000
0.1
1
10
100
1000
I
O
− Output Current − mA
I
O
− Output Current − mA
Figure 6.
Figure 5.
10
TPS61010, TPS61011
TPS61012, TPS61013
TPS61014, TPS61015, TPS61016
www.ti.com
SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
TYPICAL CHARACTERISTICS (continued)
EFFICIENCY
EFFICIENCY
vs
vs
OUTPUT CURRENT
100
OUTPUT CURRENT
100
90
80
70
60
50
40
VBAT = 2.4 V,
VBAT = 1.2 V,
V
O
= 3.3 V
V
O
= 3.3 V
90
80
70
60
50
40
0.1
1
10
100
1000
0.1
1
10
100
1000
I
O
− Output Current − mA
I
O
− Output Current − mA
Figure 7.
Figure 8.
EFFICIENCY
vs
INPUT VOLTAGE
EFFICIENCY
vs
INDUCTOR TYPE
91
100
90
VBAT = 1.2 V,
V
O
= 3.3 V
V
O
= 3.3 V,
90
89
88
87
I
O
= 100 mA
I
= 200 mA
O
80
I
O
= 10 mA
I
O
= 100 mA
70
86
85
60
84
83
50
40
0.5
1
1.5
2
2.5
3
3.5
V − Input Voltage − V
I
Inductor Type
Figure 9.
Figure 10.
11
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SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
TYPICAL CHARACTERISTICS (continued)
OUTPUT VOLTAGE
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
vs
OUTPUT CURRENT
1.75
2.75
VBAT = 1.2 V
VBAT = 1.2 V
1.50
2.50
2.25
0.1
1.25
1
10
100
1 A
0.1
1
10
100
1 A
I
O
− Output Current − mA
I
O
− Output Current − mA
Figure 11.
Figure 12.
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
MINIMUM START-UP SUPPLY VOLTAGE
vs
LOAD RESISTANCE
1
0.9
0.8
3.50
VBAT = 1.2 V
3.25
0.7
3
0.1
100
1
1
10
100
1 A
Load Resistance − Ω
I
O
− Output Current − mA
Figure 13.
Figure 14.
12
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SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
TYPICAL CHARACTERISTICS (continued)
NO-LOAD SUPPLY CURRENT
SHUTDOWN SUPPLY CURRENT
vs
vs
INPUT VOLTAGE
INPUT VOLTAGE
60
6
5
4
3
2
1
0
T
A
= 85° C
T
= 85°C
A
50
40
30
20
T
= 25°C
A
T
A
= −40°C
T
A
= −40° C
10
0
T
A
= 25° C
0.5
1
1.5
2
2.5
3
3.5
0.5
1
1.5
2
2.5
3
3.5
V − Input Voltage − V
I
V − Input Voltage − V
I
Figure 15.
Figure 16.
SWITCH CURRENT LIMIT
vs
OUTPUT VOLTAGE
OUTPUT VOLTAGE RIPPLE IN CONTINUOUS MODE
1.2
Output Voltage
20 mV/div, AC
1
0.8
0.6
0.4
0.2
0
Inductor Current
50 mA/div, AC
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3
t − Time − µs
V
O
− Output Voltage − V
Figure 17.
Figure 18.
13
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SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
TYPICAL CHARACTERISTICS (continued)
OUTPUT VOLTAGE RIPPLE IN DISCONTINUOUS MODE
LOAD TRANSIENT RESPONSE
Output Voltage
50 mV/div, AC
Output Voltage
50 mV/div, AC
Output Current
50 mA/div, AC
Inductor Current
50 mA/div, AC
0
1
2
3
4
5
6
7
8
9
10
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
t − Time − ms
Figure 20.
t − Time − ms
Figure 19.
LINE TRANSIENT RESPONSE
CONVERTER START-UP TIME AFTER ENABLE
Enable,
Input Voltage
2 V/div,DC
100 mV/div, AC
Output Voltage,
1 V/div,DC
Input Current,
200 mA/div,DC
V
(SW)
,
2 V/div,DC
Output Voltage
50 mA/div, AC
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
t − Time − ms
Figure 21.
t − Time − ms
Figure 22.
14
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TPS61012, TPS61013
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SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
DESIGN PROCEDURE
The TPS6101x boost converter family is intended for systems that are powered by a single-cell NiCd or NiMH
battery with a typical terminal voltage between 0.9 V to 1.6 V. It can also be used in systems that are powered by
two-cell NiCd or NiMH batteries with a typical stack voltage between 1.8 V and 3.2 V. Additionally, single- or
dual-cell, primary and secondary alkaline battery cells can be the power source in systems where the TPS6101x
is used.
Programming the TPS61010 Adjustable Output Voltage Device
The output voltage of the TPS61010 can be adjusted with an external resistor divider. The typical value of the
voltage on the FB pin is 500 mV in fixed frequency operation and 485 mV in the power-save operation mode.
The maximum allowed value for the output voltage is 3.3 V. The current through the resistive divider should be
about 100 times greater than the current into the FB pin. The typical current into the FB pin is 0.01 µA, and the
voltage across R4 is typically 500 mV. Based on those two values, the recommended value for R4 is in the range
of 500 kΩ in order to set the divider current at 1 µA. From that, the value of resistor R3, depending on the
needed output voltage (VO), can be calculated using Equation 1.
V
V
O
O
ǒ Ǔ+ 500 kW ǒ Ǔ
R3 + R4
–1
–1
V
500 mV
FB
(1)
If, as an example, an output voltage of 2.5 V is needed, a 2-MΩ resistor should be chosen for R3.
L1
10 µH
C
IN
7
10 µF
10 V
SW
5
6
9
VBAT
LBI
VOUT = 3.3 V
VOUT
C
OUT
R5
R3
R4
22 µF
10 V
R1
10
3
LBO
FB
Low Battery Warning
R2
TPS61016
1
8
EN
1 Cell
NiMH,
NiCd or
Alkaline
R
C
2
COMP
ADEN
100 kΩ
GND
4
C
C
C2
C1
10 pF
10 nF
Figure 23. Typical Application Circuit for Adjustable Output Voltage Option
The output voltage of the adjustable output voltage version changes with the output current. Due to
device-internal ground shift, which is caused by the high switch current, the internal reference voltage and the
voltage on the FB pin increases with increasing output current. Since the output voltage follows the voltage on
the FB pin, the output voltage rises as well with a rate of 1 mV per 1-mA output current increase. Additionally,
when the converter goes into pulse-skip mode at output currents around 5 mA and lower, the output voltage
drops due to the hysteresis of the controller. This hysteresis is about 15 mV, measured on the FB pin.
programming the low battery comparator threshold voltage
The current through the resistive divider should be about 100 times greater than the current into the LBI pin. The
typical current into the LBI pin is 0.01 µA, the voltage across R2 is equal to the reference voltage that is
generated on-chip, which has a value of 500 mV ±15 mV. The recommended value for R2 is therefore in the
range of 500 kΩ. From that, the value of resistor R1, depending on the desired minimum battery voltage VBAT
,
can be calculated using Equation 2.
15
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TPS61012, TPS61013
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SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
DESIGN PROCEDURE (continued)
V
V
BAT
BAT
ǒ Ǔ+ 500 kW ǒ Ǔ
R1 + R2
–1
–1
V
500 mV
REF
(2)
For example, if the low-battery detection circuit should flag an error condition on the LBO output pin at a battery
voltage of 1 V, a resistor in the range of 500 kΩ should be chosen for R1. The output of the low battery
comparator is a simple open-drain output that goes active low if the battery voltage drops below the programmed
threshold voltage on LBI. The output requires a pullup resistor with a recommended value of 1 MΩ, and should
only be pulled up to the VO. If not used, the LBO pin can be left floating or tied to GND.
inductor selection
A boost converter normally requires two main passive components for storing energy during the conversion. A
boost inductor is required and a storage capacitor at the output. To select the boost inductor, it is recommended
to keep the possible peak inductor current below the current limit threshold of the power switch in the chosen
configuration. For example, the current limit threshold of the TPS61010’s switch is 1100 mA at an output voltage
of 3.3 V. The highest peak current through the inductor and the switch depends on the output load, the input
(VBAT), and the output voltage (VO). Estimation of the maximum average inductor current can be done using
Equation 3.
V
O
0.8
I + I
L
OUT
V
BAT
(3)
For example, for an output current of 100 mA at 3.3 V, at least 515-mA of current flows through the inductor at a
minimum input voltage of 0.8 V.
The second parameter for choosing the inductor is the desired current ripple in the inductor. Normally, it is
advisable to work with a ripple of less than 20% of the average inductor current. A smaller ripple reduces the
magnetic hysteresis losses in the inductor, as well as output voltage ripple and EMI. But in the same way,
regulation time at load changes rises. In addition, a larger inductor increases the total system costs.
With those parameters, it is possible to calculate the value for the inductor by using Equation 4.
ǒV
BAT Ǔ
V
* V
BAT
OUT
L +
DI ƒ V
L
OUT
(4)
Parameter 7 is the switching frequency and∆ IL is the ripple current in the inductor, i.e., 20% × IL.
In this example, the desired inductor has the value of 12 µH. With this calculated value and the calculated
currents, it is possible to choose a suitable inductor. Care must be taken that load transients and losses in the
circuit can lead to higher currents as estimated in equation 3. Also, the losses in the inductor caused by magnetic
hysteresis losses and copper losses are a major parameter for total circuit efficiency.
The following inductor series from different suppliers were tested. All work with the TPS6101x converter within
their specified parameters:
Table 1. Recommended Inductors
VENDOR
RECOMMENDED INDUCTOR SERIES
Sumida CDR74B
Sumida
Sumida CDRH74
Sumida CDRH5D18
Sumida CDRH6D38
Coilcraft DO 1608C
Coilcraft DS 1608C
Coilcraft
Coilcraft DS 3316
Coilcraft DT D03308P
16
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TPS61012, TPS61013
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SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
DESIGN PROCEDURE (continued)
Recommended Inductors (continued)
VENDOR
RECOMMENDED INDUCTOR SERIES
Coiltronics
Coiltronics UP1B
Coiltronics UP2B
Murata LQS66C
Murata LQN6C
TDK SLF 7045
TDK SLF 7032
Murata
TDK
capacitor selection
The major parameter necessary to define the output capacitor is the maximum allowed output voltage ripple of
the converter. This ripple is determined by two parameters of the capacitor, the capacitance and the ESR. It is
possible to calculate the minimum capacitance needed for the defined ripple, supposing that the ESR is zero, by
using Equation 5.
ǒV
ƒ DV V
BAT Ǔ
I
* V
OUT
OUT
C
+
min
OUT
(5)
Parameter f is the switching frequency and ∆V is the maximum allowed ripple.
With a chosen ripple voltage of 15 mV, a minimum capacitance of 10 µF is needed. The total ripple is larger due
to the ESR of the output capacitor. This additional component of the ripple can be calculated using Equation 6.
DV
I
R
ESR
OUT
ESR
(6)
An additional ripple of 30 mV is the result of using a tantalum capacitor with a low ESR of 300 mΩ. The total
ripple is the sum of the ripple caused by the capacitance and the ripple caused by the ESR of the capacitor. In
this example, the total ripple is 45 mV. It is possible to improve the design by enlarging the capacitor or using
smaller capacitors in parallel to reduce the ESR or by using better capacitors with lower ESR, like ceramics. For
example, a 10-µF ceramic capacitor with an ESR of 50 mΩ is used on the evaluation module (EVM). Tradeoffs
must be made between performance and costs of the converter circuit.
A 10-µF input capacitor is recommended to improve transient behavior of the regulator. A ceramic capacitor or a
tantalum capacitor with a 100-nF ceramic capacitor in parallel placed close to the IC is recommended.
Compensation of the Control Loop
An R/C/C network must be connected to the COMP pin in order to stabilize the control loop of the converter.
Both the pole generated by the inductor L1 and the zero caused by the ESR and capacitance of the output
capacitor must be compensated. The network shown in Figure 5 satisfies these requirements.
R
C
COMP
100 kΩ
C
C1
C
C2
10 pF
10 nF
Figure 24. Compensation of Control Loop
Resistor RC and capacitor CC2 depend on the chosen inductance. For a 10-µH inductor, the capacitance of CC2
should be chosen to 10 nF, or in other words, if the inductor is XXµH, the chosen compensation capacitor should
be XX nF, the same number value. The value of the compensation resistor is then chosen based on the
requirement to have a time constant of 1 ms, for the R/C network RC and CC2, hence for a 33-nF capacitor, a
33-kΩ resistor should be chosen for RC.
17
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TPS61012, TPS61013
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SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
DESIGN PROCEDURE (continued)
Capacitor CC1 depends on the ESR and capacitance value of the output capacitor, and on the value chosen for
RC. Its value is calculated using Equation 7.
C
ESR
OUT
COUT
C
+
C1
R
C
(7)
For a selected output capacitor of 22 µF with an ESR of 0.2Ω , an RC of 33 kΩ, the value of CC1 is in the range
of 100 pF.
Table 2. Recommended Compensation Components
OUTPUT CAPACITOR
INDUCTOR[µH]
RC[kΩ]
CC1[pF]
CC2[nF]
CAPACITANCE[µF]
ESR[Ω]
0.2
33
22
10
10
22
22
22
10
33
120
150
100
10
33
22
10
10
0.3
47
0.4
100
100
0.1
LAYOUT CONSIDERATIONS
As for all switching power supplies, the layout is an important step in the design, especially at high peak currents
and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as
well as EMI problems.
Therefore, use wide and short traces for the main current path as indicated in bold in Figure 25. The input
capacitor, output capacitor, and the inductor should be placed as close as possible to the IC. Use a common
ground node as shown in Figure 25 to minimize the effects of ground noise. The compensation circuit and the
feedback divider should be placed as close as possible to the IC. To layout the control ground, it is
recommended to use short traces as well, separated from the power ground traces. Connect both grounds close
to the ground pin of the IC as indicated in the layout diagram in Figure 25. This avoids ground shift problems,
which can occur due to superimposition of power ground current and control ground current.
U1
L1
SW
VOUT
LBO
R4
LBO
Battery
C4
C1
OUTPUT
VBAT
R2
R3
R5
R6
LBI
FB
R1
C2
ADEN
COMP
C3
EN
GND
Figure 25. Layout Diagram
18
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TPS61012, TPS61013
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SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
APPLICATION INFORMATION
U1
L1
SW
VOUT
LBO
R4
C4
C5
C1
OUTPUT
VBAT
LBO
Battery
R5
LBI
FB
R6
R1
ADEN
COMP
C2
C3
EN
GND
List of Components:
U1 TPS6101 (1–6)
C1, C4, C5 10 µF X5R Ceramic,
TDK C3216X5R0J106
L1
10 µH
SUMIDA CDRH5D18–100
Figure 26. 1,8 mm Maximum Height Power Supply With Single Battery Cell Input Using Low Profile
Components
U1
L1
IOUT ≥ 250 mA
SW
VOUT
LBO
R4
Battery
C4
C1
OUTPUT
VBAT
LBO
R5
R6
LBI
FB
R1
C2
ADEN
COMP
C3
EN
GND
List of Components:
U1
C1
TPS6101 (1–6)
10 µF X5R Ceramic,
TDK C3216X5R0J106
22 µF X5R Ceramic,
TDK C3225X5R0J226
10 µH SUMIDA CDRH6D38
C4
L1
Figure 27. 250-mA Power Supply With Two Battery Cell Input
19
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TPS61012, TPS61013
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SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
APPLICATION INFORMATION (continued)
U1
L1
SW
VOUT
LBO
3.3-V I/O Supply
U2
LDO
R4
Battery
C4
C1
1.5-V Core Supply
VBAT
LBO
C6
R5
R6
GND
LBI
FB
R1
C2
ADEN
COMP
C3
EN
GND
List of Components:
U1
U2
C1
TPS61016
TPS76915
10 µF X5R Ceramic,
TDK C3216X5R0J106
22 µF X5R Ceramic,
TDK C3225X5R0J226
C4
L1
10 µH SUMIDA CDRH6D38
Figure 28. Dual Output Voltage Power Supply for DSPs
6-V/10-mA Aux Output
DS1
C7
C6
U1
L1
SW
VOUT
LBO
3.3-V/100-mA Main Output
GND
R4
C4
Battery
C1
VBAT
LBO
R5
R6
LBI
FB
R1
ADEN
COMP
C2
C3
EN
GND
List of Components:
U1
DS1
C1
TPS61016
BAT54S
10 µF X5R Ceramic,
TDK C3216X5R0J106
22 µF X5R Ceramic,
TDK C3225X5R0J226,
1 µF X5R Ceramic,
0.1 µF X5R Ceramic,
C4
C6
C7
L1
10 µH SUMIDA CDRH6D38–100
Figure 29. Power Supply With Auxiliary Positive Output Voltage
20
TPS61010, TPS61011
TPS61012, TPS61013
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SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
APPLICATION INFORMATION (continued)
GND
C6
C7
DS1
–2.7-V/10-mA Aux Output
U1
L1
SW
VOUT
3.3-V/100-mA Main Output
C4
R4
LBO
Battery
C1
VBAT
LBO
FB
GND
R5
LBI
R6
R1
C2
ADEN
COMP
C3
EN
GND
List of Components:
U1
TPS61016
DS1
C1
BAT54S
10 µF X5R Ceramic,
TDK C3216X5R0J106
22 µF X5R Ceramic,
TDK C3225X5R0J226,
1 µF X5R Ceramic,
0.1 µF X5R Ceramic,
10 µH SUMIDA CDRH6D38–100
C4
C6
C7
L1
Figure 30. Power Supply With Auxiliary Negative Output Voltage
L1
OUTPUT
SW
VOUT
LBO
R4
LBO
INPUT
R2
C4
C5
C1
VBAT
R5
R6
TPS6101x
LBI
FB
R3
R1
C2
ADEN
COMP
J1
C3
EN
J2
GND
GND
Figure 31. TPS6101x EVM Circuit Diagram
21
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TPS61012, TPS61013
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SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
APPLICATION INFORMATION (continued)
Figure 32. TPS6101x EVM Component Placement (actual size: 55,9 mm x 40,6 mm)
Figure 33. TPS6101x EVM Top Layer Layout (actual size: 55,9 mm x 40,6 mm)
22
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SLVS314C–SEPTEMBER 2000–REVISED OCTOBER 2003
APPLICATION INFORMATION (continued)
Figure 34. TPS6101x EVM Bottom Layer Layout (actual size: 55,9 mm x 40,6 mm)
THERMAL INFORMATION
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the
power-dissipation limits of a given component.
Three basic approaches for enhancing thermal performance are:
•
•
•
Improving the power dissipation capability of the PWB design
Improving the thermal coupling of the component to the PWB
Introducing airflow in the system
The maximum junction temperature (TJ) of the TPS6101x devices is 125°C. The thermal resistance of the 10-pin
MSOP package (DGS) is RΘJA = 294°C/W. Specified regulator operation is assured to a maximum ambient
temperature (TA) of 85°C. Therefore, the maximum power dissipation is about 130 mW. More power can be
dissipated if the maximum ambient temperature of the application is lower.
T
– T
J(MAX)
R
A
125° C * 85° C
294° CńW
P
+
+
+ 136 mW
D(MAX)
QJA
(8)
23
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