TPS61029QDPNRQ1 [TI]
符合 AEC-Q100 标准的 0.9V 至 5.5V 输入范围、1.8A 升压转换器 | DPN | 10 | -40 to 125;
| 型号： | TPS61029QDPNRQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 符合 AEC-Q100 标准的 0.9V 至 5.5V 输入范围、1.8A 升压转换器 | DPN | 10 | -40 to 125 升压转换器 |
| 文件： | 总27页 (文件大小：764K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS61025-Q1
TPS61027-Q1
TPS61029-Q1
www.ti.com
SLVSA31 –NOVEMBER 2009
96% EFFICIENT SYNCHRONOUS BOOST CONVERTERS
Check for Samples :TPS61029-Q1
1
FEATURES
DESCRIPTION
2
•
•
•
Qualified for Automotive Applications
96% Efficient Synchronous Boost Converter
The TPS6102x devices provide a power supply
solution for products powered by either a one-cell,
two-cell, or three-cell alkaline, NiCd or NiMH, or
one-cell Li-Ion or Li-polymer battery. Output currents
can go as high as 200 mA while using a single-cell
alkaline, and discharge it down to 0.9 V. It can also
be used for generating 5 V at 500 mA from a 3.3-V
rail or a Li-Ion battery. The boost converter is based
on a fixed frequency, pulse-width-modulation (PWM)
controller using a synchronous rectifier to obtain
maximum efficiency. At low load currents the
converter enters the Power Save mode to maintain a
high efficiency over a wide load current range. The
Power Save mode can be disabled, forcing the
converter to operate at a fixed switching frequency.
The maximum peak current in the boost switch is
limited to a value of 800 mA, 1500 mA or 1800mA
depending on the device version.
Output Voltage Remains Regulated When
Input Voltage Exceeds Nominal Output Voltage
•
•
•
Device Quiescent Current: 25 µA (Typ)
Input Voltage Range: 0.9 V to 6.5 V
Fixed and Adjustable Output Voltage Options
Up to 5.5 V
•
Power Save Mode for Improved Efficiency at
Low Output Power
•
•
Low Battery Comparator
Low EMI-Converter (Integrated Antiringing
Switch)
•
•
•
Load Disconnect During Shutdown
Over-Temperature Protection
Small 3-mm × 3-mm QFN-10 Package
The TPS6102x devices keep the output voltage
regulated even when the input voltage exceeds the
nominal output voltage. The output voltage can be
programmed by an external resistor divider, or is
fixed internally on the chip. The converter can be
disabled to minimize battery drain. During shutdown,
the load is completely disconnected from the battery.
A low-EMI mode is implemented to reduce ringing
and, in effect, lower radiated electromagnetic energy
when the converter enters the discontinuous
conduction mode. The device is packaged in a 10-pin
QFN PowerPAD™ package measuring 3 mm x 3 mm
(DRC).
APPLICATIONS
•
All One-Cell, Two-Cell and Three-Cell Alkaline,
NiCd or NiMH or Single-Cell Li Battery
Powered Products
•
•
•
•
•
Portable Audio Players
PDAs
Cellular Phones
Personal Medical Products
Camera White LED Flash Light
L1
V
O
VOUT
FB
SW
6.8 µH
3.3 V Up To
200 mA
C2
2.2 µF
C3
47 µF
VBAT
R3
R4
R1
R2
C1
10 µF
EN
0.9-V To
6.5-V Input
R5
LBI
PS
LBO
Low Battery
Output
GND
PGND
TPS61020
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
PowerPAD is a trademark of Texas Instruments.
UNLESS OTHERWISE NOTED this document contains
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009, Texas Instruments Incorporated
TPS61025-Q1
TPS61027-Q1
TPS61029-Q1
SLVSA31 –NOVEMBER 2009
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION(1) (2)
NOMINAL
OUTPUT
VOLTAGE
DC/DC
SWITCH
CURRENT
LIMIT
ORDERABLE PART
NUMBER
TOP-SIDE
MARKING
TJ
PACKAGE
3.3 V
5 V
1500 mA
1500 mA
1800 mA
TPS61025QDRCRQ1
TPS61027QDRCRQ1
TPS61029QDRCRQ1
PREVIEW
–40°C to 125°C
QFN – DRC
Reel of 3000
PREVIEW
OES
Adjustable
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
Input voltage range on SW, VOUT, LBO, VBAT, PS, EN, FB, LBI
Operating virtual junction temperature range, TJ
Storage temperature range, Tstg
–0.3 V to 7 V
–40°C to 150°C
–65°C to 150°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliabilitiy.
DISSIPATION RATINGS TABLE
THERMAL RESISTANCE
POWER RATING
A ≤ 25°C
DERATING FACTOR ABOVE
TA = 25°C
PACKAGE
θJA
T
DRC
48.7°C/W
2054 mW
21 mW/°C
RECOMMENDED OPERATING CONDITIONS
MIN
0.9
MAX
6.5
UNIT
V
Supply voltage at VBAT, VI (TPS61025, TPS61027)
Supply voltage at VBAT, VI (TPS61029)
0.9
5.5
V
Operating virtual junction temperature range, TJ
–40
125
°C
2
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TPS61025-Q1
TPS61027-Q1
TPS61029-Q1
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SLVSA31 –NOVEMBER 2009
ELECTRICAL CHARACTERISTICS
over recommended junction temperature range and over recommended input voltage range (typical at an ambient
temperature range of 25°C) (unless otherwise noted)
DC/DC STAGE
PARAMETER
TEST CONDITIONS
RL = 120 Ω
MIN
TYP
MAX
UNIT
Minimum input voltage for start-up
0.9
1.2
V
Input voltage range, after start-up (TPS61025,
TPS61027)
VI
0.9
6.5
V
Input voltage range, after start-up (TPS61029)
Output voltage range (TPS61029)
Feedback voltage (TPS61025, TPS61027)
Oscillator frequency
0.9
1.8
5.5
5.5
V
VO
VFB
f
V
490
500
600
510
mV
kHz
mA
mA
mA
mΩ
mΩ
480
720
ISW
ISW
Switch current limit (TPS61025, TPS61027)
Switch current limit (TPS61029)
Start-up current limit
VOUT= 3.3 V
VOUT= 3.3 V
1200
1500
1500
1800
2100
1800
0.4 x ISW
260
SWN switch on resistance
VOUT= 3.3 V
VOUT= 3.3 V
SWP switch on resistance
290
Total accuracy (including line and load regulation)
Line regulation
±3%
0.6%
0.6%
3
Load regulation
VBAT
Quiescent current
VOUT
1
µA
µA
IO = 0 mA, VEN = VBAT = 1.2 V,
VOUT = 3.3 V, TA = 25°C
25
45
VEN = 0 V, VBAT = 1.2 V,
TA = 25°C
Shutdown current
0.1
1
µA
CONTROL STAGE
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
VUVLO
VIL
Undervoltage lockout threshold
LBI voltage threshold
VLBI voltage decreasing
0.8
500
10
V
VLBI voltage decreasing
490
510
mV
mV
µA
V
LBI input hysteresis
LBI input current
EN = VBAT or GND
VO = 3.3 V, IOI = 100 µA
VLBO = 7 V
0.01
0.04
0.01
0.1
0.4
VOL
Vlkg
VIL
LBO output low voltage
LBO output leakage current
EN, PS input low voltage
EN, PS input high voltage
EN, PS input current
0.1
µA
V
0.2 × VBAT
VIH
0.8 × VBAT
V
Clamped on GND or VBAT
0.01
140
20
0.1
µA
°C
°C
Overtemperature protection
Overtemperature hysteresis
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TPS61025-Q1
TPS61027-Q1
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SLVSA31 –NOVEMBER 2009
www.ti.com
PIN ASSIGNMENTS
DRC PACKAGE
(TOP VIEW)
EN
VOUT
FB
PGND
SW
PS
LBO
LBI
GND
VBAT
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
EN
NO.
1
I
I
Enable input (1/VBAT enabled, 0/GND disabled)
Voltage feedback of adjustable versions
Control / logic ground
FB
3
GND
LBI
5
7
I
Low battery comparator input (comparator enabled with EN), may not be left floating, should be connected to
GND or VBAT if comparator is not used
LBO
4
8
O
I
Low battery comparator output (open drain)
PS
Enable/disable power save mode (1/VBAT disabled, 0/GND enabled)
SW
9
I
Boost and rectifying switch input
PGND
VBAT
VOUT
PowerPAD™
10
6
Power ground
I
Supply voltage
2
O
Boost converter output
Must be soldered to achieve appropriate power dissipation. Should be connected to PGND.
4
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TPS61025-Q1
TPS61027-Q1
TPS61029-Q1
www.ti.com
SLVSA31 –NOVEMBER 2009
FUNCTIONAL BLOCK DIAGRAM (TPS61029)
SW
Backgate
Control
Anti-
Ringing
VBAT
VOUT
10 kΩ
20 pF
VOUT
V
max
Control
Gate
Control
PGND
PGND
PGND
Error
Amplifier
_
+
Regulator
FB
+
_
V
ref
= 0.5 V
GND
Control Logic
Oscillator
Temperature
Control
EN
PS
GND
LBI
LBO
Low Battery
Comparator
_
+
+
_
V
ref
= 0.5 V
GND
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TPS61025-Q1
TPS61027-Q1
TPS61029-Q1
SLVSA31 –NOVEMBER 2009
www.ti.com
PARAMETER MEASUREMENT INFORMATION
L1
VOUT
FB
V
SW
CC
6.8 µH
Boost Output
C2
2.2 µF
C3
47 µF
VBAT
R3
R4
R1
R2
C1
10 µF
Power
Supply
EN
R5
LBI
PS
LBO
Control Output
GND
PGND
List of Components:
U1 = TPS6102xDRC
TPS6102x
L1 = EPCOS B82462−G4682
C1, C2 = X7R/X5R Ceramic
C3 = Low ESR Tantalum
TYPICAL CHARACTERISTICS
Table 1. Table of Graphs
FIGURE
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9
Figure 10
Figure 11
Figure 12
Figure 13
Figure 14
Figure 15
Figure 16
Figure 17
Figure 18
Figure 19
Maximum output current
Efficiency
vs Input voltage
vs Output current (TPS61025)
vs Output current (TPS61027)
vs Input voltage (TPS61025)
vs Input voltage (TPS61027)
vs Output current (TPS61025)
Output voltage
vs Output current (TPS61027)
No load supply current into VBAT
No load supply current into VOUT
vs Input voltage
vs Input voltage
Output voltage in continuous mode (TPS61025)
Output voltage in continuous mode (TPS61027)
Output voltage in power save mode (TPS61025)
Output voltage in power save mode (TPS61027)
Load transient response (TPS61025)
Load transient response (TPS61027)
Line transient response (TPS61025)
Line transient response (TPS61027)
Start-up after enable (TPS61025)
Start-up after enable (TPS61027)
Waveforms
6
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Product Folder Link(s) :TPS61029-Q1
TPS61025-Q1
TPS61027-Q1
TPS61029-Q1
www.ti.com
SLVSA31 –NOVEMBER 2009
TPS61025
EFFICIENCY
vs
MAXIMUM OUTPUT CURRENT
vs
INPUT VOLTAGE
OUTPUT CURRENT
1400
1200
1000
800
100
90
80
70
60
50
40
30
20
10
0
V
= 3.3 V
V
= 5 V
O
O
VBAT = 2.4 V
VBAT = 1.8 V
VBAT = 0.9 V
600
400
200
0
V
= 1.8 V
O
V
O
= 3.3 V
0.9
1.7
2.5
3.3
4.1
4.9
5.7
6.5
1
10
100
1000
V - Input Voltage - V
I
I
O
- Output Current - mA
Figure 1.
Figure 2.
TPS61027
EFFICIENCY
vs
TPS61025
EFFICIENCY
vs
OUTPUT CURRENT
INPUT VOLTAGE
100
95
100
90
80
70
60
50
40
30
20
V
= 3.3 V
O
I
= 100 mA
O
90
VBAT = 1.2 V
85
VBAT = 2.4 V
VBAT = 3.6 V
I
O
= 10 mA
VBAT = 1.8 V
80
75
I
= 250 mA
O
70
65
60
55
50
V
O
= 5 V
10
0
0.9
1.4
1.9
2.4
2.9
3.4
3.9
4.4 4.9
1
10
100
1000
V - Input Voltage - V
I
I
O
- Output Current - mA
Figure 3.
Figure 4.
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TPS61027-Q1
TPS61029-Q1
SLVSA31 –NOVEMBER 2009
www.ti.com
TPS61027
EFFICIENCY
vs
TPS61025
OUTPUT VOLTAGE
vs
INPUT VOLTAGE
OUTPUT CURRENT
100
3.35
3.30
V
O
= 3.3 V
I
O
= 100 mA
95
90
85
80
75
70
65
60
55
50
I
O
= 10 mA
VBAT = 2.4 V
I
O
= 250 mA
3.25
3.20
V
O
= 5 V
1
10
100
1000
0.9 1.4 1.9 2.4 2.9 3.4 3.9 4.4 4.9 5.4 5.9 6.4
I
O
- Output Current - mA
V - Input Voltage - V
I
Figure 5.
Figure 6.
TPS61027
OUTPUT VOLTAGE
vs
NO LOAD SUPPLY CURRENT INTO VBAT
vs
OUTPUT CURRENT
INPUT VOLTAGE
1.6
1.4
1.2
1
5.10
5.05
5
T
A
= 85°C
V
O
= 5 V
VBAT = 3.6 V
0.8
4.95
4.90
T
A
= -40°C
T
A
= 25°C
0.6
0.4
4.85
4.80
0.2
0
1
10
100
1000
0.9 1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
6.5
I
O
- Output Current - mA
V - Input Voltage - V
I
Figure 7.
Figure 8.
8
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TPS61025-Q1
TPS61027-Q1
TPS61029-Q1
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SLVSA31 –NOVEMBER 2009
NO LOAD SUPPLY CURRENT INTO VOUT
vs
TPS61025
OUTPUT VOLTAGE IN CONTINUOUS MODE
INPUT VOLTAGE
34.8
29.8
V = 1.2 V,
I
T
= 85°C
= 25°C
A
R
L
= 33 Ω,
V
O
= 3.3 V
24.8
19.8
14.8
9.8
T
A
= -40°C
T
A
4.8
-0.2
0.9 1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
6.5
t - Time - 1 µs/div
V - Input Voltage - V
I
Figure 9.
Figure 10.
TPS61025
TPS61027
OUTPUT VOLTAGE IN CONTINUOUS MODE
OUTPUT VOLTAGE IN POWER SAVE MODE
V = 1.2 V,
I
R = 330 Ω,
L
V
O
= 3.3 V
V = 3.6 V,
I
R
L
= 25 Ω,
V
O
= 5 V
t - Time - 50 µs/div
t - Time - 1 µs/div
Figure 11.
Figure 12.
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SLVSA31 –NOVEMBER 2009
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TPS61027
OUTPUT VOLTAGE IN POWER SAVE MODE
TPS61025
LOAD TRANSIENT RESPONSE
V = 3.6 V,
I
R = 250 Ω,
L
V
O
= 5 V
V = 1.2 V,
I
I = 100 mA to 200 mA,
L
V
O
= 3.3 V
t - Time - 50 µs/div
t - Time - 2 ms/div
Figure 13.
Figure 14.
TPS61027
TPS61025
LOAD TRANSIENT RESPONSE
LINE TRANSIENT RESPONSE
V = 1.8 V to 2.4 V,
I
R
L
= 33 Ω,
V
O
= 3.3 V
V = 3.6 V,
I
I = 100 mA to 200 mA,
L
V
O
= 5 V
t - Time - 2 ms/div
t - Time - 2 ms/div
Figure 15.
Figure 16.
10
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SLVSA31 –NOVEMBER 2009
TPS61027
LINE TRANSIENT RESPONSE
TPS61025
START-UP AFTER ENABLE
V = 3 V to 3.6 V,
I
R = 25 Ω,
L
V
O
= 5 V
V = 2.4V,
I
R = 33 Ω,
L
O
V
= 3.3 V
t - Time - 2 ms/div
t - Time - 1 ms/div
Figure 17.
Figure 18.
TPS61027
START-UP AFTER ENABLE
V = 3.6 V,
I
R
= 50 W,
= 5 V
L
V
O
t - Time - 500 ms/div
Figure 19.
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DETAILED DESCRIPTION
CONTROLLER CIRCUIT
The controller circuit of the device is based on a fixed frequency multiple feedforward controller topology. Input
voltage, output voltage, and voltage drop on the NMOS switch are monitored and forwarded to the regulator. So
changes in the operating conditions of the converter directly affect the duty cycle and must not take the indirect
and slow way through the control loop and the error amplifier. The control loop, determined by the error amplifier,
only has to handle small signal errors. The input for it is the feedback voltage on the FB pin or, at fixed output
voltage versions, the voltage on the internal resistor divider. It is compared with the internal reference voltage to
generate an accurate and stable output voltage.
The peak current of the NMOS switch is also sensed to limit the maximum current flowing through the switch and
the inductor. The typical peak current limit is set to 1500 mA. An internal temperature sensor prevents the device
from getting overheated in case of excessive power dissipation.
Synchronous Rectifier
The device integrates an N-channel and a P-channel MOSFET transistor to realize a synchronous rectifier.
Because the commonly used discrete Schottky rectifier is replaced with a low RDS(ON) PMOS switch, the power
conversion efficiency reaches 96%. To avoid ground shift due to the high currents in the NMOS switch, two
separate ground pins are used. The reference for all control functions is the GND pin. The source of the NMOS
switch is connected to PGND. Both grounds must be connected on the PCB at only one point close to the GND
pin. A special circuit is applied to disconnect the load from the input during shutdown of the converter. In
conventional synchronous rectifier circuits, the backgate diode of the high-side PMOS is forward biased in
shutdown and allows current flowing from the battery to the output. This device however uses a special circuit
which takes the cathode of the backgate diode of the high-side PMOS and disconnects it from the source when
the regulator is not enabled (EN = low).
The benefit of this feature for the system design engineer is that the battery is not depleted during shutdown of
the converter. No additional components have to be added to the design to make sure that the battery is
disconnected from the output of the converter.
Down Regulation
In general, a boost converter only regulates output voltages which are higher than the input voltage. This device
operates differently. For example, it is able to regulate 3.0 V at the output with two fresh alkaline cells at the input
having a total cell voltage of 3.2 V. Another example is powering white LEDs with a forward voltage of 3.6 V from
a fully charged Li-Ion cell with an output voltage of 4.2 V. To control these applications properly, a down
conversion mode is implemented.
If the input voltage reaches or exceeds the output voltage, the converter changes to the conversion mode. In this
mode, the control circuit changes the behavior of the rectifying PMOS. It sets the voltage drop across the PMOS
as high as needed to regulate the output voltage. This means the power losses in the converter increase. This
has to be taken into account for thermal consideration. The down conversion mode is automatically turned off as
soon as the input voltage falls about 50 mV below the output voltage. For proper operation in down conversion
mode the output voltage should not be programmed below 50% of the maximum input voltage which can be
applied.
Device Enable
The device is put into operation when EN is set high. It is put into a shutdown mode when EN is set to GND. In
shutdown mode, the regulator stops switching, all internal control circuitry including the low-battery comparator is
switched off, and the load is isolated from the input (as described in the Synchronous Rectifier Section). This
also means that the output voltage can drop below the input voltage during shutdown. During start-up of the
converter, the duty cycle and the peak current are limited in order to avoid high peak currents drawn from the
battery.
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SLVSA31 –NOVEMBER 2009
Undervoltage Lockout
An undervoltage lockout function prevents device start-up if the supply voltage on VBAT is lower than
approximately 0.8 V. When in operation and the battery is being discharged, the device automatically enters the
shutdown mode if the voltage on VBAT drops below approximately 0.8 V. This undervoltage lockout function is
implemented in order to prevent the malfunctioning of the converter.
Softstart and Short Circuit Protection
When the device enables, the internal startup cycle starts with the first step, the precharge phase. During
precharge, the rectifying switch is turned on until the output capacitor is charged to a value close to the input
voltage. The rectifying switch is current limited during that phase. The current limit increases with the output
voltage. This circuit also limits the output current under short circuit conditions at the output. Figure 20 shows the
typical precharge current vs output voltage for specific input voltages:
0.35
VBAT = 5 V
0.3
0.25
0.2
VBAT = 3.6 V
0.15
VBAT = 2.4 V
0.1
VBAT = 1.8 V
0.05
VBAT = 1.2 V
0
0
1.5
0.5
2.5
3.5
4.5
1
2
3
4
5
V
O
− Output Voltage − V
Figure 20. Precharge and Short Circuit Current
After charging the output capacitor to the input voltage, the device starts switching. If the input voltage is below
1.4 V the device works with a fixed duty cycle of 50% until the output voltage reaches 1.4 V. After that the duty
cycle is set depending on the input output voltage ratio. Until the output voltage reaches its nominal value, the
boost switch current limit is set to 40% of its nominal value to avoid high peak currents at the battery during
startup. As soon as the output voltage is reached, the regulator takes control and the switch current limit is set
back to 100%.
Power Save Mode
The PS pin can be used to select different operation modes. To enable power save, PS must be set low. Power
save mode is used to improve efficiency at light load. In power save mode the converter only operates when the
output voltage trips below a set threshold voltage. It ramps up the output voltage with one or several pulses and
goes again into power save mode once the output voltage exceeds the set threshold voltage. This power save
mode can be disabled by setting the PS to VBAT. In down conversion mode, power save mode is always active
and the device cannot be forced into fixed frequency operation at light loads.
Low Battery Detector Circuit—LBI/LBO
The low-battery detector circuit is typically used to supervise the battery voltage and to generate an error flag
when the battery voltage drops below a user-set threshold voltage. The function is active only when the device is
enabled. When the device is disabled, the LBO pin is high-impedance. The switching threshold is 500 mV at LBI.
During normal operation, LBO stays at high impedance when the voltage, applied at LBI, is above the threshold.
It is active low when the voltage at LBI goes below 500 mV.
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The battery voltage, at which the detection circuit switches, can be programmed with a resistive divider
connected to the LBI pin. The resistive divider scales down the battery voltage to a voltage level of 500 mV,
which is then compared to the LBI threshold voltage. The LBI pin has a built-in hysteresis of 10 mV. See the
application section for more details about the programming of the LBI threshold. If the low-battery detection
circuit is not used, the LBI pin should be connected to GND (or to VBAT) and the LBO pin can be left
unconnected. Do not let the LBI pin float.
Low-EMI Switch
The device integrates a circuit that removes the ringing that typically appears on the SW node when the
converter enters discontinuous current mode. In this case, the current through the inductor ramps to zero and the
rectifying PMOS switch is turned off to prevent a reverse current flowing from the output capacitors back to the
battery. Due to the remaining energy that is stored in parasitic components of the semiconductor and the
inductor, a ringing on the SW pin is induced. The integrated antiringing switch clamps this voltage to VBAT and
therefore dampens ringing.
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TPS61029-Q1
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APPLICATION INFORMATION
DESIGN PROCEDURE
The TPS6102x dc/dc converters are intended for systems powered by a single up to triple cell Alkaline, NiCd,
NiMH battery with a typical terminal voltage between 0.9 V and 6.5 V. They can also be used in systems
powered by one-cell Li-Ion or Li-Polymer with a typical voltage between 2.5 V and 4.2 V. Additionally, any other
voltage source with a typical output voltage between 0.9 V and 6.5 V can power systems where the TPS6102x is
used.
PROGRAMMING THE OUTPUT VOLTAGE
The output voltage of the TPS61020 dc/dc converter can be adjusted with an external resistor divider. The typical
value of the voltage at the FB pin is 500 mV. The maximum recommended value for the output voltage is 5.5 V.
The current through the resistive divider should be about 100 times greater than the current into the FB pin. The
typical current into the FB pin is 0.01 µA, and the voltage across R4 is typically 500 mV. Based on those two
values, the recommended value for R4 should be lower than 500 kΩ, in order to set the divider current at 1 µA or
higher. Because of internal compensation circuitry the value for this resistor should be in the range of 200 kΩ.
From that, the value of resistor R3, depending on the needed output voltage (VO), can be calculated using
Equation 1:
V
V
O
O
R3 + R4
* 1 + 180 kW
* 1
ǒ Ǔ ǒ Ǔ
V
500 mV
FB
(1)
If as an example, an output voltage of 3.3 V is needed, a 1.0-MΩ resistor should be chosen for R3. If for any
reason the value for R4 is chosen significantly lower than 200 kΩ additional capacitance in parallel to R3 is
recommended, in case the device shows instable regulation of the output voltage. The required capacitance
value can be easily calculated using Equation 2:
200 kW
R4
ǒ
* 1Ǔ
C
+ 20 pF
parR3
(2)
L1
V
CC
VOUT
FB
SW
Boost Output
C2
C3
VBAT
R3
R4
R1
R2
Power
C1
EN
Supply
R5
LBI
PS
LBO
Control Output
GND
PGND
TPS61020
Figure 21. Typical Application Circuit for Adjustable Output Voltage Option
PROGRAMMING THE LBI/LBO THRESHOLD VOLTAGE
The current through the resistive divider should be about 100 times greater than the current into the LBI pin. The
typical current into the LBI pin is 0.01 µA, and the voltage across R2 is equal to the LBI voltage threshold that is
generated on-chip, which has a value of 500 mV. The recommended value for R2 is therefore in the range of 500
kΩ. From that, the value of resistor R1, depending on the desired minimum battery voltage VBAT, can be
calculated using Equation 3.
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V
V
BAT
LBI*threshold
BAT
R1 + R2
* 1 + 390 kW
* 1
ǒ
Ǔ ǒ Ǔ
V
500 mV
(3)
The output of the low battery supervisor is a simple open-drain output that goes active low if the dedicated
battery voltage drops below the programmed threshold voltage on LBI. The output requires a pullup resistor with
a recommended value of 1 MΩ. If not used, the LBO pin can be left floating or tied to GND.
INDUCTOR SELECTION
A boost converter normally requires two main passive components for storing energy during the conversion. A
boost inductor and a storage capacitor at the output are required. To select the boost inductor, it is
recommended to keep the possible peak inductor current below the current limit threshold of the power switch in
the chosen configuration. For example, the current limit threshold of the TPS6102xs switch is 1800 mA at an
output voltage of 5 V. The highest peak current through the inductor and the switch depends on the output load,
the input (VBAT), and the output voltage (VOUT). Estimation of the maximum average inductor current can be done
using Equation 4:
V
OUT
0.8
I + I
L
OUT
V
BAT
(4)
For example, for an output current of 200 mA at 3.3 V, at least 920 mA of average current flows through the
inductor at a minimum input voltage of 0.9 V.
The second parameter for choosing the inductor is the desired current ripple in the inductor. Normally, it is
advisable to work with a ripple of less than 20% of the average inductor current. A smaller ripple reduces the
magnetic hysteresis losses in the inductor, as well as output voltage ripple and EMI. But in the same way,
regulation time at load changes rises. In addition, a larger inductor increases the total system costs. With those
parameters, it is possible to calculate the value for the inductor by using Equation 5:
ǒVOUT BATǓ
V
–V
BAT
L +
DI ƒ V
L
OUT
(5)
Parameter f is the switching frequency and ΔIL is the ripple current in the inductor, i.e., 20% × IL. In this example,
the desired inductor has the value of 5.5 µH. With this calculated value and the calculated currents, it is possible
to choose a suitable inductor. In typical applications a 6.8 µH inductance is recommended. The device has been
optimized to operate with inductance values between 2.2 µH and 22 µH. Nevertheless operation with higher
inductance values may be possible in some applications. Detailed stability analysis is then recommended. Care
has to be taken that load transients and losses in the circuit can lead to higher currents as estimated in
Equation 5. Also, the losses in the inductor caused by magnetic hysteresis losses and copper losses are a major
parameter for total circuit efficiency.
The following inductor series from different suppliers have been used with the TPS6102x converters:
Table 2. List of Inductors
VENDOR
INDUCTOR SERIES
CDRH4D28
CDRH5D28
7447789
Sumida
Wurth Elektronik
744042
EPCOS
B82462-G4
SD25
Cooper Electronics Technologies
SD20
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SLVSA31 –NOVEMBER 2009
CAPACITOR SELECTION
Input Capacitor
At least a 10-µF input capacitor is recommended to improve transient behavior of the regulator and EMI behavior
of the total power supply circuit. A ceramic capacitor or a tantalum capacitor with a 100-nF ceramic capacitor in
parallel, placed close to the IC, is recommended.
Output Capacitor
The major parameter necessary to define the output capacitor is the maximum allowed output voltage ripple of
the converter. This ripple is determined by two parameters of the capacitor, the capacitance and the ESR. It is
possible to calculate the minimum capacitance needed for the defined ripple, supposing that the ESR is zero, by
using Equation 6:
ǒVOUT BATǓ
I
* V
OUT
C
+
min
ƒ DV V
OUT
(6)
Parameter f is the switching frequency and ΔV is the maximum allowed ripple.
With a chosen ripple voltage of 10 mV, a minimum capacitance of 24 µF is needed. The total ripple is larger due
to the ESR of the output capacitor. This additional component of the ripple can be calculated using Equation 7:
DV
+ I
R
ESR
OUT
ESR
(7)
An additional ripple of 16 mV is the result of using a tantalum capacitor with a low ESR of 80 mΩ. The total ripple
is the sum of the ripple caused by the capacitance and the ripple caused by the ESR of the capacitor. In this
example, the total ripple is 26 mV. Additional ripple is caused by load transients. This means that the output
capacitor has to completely supply the load during the charging phase of the inductor. A reasonable value of the
output capacitance depends on the speed of the load transients and the load current during the load change.
With the calculated minimum value of 24 µF and load transient considerations the recommended output
capacitance value is in a 47 to 100 µF range. For economical reasons, this is usually a tantalum capacitor.
Therefore, the control loop has been optimized for using output capacitors with an ESR of above 30 mΩ. The
minimum value for the output capacitor is 10 µF.
SMALL SIGNAL STABILITY
When using output capacitors with lower ESR, like ceramics, the adjustable voltage version is recommended.
The missing ESR can be compensated in the feedback divider. Typically a capacitor in the range of 4.7 pF in
parallel to R3 helps to obtain small signal stability with lowest ESR output capacitors. For more detailed analysis,
the small signal transfer function of the error amplifier and the regulator, which is given in Equation 8, can be
used:
4 (R3 ) R4)
R4 (1 ) i w 0.9 ms)
d
A
+
+
REG
V
FB
(8)
LAYOUT CONSIDERATIONS
As for all switching power supplies, the layout is an important step in the design, especially at high peak currents
and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as
well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground
tracks. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC.
Use a common ground node for power ground and a different one for control ground to minimize the effects of
ground noise. Connect these ground nodes at any place close to one of the ground pins of the IC.
The feedback divider should be placed as close as possible to the control ground pin of the IC. To lay out the
control ground, it is recommended to use short traces as well, separated from the power ground traces. This
avoids ground shift problems, which can occur due to superimposition of power ground current and control
ground current.
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SLVSA31 –NOVEMBER 2009
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APPLICATION EXAMPLES
L1
6.8 µH
V
5 V
CC
VOUT
FB
SW
Boost Output
C2
2.2 µF
C3
100 µF
VBAT
Battery
Input
R1
C1
EN
10 µF
R5
LBI
R2
PS
LBO
LBO
GND
PGND
TPS61027
List of Components:
U1 = TPS61027DRC
L1 = EPCOS B82462-G4682
C1, C2 = X7R,X5R Ceramic
C3 = Low ESR Tantalum
Figure 22. Power Supply Solution for Maximum Output Power Operating From a Single Alkaline Cell
L1
V
5 V
CC
VOUT
FB
SW
6.8 µH
Boost Output
C2
2.2 µF
C3
47 µF
VBAT
Battery
Input
R1
C1
EN
10 µF
R5
LBI
R2
PS
LBO
LBO
GND
PGND
TPS61027
List of Components:
U1 = TPS61027DRC
L1 = EPCOS B82462-G4682
C1, C2 = X7R,X5R Ceramic
C3 = Low ESR Tantalum
Figure 23. Power Supply Solution for Maximum Output Power Operating From a Dual/Triple Alkaline Cell
or Single Li-Ion Cell
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SLVSA31 –NOVEMBER 2009
V
10 V
CC2
C5
Unregulated
Auxiliary Output
DS1
C6
1 µF
0.1 µF
L1
V
5 V
SW
CC1
VOUT
6.8 µH
Boost Main Output
C2
2.2 µF
C3
47 µF
VBAT
EN
Battery
Input
R1
C1
10 µF
R5
FB
LBI
R2
PS
LBO
LBO
GND
PGND
List of Components:
U1 = TPS61027DRC1
TPS61027
L1 = EPCOS B82462-G4682
C3, C5, C6, = X7R,X5R Ceramic
C3 = Low ESR Tantalum
DS1 = BAT54S
Figure 24. Power Supply Solution With Auxiliary Positive Output Voltage
V
-5 V
CC2
C5
Unregulated
Auxiliary Output
DS1
C6
1 µF
0.1 µF
L1
V
5 V
SW
CC1
VOUT
6.8 µH
Boost Main Output
C2
2.2 µF
C3
47 µF
VBAT
EN
Battery
Input
R1
C1
10 µF
R5
FB
LBI
R2
PS
LBO
LBO
GND
PGND
TPS61027
List of Components:
U1 = TPS61027DRC
L1 = EPCOS B82462-G4682
C1, C2, C5, C6 = X7R,X5R Ceramic
C3 = Low ESR Tantalum
DS1 = BAT54S
Figure 25. Power Supply Solution With Auxiliary Negative Output Voltage
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THERMAL INFORMATION
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the
power-dissipation limits of a given component.
Three basic approaches for enhancing thermal performance are listed below.
•
•
•
Improving the power dissipation capability of the PCB design
Improving the thermal coupling of the component to the PCB
Introducing airflow in the system
The maximum recommended junction temperature (TJ) of the TPS6102x devices is 125°C. The thermal
resistance of the 10-pin QFN 3 × 3 package (DRC) is RΘJA = 48.7°C/W, if the PowerPAD is soldered. Specified
regulator operation is assured to a maximum ambient temperature TA of 85°C. Therefore, the maximum power
dissipation is about 820 mW. More power can be dissipated if the maximum ambient temperature of the
application is lower.
T
* T
J(MAX)
R
A
125°C * 85°C
48.7 °CńW
P
+
+
+ 820 mW
D(MAX)
qJA
(9)
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PACKAGE OPTION ADDENDUM
www.ti.com
16-Oct-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TPS61029QDRCRQ1
ACTIVE
SON
DRC
10
3000 Green (RoHS & CU NIPDAU Level-3-260C-168 HR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS61029-Q1 :
Catalog: TPS61029
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS61029QDRCRQ1
SON
DRC
10
3000
330.0
12.4
3.3
3.3
1.1
8.0
12.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SON DRC 10
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 35.0
TPS61029QDRCRQ1
3000
Pack Materials-Page 2
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相关型号：
TPS61030RSAR
1.8Vin, 4-A Switch, 96% Efficient Boost Converter w/20µA Iq in TSSOP-16 16-QFN -40 to 85
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