TPS61045DRBTG4 [TI]
采用 QFN-8 封装的 28V、效率为 85% 的升压转换器，可进行数字调节 | DRB | 8 | -40 to 85;
| 型号： | TPS61045DRBTG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 采用 QFN-8 封装的 28V、效率为 85% 的升压转换器，可进行数字调节 | DRB | 8 | -40 to 85 升压转换器 开关 控制器 开关式稳压器 开关式控制器 电源电路 开关式稳压器或控制器 |
| 文件： | 总20页 (文件大小：492K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS61045
www.ti.com
SLVS440A–JANUARY 2003–REVISED SEPTEMBER 2003
DIGITALLY ADJUSTABLE LCD BOOST CONVERTER
FEATURES
DESCRIPTION
•
•
•
•
Input Voltage Range . . . 1.8 V to 6.0 V
The TPS61045 is a high frequency boost converter with
digitally programmable output voltage and true shut-
down. During shutdown the output is disconnected
from the input by opening the internal input switch. This
allows a controlled power up/down sequencing of the
display. The output voltage can be increased or de-
creased in digital steps by applying a logic signal to the
CTRL pin. The output voltage range, as well as the
output voltage step size, can be programmed with the
feedback divider network. With a high switching fre-
quency of up to 1 MHz the TPS61045 allows the use of
small external components and together, with the small
8-pin QFN package, a miminum system solution size is
achieved.
Up to 85% Efficiency
Digitally Adjustable Output Voltage Control
Disconnects Output From Input During Shut-
down
•
•
•
•
•
Switching Frequency . . . Up to 1 MHz
No Load Quiescent Current . . . 40 µA Typ
Thermal Shutdown Mode
Shutdown Current . . . 0.1 µA Typ
Available in Small 3mm × 3mm QFN package
APPLICATIONS
•
LCD Bias Supply For Small to Medium LCD
Displays
•
OLED Display Power Supply
– PDA, Pocket PC, Smart Phones
– Handheld Devices
– Cellular Phones
D1
MBR0530
L1
4.7 mH
V
O
16.2 V to 18.9 V/ 10 mA
C2
4.7uF
R1
2.2 MW
C3
1 mF
Cff
22 pF
1
8
R3
1 MW
L
SW
DO
V
CC
= 1.8 V to 6 V
C1
2
5
6
3
4
VIN
CTRL
FB
7
PGND
GND
100 nF
R2
180 kW
Enable / LCD bias control
Figure 1. Typical Application
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily in-
cludetestingofallparameters.
Copyright © 2003, Texas Instruments Incorporated
TPS61045
www.ti.com
SLVS440A–JANUARY 2003–REVISED SEPTEMBER 2003
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
(1)
ORDERING INFORMATION
TA
8 PIN QFN PACKAGE (DRB)
PACKAGE MARKING
-40°C to 85°C
TPS61045DRB
BHT
(1)
The DRB package is available taped and reeled. Add R suffix (TPS61045DRBR) to order quantities of 3000 units per reel. Add T suffix
(TPS61045DBRT) to order quaqntities of 250 units per reel.
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range (unless otherwise noted)
TPS61045
-0.3 V to 7 V
(2)
Supply voltage, V(VIN)
Voltages, V(CTRL), V(FB), V(L), V(DO)
(2)
(2)
-0.3 V to VI + 0.3 V
30 V
Voltage, V(SW)
Continuous power dissipation
See Dissipation Rating Table
-40°C to 150°C
-65°C to 150°C
260°C
Operating junction temperature range
Storage temperature range, TSTG
Lead temperature (soldering, 10 sec)
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
(2)
DISSIPATION RATING
PACKAGE
TA≤25°C POWER
DERATING FACTOR
TA = 70°C POWER
TA = 85°C POWER
RATING
ABOVE TA = 25°C
RATING
RATING
(1)
8 pin QFN (DRB)
(1)
370 mW
3.7 mW/°C
204 mW
148 mW
The thermal resistance junction to ambient of the 8 pin QFN package is 270°C/W. Standard 2 layer PCB without vias for the thermal
pad. See the appliction section on how to improve the thermal resistance RΘJA
.
RECOMMENDED OPERATING CONDITIONS
MIN
1.8
TYP
MAX
6.0
UNIT
V
V(VIN)
V(SW)
L
Input voltage range
Switch voltage
30
V
(1)
Inductor
4.7
µH
MHz
µF
(1)
(1)
f
Switching frequency
Input capacitor (C2)
1
CI(C2)
CO(C3)
TA
4.7
1
(1)
Output capacitor (C3)
µF
Operating ambient temperature
Operating junction temperature
-40
-40
85
°C
TJ
125
°C
(1)
See application section for further information.
2
TPS61045
www.ti.com
SLVS440A–JANUARY 2003–REVISED SEPTEMBER 2003
ELECTRICAL CHARACTERISTICS
VI = 2.4 V, CTRL = VI, VO = 18.0 V, IO = 10 mA, TA = -40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted)
PARAMETER
SUPPLY CURRENT
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VI
Input voltage range
1.8
6.0
V
µA
µA
V
IQ
Operating quiescent current
Shutdown current
IO = 0 mA, not switching
40
65
1
IO(SD)
VUVLO
CTRL = GND
VI falling
0.1
1.5
Under-voltage lockout threshold
1.7
CTRL AND DAC OUTPUT
VIH
CTRL high level input voltage
1.3
0
V
V
VIL
CTRL low level input voltage
CTRL input leakage current
DAC output voltage range
DAC resolution
0.3
0.1
Ilkg
CTRL = GND or VIN
µA
V
VO(DO)
1.233
6 Bit
19.6
607
mV
mV
µA
µs
µs
µs
µs
VO(DO)
DAC center output voltage
CTRL = high
IO(SINK) Maximum DAC sink current
30
60
t(UP)
t(DWN)
td1
Increase output voltage one step
Decrease the output voltage one step
Delay time between up/down steps
Shutdown
CTRL = high to low
CTRL = high to low
CTRL = low to high
CTRL = high to low
1
140
1
240
t(OFF)
560
INPUT SWITCH (Q1), MAIN SWITCH (Q2) AND CURRENT LIMIT
VSW(Q2) Main switch maximum voltage (Q2)
30
800
10
V
mΩ
µA
mA
Ω
rds(ON)
Main switch MOSFET on-resistance
VI = 2.4 V; IS = 200 mA
VS = 28 V
400
0.1
375
1
Ilkg(MAIN) Main switch MOSFET leakage current
I(LIM)
Main switch MOSFET current limit
Input switch MOSFET on-resistance
Input switch MOSFET leakage current
300
450
2
rds(ON)
Ilkg(IN)
OUTPUT
VO
VI= 2.4 V; IS = 200 mA
VL = GND, VI = 6 V
0.1
10
µA
Output voltage range
Vin
28
V
V
Vref
Internal voltage reference
Feedback input bias current
Feedback trip point voltage
1.233
30
I(FB)
VFB = 1.3 V
100
nA
V
V(FB)
1.8 V ≤ VI≤ 6.0 V; VO = 18 V, I(LOAD)= 10
mA
1.208
1.233
1.258
DRB PACKAGE
(TOP VIEW)
1
8
7
6
5
SW
L
Exposed
Thermal
Die Pad
VIN 2
DO 3
PGND
GND
CTRL
4
FB
(A) The Exposed Thermal Die Pad is connected to PGND. Connect this pad directly with the GND pin.
3
TPS61045
www.ti.com
SLVS440A–JANUARY 2003–REVISED SEPTEMBER 2003
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
NO.
CTRL
5
I
Combined enable and digital output voltage programming pin. Pulling CTRL constantly high enables
the device. When CTRL is pulled to GND, the device is disabled and the input is disconnected from
the output by opening the integrated switch Q1. Pulsing CTRL low increases or decreases the output
voltage. Refer to the application information section for further information.
DO
3
O
I
Internal DAC output. DO programs the output voltage via the CTRL pin. Refer to the application
information section for further information.
FB
4
7
Feedback. FB must be connected to the output voltage-feedback divider.
GND
Analog ground. GND must be directly connected to the PGND pin. Refer to the application
information section for further information.
L
1
6
8
O
Drain of the internal switch (Q1). Connect L to the inductor.
Power ground
PGND
SW
I
I
Drain of the integrated switch Q2. SW is connected to the inductor and anode of the Schottky rectifier
diode.
VIN
2
VIN
FB
Input supply pin
FUNCTIONAL BLOCK DIAGRAM
L
SW
Q1
Input switch
400 ns Min
Off Time
Undervoltage
Lockout
Bias Supply
Gate
Driver
CTRL
Q2
Main Switch
ErrorComparator
S
-
+
Gate
Driver
RS Latch
Logic
6 ms Max
V
= 1.233 V
Digital
ref
On Time
R
Current Limit
R
sense
+
-
6 Bit DAC
CTRL
Interface
Soft
Start
DO
GND
PGND
4
TPS61045
www.ti.com
SLVS440A–JANUARY 2003–REVISED SEPTEMBER 2003
TYPICAL CHARACTERISTICS
Table #IMPLIED. Table of Graphs
FIGURE
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9
Figure 10
Figure 11
Figure 12
Figure 13
Figure 14
Figure 15
η
Efficiency
vs Load current
vs Input voltage
vs Input voltage
vs Temperature
vs Temperature
vs Temperature
vs Input voltage
vs Temperature
vs Input voltage
vs CTRL input step
IDD(Q)
V(FB)
I(FB)
Quiescent current
Feedback voltage
Feedback current
rds(on) Main switch Q2
rds(on)
rds(on) Input switch Q1
V(DO)
V(DO) Voltage
Line transient response
Load transient response
PFM operation
Soft start
Efficiency
vs
Load Current
Efficiency
vs
Input Voltage
90
88
86
84
82
80
78
76
74
72
70
L = 4.7 µH
V = 5 V
I
87
84
81
78
75
72
69
66
63
60
V
O
= 18 V
I
O
= 10 mA
V = 3.6 V
I
V = 2.4 V
I
L = 4.7 µH
= 18 V
I
O
= 5 mA
V
O
1
2
3
4
5
6
0.1
1
10
100
V - Input Voltage - V
I
I
O
- Output Current - mA
Figure 2.
Figure 3.
Quiescent Current
vs
Input Voltage
Feedback Voltage
vs
Temperature
1.238
1.237
1.236
1.235
1.234
1.233
60
50
40
30
20
10
0
V = 2.4 V
I
T
= 85°C
A
T
= 25°C
A
T
A
= -40°C
-40
-15
10
35
60
85
1.8
2.4
3.0
3.6
4.2
4.8
5.4
6.0
T
A
- Free-Air Temperature - °C
V - Input Voltage - V
I
Figure 4.
Figure 5.
5
TPS61045
www.ti.com
SLVS440A–JANUARY 2003–REVISED SEPTEMBER 2003
Typical Characteristics (continued)
Feedback Current
rds(ON) Main Switch Q2
vs
vs
Temperature
Temperature
100
700
600
500
400
300
200
100
0
V = 2.4 V
I
90
80
V = 3.6 V
I
70
60
50
40
30
20
10
0
V = 2.4 V
I
V = 5 V
I
-40
1.8
1.8
-15
10
35
60
85
6.0
6.0
-40
-40
0
-15
10
35
60
85
85
64
T
- Free-Air Temperature - ° C
T
- Free-Air Temperature - ° C
A
A
Figure 6.
Figure 7.
rds(ON) Main Switch Q2
vs
rds(ON) Input Switch Q1
vs
Input Voltage
Temperature
600
500
400
300
200
100
0
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
V = 2.4 V
I
T
A
= 25° C
2.4
3.0
3.6
4.2
4.8
5.4
-15
10
35
60
V - Input Voltage - V
I
T
- Free-Air Temperature - ° C
A
Figure 8.
Figure 9.
rds(ON) Input Switch Q1
vs
V(DO) Voltage
vs
CTRL Input Step
Input Voltage
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
T
A
= 25° C
V = 2.4 V
I
2.4
3.0
3.6
4.2
4.8
5.4
8
16
24
32
40
48
56
V - Input Voltage - V
I
Input Step Number
Figure 10.
Figure 11.
6
TPS61045
www.ti.com
SLVS440A–JANUARY 2003–REVISED SEPTEMBER 2003
Typical Characteristics (continued)
V = 2.4 V to 3.4 V Step
I
V
O
= 100 mV/Div
250 µs/Div
Figure 12 . Line Transient Response
V
O
= 50 mV/Div
I
= 1 mA to 11 mA Step
(Load)
50 µs/Div
Figure 13 . Load Transient Response
V
(SW)
= 10 V/Div
V
O
= 50 mV/Div
I = 200 mA/Div
L
1 µs/Div
Figure 14 . PFM Operation
7
TPS61045
www.ti.com
SLVS440A–JANUARY 2003–REVISED SEPTEMBER 2003
Typical Characteristics (continued)
V
O
= 5 V/Div
CTRL 2 V/Div
I = 50 mA/Div
I
500 µs/Div
Figure 15 . Soft Start
DETAILED DESCRIPTION
OPERATION
The TPS61045 operates with an input voltage range of 1.8 V to 6.0 V and generates output voltages up to 28 V.
The device operates in a pulse frequency modulation (PFM) scheme with constant peak current control. This
control scheme maintains high efficiency over the entire load current range and, with a switching frequency of up
to 1 MHz, the device enables the use of small external components.
The converter monitors the output voltage and when the feedback voltage falls below the reference voltage of
1.233 V (typ) the main switch turns on and the current ramps up. The main switch turns off when the inductor
current reaches the internally set peak current of 375 mA (typ). Refer to the peak current controlsection for more
information. The second criteria that turns off the main switch is the maximum on-time of 6 µs (typ). This limits
the maximum on-time of the converter in extreme conditions. As the switch is turned off, the external Schottky
diode is forward biased delivering the current to the output. The main switch remains off until the minimum off
time of 400 ns (typ) has passed and the feedback voltage is below the reference voltage again. Using this PFM
peak current control scheme, the converter operates in discontinuous conduction mode (DCM) where the
switching frequency depends on the input voltage, output voltage and output current. This gives a high efficiency
over the entire load current range. This regulation scheme is inherently stable which allows a wider range for the
selection of the inductor and output capacitor.
PEAK CURRENT CONTROL
The internal switch is turned on until the inductor current reaches the typical dc current limit (ILIM) of 375 mA. Due
to the internal current limit delay of 100 ns (typ) the actual current exceeds the dc current limit threshold by a
small amount. The typical peak current limit can be calculated:
V
I
I
+ I
)
100 ns
P(typ)
(LIM)
L
(1)
V
I
I
+ 400 mA ) 100 ns
P(typ)
L
The higher the input voltage and the lower the inductor value, the greater the current limit overshoot.
8
TPS61045
www.ti.com
SLVS440A–JANUARY 2003–REVISED SEPTEMBER 2003
DETAILED DESCRIPTION (continued)
SOFTSTART
All inductive step-up converters exhibit high inrush current during start up if no special precautions are taken.
This can cause voltage drops at the input rail during start-up, which may result in an unwanted or premature
system shut down.
When the device is enabled, the internal input switch (Q1) is slowly turned on to reduce the in-rush current
charging the capacitor (C2) connected to pin L. Furthermore, the TPS61045 limits this in-rush current during
start-up by increasing the current limit in two steps starting from ILIM/4 for 256 switch cycles to ILIM/2 for the next
256 switch cycles.
ENABLE (CTRL PIN)
The CTRL pin serves two functions. One is the enable and disable of the device. The other is the output voltage
programming of the device. If the digital interface is not required, the CTRL pin is used as a standard enable pin
for the device.
Pulling the CTRL pin high enables the device beginning with the softstart cycle.
Pulling the CTRL pin to ground for a period of ≥ 560 µs shuts down the device, reducing the shutdown current to
0.1 µA (typ). During shutdown the internal input switch (Q1) remains open and disconnects the load from the
input supply of the device.
This pin must be terminated.
DAC OUTPUT (DO)
The TPS61045 allows digital adjustment of the output voltage using the digital CTRL interface as described in
the next section. The DAC output pin (DO) drives an external resistor (R3) connected to the external feedback
divider. The DO output has a typical output voltage range from 0 V to Vref (1.233V). If the DO output voltage is
set to 0 V, the external resistor (R3) is more or less in parallel to the lower feedback resistor (R2) giving the
highest output voltage. Programming the DO output to Vref gives the lowest output voltage. Internally, a 6-bit DAC
is used with 64-steps and 0 as the first step. This gives a typical voltage step of 19.6 mV which is calculated as:
V
ref
V
+
ǒ Ǔ
6
O(DO)
2 –1
See the sectionsetting the output voltage for further information.
After start-up, when the CTRL pin is pulled high, the DO output voltage is set to its center voltage which is the
32nd step of typically V(DO) = 607mV.
DIGITAL INTERFACE (CTRL)
When the CTRL pin is pulled high the device starts up with softstart and the DAC output voltage (DO) sets to its
center voltage with a typical output voltage of 607 mV.
The output voltage can be programmed by pulling the CTRL pin low for a certain period of time. Depending on
this time period the internal DAC voltage increases or decreases one digital step, as outlined in Table 1 and
Figure 16. Programming the DAC output V(DO) to 0 V places R3 in parallel to R2, which gives the maximum
output voltage. If the DAC is programmed to its maximum output voltage equal to the internal reference voltage,
typically V(DO)=1.233 V, then the output has its minimum output voltage.
9
TPS61045
www.ti.com
SLVS440A–JANUARY 2003–REVISED SEPTEMBER 2003
DETAILED DESCRIPTION (continued)
Table 1. Timing Table
DAC OUTPUT DO
TIME
LOGIC LEVEL
Increase one step
Decrease one step
Shutdown
t(UP) = 1 µs to 60 µs
t(DWN) = 140 µs to 240 µs
t(OFF) ≥ 560 µs
Low
Low
Low
High
Delay between steps
td1 = 1 µs
t
d1
t
d1
High
EN
Low
t
t
d1
(UP)
t
t
(OFF)
(DWN)
Device Enabled
Device Disabled
Figure 16. CTRL Timing Diagram
UNDERVOLTAGE LOCKOUT
An undervoltage lockout feature prevents misoperation of the device at input voltages below 1.5 V (typ). As long
as the input voltage is below the undervoltage threshold the device remains off, with the input switch (Q1) and
the main switch (Q2) open.
THERMAL SHUTDOWN
An internal thermal shutdown is implemented in the TPS61045 that shuts down the device if the typical junction
temperature of 160°C is exceeded. If the device is in thermal shutdown mode, the input switch (Q1) and the main
switch (Q2) are open.
10
TPS61045
www.ti.com
SLVS440A–JANUARY 2003–REVISED SEPTEMBER 2003
APPLICATION INFORMATION
INDUCTOR SELECTION, MAXIMUM LOAD CURRENT
Since the PFM peak current control scheme is inherently stable the inductor and capacitor value does not affect
the stability of the regulator. The selection of the inductor together with the nominal load current, input, and
output voltage of the application determines the switching frequency of the converter. Depending on the
application, inductor values between 2.2 µH up to 47 µH are recommended. The maximum inductor value is
determined by the maximum switch on-time of 6 µs (typ). The peak current limit of 375 mA (typ) must be reached
within this 6 µs for proper operation.
The inductor value determines the maximum switching frequency of the converter. Therefore, the inductor value
must be selected for the maximum switching frequency, at maximum load current of the converter and should not
be exceeded. A good inductor value to start with is 4.7 µH. The maximum switching frequency is calculated as:
VI ǒVO * V Ǔ
I
f
+
s
(max)
I
L V
P
O
with:
IP = peak current as described in the previous peak current control section.
V
I
I
+ 375 mA ) 100 ns
P(typ)
L
(2)
L = selected inductor value
If the selected inductor does not exceed the maximum switching frequency of the converter, as a next step, the
switching frequency at the nominal load current is estimated as follows:
ǒVO–V ) VFǓ
2 I
LOAD
I
f
+
s
2
(ILOAD)
I
L
P
with:
IP = peak current as described in the previous chapter peak current control section
V
I
I
+ 375 mA ) 100 ns
P(typ)
L
(3)
L = selected inductor value
I(LOAD) = nominal load current
VF = rectifier diode forward voltage (typically 0.3 V)
The smaller the inductor value, the higher the switching frequency of the converter but the lower the efficiency.
The maximum load current of the converter is determined at the operation point where the converter starts to
enter continuous conduction mode. The converter must always operate in discontinuous conduction mode to
maintain regulation.
Two conditions exist for determining the maximum output current of the converter. One is when the inductor
current fall time is <400 ns, and the other is when the inductor current fall time is >400 ns.
One way to calculate the maximum available load current under certain operation conditions is to estimate the
expected converter efficiency at the maximum load current. This number can be taken out of the efficiency
graphs shown in Figure 2 and Figure 3. Then the maximum load current can be estimated:
Inductor fall time:
11
TPS61045
www.ti.com
SLVS440A–JANUARY 2003–REVISED SEPTEMBER 2003
APPLICATION INFORMATION (continued)
I
L
P
t
+
fall
V –V
O
I
For tf≥ 400 ns
I
V
P
I
I
+ h
load max
2 V
O
(4)
(5)
tf≤ 400 ns
2
P
I
L V
I
I
+ h
load max
ǒ2 I L ) 2 400 ns V Ǔ
ǒVO–VIǓ
P
I
with:
L = selected inductor value
η = expected converter efficiency (typically between 70% to 85%)
IP = peak current as described in the previous peak current control section.
V
I
I
+ 300 mA ) 100 ns
P
2
(6)
The above formula contains the expected converter efficiency that allows calculating the expected maximum load
current the converter can support. The efficiency can be taken out of the efficiency graphs shown in Figures 2
and 3 or 80% can be used as a good estimation.
The selected inductor must have a saturation current which meets the maximum peak current of the converter as
calculated in the peak current control section. Use the maximum value for ILim (450mA) for this calculation.
Another important inductor parameter is the dc resistance. The lower the dc resistance, the higher the efficiency
of the converter. Refer to the Table 1 and the inductor selection section under typical applications.
Table 2. Possible Inductor Selection
INDUCTOR VALUE
COMPONENT SUPPLIER
Sumida CR32-100
COMMENTS
10 µH
10 µH
10 µH
High efficiency
High efficiency
Sumida CDRH3D16-100
Murata LQH43CN100K01
Sumida CDRH3D16-4R7
muRata LQH32CN4R7M51
4.7 µH
4.7 µH
Small solution size
Small solution size
SETTING THE OUTPUT VOLTAGE
When the converter is programmed to the minimum output voltage, the DAC output (DO) equals the reference
voltage of 1.233 V (typ). Therefore, only the feedback resistor network (R1) and (R2) determines the output
voltage under these conditions. This gives the minimum output voltage possible and can be calculated as:
R1
R2
ǒ Ǔ
V
+ V
) 1
O(min)
(FB)
The maximum output voltage is determined as the DAC output (DO) is set to 0 V:
R1
R3
R1
R2
ǒ Ǔ
V
+ V
) V
) 1
O(max)
(FB)
(FB)
12
TPS61045
www.ti.com
SLVS440A–JANUARY 2003–REVISED SEPTEMBER 2003
APPLICATION INFORMATION (continued)
The output voltage can be digitally programmed by pulling the CTRL pin low for a certain period of time as
described in the Digital Interface section. Pulling the signal applied to the CTRL pin low increases or decreases
the DAC output DO (pin 3) one-step where one step is typically 19.6 mV. A voltage step on DO of 19.6mV (typ)
changes the output voltage by one step and is calculated as:
19.6 mV R1
V
+
O(step)
R3
The possible output voltage range is determined by selecting R1, R2 and R3. A possible larger output voltage
range gives a larger output voltage step size. The smaller the possible output voltage range, the smaller the
output voltage step size.
To reduce the overall operating quiescent current in battery powered applications a high impedance voltage
divider must be used with a typical value for R2 of ≤ 200 kΩ and a maximum value for R1 of 2.2 MΩ.
Some applications may not need the digital interface to program the output voltage. In this case the output DO
can be left open as shown in Figure 18 and the output voltage is calculated as for any standard boost converter:
R1
R2
+ 1.233 V ǒ1 ) Ǔ
V
O
In such a configuration a high impedance voltage divider must also be used to minimize ground current and a
typical value for R2 of ≤ 200 kΩ and a maximum value for R1 of 2.2 MΩ are recommended.
A feed-forward capacitor (C(FF)), across the upper feedback resistor (R1), is required to provide sufficient
overdrive for the error comparator. Without a feed-forward capacitor or a too small feed-forward capacitor value,
the device shows double pulses or a pulse burst instead of single pulses at the switch node (SW). This can
cause higher output voltage ripple. If a higher output voltage ripple is acceptable, the feedforward capacitor can
be left out too.
The lower the switching frequency of the converter, the larger the feed-forward capacitor value needs to be. A
good starting point is the use of a 10 pF feed-forward capacitor. As a first estimation, the required value for the
feed-forward capacitor can be calculated at the operation point:
1
C
[
FF
f
s
2 p
R1
20
with:
R1 = upper resistor of voltage divider
fS = switching frequency of the converter at the nominal load current. (For the calculation of the switching
frequency see previous section)
For C(FF) choose a value which comes closest to the calculation result.
The larger the feed-forward capacitor, the worse the line regulation of the device. Therefore, the feed-forward
capacitor must be selected as small as possible if good line regulation is of concern.
OUTPUT CAPACITOR SELECTION
For better output voltage filtering a low ESR output capacitor is recommended. Ceramic capacitors have low
ESR values but depending on the application, tantalum capacitors can also be used. Refer to Table 2 and typical
applications for the selection of the output capacitor.
Assuming the converter does not show double pulses or pulse bursts on the switch node (SW) the output voltage
ripple is calculated as:
13
TPS61045
www.ti.com
SLVS440A–JANUARY 2003–REVISED SEPTEMBER 2003
APPLICATION INFORMATION (continued)
I
I
L
O
1
P
DV
+
*
) I ESR
ǒ
Ǔ
O
P
C
f
V
) V * V
O
s(ILOAD)
O
F
I
with:
IP = peak current as described in the previous section peak current control
V
I
I
+ 375 mA ) 100 ns
P
2
(7)
L = selected inductor value
IO(LOAD)=Nominal load current
fS(ILoad) = switching frequency at the nominal load current as calaculated previously.
VF = rectifier diode forward voltage (typically 0.3 V)
CO = selected output capacitor
ESR = output capacitor ESR value
INPUT CAPACITOR SELECTION
The input capacitor (C1) filters the high frequency noise to the control circuit and must be directly connected to
the input pin (VIN) of the device. The capacitor (C2) connected to the L pin of the device is the input capacitor for
the power stage.
The main purpose of the capacitor (C2), that is connected directly to the L pin, is to smooth the inductor current.
A larger capacitor reduces the inductor ripple current present at the L pin. The smaller the ripple current at the L
pin, the higher the efficiency of the converter. If a sufficiently large capacitor is used, the input switch must carry
only the DC current, filtered by the capacitor (C2), and not the high switching currents of the converter. A 4.7 µF
or 10-µF ceramic capacitor (C2) is sufficient for most applications. For better filtering, this value can be increased
without limit. Refer to Table 2 and typical applications for input capacitor recommendations.
Table 3. Possible Input and Output Capacitor Selection
CAPACITOR
4.7 F/X5R/0805
VOLTAGE RATING
6.3 V
COMPONENT SUPPLIER
Tayo Yuden JMK212BY475MG
COMMENTS
CI/CO
10 µF/X5R/0805
1.0 µF/X7R/1206
1.0 µF/X7R/1206
4.7 µF/X5R/1210
6.3 V
25 V
35 V
25 V
Tayo Yuden JMK212BJ106MG
Tayo Yuden TMK316BJ105KL
Tayo Yuden GMK316BJ105KL
Tayo Yuden TMK325BJ475MG
CI/CO
CO
CO
CO
DIODE SELECTION
To achieve high efficiency a Schottky diode must be used. The current rating of the diode must meet the peak
current rating of the converter as it is calculated in the peak current control section. Use the maximum value for
I(LIM) (450mA) for this calculation. Refer to Table 3 and the typical applications for the selection of the Schottky
diode.
14
TPS61045
www.ti.com
SLVS440A–JANUARY 2003–REVISED SEPTEMBER 2003
APPLICATION INFORMATION (continued)
Table 4. Possible Schottky Diode Selection
COMPONENT SUPPLIER
ON Semiconductor MBR0530
ON Semiconductor MBR0520
ON Semiconductor MBRM120L
Toshiba CRS02
REVERSE VOLTAGE
30 V
20 V
20 V
30 V
40 V
Zetex CHZS400
LAYOUT CONSIDERATIONS
As for all switching power supplies the layout is an important step in the design, especially at high peak currents
and switching frequencies. If the layout is not carefully implemented the regulator can show noise problems and
duty cycle jitter.
The input capacitor must be placed as close as possible to the input pin for good input-voltage filtering. The
inductor and diode must be placed as close as possible to the switch pin (SW) to minimize noise coupling into
other circuits. Since the feedback pin and network is a high impedance circuit, the feedback network must be
routed away from the inductor.
THERMAL CONSIDERATIONS
The TPS61045 is available in a thermally enhanced QFN package. The package includes a thermal pad,
improving the thermal capabilities of the package. See QFN/SON PCB attachment application note (SLUA271).
The thermal resistance junction to ambient (RΘJA) of the QFN package depends on the PCB layout. By using
thermal vias and wide PCB, traces improve thermal resistance (RΘJA). Under normal operation conditions no
PCB vias are required for the thermal pad. However, the thermal pad must be soldered to the PCB.
15
TPS61045
www.ti.com
SLVS440A–JANUARY 2003–REVISED SEPTEMBER 2003
TYPICAL APPLICATIONS
L1
D1
4.7 µH
Zetex ZHZS400
LQH32CN4R7M11
V
O
16.2 V to 18.9 V/ 10 mA
C2
4.7 µF
Cff
22 pF
C3
1 µF
R1
2.2 M
R3
1 M
L
SW
DO
FB
V
CC
= 1.8 V to 6 V
Vin
CTRL
C1
100 nF
GND PGND
R2
180 kΩ
Enable / LCD
Bias Control
Figure 17. Typical Application With Digital Adjusted Output Voltage
L1
D1
4.7 µH
Zetex ZHZS400
LQH32CN4R7M11
V
O
15 V to 18 V
Adjustable / 10 mA
C2
4.7 µF
Cff
22 pF
C3
1 µF
R1
2.2 M
L
SW
DO
FB
V
CC
= 1.8 V to 6 V
Vin
CTRL
DAC or Analog Voltage
0 V = 25 V
1.233 V = 18 V
C1
100 nF
R3
390 kΩ
GND PGND
R2
160 kΩ
Enable
Figure 18. Typical Application With Analog Adjusted Output Voltage
16
TPS61045
www.ti.com
SLVS440A–JANUARY 2003–REVISED SEPTEMBER 2003
TYPICAL APPLICATIONS (continued)
L1
D1
4.7 µH
Zetex ZHZS400
LQH32CN4R7M23
V
O
16.2 V to 18.9 V/
20 mA
C2
4.7 µF
Cff
22 pF
C3
1 µF
R1
2.2 M
L
SW
DO
FB
R3
1 M
V
CC
= 2.7 V to 6 V
Vin
CTRL
C1
100 nF
GND PGND
R2
180 kΩ
Enable / LCD
Bias Control
Figure 19. OLED Supply Providing Higher Output Current
17
PACKAGE OPTION ADDENDUM
www.ti.com
11-Feb-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
SON
SON
Drawing
TPS61045DRBR
TPS61045DRBT
ACTIVE
ACTIVE
DRB
8
8
3000
250
None
None
CU NIPDAU Level-2-235C-1 YEAR
CU NIPDAU Level-2-235C-1 YEAR
DRB
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
IMPORTANT NOTICE
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in
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