TPS61196PWPRQ1 [TI]
每个灯串具有独立的 PWM 调光的 6 灯串 400mA WLED 驱动器 | PWP | 28 | -40 to 125;
| 型号： | TPS61196PWPRQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 每个灯串具有独立的 PWM 调光的 6 灯串 400mA WLED 驱动器 | PWP | 28 | -40 to 125 驱动 光电二极管 接口集成电路 驱动器 |
| 文件： | 总30页 (文件大小：1695K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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TPS61196-Q1
ZHCSDK1 –MARCH 2015
TPS61196-Q1 每个灯串具有
独立 PWM 亮度调节的 6 灯串 400mA WLED 驱动器
1 特性
TPS61196-Q1 会自动调整升压控制器的输出电压，以
1
提供具有最大正向压降的 LED 灯串所需要的电压以及
该灯串 IFB 引脚上所需的最小电压，从而优化驱动器
效率。 可通过外部电阻将其开关频率设定在 100kHz
至 800kHz 之间。
•
•
•
•
•
8V 至 30V 输入电压
高达 120V 输出电压
100kHz 至 800kHz 可编程开关频率
为 LED 提供电压的自适应升压输出
六路灌电流、200mA 连续输出、400mA 脉冲输出
（每个灯串）
TPS61196-Q1 支持直接 PWM 调光。 每个灯串均具
有独立的 PWM 控制输入。 在 PWM 调光模式下，将
通过外部 PWM 信号决定导通或关断 LED 电流的频率
和占空比。 PWM 频率范围为 90kHz 至 22kHz。
•
•
•
•
•
•
•
•
•
•
灯串之间 ±1.5% 的电流匹配
分辨率高达 5000:1 的高精度 PWM 亮度调节
可编程过压保护 (OVP) 阈值
可编程输入欠压闭锁 (UVLO) 阈值
可调软启动时间
TPS61196-Q1 集成了过流保护、输出短路保护、ISET
接地短路保护、二极管开路和短路保护、LED 开路和
短路保护以及过热关断电路。 此外，TPS61196-Q1 还
可检测 IFB 引脚接地短路以保护 LED 灯串。 该器件
还具有可编程的输入欠压闭锁阈值和输出过压保护阈
值。
内置 LED 开路和短路保护
内置肖特基二极管开路和短路保护
内置 ISET 短路保护
内置 IFB 短路保护
热关断
器件信息(1)
器件型号
封装
封装尺寸（标称值）
2 应用范围
TPS61196-Q1
HTSSOP (28)
9.70 mm x 4.40 mm
•
•
•
汽车 LCD 背光
汽车仪表板显示器
汽车辅助显示器
(1) 要了解所有可用封装，请见数据表末尾的可订购产品附录。
简化电路原理图
L1
D1
68mH
VIN = 24V
3 说明
C1
EC1
100mF
EC2
10mF
100mF
R19
3
TPS61196-Q1 可为汽车 LCD 背光照明应用提供高度
集成的解决方案，可使每个灯串都具有独立的 PWM
调光功能。 该器件是一款电流模式升压控制器，能够
驱动多达六个由多个 LED 串联组成的白色发光二极管
(WLED) 灯串。 每个灯串均具有独立的电流稳压器，
稳压器可在 50mA 至 400mA 范围内调节 LED 电流
（匹配精度 ±1.5%）。 可在 0.3V 至 1V 范围内编程最
低灌电流电压，以符合不同的 LED 电流设置。 器件的
输入电压范围为 8V 至 30V。
VIN
R3
Q1
GDRV
R5
C2
2.2mF
255k
200k
ISNS
R6
200
R4
C4
10nF
R1
182k
R7
0.1
10k
UVLO
VDD
PGND
C5
470pF
TPS61196
R2
24.9k
OVP
COMP
FSW
C3
1.0mF
C8
160pF
R8
150k
REF
R9
200k
C6
47nF
C7
EN
2.2mF
FAULT
IFB1
IFB2
IFB3
IFB4
IFB5
IFB6
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
IFBV
FBP
ISET
C9
R10
60.4k
0.1mF
R12
196k
R11
37.4k
R13 R14 R15 R16 R17 R18
10M 10M 10M 10M 10M 10M
Thermal pad
AGND
1
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
English Data Sheet: SNVSA79
TPS61196-Q1
ZHCSDK1 –MARCH 2015
www.ti.com.cn
目录
7.3 Feature Description................................................. 11
7.4 Device Functional Modes........................................ 15
Application and Implementation ........................ 18
8.1 Application Information............................................ 18
8.2 Typical Application ................................................. 19
Power Supply Recommendations...................... 22
1
2
3
4
5
6
特性.......................................................................... 1
应用范围................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 5
6.5 Electrical Characteristics........................................... 5
6.6 Typical Characteristics.............................................. 7
Detailed Description ............................................ 10
7.1 Overview ................................................................. 10
7.2 Functional Block Diagram ....................................... 10
8
9
10 Layout................................................................... 23
10.1 Layout Guidelines ................................................. 23
10.2 Layout Example .................................................... 23
11 器件和文档支持 ..................................................... 24
11.1 商标....................................................................... 24
11.2 静电放电警告......................................................... 24
11.3 术语表 ................................................................... 24
12 机械封装和可订购信息 .......................................... 24
7
4 修订历史记录
日期
修订版本
注释
2015 年 3 月
*
最初发布。
2
Copyright © 2015, Texas Instruments Incorporated
TPS61196-Q1
www.ti.com.cn
ZHCSDK1 –MARCH 2015
5 Pin Configuration and Functions
PWP Package
28-Pin HTSSOP
Top View
UVLO
EN
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VIN
2
FAULT
FSW
VDD
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
FBP
3
4
5
GDRV
ISNS
PGND
REF
6
7
8
9
COMP
OVP
ISET
10
11
12
13
14
IFBV
IFB1
AGND
IFB6
IFB2
IFB5
IFB3
IFB4
Pin Functions
PIN
TYPE
DESCRIPTION
NUMBER
NAME
UVLO
EN
Low input voltage lock out. Use a resistor divider from VIN to this pin to set the UVLO
threshold.
1
I
I
2
Enable and disable pin. EN high = enable, EN low = disable.
PWM1 to
PWM6
3,4,5,6,7,8
I
PWM signal input pins. The frequency of PWM signal is in the range of 90 Hz to 22 kHz.
9
FBP
ISET
IFBV
O
O
O
I
LED cross-short protection threshold program pin. Use a resistor to GND to set the threshold.
Connecting a resistor to the pin programs the IFB pin current level for full brightness (that is,
100% dimming).
10
11
Minimum feedback voltage setting for LED strings.
Regulated current sink input pins
Analog ground
IFB1 to
IFB6
12,13,14,15,16,17
18
19
20
AGND
G
I
Overvoltage protection detection input. Connect a resistor divider from output to this pin to
program the OVP threshold.
OVP
COMP
O
Loop compensation for the boost converter. Connect a RC network to make loop stable.
Internal reference voltage for the boost converter. Use a capacitor at this pin to adjust the soft
start time. When two chips operate in parallel, connect the master's REF pin to the slave's
COMP pin.
21
REF
O
22
23
24
PGND
ISNS
GND
External MOSFET current sense ground.
External MOSFET current sense positive input.
External switch MOSFET gate driver output.
I
GDRV
O
Internal regulator output for device internal power supply. Connect a 1-µF ceramic capacitor to
this pin.
25
VDD
O
Switching frequency setting pin. Use a resistor to set the frequency between 100 kHz to
800 kHz. An external input voltage above 3.5 V or below 0.5 V disables the internal clock and
makes the device as slave device.
26
FSW
O
27
28
FAULT
VIN
O
I
Fault indicator. Open-drain output. Output high impedance when fault conditions happens.
Power supply input pin
Copyright © 2015, Texas Instruments Incorporated
3
TPS61196-Q1
ZHCSDK1 –MARCH 2015
www.ti.com.cn
6 Specifications
6.1 Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–2
MAX
UNIT
VIN pin
33
FAULT pin
FB1 to IFB6 pins
VIN
40
FBP, ISET, ISNS, IFBV pins
Voltage(2)
3.3
V
EN, PWM1 to PWM6 pins
20
GDRV pins
GDRV 10-ns transient pins
All other pins
7
9
–0.3
7
Continuous power dissipation
Operating junction temperature range
Storage temperature, Tstg
See Thermal Information
–40
–65
150
150
°C
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal
6.2 ESD Ratings
VALUE
±2000
±750
UNIT
Human-body model (HBM), per AEC Q100-002(1)
Charged-device model (CDM), per AEC Q100-011
V(ESD)
Electrostatic discharge
V
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)(1)
MIN
8
NOM
MAX
30
UNIT
VIN
VOUT
L1
Input voltage
V
V
Output voltage
VIN
10
120
100
Inductor
µH
µF
µF
kHz
kHz
°C
CIN
COUT
fSW
fDIM
TA
Input capacitor
10
Output capacitor
22
220
800
22
Boost regulator switching frequency
PWM dimming frequency
Operating ambient temperature
Operating junction temperature
100
0.09
–40
–40
125
125
TJ
°C
(1) Customers need to verify the component value in their application if the values are different from the recommended values.
4
Copyright © 2015, Texas Instruments Incorporated
TPS61196-Q1
www.ti.com.cn
ZHCSDK1 –MARCH 2015
6.4 Thermal Information
PWP (HTSSOP)
THERMAL METRIC(1)
UNIT
28 PINS
33.8
18.8
15.6
0.6
RθJA
Junction-to-ambient thermal resistance
RθJC(top)
RθJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
ψJB
15.4
2.5
RθJC(bot)
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
6.5 Electrical Characteristics
VIN= 24 V, C1 = 10 μF, C2 = 2.2 μF, C3 = 1 μF, EC1 = EC2 = 100 μF; Typical values are at TA = 25°C, Minimum and
Maximum limits are over the operating temperature range (TA = –40°C to 125°C) (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
POWER SUPPLY
VIN
Input voltage range
8
30
7
V
V
VVIN_UVLO
VVIN_HYS
Undervoltage lockout threshold
VIN UVLO hysteresis
VIN falling
6.5
300
mV
Operating quiescent current into
VIN
Device enabled, no switching, VIN = 30
V
Iq_VIN
ISD
2
mA
µA
V
VIN = 12 V,
VIN = 30 V
25
50
Shutdown current
Regulation voltage for internal
circuit
VDD
0 mA < IDD < 15 mA
5.7
6
6.3
EN and PWMx
VH
Logic high input on EN,PWMx
Logic Low input on EN, PWMx
Pull-down resistance on EN, PWMx
VIN = 8 V to 30 V
VIN = 8 V to 30 V
1.8
0.8
V
V
VL
0.8
3
RPD
1.6
MΩ
UVLO
VUVLOTH
Threshold voltage at UVLO pin
UVLO input bias current
1.204
1.229
1.253
V
VUVLO = VUVLOTH – 50 mV
VUVLO = VUVLOTH + 50 mV
–0.1
–4.3
a
-3.9
0.1
–3.3
IUVLO
µA
SOFT START
PWM ON, VREF< 2 V
PWM ON, VREF> 2 V
200
10
ISS
Soft start charging current
µA
CURRENT REGULATION
VISET
ISET pin voltage
1.217
120
1.229
150
1.240
180
V
ISET short-to-ground protection
threshold
IISET_P
µA
KISET
Current multiple IIFB/IISET
Current accuracy
IISET = 32.56 µA, VIFB = 0.5 V
IISET = 32.56 µA, VIFB = 0.5 V
3932
3992
130
4052
IIFB(AVG)
127.4
132.6
mA
Current matching; (IFB(MAX)
IFB(MIN))/2IFB(AVG)
–
KIFB(M)
IISET = 32.56 µA, VIFB = 0.5 V
0.5%
1.5%
1
IFB pin leakage current at dimming
off
IIFB_LEAK
IIFB_max
IFB voltage < 40 V
VIFBV = 350 mV
µA
Current sink max output current
130
mA
Copyright © 2015, Texas Instruments Incorporated
5
TPS61196-Q1
ZHCSDK1 –MARCH 2015
www.ti.com.cn
Electrical Characteristics (continued)
VIN= 24 V, C1 = 10 μF, C2 = 2.2 μF, C3 = 1 μF, EC1 = EC2 = 100 μF; Typical values are at TA = 25°C, Minimum and
Maximum limits are over the operating temperature range (TA = –40°C to 125°C) (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IFB REGULATION VOLTAGE
Measured on VIFB(min), other IFB
voltages are 0.5 V above VIFB(min).
IIFB = 130 mA, VIFBV = 0.5 V
VIFB
Regulation voltage at IFB
508
mV
IFB Regulation voltage setting
sourcing current at IFBV
IIFBV
VIFBV = 0.5 V
0.247
0.3
0.25
0.253
1
IISET
V
VIFBV
IFBV voltage setting range
BOOST REFERENCE VOLTAGE
Reference voltage range for Boost
Controller
VREF
0
3.1
25
V
IREF_LEAK
OSCILLATOR
fSW
Leakage current at REF pin
–25
nA
Switching frequency
RFSW = 200 kΩ
187
90%
3.5
200
1.8
213
kHz
V
VFSW
FSW pin reference voltage
Maximum duty cycle
Dmax
fSW = 200 kHz
94%
200
98%
ton(min)
Minimum pulse width
Logic high input voltage
Logic low input voltage
ns
V
VFSW_H
VFSW_L
ERROR AMPLIFIER
0.5
V
ISINK
Comp pin sink current
VOVP = VREF + 200 mV, VCOMP = 1 V
VOVP = VREF – 200 mV, VCOMP = 1 V
20
20
µA
µA
ISOURCE
GmEA
Comp pin source current
Error amplifier transconductance
Error amplifier output resistance
Error amplifier crossover frequency
90
120
20
150
µs
REA
MΩ
kHz
fEA
1000
GATE DRIVER
Gate driver impedance when
sourcing
RGDRV(SRC)
RGDRV(SNK)
VDD = 6 V, IGDRV = –20 mA
VDD = 6 V, IGDRV = 20 mA
2
1
3
Ω
Ω
Gate driver impedance when
sinking
1.5
IGDRV(SRC)
IGDRV(SNK)
VISNS(OC)
Gate driver source current
Gate driver sink current
VGDRV = 5 V
200
400
376
mA
mA
mV
VGDRV = 1 V
Overcurrent detection threshold
VIN = 8 V to 30 V, TJ = 25°C to 125°C
400
424
OVERVOLTAGE PROTECTION (OVP)
VOVPTH
IOVP
Output voltage OVP threshold
Leakage current
2.95
3.02
0
3.09
100
V
nA
V
–100
VIFB_OVP
IFBx over voltage threshold
PWM ON
38
LED SHORT DETECTION
LED short detection sourcing
current
FAULT INDICATOR
IFAULT_H Leakage current in high impedance VFAULT = 24 V
IFAULT_L
THERMAL SHUTDOWN
Tshutdown Thermal shutdown threshold
IFBP
VFBP = 1 V
0.247
1
0.25
0.253
IISET
1
2
nA
Sink current at low output
VFAULT = 1 V
mA
150
15
°C
°C
Thermal shutdown threshold
hysteresis
Thys
6
Copyright © 2015, Texas Instruments Incorporated
TPS61196-Q1
www.ti.com.cn
ZHCSDK1 –MARCH 2015
6.6 Typical Characteristics
800
700
16
14
12
10
8
600
500
400
300
200
100
0
100 Hz Dimming
100 Hz Dimming
1 kHz Dimming
6
1 kHz Dimming
4
2
0
0
10
20
30
40
50
60
70
80
90 100
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
PWM Dimming Duty Cycle (%)
PWM Dimming Duty Cycle (%)
G003
G004
Figure 1. Dimming Linearity
Figure 2. Dimming Linearity At Low Dimming Duty Cycle
900
800
700
600
500
400
300
200
100
0
1000
900
800
700
600
500
400
300
200
100
0
0
50
100 150 200 250 300 350 400 450
0
50
100 150 200 250 300 350 400 450
LED Current (mA)
Resistance (kΩ)
G005
G006
Figure 3. Switching Frequency Setting
Figure 4. Recommended Minimum Headroom Voltage
EN
SW
50 V/div
5 V/div
IFB1
V
(AC)
OUT
10 V/div
200 mV/div
V
OUT
Inductor
Current
1 A/div
20 V/div
I
IN
1 A/div
4 µs/div
40 ms/div
G007
G008
Figure 5. Boost Switching Waveform
Figure 6. Start-up Waveform (1% Dimming)
Copyright © 2015, Texas Instruments Incorporated
7
TPS61196-Q1
ZHCSDK1 –MARCH 2015
www.ti.com.cn
Typical Characteristics (continued)
SW
50 V/div
EN
5 V/div
IFB1
10 V/div
IFB1
5 V/div
V
(AC)
OUT
200 mV/div
V
OUT
20 V/div
I
ILED
100 mA/div
IN
1 A/div
40 ms/div
10 µs/div
G009
G010
Figure 7. Start-up Waveform (100% Dimming)
Figure 8. Dimming Waveform (0.1% Dimming)
SW
50 V/div
EN
5 V/div
IFB1
10 V/div
IFB1
10 V/div
V
(AC)
V
OUT
OUT
200 mV/div
20 V/div
ILED
100 mA/div
ILED
100 mA/div
20 µs/div
2 s/div
G011
G012
Figure 9. Dimming Waveform (2% Dimming)
Figure 10. Shutdown Waveform (1% Dimming)
EN
Fault
5 V/div
5 V/div
IFB1
IFB1
10 V/div
10 V/div
V
V
OUT
OUT
20 V/div
20 V/div
ILED
ILED
100 mA/div
100 mA/div
2 s/div
10 ms/div
G013
G014
Figure 11. Shutdown Waveform (100% Dimming)
Figure 12. LED Open Protection (1% Dimming)
8
Copyright © 2015, Texas Instruments Incorporated
TPS61196-Q1
www.ti.com.cn
ZHCSDK1 –MARCH 2015
Typical Characteristics (continued)
Fault
Fault
5 V/div
5 V/div
IFB1
IFB1
10 V/div
10 V/div
V
V
OUT
OUT
20 V/div
20 V/div
ILED
ILED
100 mA/div
100 mA/div
10 ms/div
2 ms/div
G015
G016
Figure 13. LED Open Protection (100% Dimming)
Figure 14. LED Short Protection (1% Dimming)
Fault
Fault
5 V/div
5 V/div
IFB1
IFB1
10 V/div
10 V/div
V
V
OUT
OUT
20 V/div
20 V/div
ILED
ILED
100 mA/div
100 mA/div
100 µs/div
20 ms/div
G017
G018
Figure 15. LED Short Protection (100% Dimming)
Figure 16. IFB Short To Ground Protection (1% Dimming)
Fault
5 V/div
IFB1
500 mV/div
V
OUT
20 V/div
ILED
100 mA/div
20 ms/div
G019
Figure 17. IFB Short-To-Ground Protection (100% Dimming)
Copyright © 2015, Texas Instruments Incorporated
9
TPS61196-Q1
ZHCSDK1 –MARCH 2015
www.ti.com.cn
7 Detailed Description
7.1 Overview
The TPS61196-Q1 provides a highly integrated solution for automotive LCD backlight with an independent PWM
dimming function for each string. This device is a current mode boost controller driving up to six WLED strings
with multiple LEDs in series. Each string has an independent current regulator providing a LED current
adjustable from 50 mA to 400 mA within ±1.5% matching accuracy. The minimal voltage at the current sink is
programmable in the range of 0.3 V to 1 V to fit with different LED current settings. The input voltage range for
the device is from 8 V to 30 V.
7.2 Functional Block Diagram
L1
IN
C1
VIN
VDD
EN
FAULT
C2
LDO
Protection Logic
D1
C3
OUT
R1
R2
VDD
GDRV
ISNS
UVLO
PWM
Logic
C4
Driver
R6
C5
Oscillator
and
FSW
Slope
R5
R7
Compensation
COMP
PGND
OVP
Protection
R8
OC
Protection
VDD
EA
400mV
C6
R3
R4
3.0V
OVP
IFB1
Iss
Min IFB
Selection
6
REF
EA
C7
IFBV
FBP
R11
EA
EN
R10
ISET
AGND
Current Sink
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
IFB2
IFB3
R9
Current Sink
Current Sink
Current Sink
Current Sink
Current Sink
IFB4
IFB5
IFB6
10
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7.3 Feature Description
7.3.1 Supply Voltage
The TPS61196-Q1 has a built-in linear regulator to supply the device analog and logic circuitry. The VDD pin,
output of the regulator, must be connected to a 1-µF bypass capacitor. VDD only has a current sourcing
capability of 15 mA. VDD voltage is ready after the EN pin is pulled high.
7.3.2 Boost Controller
The TPS61196-Q1 regulates the output voltage with current mode pulse width modulation (PWM) control. The
control circuitry turns on an external switch FET at the beginning of each switching cycle. The input voltage is
applied across the inductor and stores the energy as the inductor current ramps up. During this portion of the
switching cycle, the load current is provided by the output capacitor. When the inductor current rises to the
threshold set by the Error Amplifier (EA) output, the switch FET is turned off and the external Schottky diode is
forward biased. The inductor transfers stored energy to replenish the output capacitor and supply the load
current. This operation repeats each switching cycle. The switching frequency is programmed by an external
resistor.
A ramp signal from the oscillator is added to the current ramp to provide slope compensation, shown in the
Functional Block Diagram. The duty cycle of the converter is then determined by the PWM Logic block which
compares the EA output and the slope compensated current ramp. The feedback loop regulates the OVP pin to
a reference voltage generated by the minimum voltage across the IFB pins. The output of the EA is connected to
the COMP pin. An external RC compensation network must be connected to the COMP pin to optimize the
feedback loop for stability and transient response.
The TPS61196-Q1 consistently adjusts the boost output voltage to account for any changes in LED forward
voltages. In the event that the boost controller is not able to regulate the output voltage due to the minimum
pulse width (ton(min) in the Electrical Characteristics), the TPS61196-Q1 enters pulse skip mode. In this mode, the
device keeps the power switch off for several switching cycles to prevent the output voltage from rising above the
regulated voltage. This operation typically occurs in light load condition or when the input voltage is higher than
the output voltage.
7.3.3 Switching Frequency
The switching frequency is programmed between 100 kHz to 800 kHz by an external resistor (R9 in the
简化电路原理图). To determine the resistance by a given frequency, use the curve in Figure 3 or calculate the
resistance value by Equation 1. Table 1 shows the recommended resistance values for some switching
frequencies.
40000
fSW
=
kHz
( )
R9
(1)
Table 1. Recommended Resistance Values For
Switching Frequencies
R9
ƒSW
400 kΩ
200 kΩ
100 kΩ
80 kΩ
48 kΩ
100 kHz
200 kHz
400 kHz
500 kHz
800 kHz
7.3.4 Enable and Undervoltage Lockout
The TPS61196-Q1 is enabled with the soft start-up when the EN pin voltage is higher than 1.8 V. A voltage of
less than 1 V disables the device.
An undervoltage lockout (UVLO) protection feature is provided. When the voltage at the VIN pin is less than 6.5
V, the device is powered off. The TPS61196-Q1 resumes the operation once the voltage at the VIN pin recovers
above the hysteresis (VVIN_HYS) more than the UVLO threshold of input falling voltage. If a higher UVLO voltage
is required, use the UVLO pin as shown in Figure 18 to adjust the input UVLO threshold by using an external
resistor divider. Once the voltage at the UVLO pin exceeds the 1.229-V threshold, the device is powered on, and
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a hysteresis current source of 3.9 µA is added. When the voltage at the UVLO pin drops lower than 1.229 V, the
current source is removed. The resistors of R1, R2, and R5 can be calculated by Equation 2 from required
VSTART and VSTOP. To avoid noise coupling, the resistor divider R1 and R2 must be close to the UVLO pin.
Placing a filter capacitor of more than 10 nF as shown in Figure 18 can eliminate the impact of the switching
ripple and improve the noise immunity.
If the UVLO function is not used, pull up the UVLO pin to the VDD pin.
VIN
R5
IHYS
R1
C4
UVLO
Enable
R2
UVLO
Comparator
1.229V
Figure 18. Undervoltage Lockout Circuit
VSTART - VSTOP
R1+ R5 =
IHYS
1.229V
R2 = (R1+ R5)´
VSTART -1.229V
where
•
IHYS is 3.9 µA sourcing current from the UVLO pin.
(2)
When the UVLO condition happens, the FAULT pin outputs high impedance. As long as the UVLO condition
removes, the FAULT pin outputs low impedance.
7.3.5 Power-Up Sequencing and Soft Start-up
The input voltage, UVLO pin voltage, EN input signal and the input dimming PWM signal control the power up of
the TPS61196-Q1. After the input voltage is above the required minimal input voltage of 7.5 V, the internal circuit
is ready to be powered up. After the UVLO pin is above the threshold of 1.229 V and the EN signal is high, the
internal LDO and logic circuit are activated. The device outputs a 20-ms pulse to detect the unused channels and
remove them from the control loop. When any PWM dimming signal is high, the soft start-up begins. If the PWM
dimming signals come before the EN signal is high, the soft start-up begins immediately after the detection of
unused channels.
12
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VIN
Rising Threshold
Falling Threshold
UVLO
EN
40μs
VDD
PWMx
FAULT
REF
REF Voltage = OVP Voltage
VOUT
Switching
IFBx
Unused Channel
Detection
200μs
20ms
Figure 19. Power-Up Sequencing
The TPS61196-Q1 has integrated the soft-start circuitry working with an external capacitor at the REF pin to
avoid inrush current during start-up. During the start-up period, the capacitor at the REF pin is charged with a
soft-start current source. When the REF pin voltage is higher than the output feedback voltage at the OVP pin,
the boost controller starts switching and the output voltage starts to ramp up. At the same time, the LED current
sink starts to drive the LED strings. At the beginning of the soft start, the charge current is 200 µA. Once the
voltage of the REF pin exceeds 2 V, the charge current changes to 10 µA and continues to charge the capacitor.
When the current sinks are driving the LED strings, the IFB voltages are monitored. When the minimum IFB
voltage is above 200 mV less than the setting voltage at the IFBV pin, the charge current is stopped, and the soft
start-up is finished. The TPS61196-Q1 enters normal operation to regulate the minimum IFB voltage to the
required voltage set by the resistor at the IFBV pin. The total soft start time is determined by the external
capacitance. The capacitance must be within 1 µF to 4.7 µF for different start-up time and different output
voltage.
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UVLO
VIN
EN
PWM
Dimming
10uA
Charging
Current
200uA
Charging
Current
Soft Startup Done
VIFB(min)>VIFBV – 200mV
VREF=2V
Dimming Off
(VOUT = VIN – VD)
15ms
200ms
VOUT
Figure 20. Soft-Start Waveforms
7.3.6 Unused Led String
If the application requires less than six LED strings, the TPS61196-Q1 simply requires connecting the unused
IFB pin to ground through a resistor between 20 kΩ and 36 kΩ. Once the device is turned on, the TPS61196-Q1
uses a 60-µA current source to detect the IFB pin voltage. If the IFB voltage is between 1 V and 2.5 V, the
device immediately disables this string during start-up.
7.3.7 Current Regulation
The six channel current sink regulators can be configured to provide up to 400 mA per string. The expected LED
current is programmed by a resistor (R11 in the 简化电路原理图) at the ISET using Equation 3.
V
ISET
ILED
=
´KISET
R11
where
•
•
VISET is the ISET pin voltage of 1.229 V
KISET is the current multiple of 3992.
(3)
To sink the set LED current, the current sink regulator requires a minimum headroom voltage at the IFB pins for
working properly. For example, when the LED current is set to 130 mA, the minimum voltage required at the IFB
pin must be higher than 0.35 V. For other LED currents, refer to Figure 4 for recommended minimum headroom
voltage required. The TPS61196-Q1 regulates the minimum voltage of the IFB pins to the IFBV voltage. The
IFBV voltage is adjustable with an external resistor (R10 in the 简化电路原理图) at the IFBV pin. After choosing
the minimum IFB voltage, the IFBV voltage must be set to this value and the setting resistance can be calculated
by Equation 4.
R10
V
=
´ 307.3 mV
( )
IFBV
R11
(4)
If a large LED current is set, the headroom voltage is required higher. This leads to more heat on the device. To
maintain the total power dissipation in the range of the package limit, normally all strings can not sink large
current in continuous mode but pulse mode.
14
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7.3.8 PWM Dimming
LED brightness dimming is set by applying an external PWM signal of 90 Hz to 22 kHz to the PWM pins. Each
LED string has an independent PWM input. Varying the PWM duty cycle from 0% to 100% adjusts the LED from
minimum to maximum brightness respectively. The recommended minimum on time of the LED string is 10 µsec.
Thus, the device has a minimum dimming duty cycle of 500:1 at 200 Hz.
When all PWM voltages are pulled low during dimming off, the TPS61196-Q1 turns off the LED strings and
keeps the boost converter running at PFM mode. The output voltage is kept at the level which is a little bit lower
than that when PWM is high. Thus, the device limits the output ripple due to the load transient that occurs during
PWM dimming.
When all PWM voltages are pulled low for more than 20 ms, to avoid the REF pin voltage dropping due to the
leakage current, the voltage of the REF pin is held by an internal reference voltage which equals to the REF pin
voltage in normal dimming operation. Thus, the output voltage will be kept at the same level as the normal output
voltage.
Since the output voltage in long time dimming off status is almost the same as the normal voltage for turning the
LED on, the TPS61196-Q1 turns on the LED very fast without any flicker when recovering from long time
dimming off to small duty cycle dimming on.
7.4 Device Functional Modes
7.4.1 Protections
The TPS61196-Q1 has a full set of protections making the system safe to any abnormal conditions. Some
protections will latch the TPS61196-Q1 in off state until its power supply is recycled or it is disabled and then
enabled again. In latch off state, the REF pin voltage is discharged to 0 V.
7.4.1.1 Switch Current Limit Protection Using the ISNS Pin
The TPS61196-Q1 monitors the inductor current through the voltage across a sense resistor (R7 in the
简化电路原理图) in order to provide current limit protection. During the switch FET on period, when the voltage at
the ISNS pin rises above 400 mV (VISNS in the Electrical Characteristics table), the TPS61196-Q1 turns off the
FET immediately and does not turn it back on until the next switch cycle. The switch current limit is equal to 400
mV / R7.
7.4.1.2 LED Open Protection
When one of the LED strings is open, the voltage at the IFB pin connecting to this LED string drops to zero
during dimming-on time. The TPS61196-Q1 monitors the IFB voltage for 20 ms. If the IFB voltage is still below
the threshold of 0.2 V, the current sink is disabled and an internal pull-up current is activated to detect the IFB
voltage again. If the IFB voltage is pulled up to a high voltage, this LED string is recognized as LED open. As a
result, the device deactivates the open IFB pin and removes it from the voltage feedback loop. Afterwards, the
output voltage returns to the voltage required for the connected LED strings. The IFB pin currents of the
connected strings remain in regulation during this process. If all the LED strings are open, the TPS61196-Q1 is
latched off.
7.4.1.3 LED Short-Cross Protection Using the FBP Pin
If one or several LEDs short in one string, the corresponding IFB pin voltage rises but continues to sink the LED
current, causing increased device power dissipation. To protect the device, the TPS61196-Q1 provides a
programmable LED short-across protection feature by properly sizing the resistor on the FBP pin (R12 in the
简化电路原理图) using Equation 5.
R12
VLED _ SHORT
=
´1.229V
R11
(5)
If any IFB pin voltage exceeds the threshold (VLED_SHORT), the device turns off the corresponding current sink and
removes this IFB pin from the output voltage regulation loop. Current regulation of the remaining IFB pins is not
affected.
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Device Functional Modes (continued)
7.4.1.4 Schottky Diode Open Protection
When the device is powered on, it checks the topology connection first. After the TPS61196-Q1 delays 400 µs, it
checks the voltage at the OVP pin to see if the Schottky diode is not connected or the boost output is hard-
shorted to ground. If the voltage at the OVP pin is lower than 70 mV, the TPS61196-Q1 is locked in off state until
the input power is recycled or it is enabled again.
7.4.1.5 Schottky Diode Short Protection
If the rectifier Schottky diode is shorted, the reverse current from output capacitor to ground is very large when
the switcher MOSFET is turned on. Because the current mode control topology has a minimum edge blanking
time to immunize against the spike current through the switcher, if the parasite inductance between the output
capacitor through the switcher to ground is zero, the external MOSFET will be damaged in this short period due
to the huge power dissipation in this case. But with a small parasite inductance, the power dissipation is limited.
The boost converter works in minimum pulse width in this situation due to cycle by cycle over-current protection.
The output voltage drops and the all-string-open protection is triggered because of the low voltage at all IFB pins.
The TPS61196-Q1 is latched off.
7.4.1.6 IFB Overvoltage Protection During Start-up
When any of IFB pins reaches the threshold (VOVP_IFB) of 38 V during start-up, the device stops switching and
stays in latch-off immediately to protect from damage. In latch-off state, the REF pin voltage is discharged.
7.4.1.7 Output Overvoltage Protection Using the OVP Pin
Use a resistor divider to program the maximum output voltage of the boost converter. To ensure the LED string
can be turned on with setting current, the maximum output voltage must be higher than the forward voltage drop
of the LED string. The maximum required voltage can be calculated by multiplying the maximum LED forward
voltage (VFWD(max)) and number (n) of series LEDs , and adding extra 1 V to account for regulation and resistor
tolerances and load transients.
The recommended bottom feedback resistor of the resistor divider (R4 in the 简化电路原理图) is 10 kΩ. Calculate
the top resistor (R3 in the 简化电路原理图) using Equation 6, where VOVP is the maximum output voltage of the
boost converter.
V
æ
ö
OVP
R3 =
-1 ´R4
ç
÷
3.02
è
ø
(6)
When the device detects that the voltage at the OVP pin exceeds overvoltage protection threshold of 3.02 V,
indicating that the output voltage has exceeded the clamp threshold voltage, the TPS61196-Q1 clamps the
output voltage to the set threshold. When the OVP pin voltage does not drop from the OVP threshold for more
than 500 ms, the device is latched off until the input power or the EN pin voltage is re-cycled.
7.4.1.8 Output Short-to-Ground Protection
When the inductor peak current reaches twice the switch current limit in each switching cycle, the device
immediately disables the boost controller until the fault is cleared. This protects the device and external
components from damage if the output is shorted to ground.
7.4.1.9 IFB Short-to-Ground Protection
The IFB pin short to ground makes the LED current uncontrollable if there is no protection. If the device tries to
increase the boost converter’s output voltage to lift the IFB voltage, it will make the situation worse and the LED
string may be burned due to the high current. The TPS61196-Q1 implements a protection mechanism to protect
the LED string in this failure mode.
If the IFB is short to ground before the TPS61196-Q1 is turned on, the device detects the IFB voltage by
sourcing a 60 µA current during start-up. If the IFB voltage is less than 0.4 V during start-up, the start-up stops
and the device outputs fault indication so as to protect the LED string during start-up.
16
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ZHCSDK1 –MARCH 2015
Device Functional Modes (continued)
When a LED feedback pin is shorted to ground during normal operation, the device first turns off this LED string
for a very short time and detects the IFB voltage again. If the IFB voltage is lower than 1.8 V, it sources a 60-µA
current and detects the IFB voltage again in off state. If the IFB voltage is still less than 1.8 V, this means the IFB
pin is shorted to ground. The boost converter is turned off and the REF voltage is discharged to ground to protect
the LED string.
7.4.1.10 ISET Short-to-Ground Protection
The TPS61196-Q1 monitors the ISET pin voltage when the device is enabled. When the sourcing current from
the ISET pin is larger than a threshold of 150 μA, the device disables the current sink because the ISET pin may
be short to ground or the current setting resistor is too small. Once the current sourcing from the ISET pin
recovers to the normal value, the current sink resumes working.
7.4.1.11 Thermal Protection
When the device junction temperature is over 150°C, the thermal protection circuit is triggered and shuts down
the device immediately. The device automatically restarts when the junction temperature falls back to less than
135°C, with approximate 15°C hysteresis.
Table 2. Protection List
PROTECTION ITEM
Diode open
RESULT
FAULT
LATCH OFF / RETRY
Latch off
Cannot start up
Output voltage low
LED string off
IFB OVP
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Diode short
Latch off
LED string open
LED string latch off
Latch off
LED string short during start-up
LEDshort
LED string off
Boost off
LED string latch off
Latch off
IFB short to GND
ISET short to GND
All LED strings open during start-up
Input voltage UVLO
Thermal shutdown
All LED strings off
VOUT OVP
Boost off
Retry
Latch off
Retry
Shutdown
Retry
7.4.2 Indication For Fault Conditions
The TPS61196-Q1 has an open-drain fault indicator pin to indicate abnormal conditions. When the device is
operating normally, the voltage at the FAULT pin is low. When any fault condition happens, it is in high
impedance, which can be pulled to high level through an external resistor. The FAULT pin can indicate following
conditions:
•
•
•
•
•
•
•
Overvoltage condition at the OVP or the IFB pin
LED short and open
IFB short to ground
ISET short to ground
Diode open and short
Output short circuit
Overtemperature
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
When more LED strings are required in the application, the TPS61196-Q1 can work in master/slave mode. The
TPS61196-Q1 can be set as slave device when the voltage at the FSW pin is below 0.5 V or above 3.5 V. The
master TPS61196-Q1 has booster controller and outputs the power rail for all LED strings. The slave TPS61196-
Q1 only works as a LED driver and feedbacks the required headroom voltage to the master by connecting the
slave's COMP pin to the master's REF pin. The ISNS pin of the slave TPS61196-Q1 must be connected to
ground. The slave's OVP pin voltage must be 3% higher than the voltage at the master's OVP pin. The slave
device can combine all fault conditions happening on both master and slave devices by connecting the master's
FAULT output to the FSW pin of the slave device. The slave’s FAULT pin outputs the indication signal for all fault
conditions.
L1
68uH
D1
8V to 30V
C1
EC1
EC2
10μF
R3
100μF
100μF
8V to 30V
VIN
VIN
R15
C2
2.2μF
R14
GDRV
ISNS
GDRV
ISNS
R5
R2
R6
C5
R7
R4
R1
C4
10nF
PGND
PGND
TPS61196
TPS61196
SLAVE
UVLO
VDD
UVLO
VDD
MASTER
OVP
COMP
FSW
OVP
COMP
FSW
C3
1.0μF
R8
R9
REF
REF
C6
EN
EN
C7
PWM1
IFB1
PWM1
IFB1
VDD
R13
PWM6
FAULT
IFB6
IFBV
FBP
PWM6
FAULT
IFB6
IFBV
FBP
R12
R10
ISET
ISET
AGND
AGND
R11
Figure 21. Multi-Chip Operation In Parallel
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ZHCSDK1 –MARCH 2015
8.2 Typical Application
L1
68mH
D1
VIN = 24V
C1
EC1
100mF
EC2
10mF
100mF
R19
3
VIN
R3
Q1
GDRV
R5
C2
2.2mF
255k
200k
ISNS
R6
200
R4
C4
10nF
R1
182k
R7
0.1
10k
UVLO
VDD
PGND
C5
470pF
TPS61196
R2
24.9k
OVP
COMP
FSW
C3
1.0mF
C8
160pF
R8
150k
REF
R9
200k
C6
47nF
C7
EN
2.2mF
FAULT
IFB1
IFB2
IFB3
IFB4
IFB5
IFB6
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
IFBV
FBP
ISET
C9
R10
60.4k
0.1mF
R12
196k
R11
37.4k
R13 R14 R15 R16 R17 R18
10M 10M 10M 10M 10M 10M
Thermal pad
AGND
Figure 22. TPS61196-Q1 Typical Application
8.2.1 Design Requirements
DESIGN PARAMETER
EXAMPLE VALUE
8 V to 16 V
6 x 12
Input voltage range
Number of LED strings x number of LEDs per string
Forward voltage of LED string
LED string current
36 V
70 mA per channel
200 kHz
Switching frequency
8.2.2 Detailed Design Procedure
8.2.2.1 Inductor Selection
The inductor is the most important component in switching power regulator design because it affects power
supply steady state operation, transient behavior, and loop stability. The inductor value, DC resistance (DCR),
and saturation current are important specifications to be considered for better performance. Although the boost
power stage can be designed to operate in discontinuous mode at maximum load, where the inductor current
ramps down to zero during each switching cycle, most applications will be more efficient if the power stage
operates in continuous conduction mode, where a DC current flows through the inductor. Therefore, the
Equation 8 and Equation 9 below are for CCM operation only. The TPS61196-Q1 is designed to work with
inductor values between 10 µH and 100 µH, depending on the switching frequency. Running the controller at
higher switching frequencies allows the use of smaller and/or lower profile inductors in the 10-µH range. Running
the controller at slower switching frequencies requires the use of larger inductors, near 100 µH, to maintain the
same inductor current ripple but may improve overall efficiency due to smaller switching losses. Inductor values
can have ±20% tolerance with no current bias. When the inductor current approaches saturation level, its
inductance can decrease 20% to 35% from the 0A value depending on how the inductor vendor defines
saturation.
In a boost regulator, the inductor DC current can be calculated with Equation 7.
VOUT ´ IOUT
IL(DC)
=
V
´ η
IN
where
•
•
VOUT = boost output voltage
IOUT = boost output current
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•
•
VIN = boost input voltage
η = power conversion efficiency, use 95% for TPS61196-Q1 applications
(7)
The inductor current peak-to-peak ripple can be calculated with Equation 8.
V ´ V
- V
IN
(
L ´ fSW ´ VOUT
)
IN
OUT
DIL(P-P)
=
where
•
•
•
•
•
ΔIL(P-P) = inductor ripple current
L = inductor value
fSW = switching frequency
VOUT = boost output voltage
VIN = boost input voltage
(8)
(9)
Therefore, the inductor peak current is calculated with Equation 9.
DIL(P-P)
IL(P) = IL(DC)
+
2
Select an inductor, which saturation current is higher than calculated peak current. To calculate the worst-case
inductor peak current, use the minimum input voltage, maximum output voltage, and maximum load current.
Regulator efficiency is dependent on the resistance of its high current path and switching losses associated with
the switch FET and power diode. Besides the external switch FET, the overall efficiency is also affected by the
inductor DCR. Usually the lower DC resistance shows higher efficiency. However, there is a trade-off between
DCR and the inductor footprint; furthermore, shielded inductors typically have higher DCR than unshielded ones.
8.2.2.2 Schottky Diode
The TPS61196-Q1 demands a high-speed rectification for optimum efficiency. Ensure that the diode's average
and peak current rating exceed the output LED current and inductor peak current. In addition, the diode's reverse
breakdown voltage must exceed the application output voltage.
8.2.2.3 Switch MOSFET And Gate Driver Resistor
The TPS61196-Q1 demands a power N-MOSFET (see Q1 in the Figure 22) as a switch. The voltage and current
rating of the MOSFET must be higher than the application output voltage and the inductor peak current. The
applications benefit from the addition of a resistor (See R19 in the Figure 22) connected between the GDRV pin
and the gate of the switch MOSFET. With this resistor, the gate driving current is limited and the EMI
performance is improved. A 3-Ω resistor value is recommended. The device exhibits lower efficiency when the
resistor value is above 3 Ω due to the more switching loss of the external MOSFET.
8.2.2.4 Current Sense and Current Sense Filtering
R7 determines the correct overcurrent limit protection. To choose the right value of R7, start with the total system
power needed POUT, and calculate the input current IIN by Equation 7. Efficiency can be estimated between 90%
to 95%. The second step is to calculate the inductor peak current based on the inductor value L using Equation 8
and Equation 9. The maximum R7 can now be calculated as R7(max) = VISNS / IL(P). It is recommended to add
20% or more margins to account for component variations. A small filter placed on the ISNS pin improves
performance of the converter (See R6 and C5 in 简化电路原理图). The time constant of this filter should be
approximately 100 ns. The range of R6 should be from about 100 Ω to 1 kΩ for best results. The C5 should be
located as close as possible to the ISNS pin to provide noise immunity.
8.2.2.5 Output Capacitor
The output capacitor is mainly selected to meet the requirements for output ripple and loop stability of the whole
system. This ripple voltage is related to the capacitance of the capacitor and its equivalent series resistance
(ESR). Assuming a capacitor with zero ESR, the minimum capacitance needed for a given ripple can be
calculated by:
IOUT ´ DMAX
VRIPPLE(C)
=
fSW ´ COUT
20
Copyright © 2015, Texas Instruments Incorporated
TPS61196-Q1
www.ti.com.cn
ZHCSDK1 –MARCH 2015
where
•
•
VRIPPLE is the peak-to-peak output voltage ripple
DMAX is the duty cycle of the boost converter.
(10)
DMAX is approximately equal to (VOUT(MAX) – VIN(MIN) / VOUT(MAX)) in applications. Care must be taken when
evaluating a capacitor’s derating under DC bias. The DC bias can also significantly reduce capacitance. Ceramic
capacitors can loss as much as 50% of its capacitance at its rated voltage. Therefore, leave the margin on the
voltage rating to ensure adequate capacitance.
The ESR impact on the output ripple must be considered as well if tantalum or aluminum electrolytic capacitors
are used. Assuming there is enough capacitance such that the ripple due to the capacitance can be ignored, the
ESR needed to limit the VRIPPLE is: VRIPPLE(ESR) = IL(P) × ESR
Ripple current flowing through a capacitor’s ESR causes power dissipation in the capacitor. This power
dissipation causes a temperature increase internally to the capacitor. Excessive temperature can seriously
shorten the expected life of a capacitor. Capacitors have ripple current ratings that are dependent on ambient
temperature and should not be exceeded. Therefore, high ripple current type electrolytic capacitor with small
ESR is used in typical application as shown in 简化电路原理图.
In the typical application, the output requires a capacitor in the range of 22 µF to 220 µF. The output capacitor
affects the small signal control loop stability of the boost converter. If the output capacitor is below the range, the
boost regulator may potentially become unstable.
8.2.2.6 Loop Consideration
The COMP pin on the TPS61196-Q1 is used for external compensation, allowing the loop response to be
optimized for each application. The COMP pin is the output of the internal trans-conductance amplifier. The
external resistor R8, along with ceramic capacitors C6 and C8 (see in 简化电路原理图), are connected to the
COMP pin to provide poles and zero. The poles and zero, along with the inherent pole and zero in a peak current
mode control boost converter, determine the closed loop frequency response. This is important to converter
stability and transient response.
The first step is to calculate the pole and the right half plane zero of the peak current mode boost converter by
Equation 11 and Equation 12.
2IOUT
fP
=
2πVOUT ´ COUT
(11)
2
VOUT ´ 1-D
(
2πL ´ IOUT
)
fZRHP
=
(12)
To make the loop stable, the loop must have sufficient phase margin at the crossover frequency where the loop
gain is 1. To avoid the effect of the right half plane zero on the loop stability, choose the crossover frequency
less than 1/5 of the ƒZRHP. Then calculate the compensation components by Equation 13 and Equation 14.
R7 ´2πfco ´COUT
VOVP
R8 =
´
1-D ´ Gm
)
VOVPTH
(
EA
where
•
•
•
VOVPTH = 3.02 V which is the internal reference for the output overvoltage-protection setting voltage.
GmEA is the trans-conductance of the error amplifier. Its typical value is 120 μS.
ƒCO is the crossover frequency, which normally is less than 1/5 of the ƒZRHP
1
(13)
(14)
C6 =
2πfP ´ R8
where
•
ƒP is the pole’s frequency of the power stage calculated by Equation 11
If the output cap is the electrolytic capacitor, which may have large ESR, a capacitor is required to cancel the
zero of the output capacitor. Equation 15 calculates the value of this capacitor.
COUT ´ RESR
C8 =
R8
(15)
21
Copyright © 2015, Texas Instruments Incorporated
TPS61196-Q1
ZHCSDK1 –MARCH 2015
www.ti.com.cn
8.2.3 Application Curves
100
100
90
80
70
60
50
90
80
70
60
8 LEDs, 100 mA/channel, 100% Brightness
8 LEDs, 100 mA/channel, 50% Brightness
12 LEDs, 70 mA/channel, 100% Brightness
12 LEDs, 70 mA/channel, 50% Brightness
50
6
7
8
9
10
11
12
13
14
15
16
6
7
8
9
10
11
12
13
14
15
16
Input Voltage (V)
Input Voltage (V)
D001
D002
Figure 23. Efficiency vs Input Voltage (8 LEDs)
Figure 24. Efficiency vs Input Voltage (12 LEDs)
1
1
0.95
0.9
0.95
0.9
0.85
0.8
0.85
0.8
0.75
0.7
0.75
0.7
16 LEDs (VOUT = 50 V)
200 Hz Dimming Frequency
0.65
0.6
0.65
0.6
VIN = 24 V, 16 LEDs
VIN = 24 V, 20 LEDs
VIN = 12 V, 16 LEDs
VIN = 12 V
VIN = 24 V
0.55
0.5
0.55
0.5
0
200 400 600 800 1000 1200 1400 1600 1800 2000
0
10
20
30
40
50
60
PWM Dimming Duty Cycle (%)
70
80
90 100
Output Current (mA)
G001
G002
Figure 26. DC Load Efficiency
Figure 25. Efficiency (16 LEDs)
9 Power Supply Recommendations
The TPS61196-Q1 requires a single supply input voltage. This voltage can range between 8 V to 30 V and be
able to supply enough current for a given application.
22
Copyright © 2015, Texas Instruments Incorporated
TPS61196-Q1
www.ti.com.cn
ZHCSDK1 –MARCH 2015
10 Layout
10.1 Layout Guidelines
As for all switching power supplies, especially those providing high current and using high switching frequencies,
layout is an important design step. If layout is not carefully done, the regulator could show instability as well as
EMI problems. Therefore, use wide and short traces for high current paths. The VDD capacitor, C3 (see
Figure 22) is the filter and noise decoupling capacitor for the internal linear regulator powering the internal digital
circuits. It should be placed as close as possible between the VDD and PGND pins to prevent any noise insertion
to digital circuits. The switch node at the drain of Q1 carries high current with fast rising and falling edges.
Therefore, the connection between this node to the inductor and the Schottky diode should be kept as short and
wide as possible. It is also beneficial to have the ground of the capacitor C3 close to the ground of the current
sense resistor R7 since there is large driving current flowing between them. The ground of output capacitor EC2
should be kept close to input power ground or through a large ground plane because of the large ripple current
returning to the input ground. When laying out signal grounds, it is recommended to use short traces separate
from power ground traces and connect them together at a single point, for example on the thermal pad in the
PWP package. Resistors R3, R4, R9, R10, R11, and R12 (see Figure 22) are setting resistors for switching
frequency, LED current, protection threshold and feedback voltage programming. To avoid unexpected noise
coupling into the pins and affecting the accuracy, these resistors need to be close to the pins with short and wide
traces to GND. In the PWP package, the thermal pad needs to be soldered to the large ground plane on the PCB
for better thermal performance. Additional thermal via can significantly improve power dissipation of the device.
10.2 Layout Example
GND
VIN
GND
UVLO
EN
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VIN
2
FAULT
FSW
VDD
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
FBP
3
4
5
GDRV
ISNS
PGND
REF
6
7
8
9
COMP
OVP
D1
ISET
10
11
12
13
14
GND
IFBV
AGND
IFB6
IFB1
IFB2
IFB5
IFB3
IFB4
GND
Bottom GND Plane
VOUT
GND
Figure 27. Layout Example
版权 © 2015, Texas Instruments Incorporated
23
TPS61196-Q1
ZHCSDK1 –MARCH 2015
www.ti.com.cn
11 器件和文档支持
11.1 商标
All trademarks are the property of their respective owners.
11.2 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
11.3 术语表
SLYZ022 — TI 术语表。
这份术语表列出并解释术语、首字母缩略词和定义。
12 机械封装和可订购信息
以下页中包括机械封装和可订购信息。 这些信息是针对指定器件可提供的最新数据。 这些数据会在无通知且不对
本文档进行修订的情况下发生改变。 欲获得该数据表的浏览器版本，请查阅左侧的导航栏。
24
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS61196PWPRQ1
ACTIVE
HTSSOP
PWP
28
2000 RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
TPS61196Q
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
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Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
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Addendum-Page 1
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