TPS62021DGQ [TI]
600 mA/1.25 MHz HIGH-EFFICIENCY STEP-DOWN CONVERTER; 600毫安/ 1.25 MHz的高效率降压转换器
| 型号： | TPS62021DGQ |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 600 mA/1.25 MHz HIGH-EFFICIENCY STEP-DOWN CONVERTER |
| 文件： | 总18页 (文件大小：415K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS62020, TPS62021
www.ti.com
SLVS076B–JUNE 2003–REVISED APRIL 2004
600 mA/1.25 MHz HIGH-EFFICIENCY STEP-DOWN CONVERTER
FEATURES
DESCRIPTION
•
•
•
•
•
•
•
Up to 95% Conversion Efficiency
The TPS62020 is a high efficiency synchronous
step-down dc-dc converter optimized for battery pow-
ered portable applications. This device is ideal for
portable applications powered by a single Li-Ion
battery cell or by 3-cell NiMH/NiCd batteries. With an
output voltage range from 6.0 V down to 0.7 V, the
device supports low voltage DSPs and processors in
PDAs, pocket PCs, as well as notebooks and
subnotebook computers. The TPS62020 operates at
a fixed switching frequency of 1.25 MHz and enters
the power save mode operation at light load currents
to maintain high efficiency over the entire load current
range. For low noise applications, the device can be
forced into fixed frequency PWM mode by pulling the
MODE pin high. The difference between the
TPS62020 and the TPS62021 is the logic level of the
MODE pin. The TPS62021 has an active-low MODE
pin. The TPS62020 supports up to 600-mA load
current.
Typical Quiescent Current: 18 µA
Load Current: 600 mA
Operating Input Voltage Range: 2.5 V to 6.0 V
Switching Frequency: 1.25 MHz
Adjustable and Fixed Output Voltage
Power Save Mode Operation at Light load
Currents
•
•
•
•
•
•
•
•
Active-Low MODE pin on TPS62021
100% Duty Cycle for Lowest Dropout
Internal Softstart
Dynamic Output Voltage Positioning
Thermal Shutdown
Short-Circuit Protection
10 Pin MSOP PowerPad™ Package
10 Pin QFN 3 X 3 mm Package
APPLICATIONS
•
•
•
•
•
•
PDA, Pocket PC and Smart Phones
USB Powered Modems
CPUs and DSPs
PC Cards and Notebooks
xDSL Applications
Standard 5-V to 3.3-V Conversion
Typical Application Circuit (600-mA Output Current)
EFFICIENCY
vs
LOAD CURRENT
V
V
O
100
95
L1
I
TPS62020
V
= 1.8 V
O
0.7 V to V / 600 mA
I
10 µH
2.5 V to 6 V
8
7
2
3
SW
VIN
V = 2.7 V
I
90
85
80
75
70
65
60
55
50
45
40
SW
FB
VIN
C3
10 µF
C4
10 µF
5
10
9
1
6
R1
EN
V = 3.6 V
I
C1
PGND
MODE
GND
V = 5 V
I
4
PGND
Mode = Low
R2
C2
V = 3.6 V
I
Mode = High
0
0.01 0.10
1
10
100 1000
I
L
− Load Current − mA
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPad is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2004, Texas Instruments Incorporated
TPS62020, TPS62021
www.ti.com
SLVS076B–JUNE 2003–REVISED APRIL 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
MODE PIN
LOGIC LEVEL
PACKAGE
PACKAGE MARKING
TA
MSOP(1)
QFN(2)
MSOP
BBK
QFN
MODE
MODE
TPS62020DGQ
TPS62021DGQ
TPS62020DRC
TPS62021DRC
BBJ
ASJ
-40°C to 85°C
ASH
(1) The DGQ package is available in tape and reel. Add R suffix (DGQR) to order quantities of 2500 parts per reel.
(2) The DRC package is available in tape and reel. Add R suffix (DRCR) to order quantities of 3000 parts per reel.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted(1)
UNITS
-0.3 V to 7 V
Supply voltage VIN(2)
Voltages on EN, MODE, FB, SW(2)
Continuous power dissipation
Operating junction temperature range
Storage temperature range
-0.3 V to VCC +0.3 V
See Dissipation Rating Table
-40°C to 150°C
-65°C to 150°C
Lead temperature (soldering, 10 sec)
260°C
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
PACKAGE DISSIPATION RATINGS
T
A ≤ 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
(1)
PACKAGE
RθJA
POWER RATING
MSOP
QFN
60°C/W
1.67 W
917 mW
1.13 W
667 mW
821 mW
48.7°C/W
2.05 W
(1) The thermal resistance, RθJA is based on a soldered PowerPAD using thermal vias.
RECOMMENDED OPERATING CONDITIONS
MIN
2.5
TYP
MAX UNIT
VI
Supply voltage
6.0
VI
V
V
VO
IO
Output voltage range for adjustable output voltage version
0.7
Output current
Inductor(1)
Input capacitor(1)
600
mA
µH
µF
µF
°C
°C
L
3.3
10
10
10
CI
CO
TA
TJ
(1)
Output capacitor
Operating ambient temperature
Operating junction temperature
-40
-40
85
125
(1) Refer to application section for further information
2
TPS62020, TPS62021
www.ti.com
SLVS076B–JUNE 2003–REVISED APRIL 2004
ELECTRICAL CHARACTERISTICS
VI = 3.6 V, VO = 1.8 V, IO = 600 mA, EN = VIN, TA = -40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted)
(1)
PARAMETER
SUPPLY CURRENT
TEST CONDITIONS
MIN
TYP MAX
UNIT
VI
Input voltage range
2.5
6.0
V
µA
µA
V
I(Q)
Operating quiescent current
Shutdown supply current
Under-voltage lockout threshold
IO = 0 mA, device is not switching
EN = GND
18
35
1
ISD
0.1
VUVLO
1.5
1.4
2.3
ENABLE AND MODE
VEN
EN high level input voltage
V
V
VEN
EN low level input voltage
EN input bias current
0.4
1.0
IEN
EN = GND or VIN
0.01
0.01
µA
V
V(MODE)
V(MODE)
I(MODE)
MODE high level input voltage
MODE low level input voltage
MODE input bias current
1.4
0.4
1.0
V
MODE = GND or VIN
µA
POWER SWITCH
P-channel MOSFET on-resistance
VI = VGS = 3.6 V
VI = VGS = 2.5 V
VDS = 6.0 V
115
145
210
mΩ
mΩ
µA
mΩ
mΩ
µA
A
rDS(ON)
P-channel MOSFET on-resistance
P-channel leakage current
N-channel MOSFET on-resistance
N-channel MOSFET on-resistance
N-channel leakage current
P-channel current limit
270
1
Ilkg(P)
VI = VGS = 3.6 V
VI = VGS = 2.5 V
VDS = 6.0 V
85
200
280
1
rDS(ON)
115
IIkg(N)
IL
2.5 V < VI < 6.0 V
0.9
1
1.1
1.3
Thermal shutdown
150
°C
OSCILLATOR
VFB= 0.5 V
VFB = 0 V
1.25
625
1.5
VIN
MHz
kHz
fS
Oscillator frequency
OUTPUT
VO
Adjustable output voltage range
Reference voltage
0.7
V
V
Vref
0.5
VI = 2.5 V to 6.0 V; IO = 0 mA
VI = 2.5 V to 6.0 V; 0 mA ≤ IO ≤ 600 mA
VI = VO + 0.5 V (min 2.5 V) to 6.0 V, IO = 10 mA
IO = 10 mA to 1200 mA
0%
3%
3%
V
VFB
Feedback voltage
Line regulation(1)
-3%
V
0
0
%/V
%/mA
µA
(1)
Load regulation
Leakage current into SW pin
VI > VO, 0 V≤ VSW ≤ VI
0.1
0.1
625
1
1
IIkg(SW)
f
Reverse leakage current into pin SW
Short circuit switching frequency
VI = open; EN = GND; VSW = 6.0 V
VFB = 0 V
µA
kHz
(1) The line and load regulations are digitally controlled to assure an output voltage accuracy of ±3%.
PIN ASSIGNMENTS
DGQ PACKAGE
(TOP VIEW)
DRC PACKAGE
(TOP VIEW)
PGND
PGND
SW
EN
VIN
VIN
GND
FB
1
10
9
1
2
3
4
5
10
9
EN
VIN
VIN
GND
FB
PGND
2
3
4
5
PGND
SW
8
8
SW
MODE
7
7
SW
6
6
MODE
:
NOTE The PowerPAD must be connected to GND.
3
TPS62020, TPS62021
www.ti.com
SLVS076B–JUNE 2003–REVISED APRIL 2004
PIN ASSIGNMENTS (continued)
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
EN
NO.
1
I
I
Enable. Pulling EN to ground forces the device into shutdown mode. Pulling EN to VI enables the device. EN
should not be left floating and must be terminated.
VIN
GND
FB
2, 3
4
Supply voltage input
Analog ground
5
I
I
Feedback. Connect an external resistor divider to this pin.
MODE
MODE
6
The difference between TPS62020 and TPS62021 is the logic level of the MODE pin. The TPS62021 has an
active-low MODE pin. The TPS62020 is forced into fixed-frequency PWM mode by pulling the MODE pin high.
Pulling the MODE pin low enables the Power Save Mode, operating in PFM mode (Pulse frequency modulation)
at light load current, and in fixed frequency PWM at medimum to heavy load currents. In contrast, the TPS62021
is forced into PWM mode by pulling the MODE pin low.
SW
7, 8
I/O This is the switch pin of the converter and connected to the drain of the internal power MOSFETs
Power ground
PGND
9, 10
FUNCTIONAL BLOCK DIAGRAM
VIN
VIN
Current limit Comparator
Undervoltage
Lockout
Bias supply
+
−
Ref
Soft
Start
EN
+
SkipComparator
Ref
−
V
MODE
Vcomp
1.25 MHz
Oscillator
I
Comparator
S
R
SW
SW
Driver
Shoot−thru
Logic
+
−
Control Logic
Saw Tooth
Generator
Comp High
Comp Low
Comp Low 2
Comp High
LoadComparator
−
+
Gm
Compensation
+
Comp Low
−
+
−
Comp Low 2
Vref = 0.5 V
FB
PGND
PGND
MODE
(See Note A)
GND
NOTE A: The TPS62020 has an active-high MODE pin. The TPS62020 has an active-low MODE pin.
4
TPS62020, TPS62021
www.ti.com
SLVS076B–JUNE 2003–REVISED APRIL 2004
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
η
Efficiency
vs Load current
vs Input voltage
vs Input voltage
vs Input voltage
vs Input voltage
vs Input voltage
1, 2, 3
4
η
Efficiency
IQ
No load quiescent current
Switching frequency
P-Channel switch rDS(on)
N-Channel rectifier switch rDS(on
Load transient response
PWM operation
5, 6
7
fs
rDS(on)
rDS(on)
8
)
9
10
11
12
13
Power save mode operation
Start-up
EFFICIENCY
vs
LOAD CURRENT
EFFICIENCY
vs
LOAD CURRENT
100
95
100
V
= 3.3 V
V
O
= 1.8 V
O
95
90
85
80
75
70
65
60
55
50
45
40
V = 2.7 V
I
90
85
80
75
70
65
60
55
50
45
40
V = 3.6 V
I
Mode = Low
V = 3.6 V
I
V = 5 V
I
Mode = Low
V = 5 V
I
Mode = Low
V = 3.6 V
I
Mode = High
0
0.01 0.10
1
10
100
1000
0
0.01 0.10
1
10
100
1000
I
L
− Load Current − mA
I
L
− Load Current − mA
Figure 1.
Figure 2.
5
TPS62020, TPS62021
www.ti.com
SLVS076B–JUNE 2003–REVISED APRIL 2004
TYPICAL CHARACTERISTICS (continued)
EFFICIENCY
vs
LOAD CURRENT
EFFICIENCY
vs
INPUT VOLTAGE
100
95
90
85
80
100
V
O
= 1.5 V
V
= 1.8 V
O
95
90
85
80
75
70
65
60
55
50
45
40
Mode = Low
V = 2.7 V
I
I = 250 mA
L
V = 3.6 V
I
I
= 500 mA
= 1 mA
L
V = 5 V
I
I
L
Mode = Low
75
70
Mode = High
100
2.5
3
3.5
4
4.5
5
5.5
6
0
0.01 0.10
1
10
1000
I
L
− Load Current − mA
V − Input Voltage − V
I
Figure 3.
Figure 4.
QUIESCENT CURRENT
vs
QUIESCENT CURRENT
vs
INPUT VOLTAGE
INPUT VOLTAGE
7.5
7
23
MODE = High
MODE = Low
T
= 85°C
= 25°C
= −40°C
21
19
17
15
13
11
9
A
6.5
6
T
A
= 25°C
T
A
T
A
5.5
5
4.5
4
3.5
3
7
5
2.5
3
3.5
4
4.5
5
5.5
6
2.4 2.8 3.2 3.6
4
4.4 4.8 5.2 5.6
6
V − Input Voltage − V
I
V − Input Voltage − V
I
Figure 5.
Figure 6.
6
TPS62020, TPS62021
www.ti.com
SLVS076B–JUNE 2003–REVISED APRIL 2004
TYPICAL CHARACTERISTICS (continued)
SWITCHING FREQUENCY
vs
P-CHANNEL rDS(on)
vs
INPUT VOLTAGE
INPUT VOLTAGE
0.180
0.170
0.160
0.150
0.140
0.130
1.23
1.23
1.22
1.22
1.21
1.21
1.20
1.20
1.19
1.19
T
= 85°C
A
T
A
= 25°C
T
= 85°C
A
T
A
= 25°C
T
A
= −40°C
0.120
0.110
0.100
T
A
= −40°C
0.090
0.080
1.18
1.18
2.5 2.9 3.3 3.7 4.1 4.5
4.9 5.3 5.7
6
2.5 2.9 3.3 3.7 4.1 4.5
4.9 5.3 5.7
6
V − Input Voltage − V
I
V − Input Voltage − V
I
Figure 7.
Figure 8.
N-CHANNEL RECTIFIER rDS(on)
vs
INPUT VOLTAGE
LOAD TRANSIENT RESPONSE
V = 3.6 V,
0.150
0.140
0.130
0.120
I
V
= 1.8 V,
O
PWM/PFM Operation
T
A
= 85°C
T
A
= 25°C
0.110
0.100
0.090
0.080
0.070
T
A
= −40°C
0.060
0.050
2.5 2.9 3.3 3.7 4.1 4.5
4.9 5.3 5.7
6
50 µs/div
V − Input Voltage − V
I
Figure 9.
Figure 10.
7
TPS62020, TPS62021
www.ti.com
SLVS076B–JUNE 2003–REVISED APRIL 2004
TYPICAL CHARACTERISTICS (continued)
PWM OPERATION
POWER SAVE MODE OPERATION
V = 3.6 V,
I
V
O
= 1.8 V
V = 3.6 V,
I
V
O
= 1.8 V
2.5 µs/div
500 ns/div
Figure 11.
Figure 12.
START-UP
V = 3.6 V,
I
V
O
= 1.8 V,
I
O
= 545 mA
200 µs/div
Figure 13.
8
TPS62020, TPS62021
www.ti.com
SLVS076B–JUNE 2003–REVISED APRIL 2004
DETAILED DESCRIPTION
OPERATION
The TPS62020 is a synchronous step-down converter operating with typically 1.25-MHz fixed frequency. At
moderate to heavy load currents the device operates in pulse width modulation (PWM), and at light load currents
the device enters power save mode operation using pulse frequency modulation (PFM). When operating in PWM
mode, the typical switching frequency is 1.25 MHz with a minimum switching frequency of 1 MHz. This makes
the device suitable for xDSL applications minimizing RF (radio frequency) interference.
During PWM operation the converter uses a unique fast response voltage mode controller scheme with input
voltage feed-forward to achieve good line and load regulation allowing the use of small ceramic input and output
capacitors. At the beginning of each clock cycle initiated by the clock signal (S) the P-channel MOSFET switch
turns on and the inductor current ramps up until the comparator trips and the control logic turns off the switch.
The current limit comparator also turns off the switch in case the current limit of the P-channel switch is
exceeded. After the dead time preventing current shoot through, the N-channel MOSFET rectifier is turned on
and the inductor current ramps down. The next cycle is initiated by the clock signal, again turning off the
N-channel rectifier and turning on the P-channel switch.
The Gm amplifier as well as the input voltage determines the rise time of the saw tooth generator, and therefore,
any change in input voltage or output voltage directly controls the duty cycle of the converter, giving a very good
line and load transient regulation.
POWER SAVE MODE OPERATION
As the load current decreases, the converter enters power save mode operation. During power save mode the
converter operates with reduced switching frequency in PFM mode and with a minimum quiescent current
maintaining high efficiency.
The converter monitors the average inductor current and the device enters power save mode when the average
inductor current is below the threshold. The transition point between PWM and power save mode is given by the
transition current with the following equation:
V
I
I
+
transition
18.66 W
(1)
During power save mode the output voltage is monitored with the comparator by the threshold's comp low and
comp high. As the output voltage falls below the comp low threshold set to typically 0.8% above the nominal
output voltage, the P-channel switch turns on. The P-channel switch remains on until the transition current
Equation 1 is reached. Then the N-channel switch turns on completing the first cycle. The converter continues to
switch with its normal duty cycle determined by the input and output voltage but with half the nominal switching
frequency of 625-kHz typ. Thus the output voltage rises and, as soon as the output voltage reaches the comp
high threshold of 1.6%, the converter stops switching. Depending on the load current, the converter switches for
a longer or shorter period of time in order to deliver the energy to the output. If the load current increases and the
output voltage can not be maintained with the transition current Equation 1, the converter enters PWM again.
See Figure 11 and Figure 12 under the typical graphs section and Figure 14 for power save mode operation.
Among other techniques this advanced power save mode method allows high efficiency over the entire load
current range and a small output ripple of typically 1% of the nominal output voltage.
Setting the power save mode thresholds to typically 0.8% and 1.6% above the nominal output voltage at light
load current results in a dynamic voltage positioning achieving lower absolute voltage drops during heavy load
transient changes. This allows the converter to operate with small output capacitors like 10 µF or 22 µF and still
having a low absolute voltage drop during heavy load transient. Refer to Figure 14 as well for detailed operation
of the power save mode.
9
TPS62020, TPS62021
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SLVS076B–JUNE 2003–REVISED APRIL 2004
DETAILED DESCRIPTION (continued)
PFM Mode at Light Load
Comp High
Comp Low
1.6%
0.8%
V
O
Comp Low 2
PWM Mode at Medium to Full Load
Figure 14. Power Save Mode Thresholds and Dynamic Voltage Positioning
The converter enters the fixed frequency PWM mode as soon as the output voltage falls below the comp low 2
threshold.
DYNAMIC VOLTAGE POSITIONING
As described in the power save mode operation sections before and as detailed in Figure 14 the output voltage
is typically 0.8% (i.e., 1% on average) above the nominal output voltage at light load currents, as the device is in
power save mode. This gives additional headroom for the voltage drop during a load transient from light load to
full load. In the other direction during a load transient from full load to light load the voltage overshoot is also
minimized by turning on the N-Channel rectifier switch to pull the output voltage actively down.
MODE (AUTOMATIC PWM/PFM OPERATION AND FORCED PWM OPERATION)
Connecting the MODE pin of the TPS62020 to GND enables the automatic PWM and power save mode
operation. The converter operates in fixed frequency PWM mode at moderate to heavy loads and in the PFM
mode during light loads, maintaining high efficiency over a wide load current range.
Pulling the TPS62020 MODE pin high forces the converter to operate constantly in the PWM mode even at light
load currents. The advantage is the converter operates with a fixed switching frequency that allows simple
filtering of the switching frequency for noise sensitive applications. In this mode, the efficiency is lower compared
to the power save mode during light loads (see Figure 1 to Figure 3). For additional flexibility it is possible to
switch from power save mode to forced PWM mode during operation. This allows efficient power management
by adjusting the operation of the TPS6204x to the specific system requirements.
The difference between the TPS62020 and the TPS62021 is the logic level of the MODE pin. The TPS62021 has
an active-low MODE pin. Pulling the TPS62021 MODE pin high enables the automatic PWM and Power Save
Mode.
100% DUTY CYCLE LOW DROPOUT OPERATION
The TPS62020 offers a low input to output voltage difference while still maintaining regulation with the use of the
100% duty cycle mode. In this mode, the P-Channel switch is constantly turned on. This is particularly useful in
battery powered applications to achieve longest operation time by taking full advantage of the whole battery
voltage range. i.e. The minimum input voltage to maintain regulation depends on the load current and output
voltage and can be calculated as:
max ǒrDS(on) max ) R Ǔ
V min + V max ) I
I
O
O
L
(2)
with:
•
•
IO(max) = maximum output current plus inductor ripple current
rDS(on)max = maximum P-channel switch tDS(on)
.
10
TPS62020, TPS62021
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SLVS076B–JUNE 2003–REVISED APRIL 2004
DETAILED DESCRIPTION (continued)
•
•
RL = DC resistance of the inductor
VOmax = nominal output voltage plus maximum output voltage tolerance
SOFTSTART
The TPS62020 series has an internal softstart circuit that limits the inrush current during start-up. This prevents
possible voltage drops of the input voltage in case a battery or a high impedance power source is connected to
the input of the TPS62020.
The softstart is implemented with a digital circuit increasing the switch current in steps of typically ILIM/8, ILIM/4,
ILIM/2 and then the typical switch current limit of 1.1 A as specified in the electrical parameter table. The start-up
time mainly depends on the output capacitor and load current, see Figure 13.
SHORT-CIRCUIT PROTECTION
As soon as the output voltage falls below 50% of the nominal output voltage, the converter switching frequency
as well as the current limit is reduced to 50% of the nominal value. Since the short-circuit protection is enabled
during start up the device does not deliver more than half of its nominal current limit until the output voltage
exceeds 50% of the nominal output voltage. This needs to be considered in case a load acting as a current sink
is connected to the output of the converter.
THERMAL SHUTDOWN
As soon as the junction temperature of typically 150°C is exceeded the device goes into thermal shutdown. In
this mode, the P-Channel switch and N-Channel rectifier are turned off. The device continues its operation when
the junction temperature falls below typically 150°C again.
ENABLE
Pulling the EN low forces the part into shutdown mode, with a shutdown current of typically 0.1 µA. In this mode,
the P-Channel switch and N-Channel rectifier are turned off and the whole device is in shut down. If an output
voltage is present during shut down, which could be an external voltage source or super cap, the reverse
leakage current is specified under electrical parameter table. For proper operation the enable (EN) pin must be
terminated and should not be left floating.
Pulling EN high starts up the device with the softstart as described under the section Softstart.
UNDERVOLTAGE LOCKOUT
The undervoltage lockout circuit prevents device misoperation at low input voltages. It prevents the converter
from turning on the switch or rectifier MOSFET with undefined conditions.
11
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SLVS076B–JUNE 2003–REVISED APRIL 2004
APPLICATION INFORMATION
ADJUSTABLE OUTPUT VOLTAGE VERSION
When the adjustable output voltage version TPS62020 is used, the output voltage is set by the external resistor
divider. See Figure 15.
The output voltage is calculated as:
R1
R2
+ 0.5 V ǒ1 ) Ǔ
V
O
(3)
with R1 + R2 ≤ 1 MΩ and internal reference voltage Vref typical = 0.5 V
R1 + R2 should not be greater than 1 MΩ because of stability reasons. To keep the operating quiescent current
to a minimum, the feedback resistor divider should have high impedance with R1+R2≤1 MΩ. Due to this and the
low reference voltage of Vref = 0.5 V, the noise on the feedback pin (FB) needs to be minimized. Using a
capacitive divider C1 and C2 across the feedback resistors minimizes the noise at the feedback, without
degrading the line or load transient performance.
C1 and C2 should be selected as:
1
C1 +
2 p 10 kHz R1
(4)
with:
•
•
R1 = upper resistor of voltage divider
C1 = upper capacitor of voltage divider
For C1 a value should be chosen that comes closest to the calculated result.
R1
R2
C2 +
C1
(5)
with:
•
•
R2 = lower resistor of voltage divider
C2 = lower capacitor of voltage divider
For C2, the selected capacitor value should always be selected larger than the calculated result. For example, in
Figure 15 for C2 100 pF are selected for a calculated result of C2 = 88.42 pF.
If quiescent current is not a key design parameter C1 and C2 can be omitted, and a low impedance feedback
divider has to be used with R1 + R2 < 100 kΩ. This reduces the noise available on the feedback pin (FB) as well
but increases the overall quiescent current during operation. The higher the programmed output voltage the
lower the feedback impedance has to be for best operation when not using C1 and C2.
V
V
O
L1
I
TPS62020
1.8 V / 600 mA
6.2 µH
2.5 V to 6 V
8
7
2
3
1
6
4
SW
VIN
SW
FB
VIN
C3
22 µF
C4
5
EN
R1
470 kΩ
22 µF
C1
33 pF
10
9
PGND
MODE
GND
PGND
R2
180 kΩ
C2
100 pF
Figure 15. Adjustable Output Voltage Version
12
TPS62020, TPS62021
www.ti.com
SLVS076B–JUNE 2003–REVISED APRIL 2004
APPLICATION INFORMATION (continued)
Inductor Selection
The TPS62020 uses typically a 10-µH output inductor. Larger or smaller inductor values can be used to optimize
the performance of the device for specific operation conditions. When changing inductor values, the product of
the inductor value times output-capacitor value (L×C) should stay constant. For example, when reducing the
inductor value, increase the output capacitor accordingly. See the application circuits in Figure 17, Figure 18, and
Figure 19. The selected inductor has to be rated for its dc resistance and saturation current. The dc resistance of
the inductance directly influences the efficiency of the converter. Therefore an inductor with the lowest dc
resistance should be selected for highest efficiency. Formula Equation 7 calculates the maximum inductor current
under static load conditions. The saturation current of the inductor should be rated higher than the maximum
inductor current as calculated with formula Equation 7. This is needed because during heavy load transient the
inductor current rises above the value calculated under Equation 7.
V
O
1–
V
I
DI + V
L
O
L ƒ
(6)
(7)
DI
L
I max + I max )
L
O
2
with:
•
•
•
•
7 = Switching frequency (1.25 MHz typical)
L = Inductor value
∆IL= Peak-to-peak inductor ripple current
ILmax = Maximum inductor current
The highest inductor current occurs at maximum VI.
Open core inductors have a soft saturation characteristic and they can usually handle higher inductor currents
versus a comparable shielded inductor. A more conservative approach is to select the inductor current rating just
for the maximum switch current of 1.3 A for the TPS62020. Keep in mind that the core material from inductor to
inductor differs and has an impact on the efficiency, especially at high switching frequencies. Refer to Table 1
and the typical applications and inductors selection.
Table 1. Inductor Selection
INDUCTOR VALUE
10 µH
DIMENSIONS
COMPONENT SUPPLIER
Coilcraft DO1608C-103
Sumida CDRH4D28-100
Sumida CDRH4D22 3R3
Sumida CMD5D13 6R8
6,6 mm × 4,75 mm × 2,92 mm
5,0 mm × 5,0 mm × 3,0 mm
5,0 mm × 5,0 mm × 2,4 mm
5,8 mm × 7,4 mm × 1,5 mm
10 µH
3.3 µH
6.8 µH
Output Capacitor Selection
The advanced fast response voltage mode control scheme of the TPS62020 allows the use of small ceramic
capacitors with a typical value of 10 µF and 22 µF without having large output voltage under and overshoots
during heavy load transients. Ceramic capacitors having low ESR values have the lowest output voltage ripple
and are recommended. If required, tantalum capacitors may be used as well. Refer to Table 2 for component
selection. If ceramic output capacitors are used, the capacitor RMS ripple current rating always meets the
application requirements. Just for completeness the RMS ripple current is calculated as:
V
O
1–
V
I
1
I
+ V
RMSCout
O
Ǹ
L ƒ
2 3
(8)
At nominal load current the device operates in PWM mode and the overall output voltage ripple is the sum of the
voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and discharging the
output capacitor:
13
TPS62020, TPS62021
www.ti.com
SLVS076B–JUNE 2003–REVISED APRIL 2004
V
O
1–
V
I
1
DV + V
) ESR
ǒ
Ǔ
O
O
L ƒ
8 C ƒ
O
(9)
Where the highest output voltage ripple occurs at the highest input voltage, VI.
At light load currents, the device operates in power save mode and the output voltage ripple is independent of
the output capacitor value. The output voltage ripple is set by the internal comparator thresholds. The typical
output voltage ripple is 1% of the nominal output voltage.
Input Capacitor Selection
Because of the nature of the buck converter having a pulsating input current, a low ESR input capacitor is
required for best input voltage filtering and minimizing the interference with other circuits caused by high input
voltage spikes. The input capacitor should have a minimum value of 10 µF for the TPS62020. The input
capacitor can be increased without any limit for better input voltage filtering.
Table 2. Input and Output Capacitor Selection
CAPACITOR
CASE SIZE
0805
COMPONENT SUPPLIER
COMMENTS
VALUE
Taiyo Yuden JMK212BJ106MG
TDK C12012X5ROJ106K
Ceramic
Ceramic
10 µF
Taiyo Yuden JMK316BJ106KL
TDK C3216X5ROJ106M
10 µF
1206
Ceramic
22 µF
22 µF
1206
1210
Taiyo Yuden JMK316BJ226ML
Taiyo Yuden JMK325BJ226MM
Ceramic
Ceramic
Layout Considerations
For all switching power supplies, the layout is an important step in the design especially at high peak currents
and switching frequencies. If the layout is not carefully done, the regulator might show stability problems as well
as EMI problems. Therefore, use wide and short traces for the main current paths as indicated in bold in
Figure 16. These traces should be routed first. The input capacitor should be placed as close as possible to the
IC pins as well as the inductor and output capacitor. The feedback resistor network should be routed away from
the inductor and switch node to minimize noise and magnetic interference. To further minimize noise from
coupling into the feedback network and feedback pin, the ground plane or ground traces should be used for
shielding. A common ground plane or a star ground as shown below should be used. This becomes very
important especially at high switching frequencies of 1.25 MHz.
The Switch Node Must Be
Kept as Small as Possible
L1
6.2 µH
TPS62020
V
V
O
I
8
7
2
3
1
6
4
SW
VIN
SW
FB
VIN
EN
C3
22 µF
C2
22 µF
5
10
PGND
MODE
GND
9
PGND
Figure 16. Layout Diagram
14
TPS62020, TPS62021
www.ti.com
SLVS076B–JUNE 2003–REVISED APRIL 2004
THERMAL INFORMATION
One of the most influential components on the thermal performance of a package is board design. In order to
take full advantage of the heat dissipating abilities of the PowerPAD™ packages, a board should be used that
acts similar to a heat sink and allows for the use of the exposed (and solderable), deep downset pad. For further
information please refer to Texas Instruments application note (SLMA002) PowerPAD Thermally Enhanced
Package.
The PowerPAD™ of the 10-pin MSOP package has an area of 1,52 mm × 1,79 mm (±0,05 mm) and must be
soldered to the PCB to lower the thermal resistance. Thermal vias to the next layer further reduce the thermal
resistance.
TYPICAL APPLICATIONS
L1
3.3uH
Vin
3.6V to 6.0V
Vout
3.3V/0.6A
TPS62020
8
2
3
1
6
4
SW
VIN
7
5
SW
FB
C3
10uF
C4
22uF
VIN
C5
22uF
EN
C1
22pF
R1
620k
10
9
PGND
MODE
GND
PGND
R2
110k
C2
150pF
Figure 17. Li-Ion to 3.3 V With Improved Load Transient Response
L1
6.8uH
Vin
2.5V to 6.0V
Vout
1.8V/0.6A
TPS62020
8
7
5
2
3
1
6
4
SW
VIN
VIN
EN
SW
FB
C3
10uF
C4
22uF
C1
22pF
R1
620k
10
9
PGND
MODE
GND
PGND
R2
240k
C2
68pF
Figure 18. 1.8 V Output Using 6.8 µH Inductor
L1
Vin
2.5V to 6.0V
Vout
1.2V/0.6A
TPS62020
10uH
8
7
5
2
3
1
6
4
SW
SW
VIN
VIN
C3
10uF
C4
10uF
FB
EN
C1
33pF
R1
470k
10
9
PGND
MODE
GND
PGND
R2
330k
C2
68pF
Figure 19. 1.2 V Output Using 10 µH Inductor
15
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相关型号：
TPS62021DGQRG4
Adjustable, 600-mA, 95% Efficient Step-Down Converter, 18uA, Active-Low Mode in QFN-10 10-MSOP-PowerPAD -40 to 85
TI
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