TPS6208812YFPT [TI]
采用 1.2mm x 0.8mm WCSP 封装的 2.4V 至 5.5V 输入、6 引脚 3A 微型降压转换器 | YFP | 6 | -40 to 125;
| 型号： | TPS6208812YFPT |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 采用 1.2mm x 0.8mm WCSP 封装的 2.4V 至 5.5V 输入、6 引脚 3A 微型降压转换器 | YFP | 6 | -40 to 125 开关 转换器 |
| 文件： | 总33页 (文件大小：2865K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS62088, TPS62088A, TPS62089A
SLVSD94E – NOVEMBER 2017 – REVISED NOVEMBER 2021
TPS62088 and TPS6208xA, 2.4-V to 5.5-V Input, Tiny 6-Pin 2-A/3-A Step-Down
Converter in 1.2-mm × 0.8-mm Wafer Chip Scale Package and Suitable for Embedding
1 Features
3 Description
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
DCS-Control topology
Up to 95% efficiency
26-mΩ and 26-mΩ internal power MOSFETs
2.4-V to 5.5-V input voltage range
4-μA operating quiescent current
1% output voltage accuracy
The TPS6208xx device family is a high-frequency
synchronous step-down converters optimized for
small solution size and high efficiency. With an
input voltage range of 2.4 V to 5.5 V, common
battery technologies are supported. At medium
to heavy loads, the converter operates in PWM
mode and automatically enters power save mode
operation at light load to maintain high efficiency
over the entire load current range. The forced PWM
version of the device maintains a CCM operation
across any load. The 4-MHz switching frequency
allows the device to use small external components.
Together with its DCS-control architecture, excellent
load transient performance, and output voltage
regulation accuracy are achieved. Other features like
overcurrent protection, thermal shutdown protection,
active output discharge, and power good are built in.
The device is available in a 6-pin WCSP package.
4-MHz switching frequency
Power save mode for light-load efficiency
A forced-PWM version for CCM operation
100% duty cycle for lowest dropout
Active output discharge
Power good output
Thermal shutdown protection
Hiccup short-circuit protection
Available in 6-pin WCSP and PowerWCSP with
0.4-mm pitch
0.3-mm tall YWC package supports embedded
systems
•
•
•
•
Supports 12 mm2 solution size
Supports < 0.6 mm height solution
Create a custom design using the TPS62088 with
the WEBENCH® Power Designer
Device Information
PART NUMBER
TPS62088
PACKAGE(1)
BODY SIZE (NOM)
YFP (6)
YWC (6)
0.8 mm × 1.2 mm × 0.5 mm
0.8 mm × 1.2 mm × 0.3 mm
TPS62089A
TPS62088A
2 Applications
•
•
•
•
•
Solid-state drives
Wearable products
Smartphones
Camera modules
Optical modules
VIN
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
VOUT
1.8 V
TPS6208818
100
95
90
85
80
75
70
65
L1
0.24 µH
2.4 V to 5.5 V
VIN
SW
FB
C1
4.7 µF
C2
10 µF
C3
10 µF
R3
100 kꢀ
EN
VPG
PG GND
60
VOUT = 0.6V
VOUT = 0.9V
Copyright Ú 2017, Texas Instruments Incorporated
55
VOUT = 1.2V
VOUT = 1.8V
VOUT = 2.5V
50
45
40
Typical Application Schematic
100m
1m
10m
Load (A)
100m
1
3
D007
3.3-V Input Voltage Efficiency
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS62088, TPS62088A, TPS62089A
SLVSD94E – NOVEMBER 2017 – REVISED NOVEMBER 2021
www.ti.com
Table of Contents
1 Features............................................................................1
2 Applications.....................................................................1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Device Options................................................................ 3
6 Pin Configuration and Functions...................................3
7 Specifications.................................................................. 4
7.1 Absolute Maximum Ratings ...................................... 4
7.2 ESD Ratings .............................................................. 4
7.3 Recommended Operating Conditions ........................4
7.4 Thermal Information ..................................................4
7.5 Electrical Characteristics ............................................5
7.6 Typical Characteristics................................................6
8 Detailed Description........................................................7
8.1 Overview.....................................................................7
8.2 Functional Block Diagram...........................................7
8.3 Feature Description.....................................................7
8.4 Device Functional Modes............................................9
9 Application and Implementation..................................10
9.1 Application Information............................................. 10
9.2 Typical Application.................................................... 10
10 Power Supply Recommendations..............................19
11 Layout...........................................................................20
11.1 Layout Guidelines................................................... 20
11.2 Layout Example...................................................... 20
12 Device and Documentation Support..........................21
12.1 Device Support....................................................... 21
12.2 Documentation Support.......................................... 21
12.3 Receiving Notification of Documentation Updates..21
12.4 Support Resources................................................. 21
12.5 Trademarks.............................................................21
12.6 Electrostatic Discharge Caution..............................22
12.7 Glossary..................................................................22
13 Mechanical, Packaging, and Orderable
Information.................................................................... 22
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (September 2019) to Revision E (November 2021)
Page
•
•
•
Updated the numbering format for tables, figures, and cross-references throughout the document. ................1
Added information for the FPWM devices.......................................................................................................... 3
Added new curves for FPWM devices..............................................................................................................14
Changes from Revision C (May 2019) to Revision D (September 2019)
Page
Changed TPS62088YWC status to production.................................................................................................. 1
Added TPS62088YWCEVM-084 to the Thermal information table.................................................................... 4
•
•
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5 Device Options
Device Options
OPERATION MODE
PART NUMBER(1)
OUTPUT VOLTAGE
3-A adjustable
3-A adjustable
3 A with 1.2 V
3 A with 1.8 V
3 A with 3.3 V
3-A adjustable
2-A adjustable
TPS62088YFP
TPS62088YWC
TPS6208812YFP
TPS6208818YFP
TPS6208833YFP
TPS62088AYFP
TPS62089AYFP
PFM/PWM
PFM/PWM
PFM/PWM
PFM/PWM
PFM/PWM
Forced-PWM
Forced-PWM
(1) For detailed ordering information, please check the package option addendum section at the end of this data sheet.
6 Pin Configuration and Functions
1
2
1
2
A
B
C
EN
VIN
A
B
C
EN
VIN
PG
SW
PG
SW
FB
GND
FB
GND
Figure 6-1. YFP Package Top View
Figure 6-2. YWC Package Top View
Table 6-1. Pin Functions
PIN
I/O
DESCRIPTION
NAME
NO.
Device enable pin. To enable the device, this pin needs to be pulled high. Pulling this pin low
disables the device. Do not leave floating.
EN
A1
I
O
I
Power-good open-drain output pin. The pullup resistor can be connected to voltages up to
5.5 V. If unused, leave it floating.
PG
FB
B1
C1
Feedback pin. For the fixed output voltage versions, this pin must be connected to the
output.
GND
SW
C2
B2
A2
—
O
I
Ground pin
Switch pin of the power stage
Input voltage pin
VIN
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7 Specifications
7.1 Absolute Maximum Ratings
MIN
–0.3
–0.3
–1.0
–2.5
–40
MAX
6
UNIT
VIN, FB, EN, PG
SW (DC)
Voltage at pins (2)
VIN + 0.3
VIN + 0.3
10
V
SW (DC, in current limit)
SW (AC, less than 10 ns) (3)
Operating junction temperature, TJ
Temperature
150
°C
Storage temperature, Tstg
–65
150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(3) While switching.
7.2 ESD Ratings
VALUE
±2000
±500
UNIT
V
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
V(ESD)
Electrostatic discharge
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
Over operating junction temperature range (unless otherwise noted)
MIN
2.4
0.6
0
NOM
MAX
5.5
4.0
2
UNIT
VIN
Input voltage range
V
V
VOUT
IOUT
IOUT
ISINK_PG
VPG
Output voltage range
Output current range, TPS62089A
Output current range, TPS62088, TPS62088A (1)
Sink current at the PG pin
A
0
3
A
1
mA
V
Pullup resistor voltage
5.5
125
TJ
Operating junction temperature
-40
°C
(1) For YFP package versions, lifetime is reduced when operating continuously at 3-A output current with the junction temperature higher
than 85°C.
7.4 Thermal Information
TPS62088/TPS6208xA
THERMAL METRIC(1)
6 PINS
UNIT
YFP (6 PINS)
YWC (6 PINS)
YFP EVM-814
85.7
YWC EVM-084
70.6
RθJA
Junction-to-ambient thermal resistance
141.3
1.7
130.9
1.1
°C/W
°C/W
°C/W
°C/W
RθJC(top) Junction-to-case (top) thermal resistance
n/a (2)
n/a (2)
RθJB
ψJT
Junction-to-board thermal resistance
47.3
0.5
27.3
0.7
n/a (2)
n/a (2)
Junction-to-top characterization parameter
1.9
0.5
Junction-to-board characterization
parameter
ψJB
47.5
27.2
55.9
38.7
°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
(2) Not applicable to an EVM.
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7.5 Electrical Characteristics
TJ = –40°C to 125°C, and VIN = 2.4 V to 5.5 V. Typical values are at TJ = 25°C and VIN = 5 V , unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
IQ
Quiescent current
EN = HIGH, no load, device not switching
4
8
10
µA
mA
µA
V
IQ
Quiescent current
EN = HIGH, no load, TPS62088A and TPS62089A
ISD
Shutdown current
EN = LOW, TJ = –40℃ to 85℃
0.05
2.2
160
150
20
0.5
2.3
Undervoltage lockout threshold
Undervoltage lockout hysteresis
Thermal shutdown threshold
Thermal shutdown hysteresis
VIN falling
VIN rising
TJ rising
TJ falling
2.1
VUVLO
mV
°C
°C
TJSD
LOGIC INTERFACE EN
VIH
High-level input threshold voltage
1.0
V
V
VIL
Low-level input threshold voltage
Input leakage current into EN pin
0.4
0.1
IEN,LKG
0.01
µA
SOFT START, POWER GOOD
tSS
Soft-start time
Time from EN high to 95% of VOUT nominal
VPG rising, VFB referenced to VFB nominal
VPG falling, VFB referenced to VFB nominal
VPG rising, VFB referenced to VFB nominal
VPG falling, VFB referenced to VFB nominal
Isink = 1 mA
1.25
96%
ms
94%
90%
98%
94%
107%
112%
0.4
Power-good lower threshold
92%
VPG
103%
108%
105%
110%
Power-good upper threshold
VPG,OL
Low-level output voltage
V
IPG,LKG
Input leakage current into PG pin
VPG = 5.0 V
0.01
0.1
µA
OUTPUT
TPS6208812, PWM mode
TPS6208818, PWM mode
TPS6208833, PWM mode
PWM mode
1.188
1.782
3.267
594
1.2
1.8
1.212
1.818
3.333
606
VOUT
Output voltage accuracy
V
3.3
VFB
Feedback regulation voltage
600
0.01
mV
µA
IFB,LKG
Feedback input leakage current
TPS62088, VFB = 0.6 V
0.05
Internal resistor divider connected to FB
pin
RFB
IDIS
TPS6208812, TPS6208818, TPS6208833
VSW = 0.4V; EN = LOW
7.5
MΩ
mA
Output discharge current
75
400
POWER SWITCH
High-side FET on-resistance
26
26
mΩ
mΩ
A
RDS(on)
Low-side FET on-resistance
ILIM
ILIM
ILIM
fSW
High-side FET switch current limit
High-side FET switch current limit
Low-side FET switch negative current limit
PWM switching frequency
TPS62089A
2.7
3.6
3.3
4.3
-1.6
4
3.9
5.0
TPS62088 and TPS62088A
TPS62088A and TPS62089A
IOUT = 1 A, VOUT = 1.8 V
A
A
MHz
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7.6 Typical Characteristics
70.0
60.0
50.0
40.0
30.0
70.0
60.0
50.0
40.0
30.0
20.0
10.0
0.0
20.0
TJ = 0 °C
TJ = 25 °C
TJ = 0 °C
TJ = 25 °C
TJ = 85 °C
TJ = 125 °C
10.0
TJ = 85 °C
TJ = 125 °C
0.0
2.5
3.0
3.5
4.0
Input Voltage (V)
4.5
5.0
5.5
2.5
3.0
3.5
4.0
Input Voltage (V)
4.5
5.0
5.5
D010
D011
Figure 7-1. High-Side FET On-Resistance
Figure 7-2. Low-Side FET On-Resistance
8.0
0.5
TJ = -40 °C
TJ = 25 °C
TJ = 85 °C
TJ = 125 °C
0.4
0.3
0.2
0.1
0.0
6.0
4.0
2.0
0.0
TJ = -40 °C
TJ = 25 °C
TJ = 85 °C
TJ = 125 °C
2.5
3.0
3.5
4.0
Input Voltage (V)
4.5
5.0
5.5
2.5
3.0
3.5
4.0
Input Voltage (V)
4.5
5.0
5.5
D000
D001
Figure 7-4. Shutdown Current
Figure 7-3. Quiescent Current
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8 Detailed Description
8.1 Overview
The TPS62088xx family is synchronous step-down converter that adopts a new generation DCS-Control (Direct
Control with Seamless transition into power save mode) topology without the output voltage sense (VOS) pin.
This is an advanced regulation topology that combines the advantages of hysteretic, voltage, and current mode
control schemes.
The DCS-Control topology operates in PWM (pulse width modulation) mode for medium to heavy load conditions
and in power save mode at light load currents. In PWM mode, the converter operates with its nominal switching
frequency of 4 MHz, having a controlled frequency variation over the input voltage range. As the load current
decreases, the converter enters Power Save Mode, reducing the switching frequency and minimizing the IC
current consumption to achieve high efficiency over the entire load current range. In forced PWM devices,
the converter maintains a continuous conduction mode operation and keeps the output voltage ripple very low
across the whole load range and at a nominal switching frequency of 4 MHz. Because DCS-Control supports
both operation modes (PWM and PFM) within a single building block, the transition from PWM mode to power
save mode is seamless and without effects on the output voltage. The devices offer both excellent DC voltage
and superior load transient regulation, combined with very low output voltage ripple, minimizing interference with
RF circuits.
8.2 Functional Block Diagram
PG
VIN
VPG_H
+
œ
VFB
Control Logic
VREF
UVLO
+
VPG_L
GND
EN
œ
Thermal Shutdown
Startup
Peak Current Detect
HICCUP
VSW
VIN
TON
Direct Control
&
Compensation
VSW
SW
Gate
Drive
Modulator
VREF
+
EA
_
Comparator
FB
Zero Current Detect
GND
Fixed VOUT
GND
8.3 Feature Description
8.3.1 Power Save Mode
As the load current decreases, the device enters power save mode operation. The power save mode occurs
when the inductor current becomes discontinuous. Power save mode is based on a fixed on-time architecture,
as related in Equation 1.
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VOUT
tON = 250ns ì
V
IN
(1)
In power save mode, the output voltage rises slightly above the nominal output voltage. This effect is minimized
by increasing the output capacitor or inductor value.
When the device operates close to 100% duty cycle mode, the device cannot enter power save mode regardless
of the load current if the input voltage decreases to typically 10% above the output voltage. The device maintains
output regulation in PWM mode.
8.3.2 Pulse Width Modulation (PWM) Operation
At load currents larger than half the inductor ripple current, the device operates in pulse width modulation in
continuous conduction mode (CCM). The PWM operation is based on an adaptive constant on-time control with
stabilized switching frequency.
In forced-PWM devices, the device always operates in pulse width modulation in continuous conduction mode
(CCM).
8.3.3 100% Duty Cycle Low Dropout Operation
The devices offer low input-to-output voltage difference by entering 100% duty cycle mode. In this mode, the
high-side MOSFET switch is constantly turned on and the low-side MOSFET is switched off. This is particularly
useful in battery powered applications to achieve the longest operation time by taking full advantage of the whole
battery voltage range. The minimum input voltage to maintain output regulation, depending on the load current
and output voltage can be calculated as:
V
= VOUT + IOUT,MAX ´(RDS(on) + RL )
IN,MIN
(2)
where
•
•
•
•
VIN,MIN = Minimum input voltage to maintain an output voltage
IOUT,MAX = Maximum output current
RDS(on) = High-side FET ON-resistance
RL = Inductor ohmic resistance (DCR)
8.3.4 Soft Start
After enabling the device, there is a 250-µs delay before switching starts. Then, an internal soft start-up circuitry
ramps up the output voltage which reaches nominal output voltage during the start-up time of 1 ms. This avoids
excessive inrush current and creates a smooth output voltage rise slope. It also prevents excessive voltage
drops of primary cells and rechargeable batteries with high internal impedance.
The device is able to start into a pre-biased output capacitor. It starts with the applied bias voltage and ramps the
output voltage to its nominal value.
8.3.5 Switch Current Limit and HICCUP Short-Circuit Protection
The switch current limit prevents the device from high inductor current and from drawing excessive current from
the battery or input voltage rail. Excessive current might occur with a shorted or saturated inductor or a heavy
load or shorted output circuit condition. If the inductor current reaches the threshold ILIM, the high-side MOSFET
is turned off and the low-side MOSFET remains off, while the inductor current flows through its body diode and
quickly ramps down.
When this switch current limits is triggered 32 times, the device stops switching. The device then automatically
starts a new start-up after a typical delay time of 128 µs has passed. This is named HICCUP short-circuit
protection. The device repeats this mode until the high load condition disappears.
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In forced PWM devices, a negative current limit (ILIMN) is enabled to prevent excessive current flowing
backwards to the input. When the inductor current reaches ILIMN, the low-side MOSFET turns off and the
highside MOSFET turns on and kept on until TON time expires.
8.3.6 Undervoltage Lockout
To avoid mis-operation of the device at low input voltages, undervoltage lockout is implemented that shuts down
the device at voltages lower than VUVLO
.
8.3.7 Thermal Shutdown
The device goes into thermal shutdown and stops the power stage switching when the junction temperature
exceeds TJSD. When the device temperature falls below the threshold by 20°C, the device returns to normal
operation automatically by switching the power stage again.
8.4 Device Functional Modes
8.4.1 Enable and Disable
The device is enabled by setting the EN pin to a logic HIGH. Accordingly, shutdown mode is forced if the EN pin
is pulled LOW with a shutdown current of typically 50 nA. In shutdown mode, the internal power switches as well
as the entire control circuitry are turned off. An internal switch smoothly discharges the output through the SW
pin in shutdown mode. Do not leave the EN pin floating.
The typical threshold value of the EN pin is 0.89 V for rising input signal, and 0.62 V for falling input signal.
8.4.2 Power Good
The device has a power-good output. The PG pin goes high impedance once the FB pin voltage is above 96%
and less than 105% of the nominal voltage, and is driven low once the voltage falls below typically 92% or higher
than 110% of the nominal voltage. The PG pin is an open-drain output and is specified to sink up to 1 mA. The
power-good output requires a pullup resistor connecting to any voltage rail less than 5.5 V.
The PG signal can be used for sequencing of multiple rails by connecting it to the EN pin of other converters.
Leave the PG pin unconnected when not used. The PG rising edge has a 100-µs blanking time and the PG
falling edge has a deglitch delay of 20 µs.
Table 8-1. PG Pin Logic
LOGIC STATUS
DEVICE CONDITIONS
HIGH IMPEDANCE
LOW
EN = HIGH, VFB ≥ 0.576 V
EN = HIGH, VFB ≤ 0.552 V
EN = HIGH, VFB ≤ 0.63 V
EN = HIGH, VFB ≥ 0.66 V
EN = LOW
√
√
Enable
√
√
√
√
√
Shutdown
Thermal shutdown
UVLO
TJ > TJSD
0.7 V < VIN < VUVLO
VIN < 0.7 V
Power supply removal
undefined
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9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
9.1 Application Information
The following section discusses the design of the external components to complete the power supply design for
several input and output voltage options by using typical applications as a reference.
9.2 Typical Application
VIN
2.4 V to 5.5 V
TPS62088
VIN SW
L1
0.24 µH
VOUT
1.8 V
C1
4.7 µF
C2
10 µF
C3
10 µF
C4
120 pF
R3
100 kꢀ
R1
200 kꢀ
EN
VPG
PG GND FB
R2
100 kꢀ
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Figure 9-1. Typical Application of Adjustable Output
VIN
2.4 V to 5.5 V
VOUT
1.8 V
TPS6208818
L1
0.24 µH
VIN
SW
FB
C1
4.7 µF
C2
10 µF
C3
10 µF
R3
100 kꢀ
EN
VPG
PG GND
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Figure 9-2. Typical Application of Fixed Output
9.2.1 Design Requirements
For this design example, use the parameters listed in Table 9-1 as the input parameters.
Table 9-1. Design Parameters
DESIGN PARAMETER
Input voltage
EXAMPLE VALUE
2.4 V to 5.5 V
1.8 V
Output voltage
Maximum peak output current
3 A
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Table 9-2 lists the components used for the example.
Table 9-2. List of Components of Figure 9-1
REFERENCE
DESCRIPTION
MANUFACTURER(1)
C1
C2, C3
C4
4.7 µF, Ceramic capacitor, 6.3 V, X7R, size 0603, JMK107BB7475MA
10 µF, Ceramic capacitor, 10 V, X7R, size 0603, GRM188Z71A106MA73D
120 pF, Ceramic capacitor, 50 V, size 0603, GRM1885C1H121JA01D
0.24 µH, Power Inductor, size 0603, DFE160810S-R24M (DFE18SANR24MG0)
Depending on the output voltage, 1%, size 0603
Taiyo Yuden
Murata
Murata
Murata
Std
L1
R1
R2
100 kΩ, Chip resistor, 1/16 W, 1%, size 0603
Std
R3
100 kΩ, Chip resistor, 1/16 W, 1%, size 0603
Std
(1) See Third-party Products disclaimer.
Table 9-3. List of Components of Figure 9-2, Smallest Solution
REFERENCE
DESCRIPTION
MANUFACTURER(1)
C1, C2, C3
10 µF, Ceramic capacitor, 6.3 V, X5R, size 0402, GRM155R60J106ME47
0.24 µH, Power Inductor, size 0603, DFE160810S-R24M (DFE18SANR24MG0)
100 kΩ, Chip resistor, 1/16 W, size 0402
Murata
Murata
Std
L1
R3
(1) See Third-party Products disclaimer.
9.2.2 Detailed Design Procedure
9.2.2.1 Custom Design With WEBENCH® Tools
Click here to create a custom design using the TPS62088 device with the WEBENCH® Power Designer.
1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
3. Compare the generated design with other possible solutions from Texas Instruments.
The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time
pricing and component availability.
In most cases, these actions are available:
•
•
•
•
Run electrical simulations to see important waveforms and circuit performance
Run thermal simulations to understand board thermal performance
Export customized schematic and layout into popular CAD formats
Print PDF reports for the design, and share the design with colleagues
Get more information about WEBENCH tools at www.ti.com/WEBENCH.
9.2.2.2 Setting The Output Voltage
Choose resistors R1 and R2 to set the output voltage within a range of 0.6V to 4V, according to Equation 3. To
keep the feedback (FB) net robust from noise, set R2 equal to or lower than 100 kΩ to have at least 0.6 µA of
current in the voltage divider. Lower values of FB resistors achieve better noise immunity, and lower light load
efficiency, as explained in the Design Considerations For A Resistive Feedback Divider In A DC/DC Converter
Analog Design Journal.
≈
∆
«
’
VOUT
VFB
V
OUT
≈
’
R1= R2ì
-1 = R2ì
-1
÷
÷
∆
«
0.6V
◊
◊
(3)
For devices with a fixed output voltage, the FB pin must be connected to VOUT. R1, R2, and C4 are not needed.
The fixed output voltage devices have an internal feedforward capacitor.
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9.2.2.3 Feedforward Capacitor
A feedforward capacitor (C4) is required in parallel with R1. Equation 4 calculates the capacitor value. For
the recommended 100 k value for R2, a 120 pF feedforward capacitor is used. For forced PWM devices, a
feedforward capacitor is not needed.
12 ms
C4 =
R2
(4)
9.2.2.4 Output Filter Design
The inductor and the output capacitor together provide a low-pass filter. To simplify this process, Table 9-4
outlines possible inductor and capacitor value combinations for most applications. Checked cells represent
combinations that are proven for stability by simulation and lab test. Further combinations should be checked for
each individual application.
Table 9-4. Matrix of Output Capacitor and Inductor Combinations
NOMINAL COUT [µF](3)
NOMINAL L [µH](2)
10
+
2 x 10 or 1 x 22
47
+
100
(1)
0.24
0.33
0.47
+
+
+
+
(1) This LC combination is the standard value and recommended for most applications. Other '+' marks indicate recommended filter
combinations. Other values may be acceptable in some applications but should be fully tested by the user.
(2) Inductor tolerance and current derating is anticipated. The effective inductance can vary by 20% and –30%.
(3) Capacitance tolerance and bias voltage derating is anticipated. The effective capacitance can vary by 20% and –50%.
9.2.2.5 Inductor Selection
The main parameter for the inductor selection is the inductor value and then the saturation current of the
inductor. To calculate the maximum inductor current under static load conditions, Equation 5 is given.
DIL
IL,MAX = IOUT,MAX
+
2
VOUT
1-
V
IN
DIL = VOUT
´
L ´ fSW
(5)
where
•
•
•
•
IOUT,MAX = Maximum output current
ΔIL = Inductor current ripple
fSW = Switching frequency
L = Inductor value
It is recommended to choose a saturation current for the inductor that is approximately 20% to 30% higher than
IL,MAX. In addition, DC resistance and size should also be taken into account when selecting an appropriate
inductor. Table 9-5 lists recommended inductors.
Table 9-5. List of Recommended Inductors(1)
INDUCTANCE CURRENT RATING
DIMENSIONS
[L × W × H mm]
DC RESISTANCE
[mΩ]
PART NUMBER
[µH]
0.24
0.24
[A]
4.9
6.5
Murata, DFE160810S-R24M
(DFE18SANR24MG0)
1.6 × 0.8 × 1.0
2.0 × 1.2 × 1.0
30
25
Murata, DFE201210U-R24M
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Table 9-5. List of Recommended Inductors(1) (continued)
INDUCTANCE CURRENT RATING
DIMENSIONS
[L × W × H mm]
DC RESISTANCE
PART NUMBER
[µH]
0.24
0.25
0.24
0.24
[A]
4.9
9.7
3.5
3.5
[mΩ]
1.6 × 0.8 × 0.8
4.0 × 4.0 × 1.2
2.0 × 1.6 × 0.6
2.0 × 1.6 × 0.6
22
Cyntec, HTEH16080H-R24MSR
Coilcraft, XFL4012-251ME
7.64
35
Wurth Electronics, 74479977124
Sunlord, MPM201606SR24M
35
(1) See Third-party Products disclaimer.
9.2.2.6 Capacitor Selection
The input capacitor is the low-impedance energy source for the converters which helps to provide stable
operation. A low-ESR multilayer ceramic capacitor is recommended for best filtering and must be placed
between VIN and GND as close as possible to those pins. For most applications, 4.7 μF is sufficient, though a
larger value reduces input current ripple.
The architecture of the device allows the use of tiny ceramic output capacitors with low equivalent series
resistance (ESR). These capacitors provide low output voltage ripple and are recommended. To keep its low
resistance up to high frequencies and to get narrow capacitance variation with temperature, TI recommends
using X7R or X5R dielectrics. The recommended typical output capacitor value is 2 × 10 μF or 1 × 22 µF; this
capacitance can vary over a wide range as outline in the output filter selection table.
A feedforward capacitor is required for the adjustable version, as described in Section 9.2.2.2. This capacitor is
not required for the fixed output voltage versions.
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9.2.3 Application Curves
VIN = 5.0 V, VOUT = 1.8 V, TA = 25°C, BOM = Table 9-2, unless otherwise noted.
0.612
0.609
0.606
0.603
0.6
90
85
80
75
70
65
60
55
50
45
40
0.597
0.594
0.591
0.588
VIN = 2.5 V
VIN = 3.3 V
VIN = 4.2 V
VIN = 5.0 V
VIN = 2.5V
VIN = 3.3V
VIN = 4.2V
VIN = 5.0V
100m
1m
10m
Load (A)
100m
1
3
100m
1m
10m
Load (A)
100m
1
3
D021
D002
VOUT = 0.6 V
VOUT = 0.6 V
Figure 9-4. Load Regulation
Figure 9-3. Efficiency
100%
95%
90%
85%
80%
75%
70%
65%
60%
55%
50%
45%
40%
0.606
0.604
0.602
0.6
0.598
0.596
0.594
VIN=2.5V
VIN=3.3V
VIN=4.2V
VIN=5.0V
VIN=2.5V
VIN=3.3V
VIN=4.2V
VIN=5.0V
0
0.5
1
1.5
Load (A)
2
2.5
3
0
0.5
1
1.5
Load (A)
2
2.5
3
VOUT = 0.6 V
FPWM devices
VOUT = 0.6 V
FPWM devices
Figure 9-5. Efficiency
Figure 9-6. Load Regulation
0.909
90
85
80
75
70
65
60
55
50
45
40
0.906
0.903
0.9
0.897
0.894
0.891
VIN = 2.5 V
VIN = 3.3 V
VIN = 4.2 V
VIN = 5.0 V
VIN = 2.5V
VIN = 3.3V
VIN = 4.2V
VIN = 5.0V
100m
1m
10m
Load (A)
100m
1
3
100m
1m
10m
Load (A)
100m
1
3
D031
D003
VOUT = 0.9 V
VOUT = 0.9 V
Figure 9-8. Load Regulation
Figure 9-7. Efficiency
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100%
0.909
0.906
0.903
0.9
95%
90%
85%
80%
75%
70%
65%
60%
55%
50%
45%
40%
0.897
0.894
0.891
VIN=2.5V
VIN=3.3V
VIN=4.2V
VIN=5.0V
VIN=2.5V
VIN=3.3V
VIN=4.2V
VIN=5.0V
0
0.5
1
1.5
Load (A)
2
2.5
3
0
0.5
1
1.5
Load (A)
2
2.5
3
VOUT = 0.9 V
FPWM devices
VOUT = 0.9 V
Figure 9-9. Efficiency
Figure 9-10. Load Regulation
100
1.212
95
90
85
80
75
70
65
60
55
50
1.209
1.206
1.203
1.2
1.197
1.194
1.191
1.188
VIN = 2.5 V
VIN = 3.3 V
VIN = 4.2 V
VIN = 5.0 V
VIN = 2.5V
VIN = 3.3V
VIN = 4.2V
VIN = 5.0V
100m
1m
10m
Load (A)
100m
1
3
100m
1m
10m
Load (A)
100m
1
3
D041
D004
VOUT = 1.2 V
VOUT = 1.2 V
Figure 9-12. Load Regulation
Figure 9-11. Efficiency
100%
95%
90%
85%
80%
75%
70%
65%
60%
55%
50%
45%
40%
1.212
1.209
1.206
1.203
1.2
1.197
1.194
1.191
1.188
VIN=2.5V
VIN=3.3V
VIN=4.2V
VIN=5.0V
VIN=2.5V
VIN=3.3V
VIN=4.2V
VIN=5.0V
0
0.5
1
1.5
Load (A)
2
2.5
3
0
0.5
1
1.5
Load (A)
2
2.5
3
VOUT = 1.2 V
FPWM devices
VOUT = 1.2 V
FPWM devices
Figure 9-13. Efficiency
Figure 9-14. Load Regulation
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100
95
90
85
80
75
1.818
1.812
1.806
1.8
1.794
1.788
1.782
VIN = 2.5 V
VIN = 3.3 V
VIN = 4.2 V
VIN = 5.0 V
70
VIN = 2.5V
VIN = 3.3V
VIN = 4.2V
VIN = 5.0V
65
60
100m
1m
10m
Load (A)
100m
1
3
100m
1m
10m
Load (A)
100m
1
3
D051
D005
VOUT = 1.8 V
VOUT = 1.8 V
Figure 9-16. Load Regulation
Figure 9-15. Efficiency
100%
95%
90%
85%
80%
75%
70%
65%
60%
55%
50%
45%
40%
1.818
1.815
1.812
1.809
1.806
1.803
1.8
1.797
1.794
1.791
1.788
1.785
1.782
VIN=2.5V
VIN=3.3V
VIN=4.2V
VIN=5.0V
VIN=2.5V
VIN=3.3V
VIN=4.2V
VIN=5.0V
0
0.5
1
1.5
Load (A)
2
2.5
3
0
0.5
1
1.5
Load (A)
2
2.5
3
VOUT = 1.8 V
FPWM devices
VOUT = 1.8 V
FPWM devices
Figure 9-17. Efficiency
Figure 9-18. Load Regulation
100
3.333
3.322
3.311
3.3
95
90
85
80
75
70
3.289
3.278
3.267
3.256
3.245
3.234
VIN = 4.2V
VIN = 5.0V
VIN = 4.2V
VIN = 5.0V
100m
1m
10m
Load (A)
100m
1
3
100m
1m
10m
Load (A)
100m
1
3
D061
D006
VOUT = 3.3 V
VOUT = 3.3 V
Figure 9-20. Load Regulation
Figure 9-19. Efficiency
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100%
3.356
3.351
3.346
3.341
3.336
3.331
3.326
3.321
3.316
3.311
3.306
3.301
3.296
3.291
3.286
95%
90%
85%
80%
75%
70%
65%
60%
55%
50%
45%
40%
VIN=4.2V
VIN=5.0V
VIN=4.2V
VIN=5.0V
0
0.5
1
1.5
Load (A)
2
2.5
3
0
0.5
1
1.5
Load (A)
2
2.5
3
VOUT = 3.32 V
FPWM devices
VOUT = 3.32 V
FPWM devices
Figure 9-21. Efficiency
Figure 9-22. Load Regulation
5.0
5.0
4.0
3.0
2.0
1.0
0.0
4.0
3.0
2.0
1.0
VOUT = 0.6V
VOUT = 0.9V
VOUT = 1.2V
VOUT = 1.8V
VOUT = 3.3V
VOUT = 0.6V
VOUT = 0.9V
VOUT = 1.2V
VOUT = 1.8V
0.0
0.5
1.0
1.5
Load (A)
2.0
2.5
3.0
2.5
3.0
3.5
4.0
Input Voltage (V)
4.5
5.0
5.5
D008
D009
VIN = 3.3 V
IOUT = 1.0 A
Figure 9-23. Switching Frequency
Figure 9-24. Switching Frequency
4.50x106
4.00x106
3.50x106
3.00x106
2.50x106
2.00x106
1.50x106
1.00x106
500.00x103
0.00x100
4.50x106
4.00x106
3.50x106
3.00x106
2.50x106
2.00x106
1.50x106
1.00x106
500.00x103
0.00x100
VOUT=0.6V
VOUT=0.9V
VOUT=1.2V
VOUT=1.8V
VOUT=3.3V
VOUT=0.6V
VOUT=0.9V
VOUT=1.2V
VOUT=1.8V
0
0.5
1
1.5
Load (A)
2
2.5
3
2.5
3
3.5
4
Input Voltage (V)
4.5
5
5.5
VIN = 3.3 V
FPWM devices
IOUT = 1.0 A
FPWM devices
Figure 9-25. Switching Frequency
Figure 9-26. Switching Frequency
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ICOIL
ICOIL
1A/DIV
1A/DIV
VOUT
10mV/DIV
AC
VOUT
10mV/DIV
AC
VSW
VSW
5V/DIV
5V/DIV
Time - 200ns/DIV
Time - 1ꢀs/DIV
D014
D013
IOUT = 0.1 A
IOUT = 3.0 A
Figure 9-28. PSM Operation
Figure 9-27. PWM Operation
VEN
5V/DIV
VPG
5V/DIV
VOUT
1V/DIV
ICOIL
0.5A/DIV
IOUT = 0.1 A
FPWM devices
Time - 500ꢀs/DIV
D015
Figure 9-29. FPWM Operation
No load
Figure 9-30. Start-Up with No-Load
VEN
5V/DIV
VPG
5V/DIV
VOUT
1V/DIV
ICOIL
2A/DIV
No load
FPWM devices
Time - 500ꢀs/DIV
Figure 9-31. Start-Up with No-Load
D016
IOUT = 3.0 A
Figure 9-32. Start-Up with Load
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VPG
5V/DIV
VPG
5V/DIV
ILOAD
ICOIL
2A/DIV
2A/DIV
VOUT
50mV/DIV
AC
VOUT
1V/DIV
Time - 10ꢀs/DIV
Time - 200ꢀs/DIV
D017
D018
IOUT = 0.1 A to 3 A
IOUT = 1 A
Figure 9-33. Load Transient
Figure 9-34. HICCUP Short Circuit Protection
VPG
5V/DIV
ICOIL
2A/DIV
VOUT
1V/DIV
Time - 2ꢀs/DIV
D019
IOUT = 1 A
Figure 9-35. HICCUP Short Circuit Protection (Zoom In)
10 Power Supply Recommendations
The device is designed to operate from an input voltage supply range from 2.4 V to 5.5 V. Ensure that the input
power supply has a sufficient current rating for the application.
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11 Layout
11.1 Layout Guidelines
The printed-circuit-board (PCB) layout is an important step to maintain the high performance of the device. See
Figure 11-1 and Figure 11-2 for the recommended PCB layout.
•
The input/output capacitors and the inductor should be placed as close as possible to the IC. This keeps
the power traces short. Routing these power traces direct and wide results in low trace resistance and low
parasitic inductance.
•
•
The low side of the input and output capacitors must be connected properly to the power GND to avoid a
GND potential shift.
The sense traces connected to FB is a signal trace. Special care should be taken to avoid noise being
induced. Keep these traces away from SW nodes. The connection of the output voltage trace for the FB
resistors should be made at the output capacitor.
•
Refer to Figure 11-1 and Figure 11-2 for an example of component placement, routing and thermal design.
11.2 Layout Example
Figure 11-2. PCB Layout of Fixed Output Voltage
Application
Figure 11-1. PCB Layout of Adjustable Output
Voltage Application
11.2.1 Thermal Considerations
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the power
dissipation limits of a given component.
Two basic approaches for enhancing thermal performance are:
•
•
Improving the power dissipation capability of the PCB design
Introducing airflow in the system
For more details on how to use the thermal parameters, see the Thermal Characteristics Application Notes,
Thermal Characteristics of Linear and Logic Packages Using JEDEC PCB Designs Application Report and
Semiconductor and IC Package Thermal Metrics Application Report.
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12 Device and Documentation Support
12.1 Device Support
12.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
12.1.2 Development Support
12.1.2.1 Custom Design With WEBENCH® Tools
Click here to create a custom design using the TPS62088 device with the WEBENCH® Power Designer.
1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.
2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.
3. Compare the generated design with other possible solutions from Texas Instruments.
The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time
pricing and component availability.
In most cases, these actions are available:
•
•
•
•
Run electrical simulations to see important waveforms and circuit performance
Run thermal simulations to understand board thermal performance
Export customized schematic and layout into popular CAD formats
Print PDF reports for the design, and share the design with colleagues
Get more information about WEBENCH tools at www.ti.com/WEBENCH.
12.2 Documentation Support
12.2.1 Related Documentation
For related documentation, see the following:
•
•
Texas Instruments, Thermal Characteristics of Linear and Logic Packages Using JEDEC PCB Designs
Application Report
Texas Instruments, Semiconductor and IC Package Thermal Metrics Application Report
12.3 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
12.4 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.5 Trademarks
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
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SLVSD94E – NOVEMBER 2017 – REVISED NOVEMBER 2021
www.ti.com
12.6 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.7 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2021 Texas Instruments Incorporated
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TPS62088, TPS62088A, TPS62089A
SLVSD94E – NOVEMBER 2017 – REVISED NOVEMBER 2021
www.ti.com
PACKAGE OUTLINE
YWC0006A
PowerWCSP - 0.3 mm max height
S
C
A
L
E
1
5
.
0
0
0
POWER CHIP SCALE PACKAGE
0.82
0.78
A
B
PIN A1 INDEX
AREA
1.22
1.18
0.20
0.16
C
0.3 MAX
SEATING PLANE
0.10
0.07
PKG
0.378
3X
0.16
3X
0.358
0.14
C
B
SYMM
0.86
0.187
2X
0.167
0.43
0.015
C A B
A
0.247
0.227
1
2
4X
0.165
0.015
C A B
0.439
4223997/B 08/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
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Product Folder Links: TPS62088 TPS62088A TPS62089A
TPS62088, TPS62088A, TPS62089A
SLVSD94E – NOVEMBER 2017 – REVISED NOVEMBER 2021
www.ti.com
EXAMPLE BOARD LAYOUT
YWC0006A
PowerWCSP - 0.3 mm max height
POWER CHIP SCALE PACKAGE
PKG
PKG
3X (0.15)
3X (0.368)
4X (0.237)
3X (0.2)
3X (0.368)
4X (0.237)
1
2
1
2
A
A
2X (0.2)
SYMM
(0.43) TYP
B
2X (0.177)
SYMM
(0.43) TYP
B
(R0.05) TYP
SOLDER MASK
OPENING
TYP
(R0.05) TYP
SOLDER MASK
OPENING
TYP
C
C
METAL UNDER
SOLDER MASK
TYP
METAL EDGE
TYP
0.0375 MIN
ALL AROUND
TYP
0.0375 MAX
ALL AROUND
TYP
(0.165)
(0.165)
(0.464)
(0.439)
LAND PATTERN EXAMPLE
NON SOLDER MASK DEFINED
SCALE: 40X
LAND PATTERN EXAMPLE
SOLDER MASK DEFINED
SCALE: 40X
4223997/B 08/2019
NOTES: (continued)
3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).
www.ti.com
Copyright © 2021 Texas Instruments Incorporated
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TPS62088, TPS62088A, TPS62089A
SLVSD94E – NOVEMBER 2017 – REVISED NOVEMBER 2021
www.ti.com
EXAMPLE STENCIL DESIGN
YWC0006A
PowerWCSP - 0.3 mm max height
POWER CHIP SCALE PACKAGE
PKG
3X (0.2)
3X (0.368)
3X (0.2)
3X (0.348)
4X (0.237)
1
2
A
(0.43) TYP
B
4X (0.237)
(0.43) TYP
PKG
SYMM
SYMM
2X (0.2)
2X (0.2)
(R0.05) TYP
(R0.05) TYP
METAL UNDER
SOLDER MASK
TYP
C
SOLDER MASK
OPENING
TYP
(0.165)
EXPOSED
METAL
3X
(0.175)
TO PKG
(0.464)
(0.474)
SOLDER PASTE EXAMPLE
SOLDER MASK DEFINED
BASED ON 0.075 mm THICK STENCIL
SCALE: 40X
SOLDER PASTE EXAMPLE
NON SOLDER MASK DEFINED
BASED ON 0.075 mm THICK STENCIL
SCALE: 40X
4223997/B 08/2019
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
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Product Folder Links: TPS62088 TPS62088A TPS62089A
TPS62088, TPS62088A, TPS62089A
SLVSD94E – NOVEMBER 2017 – REVISED NOVEMBER 2021
www.ti.com
PACKAGE OUTLINE
YFP0006-C01
DSBGA - 0.5 mm max height
S
C
A
L
E
1
0
.
0
0
0
DIE SIZE BALL GRID ARRAY
B
E
A
BALL A1
CORNER
D
0.30
0.25
C
0.5 MAX
SEATING PLANE
0.05 C
0.19
0.13
BALL TYP
0.4
TYP
SYMM
C
D: Max = 1.22 mm, Min = 1.18 mm
E: Max = 0.82 mm, Min = 0.78 mm
0.8
SYMM
B
A
TYP
0.4 TYP
0.25
0.21
6X
0.015
1
2
C A B
4224455/B 02/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
Copyright © 2021 Texas Instruments Incorporated
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Product Folder Links: TPS62088 TPS62088A TPS62089A
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SLVSD94E – NOVEMBER 2017 – REVISED NOVEMBER 2021
www.ti.com
EXAMPLE BOARD LAYOUT
YFP0006-C01
DSBGA - 0.5 mm max height
DIE SIZE BALL GRID ARRAY
(0.4) TYP
6X ( 0.23)
2
1
A
B
(0.4) TYP
SYMM
C
SYMM
LAND PATTERN EXAMPLE
SCALE:50X
0.05 MAX
0.05 MIN
METAL UNDER
SOLDER MASK
( 0.23)
METAL
(
0.23)
SOLDER MASK
OPENING
SOLDER MASK
OPENING
NON-SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
4224455/B 02/2019
NOTES: (continued)
3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009).
www.ti.com
Copyright © 2021 Texas Instruments Incorporated
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Product Folder Links: TPS62088 TPS62088A TPS62089A
TPS62088, TPS62088A, TPS62089A
SLVSD94E – NOVEMBER 2017 – REVISED NOVEMBER 2021
www.ti.com
EXAMPLE STENCIL DESIGN
YFP0006-C01
DSBGA - 0.5 mm max height
DIE SIZE BALL GRID ARRAY
(0.4) TYP
(R0.05) TYP
6X ( 0.25)
1
2
A
B
(0.4) TYP
SYMM
METAL
TYP
C
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE:50X
4224455/B 02/2019
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
www.ti.com
Copyright © 2021 Texas Instruments Incorporated
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Product Folder Links: TPS62088 TPS62088A TPS62089A
PACKAGE OPTION ADDENDUM
www.ti.com
3-Dec-2021
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TPS6208812YFPR
TPS6208812YFPT
TPS6208818YFPR
TPS6208818YFPT
TPS6208833YFPR
TPS6208833YFPT
TPS62088AYFPR
TPS62088YFPR
TPS62088YFPT
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
YFP
YFP
YFP
YFP
YFP
YFP
YFP
YFP
YFP
YWC
YFP
6
6
6
6
6
6
6
6
6
6
6
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
SNAGCU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
1B5
1B5
1B6
1B6
1B7
1B7
W
SNAGCU
SNAGCU
SNAGCU
SNAGCU
SNAGCU
SNAGCU
SNAGCU
SNAGCU
Call TI
3000 RoHS & Green
3000 RoHS & Green
15X
15X
1GB
X
250
RoHS & Green
TPS62088YWCR
TPS62089AYFPR
3000 RoHS & Green
3000 RoHS & Green
SNAGCU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
3-Dec-2021
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Dec-2021
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TPS6208812YFPR
TPS6208812YFPT
TPS6208818YFPR
TPS6208818YFPT
TPS6208833YFPR
TPS6208833YFPT
TPS62088AYFPR
TPS62088YFPR
TPS62088YFPT
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
YFP
YFP
YFP
YFP
YFP
YFP
YFP
YFP
YFP
YWC
YFP
6
6
6
6
6
6
6
6
6
6
6
3000
250
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
0.9
0.9
1.3
1.3
0.62
0.62
0.62
0.62
0.62
0.62
0.57
0.62
0.62
0.38
0.57
4.0
4.0
4.0
4.0
4.0
4.0
2.0
4.0
4.0
4.0
2.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
3000
250
0.9
1.3
0.9
1.3
3000
250
0.9
1.3
0.9
1.3
3000
3000
250
0.89
0.9
1.31
1.3
0.9
1.3
TPS62088YWCR
TPS62089AYFPR
3000
3000
0.95
0.89
1.35
1.31
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Dec-2021
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS6208812YFPR
TPS6208812YFPT
TPS6208818YFPR
TPS6208818YFPT
TPS6208833YFPR
TPS6208833YFPT
TPS62088AYFPR
TPS62088YFPR
TPS62088YFPT
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
YFP
YFP
YFP
YFP
YFP
YFP
YFP
YFP
YFP
YWC
YFP
6
6
6
6
6
6
6
6
6
6
6
3000
250
182.0
210.0
210.0
210.0
182.0
182.0
182.0
182.0
182.0
182.0
182.0
182.0
185.0
185.0
185.0
182.0
182.0
182.0
182.0
182.0
182.0
182.0
20.0
35.0
35.0
35.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
3000
250
3000
250
3000
3000
250
TPS62088YWCR
TPS62089AYFPR
3000
3000
Pack Materials-Page 2
IMPORTANT NOTICE AND DISCLAIMER
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD
PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable
standards, and any other safety, security, regulatory or other requirements.
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these
resources.
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for
TI products.
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2021, Texas Instruments Incorporated
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