TPS62221DDCTG4 [TI]
400-mA, 1.25-MHz, HIGH-EFFICIENCY, STEP-DOWN CONVERTER IN THIN-SOT23; 400毫安， 1.25 MHz的高效率，降压转换器在薄SOT23
| 型号： | TPS62221DDCTG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 400-mA, 1.25-MHz, HIGH-EFFICIENCY, STEP-DOWN CONVERTER IN THIN-SOT23 |
| 文件： | 总24页 (文件大小：746K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS62220, TPS62221, TPS62222
TPS62223, TPS62224, TPS62227
TPS62228, TPS62229
www.ti.com
SLVS491D–SEPTEMBER 2003–REVISED MARCH 2006
400-mA, 1.25-MHz, HIGH-EFFICIENCY, STEP-DOWN CONVERTER IN THIN-SOT23
FEATURES
DESCRIPTION
•
High-Efficiency Synchronous Step-Down
Converter With up to 95% Efficiency
The TPS6222x devices are a family of high-efficiency,
synchronous step-down converters ideally suited for
portable systems powered by 1-cell Li-Ion or 3-cell
NiMH/NiCd batteries. The devices are also suitable to
operate from a standard 3.3-V or 5-V voltage rail.
•
•
2.5-V to 6-V Input Voltage Range
Adjustable Output Voltage Range From 0.7 V
to VI
With an output voltage range of 6 V down to 0.7 V
and up to 400-mA output current, the devices are
ideal for powering the low voltage TMS320™ DSP
family and processors used in PDAs, pocket PCs,
and smart phones. Under nominal load current, the
devices operate with a fixed switching frequency of
typically 1.25 MHz. At light load currents, the part
enters the power-save mode operation; the switching
frequency is reduced and the quiescent current is
typically only 15 µA; therefore, the device achieves
the highest efficiency over the entire load current
range. The TPS6222x needs only three small
external components. Together with the tiny TSOT23
package, a minimum system solution size can be
achieved. An advanced fast response voltage mode
control scheme achieves superior line and load
regulation with small ceramic input and output
capacitors.
•
•
•
•
Fixed Output Voltage Options Available
Up to 400-mA Output Current
1.25-MHz Fixed Frequency PWM Operation
Highest Efficiency Over Wide Load Current
Range Due to Power-Save Mode
•
•
•
•
•
15-µA Typical Quiescent Current
Soft Start
100% Duty Cycle Low-Dropout Operation
Dynamic Output-Voltage Positioning
Available in TSOT23 Package
APPLICATIONS
•
•
•
•
•
•
•
PDAs and Pocket PC
Cellular Phones, Smart Phones
OMAP™ and Low Power DSP Supply
Digital Cameras
Portable Media Players
Portable Equipment
WLAN PC Cards
100
V
= 1.8 V,
O
95
90
85
80
75
70
65
60
55
50
L = 4.7 mH,
L1
TPS62220
C
= 22 mF
O
4.7 mH
V
V
1
2
3
5
O
I
V
SW
I
V = 2.7 V
I
1.5 V/400 mA
2.5 V to 6 V
C4
10 mF
R1
C1
GND
C3
4.7 mF
360 kW
22 pF
4
EN
FB
V = 3.7 V
I
C2
R2
100 pF
180 kW
V = 5 V
I
45
40
0.01
0.1
1
10
100 1000
Typical Application (Adjustible Output Voltage Version)
I
L
− Load Current − mA
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
OMAP, TMS320 are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2003–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TPS62220, TPS62221, TPS62222
TPS62223, TPS62224, TPS62227
TPS62228, TPS62229
www.ti.com
SLVS491D–SEPTEMBER 2003–REVISED MARCH 2006
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
(1)
ORDERING INFORMATION
TA
OUTPUT VOLTAGE
Adjustable
1.5 V
THIN-SOT23 PACKAGE
TPS62220DDC
TPS62221DDC
TPS62224DDC
TPS62229DDC
TPS62222DDC
TPS62228DDC
TPS62223DDC
TPS62227DDC
SYMBOL
ALN
ALO
ALQ
EJ
1.6 V
1.7 V
-40°C to 85°C
1.8 V
APP
EH
1.875 V
2.3 V
ALX
BRZ
1.2 V
(1) The DDC package is available in tape and reel. Add R suffix (TPS62220DDCR) to order quantities of 3000 parts. Add T suffix
(TPS62220DDCT) to order quantities of 250 parts.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature (unless otherwise noted)
(1)
TPS6222x
UNIT
V
(2)
VI
Supply voltage on pin
-0.3 to 7.0
-0.3 to VI +0.3
See Dissipation Rating Table
-40 to 150
(2)
Voltages on pins SW, EN, FB
Continuous power dissipation
V
PD
TJ
Operating junction temperature range
Storage temperature
°C
°C
°C
Tstg
-65 to 150
Lead temperature (soldering, 10 sec)
260
(1) Stresses beyond those listed under "absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
DISSIPATION RATING TABLE(1)
TA≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
PACKAGE
DDC
400 mW
4 mW/°C
220 mW
160 mW
(1) The thermal resistance junction to ambient of the 5-pin Thin-SOT23 is 250°C/W.
RECOMMENDED OPERATING CONDITIONS
MIN
NOM
MAX
6
UNIT
VI
VO
IO
L
Supply voltage
2.5
0.7
V
V
Output voltage range for adjustable output voltage version
Output current
VI
400
mA
µH
µF
°C
°C
(1)
Inductor
4.7
CI
TA
TJ
Input capacitor(1)
4.7
Operating ambient temperature
Operating junction temperature
-40
-40
85
125
(1) See the application section for further information
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SLVS491D–SEPTEMBER 2003–REVISED MARCH 2006
ELECTRICAL CHARACTERISTICS
VI = 3.6 V, VO = 1.8 V, IO = 200 mA, EN = VIN, TA = -40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
SUPPLY CURRENT
VI
IQ
Input voltage range
2.5
6
25
1
V
µA
µA
V
Operating quiescent current
Shutdown supply current
IO = 0 mA, Device is not switching
EN = GND
15
0.1
Undervoltage lockout threshold
1.5
1.3
2
ENABLE
V(EN)
EN high level input voltage
EN low level input voltage
EN input bias current
V
V
0.4
0.1
I(EN)
EN = GND or VIN
0.01
µA
POWER SWITCH
VI = VGS = 3.6 V
VI = VGS = 2.5 V
VI = VGS = 3.6 V
VI = VGS = 2.5 V
VDS = 6 V
530
670
430
530
0.1
670
850
540
660
1
P-channel MOSFET on-resistance
mΩ
mΩ
rDS(on)
N-channel MOSFET on-resistance
P-channel leakage current
N-channel leakage current
P-channel current limit
µA
µA
Ilkg
VDS = 6 V
0.1
1
I(LIM)
2.5 V < VI < 6 V
600
0.8
670
880
mA
OSCILLATOR
fS
Switching frequency
1.25
0.5
1.85
MHz
OUTPUT
IO
Output current
400
VIN
mA
V
Adjustable output voltage
range
VO
TPS62220
0.7
Vref
Reference voltage
V
VI = 3.6 V to 6 V, IO = 0 mA
0%
-3%
0%
3%
3%
3%
3%
3%
3%
3%
3%
3%
3%
3%
3%
3%
3%
3%
3%
TPS62220
Adjustable
(1)
Feedback voltage, See
VI = 3.6 V to 6 V, 0 mA ≤ IO ≤ 400 mA
VI = 2.5 V to 6 V, IO = 0 mA
TPS62221
1.5 V
VI = 2.5 V to 6 V, 0 mA≤ IO ≤ 400 mA
VI = 2.5 V to 6 V, IO = 0 mA
-3%
0%
TPS62224
1.6 V
VI = 2.5 V to 6 V, 0 mA ≤ IO ≤ 400 mA
VI = 2.5 V to 6 V, IO = 0 mA
-3%
0%
TPS62229
1.7 V
VI = 2.5 V to 6 V, 0 mA ≤ IO ≤ 400 mA
VI = 2.5 V to 6 V, IO = 0 mA
-3%
0%
TPS62222
1.8 V
VO
Fixed output voltage
VI = 2.5 V to 6 V, 0 mA ≤ IO ≤ 400 mA
VI = 2.5 V to 6 V, IO = 0 mA
-3%
0%
TPS62228
1.875 V
VI = 2.5 V to 6 V, 0 mA ≤ IO ≤ 400 mA
VI = 2.7 V to 6 V, IO = 0 mA
-3%
0%
TPS62223
2.3 V
VI = 2.7 V to 6 V, 0 mA ≤ IO ≤ 400 mA
VI = 2.7 V to 6 V, IO = 0 mA
-3%
0%
TPS62227
1.2 V
VI = 2.7 V to 6 V, 0 mA ≤ IO ≤ 400 mA
VI = 2.5 V to 6 V, IO = 10 mA
IO = 100 mA to 400 mA
-3%
Line regulation
0.26
0.0014
0.1
%/V
%/mA
µA
Load regulation
Leakage current into SW pin
VI > VO, 0 V ≤ V(SW) ≤ VI
1
1
Ilkg
Reverse leakage current into pin SW
VI = open, EN = GND, V(SW) = 6 V
0.1
µA
(1) For output voltages ≤ 1.2 V, a 22-µF output capacitor value is required to achieve a maximum output voltage accuracy of 3% while
operating in power-save mode (PFM mode). For output voltages ≥ 2 V, an inductor of 10 µH and an output capacitor of ≥ 10 µF is
recommended. See the Application Information section for external components.
3
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SLVS491D–SEPTEMBER 2003–REVISED MARCH 2006
PIN ASSIGNMENTS
DDC PACKAGE
(TOP VIEW)
SW
FB
1
2
3
V
5
4
I
GND
EN
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
EN
NO.
3
I
I
This is the enable pin of the device. Pulling this pin to ground forces the device into shutdown mode.
Pulling this pin to Vin enables the device. This pin must be terminated.
FB
4
This is the feedback pin of the device. Connect this pin directly to the output if the fixed output voltage
version is used. For the adjustable version, an external resistor divider is connected to this pin. The
internal voltage divider is disabled for the adjustable version.
GND
SW
2
5
Ground
I/O
I
Connect the inductor to this pin. This pin is the switch pin and is connected to the internal MOSFET
switches.
VI
1
Supply voltage pin
4
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SLVS491D–SEPTEMBER 2003–REVISED MARCH 2006
FUNCTIONAL BLOCK DIAGRAM
V
I
Current Limit Comparator
REF
+
_
Undervoltage
Lockout
Bias Supply
+
_
Skip Comparator
REF
Soft Start
V
V
1.25 MHz
Oscillator
(COMP)
I
P-Channel
Power MOSFET
Comparator
S
R
Driver
Shoot-Through
Logic
SW
+
_
Control
Logic
Sawtooth
Generator
N-Channel
Power MOSFET
Comparator High
Comparator Low
Comparator Low 2
Load Comparator
+
_
Comparator High
+
_
R1
Compensation
Gm
R2
Comparator Low
Comparator Low 2
See Note
+
_
V
REF
= 0.5 V
EN
FB
GND
NOTE: For the adjustable version (TPS62220) the internal feedback divider is disabled, and the FB pin is directly connected
to the internal GM amplifier
5
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TPS62223, TPS62224, TPS62227
TPS62228, TPS62229
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SLVS491D–SEPTEMBER 2003–REVISED MARCH 2006
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
Figure 1,
Figure 2,
Figure 3
vs Load current
η
Efficiency
vs Input voltage
vs Input voltage
vs Temperature
vs Output current
vs Input voltage
vs Input voltage
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9
Figure 10
Figure 11
Figure 12
Figure 13
IQ
fs
No load quiescent current
Switching frequency
Vo
Output voltage
rds(on) - P-channel switch,
rds(on) - N-Channel rectifier switch
Load transient response
PWM mode operation
Power-save mode operation
Start-up
rds(on)
EFFICIENCY
vs
LOAD CURRENT
EFFICIENCY
vs
LOAD CURRENT
100
100
95
90
85
80
75
70
65
60
55
50
V
O
= 1.8 V,
95
90
85
80
75
70
65
60
55
50
L = 4.7 µH,
= 22 µF
V = 3.7 V
I
C
O
V = 2.7 V
I
V = 5 V
I
V = 5 V
I
V = 3.7 V
I
V
= 3.3 V,
O
L = 4.7 µH,
= 10 µF
C
O
45
40
45
40
0.01
0.1
1
10
100
1000
0.01
0.1
1
10
100
1000
I
L
- Load Current - mA
I
L
- Load Current - mA
Figure 1.
Figure 2.
6
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TPS62228, TPS62229
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SLVS491D–SEPTEMBER 2003–REVISED MARCH 2006
EFFICIENCY
vs
LOAD CURRENT
EFFICIENCY
vs
INPUT VOLTAGE
100
95
100
95
V
= 1.8 V,
O
V
= 1.5 V,
O
L = 4.7 µH,
= 22 µF
L = 4.7 µH,
= 10 µF
C
O
C
90
O
85
I
L
= 1 mA
V = 2.7 V
I
80
75
70
65
60
55
50
90
I = 150 mA
L
V = 5 V
I
85
I
L
= 300 mA
V = 3.7 V
I
80
75
70
45
40
0.01
0.1
1
10
100
1000
2.5
3
3.5
4
4.5
5
5.5
6
V − Input Voltage − V
I
I
L
- Load Current - mA
Figure 3.
Figure 4.
NO LOAD QUIESCENT CURRENT
SWITCHING FREQUENCY
vs
vs
INPUT VOLTAGE
TEMPERATURE
25
1190
1180
1170
V = 6 V
I
T
A
= 85°C
20
15
10
V = 3.6 V
I
T
A
= 25°C
T
A
= −40°C
1160
1150
V = 2.5 V
I
5
0
1140
1130
2.5
3
3.5
4
4.5
5
5.5
6
−40 −30 −20 −10
0
10 20 30 40 50 60 70 80
V − Input Voltage − V
I
T − Temperature − °C
A
Figure 5.
Figure 6.
7
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SLVS491D–SEPTEMBER 2003–REVISED MARCH 2006
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
rds(on) P-CHANNEL SWITCH
vs
INPUT VOLTAGE
1.55
1.53
0.8
0.7
0.6
0.5
0.4
0.3
0.2
T
A
= 85°C
PFM Mode
1.51
T
A
= 25°C
PWM Mode
T
A
= -40°C
1.49
1.47
1.45
2.5
3
3.5
4
4.5
5
5.5
6
0
50
100
150
200
250
300
V - Input Voltage - V
I
I
O
− Output Current − mA
Figure 7.
Figure 8.
rds(on) N-CHANNEL SWITCH
LOAD TRANSIENT RESPONSE
vs
INPUT VOLTAGE
0.8
0.7
0.6
0.5
0.4
0.3
0.2
V = 3.6 V, V = 1.5 V, L = 4.7 µH,
I
O
C
O
=10 µF, Load Step 50 mA to 390 mA
transient
V
O
100 mV/div
T = 85°C
A
T = 25°C
A
T = −40°C
A
I
L
200 mA/div
200 µs/div
2.5
3
3.5
4
4.5
5
5.5
6
V − Input Voltage − V
I
Figure 9.
Figure 10.
8
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SLVS491D–SEPTEMBER 2003–REVISED MARCH 2006
PWM MODE OPERATION
POWER-SAVE MODE OPERATION
V = 3.6 V,
I
V
O
= 1.5 V
V
,
SW
V
SW
5 V/div
5 V/div
V ,
O
V
O
20 mV/div
20 mV/div
V = 3.6 V,
I
I
I ,
L
L
V
O
= 1.5 V,
200 mA/div
200 mA/div
I
O
= 400 mA
250 ns/div
5 µs/div
Figure 12.
Figure 11.
START-UP
Enable
2 V/div
V
O
1 V/div
I
i
200 mA/div
V = 3.6 V,
I
V
O
= 1.5 V,
I
O
= 380 mA
250 µs/div
Figure 13.
9
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SLVS491D–SEPTEMBER 2003–REVISED MARCH 2006
DETAILED DESCRIPTION
OPERATION
The TPS6222x is a synchronous step-down converter operating with typically 1.25-MHz fixed frequency pulse
width modulation (PWM) at moderate to heavy load currents and in power-save mode operating with pulse
frequency modulation (PFM) at light load currents.
During PWM operation, the converter uses a unique fast response, voltage mode, controller scheme with input
voltage feed forward. This achieves good line and load regulation and allows the use of small ceramic input and
output capacitors. At the beginning of each clock cycle initiated by the clock signal (S), the P-channel MOSFET
switch is turned on, and the inductor current ramps up until the comparator trips and the control logic turns off the
switch. The current limit comparator also turns off the switch in case the current limit of the P-channel switch is
exceeded. Then, the N-channel rectifier switch is turned on and the inductor current ramps down. The next cycle
is initiated by the clock signal, again turning off the N-channel rectifier and turning on the P-channel switch.
The GM amplifier and input voltage determines the rise time of the sawtooth generator; therefore, any change in
input voltage or output voltage directly controls the duty cycle of the converter. This gives a very good line and
load transient regulation.
POWER-SAVE MODE OPERATION
As the load current decreases, the converter enters the power-save mode operation. During power-save mode,
the converter operates with reduced switching frequency in PFM mode and with a minimum quiescent current to
maintain high efficiency. Two conditions allow the converter to enter the power-save mode operation. One is
when the converter detects discontinuous conduction mode. The other is when the peak switch current in the
P-channel switch goes below the skip current limit. The typical skip current limit can be calculated as:
Vin
160 W
I
v 66 mA )
skip
During the power-save mode, the output voltage is monitored with the comparator (comp) by the thresholds
comp low and comp high. As the output voltage falls below the comp low threshold set to 0.8% typical above
Vout, the P-channel switch turns on. The P-channel switch is turned off as the peak switch current is reached.
The typical peak switch current can be calculated:
Vin
80 W
I
+ 66 mA )
peak
The N-channel rectifier is turned on and the inductor current ramps down. As the inductor current approaches
zero, the N-channel rectifier is turned off and the P-channel switch is turned on again, starting the next pulse.
The converter continues these pulses until the comp high threshold (set to typically 1.6% above Vout) is reached.
The converter enters a sleep mode, reducing the quiescent current to a minimum. The converter wakes up again
as the output voltage falls below the comp low threshold. This control method reduces the quiescent current
typically to 15 µA and reduces the switching frequency to a minimum, thereby achieving high converter efficiency
at light load. Setting the skip current thresholds to typically 0.8% and 1.6% above the nominal output voltage at
light load current results in a dynamic output voltage achieving lower absolute voltage drops during heavy load
transient changes. This allows the converter to operate with a small output capacitor of just 10 µF and still have a
low absolute voltage drop during heavy load transient changes. See Figure 14 for detailed operation of the
power-save mode.
10
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SLVS491D–SEPTEMBER 2003–REVISED MARCH 2006
DETAILED DESCRIPTION (continued)
PFM Mode at Light Load
Comparator High
1.6%
0.8%
Comparator Low
Comparator Low 2
V
O
PWM Mode at Medium to Full Load
Figure 14. Power-Save Mode Thresholds and Dynamic Voltage Positioning
The converter enters the fixed frequency PWM mode again as soon as the output voltage falls below the comp
low 2 threshold.
DYNAMIC VOLTAGE POSITIONING
As described in the power-save mode operation sections and as detailed in Figure 14, the output voltage is
typically 0.8% above the nominal output voltage at light load currents, as the device is in power-save mode. This
gives additional headroom for the voltage drop during a load transient from light load to full load. During a load
transient from full load to light load, the voltage overshoot is also minimized due to active regulation by turning on
the N-channel rectifier switch.
DIGITAL SELF-CALIBRATION
In addition to the control circuit as shown in the block diagram, the TPS6222x series uses an internal digital
self-calibration of the output voltage to minimize DC load and line regulation. This method of self-calibration
allows simple internal loop compensation without the use of external components. The device monitors the
output voltage and as soon as the output voltage drops below typically 1.6% or exceeds typically 1.6% of Vout
the duty cycle will be adjusted in digital steps. As a result, the output voltage changes in digital steps either up or
down where one step is typically 1% of Vout. This results in virtually zero line and load regulation and keeps the
output voltage tolerance within ±3% overload and line variations.
SOFT START
The TPS6222x has an internal soft-start circuit that limits the inrush current during start-up. This prevents
possible voltage drops of the input voltage in case a battery or a high impedance power source is connected to
the input of the TPS6222x. The soft start is implemented as a digital circuit increasing the switch current in steps
of typically 83 mA, 167 mA, 335 mA and then the typical switch current limit of 670 mA. Therefore, the start-up
time mainly depends on the output capacitor and load current.
11
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SLVS491D–SEPTEMBER 2003–REVISED MARCH 2006
DETAILED DESCRIPTION (continued)
LOW DROPOUT OPERATION 100% DUTY CYCLE
The TPS6222x offers a low input to output voltage difference, while still maintaining operation with the 100% duty
cycle mode. In this mode, the P-channel switch is constantly turned on. This is particularly useful in
battery-powered applications to achieve longest operation time by taking full advantage of the whole battery
voltage range. The minimum input voltage to maintain regulation, depending on the load current and output
voltage, can be calculated as:
V min = V max + I max x r
(
max + R
)
L
I
O
O
DS(on)
where:
•
•
•
•
IOmax = maximum output current plus indicator ripple current
rDS(on)max = maximum P-channel switch rDS(on)
RL = dc resistance of the inductor
VOmax = normal output voltage plus maximum output voltage tolerance
ENABLE
Pulling the enable low forces the part into shutdown, with a shutdown quiescent current of typically 0.1 µA. In this
mode, the P-channel switch and N-channel rectifier are turned off, the internal resistor feedback divider is
disconnected, and the whole device is in shutdown mode. If an output voltage, which could be an external
voltage source or super capacitor, is present during shutdown, the reverse leakage current is specified under
electrical characteristics. For proper operation, the enable pin must be terminated and must not be left floating.
Pulling the enable high starts up the TPS6222x with the soft start as previously described.
UNDERVOLTAGE LOCKOUT
The undervoltage lockout circuit prevents the device from misoperation at low input voltages. It prevents the
converter from turning on the switch or rectifier MOSFET under undefined conditions.
12
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TPS62223, TPS62224, TPS62227
TPS62228, TPS62229
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SLVS491D–SEPTEMBER 2003–REVISED MARCH 2006
APPLICATION INFORMATION
OUTPUT FILTER DESIGN (INDUCTOR AND OUTPUT CAPACITOR)
The TPS6222x series of step-down converter has internal loop compensation. Therefore, the external L-C filter
has to be selected to work with the internal compensation. This is especially important for the fixed output
voltage version. The adjustable output voltage version allows external capacitors across the feedback divider
resistors. This allows higher flexibility of the output filter selection when using the adjustable output voltage
device TPS62220.
Fixed Output Voltage Version
The internal compensation is optimized to operate with an output filter of L = 10 µH and CO = 10 µF. Such an
output filter has its corner frequency at:
1
1
ƒ +
+
+ 15.9 kHz
c
Ǹ
2p ǸL C
2p 10 mH 10 mF
O
with L = 10 µH, C = 10 µF
O
As a general rule of thumb, the product L×C should not move over a wide range when selecting a different output
filter. This is because the internal compensation is designed to work with a certain output filter corner frequency
as calculated above. This is especially important when selecting smaller inductor or capacitor values that move
the corner frequency to higher frequencies. However, when selecting the output filter a low limit for the inductor
value exists due to other internal circuit limitations. For the TPS6222x series the minimum inductor value should
be kept at 4.7µH. Selecting a larger output capacitor value is less critical because the corner frequency moves to
lower frequencies causing fewer stability problems. The possible output filter combinations are listed in Table 1:
Table 1. Output Filter Combinations for Fixed Output Voltage Versions
VO
L
CO
≤ 2 V
≤ 2 V
≤ 2 V
≥ 2 V
4.7 µH
6.8 µH
10 µH
10 µH
≥ 22 µF (ceramic capacitor)
≥ 22 µF (ceramic capacitor)
≥ 10 µF (ceramic capacitor)
10 µF (ceramic capacitor)
Adjustable Output Voltage Version
When the adjustable output voltage version TPS62220 is used, the output voltage is set by the external resistor
divider. See Figure 15.
The output voltage is calculated as
R1
R2
+ 0.5 V ǒ1 ) Ǔ
V
out
with R1 + R2 ≤ 1 MΩ and internal reference voltage Vreftyp = 0.5 V
For stability, R1 + R2 should not be greater than 1 MΩ. To keep the operating quiescent current to a minimum,
the feedback resistor divider should have high impedance with R1 + R2 ≤ 1 MΩ. In general, for the adjustable
output voltage version, the same stability considerations are valid as for the fixed output voltage version.
Because the adjustable output voltage version uses an external feedback divider, it is possible to adjust the loop
gain using external capacitors across the feedback resistors. This allows a wider selection of possible output filter
components. This is shown in Figure 16. R1 and C1 places a zero in the loop and R2 and C2 places a pole in
the loop. The zero is calculated as:
1
1
C1 +
+
2 p ƒ R1
2 p 22 kHz R1
Z
with R1 = upper resistor of voltage divider, C1 = upper capacitor of voltage divider
13
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TPS62223, TPS62224, TPS62227
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SLVS491D–SEPTEMBER 2003–REVISED MARCH 2006
The pole is calculated as:
1
1
C2 +
+
2 p ƒ R2
2 p 8 kHz R2
P
with R2 = lower resistor of voltage divider and C2 = lower capacitor of voltage divider.
For an output filter combination of L = 4.7 µH and CO = 10 µF, C1 and C2 must be selected to place a zero at 22
kHz, and a pole at 8 kHz. Choose components close to the calculated values.
Table 2. Compensation Selection
L
CO
fZ
fP
4.7 µH
10 µF, 22 µF
22 kHz
8 kHz
L1
4.7 µH
TPS62220
V
V
O
I
V
I
SW
2.5 V − 6 V
1.8 V / 400 mA
C3
C4
10 µF
C1
15 pF
R1
470k
GND
EN
4.7 µF
FB
C2
100 pF
R2
180k
Figure 15. Typical Application Circuit for the TPS62220 With Adjustable Output Voltage
INDUCTOR SELECTION
For high efficiencies, the inductor should have a low dc resistance to minimize conduction losses. Especially at
high-switching frequencies the core material has a higher impact on efficiency. When using small chip inductors,
the efficiency is reduced mainly due to higher inductor core losses. This needs to be considered when selecting
the appropriate inductor. The inductor value determines the inductor ripple current. The larger the inductor value,
the smaller the inductor ripple current and the lower the conduction losses of the converter. Conversely, larger
inductor values cause a slower load transient response. To avoid saturation of the inductor, the inductor should
be rated at least for the maximum output current of the converter plus the inductor ripple current that is
calculated as:
V
O
1 -
DI
V
L
I
I max = I max +
L O
DI = V
L
x
O
2
L x f
where:
•
•
•
•
f = switching frequency (1.25-MHz typical, 800-kHz minimal)
L = inductor value
∆IL = peak-to-peak inductor ripple current
ILmax = maximum inductor current
The highest inductor current occurs at maximum Vin. A more conservative approach is to select the inductor
current rating just for the maximum switch current of 880 mA. SeeTable 3 for inductor selection.
14
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TPS62223, TPS62224, TPS62227
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SLVS491D–SEPTEMBER 2003–REVISED MARCH 2006
Table 3. Inductor Selection
INDUCTOR VALUE
4.7 µH
COMPONENT SUPPLIER
DIMENSIONS
3,2 mm × 3,2 mm × 2, 0 mm
3,2 mm × 2,5 mm × 2, 0 mm
2,5 mm × 1,8 mm × 1,8 mm
4,4 mm × 5,8 mm × 1,2 mm
6,3 mm × 5,8 mm × 1, 0 mm
4,9 mm × 4,9 mm × 1, 0 mm
2,8 mm × 2,6 mm × 1, 0 mm
4,0 mm × 4,0 mm × 1,8 mm
4,0 mm × 5,8 mm × 1,2 mm
4,5 mm × 3,2 mm × 2, 6 mm
4,0 mm × 4,0 mm × 1,8 mm
4,9 mm × 4,9 mm × 1,5 mm
Sumida CDRH2D18/LD 4R7
4.7 µH
Murata LQH3C4R7M24
Taiyo Yuden LBC2518 4R7
Sumida CMD4D11 4R7
Sumida CMD4D08 4R7
Sumida CLSD09 4R7
TDK VLF3010AT 4R7
Sumida CDRH3D16 6R8
Sumida CMD4D11 4R7
Murata LQH4C100K04
Sumida CDRH3D16 100
Sumida CLS4D14 100
4.7 µH
4.7 µH
4.7 µH
4.7 µH
4.7 µH
6.8 µH
6.8 µH
10 µH
10 µH
10 µH
INPUT CAPACITOR SELECTION
Because buck converters have a pulsating input current, a low ESR input capacitor is required. This results in the
best input voltage filtering, minimizing the interference with other circuits caused by high input voltage spikes.
Also, the input capacitor must be sufficiently large to stabilize the input voltage during heavy load transients. For
good input voltage filtering, usually a 4.7-µF input capacitor is sufficient. It can be increased without any limit for
better input-voltage filtering. Ceramic capacitors show better performance because of the low ESR value, and
they are less sensitive against voltage transients and spikes compared to tantalum capacitors. Place the input
capacitor as close as possible to the input and GND pin of the device for best performance (see Table 4 for
capacitor selection).
OUTPUT CAPACITOR SELECTION
The advanced fast response voltage mode control scheme of the TPS6222x allows the use of tiny ceramic
capacitors with a minimum value of 10 µF without having large output voltage under and overshoots during
heavy load transients. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are
recommended. If required, tantalum capacitors may be used as well (see Table 4 for capacitor selection). At
nominal load current, the device operates in power-save mode, and the output voltage ripple is independent of
the output capacitor value. The output voltage ripple is set by the internal comparator thresholds. The typical
output voltage ripple is 1% of the output voltage VO.
Table 4. Capacitor selection
CAPACITOR VALUE
4.7 µF
CASE SIZE
0603
COMPONENT SUPPLIER
Contact TDK
4.7 µF
0805
Taiyo Yuden JMK212BY475MG
Taiyo Yuden JMK212BJ106MG
TDK C12012X5ROJ106K
10 µF
22 µF
0805
0805
1206
Contact TDK
Taiyo Yuden JMK316BJ226
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TPS62223, TPS62224, TPS62227
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SLVS491D–SEPTEMBER 2003–REVISED MARCH 2006
Layout Considerations
For all switching power supplies, the layout is an important step in the design, especially at high-peak currents
and switching frequencies. If the layout is not carefully done, the regulator shows stability problems as well as
EMI problems. Therefore, use wide and short traces for the main current paths, as indicated in bold in Figure 16.
The input capacitor, as well as the inductor and output capacitor, should be placed as close as possible to the IC
pins. In particular, the input capacitor needs to be placed as close as possible to the IC pins, directly across the
Vin and GND pin. The feedback resistor network must be routed away from the inductor and switch node to
minimize noise and magnetic interference. To further minimize noise from coupling into the feedback network
and feedback pin, the ground plane or ground traces must be used for shielding. This becomes important
especially at high switching frequencies of 1.25 MHz.
L1
TPS62220
4.7 µH
V
V
O
I
V
SW
FB
I
2.5 V − 6 V
1.8 V / 400 mA
C1
4.7 µF
GND
EN
R1
R2
C1
C2
C2
10 µF
Figure 16. Layout Diagram
Typical Applications
L1
TPS62220
10 µH
V
1
2
5
4
V
O
I
V
SW
I
3.6 V to 6 V
3.3 V/400 mA
C4
10 µF
R1
680 kΩ
C1
10 pF
GND
EN
C3
10 µF
3
FB
C2
150 pF
R2
120 kΩ
Figure 17. LI-Ion to 3.3-V Conversion
L1
TPS62220
10 µH
V
1
2
3
5
4
V
O
I
V
SW
I
2.7 V to 6 V
2.5 V/400 mA
C4
10 µF
R1
510 kΩ
C1
15 pF
GND
EN
C3
4.7 µF
FB
C2
150 pF
R2
130 kΩ
Figure 18. LI-Ion to 2.5-V Conversion
16
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TPS62223, TPS62224, TPS62227
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SLVS491D–SEPTEMBER 2003–REVISED MARCH 2006
L1
TPS62220
4.7 µH
V
1
2
3
5
4
V
O
I
V
SW
I
2.5 V to 6 V
1.8 V/400 mA
C4
10 µF
R1
470 kΩ
C1
15 pF
GND
EN
C3
4.7 µF
FB
C2
100 pF
R2
180 kΩ
Figure 19. LI-Ion to 1.8-V Conversion
L1
TPS62220
4.7 µH
V
1
2
3
5
4
V
O
I
V
SW
I
2.5 V to 6 V
1.5 V/400 mA
C4
10 µF
R1
360 kΩ
C1
22 pF
GND
EN
C3
4.7 µF
FB
C2
100 pF
R2
180 kΩ
Figure 20. LI-Ion to 1.5-V Conversion
L1
TPS62220
4.7 µH
V
1
2
5
4
V
O
I
V
SW
I
2.5 V to 6 V
1.2 V/400 mA
C4
10 µF
R1
330 kΩ
C1
22 pF
GND
EN
C3
4.7 µF
3
FB
C2
100 pF
R2
240 kΩ
Figure 21. LI-Ion to 1.2-V Conversion
L1
TPS62221
4.7 µH
V
1
2
5
4
V
O
I
V
SW
I
2.5 V to 6 V
1.5 V/400 mA
C2
22 µF
GND
EN
C1
4.7 µF
3
FB
Figure 22. Li-Ion to 1.5-V Conversion, Fixed Output Voltage Version
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SLVS491D–SEPTEMBER 2003–REVISED MARCH 2006
L1
TPS62223
10 µH
V
V
I
1
2
3
5
4
O
V
SW
I
2.3 V/400 mA
2.5 V to 6 V
C2
10 µF
GND
EN
C1
4.7 µF
FB
Figure 23. Li-Ion to 2.3-V Conversion, Fixed Output Voltage Version
18
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PACKAGE OPTION ADDENDUM
www.ti.com
22-Oct-2007
PACKAGING INFORMATION
Orderable Device
TPS62220DDCR
TPS62220DDCRG4
TPS62220DDCT
TPS62220DDCTG4
TPS62221DDCR
TPS62221DDCRG4
TPS62221DDCT
TPS62221DDCTG4
TPS62222DDCR
TPS62222DDCRG4
TPS62222DDCT
TPS62222DDCTG4
TPS62223DDCR
TPS62223DDCRG4
TPS62223DDCT
TPS62223DDCTG4
TPS62224DDCR
TPS62224DDCRG4
TPS62224DDCT
TPS62224DDCTG4
TPS62227DDCR
TPS62227DDCRG4
TPS62227DDCT
TPS62227DDCTG4
TPS62228DDCR
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOT
DDC
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT
SOT
SOT
SOT
SOT
SOT
SOT
SOT
SOT
SOT
SOT
SOT
SOT
SOT
SOT
SOT
SOT
SOT
SOT
SOT
SOT
SOT
SOT
SOT
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
22-Oct-2007
Orderable Device
TPS62228DDCRG4
TPS62228DDCT
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOT
DDC
5
5
5
5
5
5
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT
SOT
SOT
SOT
SOT
SOT
DDC
DDC
DDC
DDC
DDC
DDC
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS62228DDCTG4
TPS62229DDCR
TPS62229DDCRG4
TPS62229DDCT
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TPS62229DDCTG4
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Oct-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
180
180
180
180
180
180
180
180
180
180
180
180
180
180
180
180
(mm)
TPS62220DDCR
TPS62220DDCT
TPS62221DDCR
TPS62221DDCT
TPS62222DDCR
TPS62222DDCT
TPS62223DDCR
TPS62223DDCT
TPS62224DDCR
TPS62224DDCT
TPS62227DDCR
TPS62227DDCT
TPS62228DDCR
TPS62228DDCT
TPS62229DDCR
TPS62229DDCT
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
3.1
3.1
3.1
3.1
3.1
3.1
3.1
3.1
3.1
3.1
3.1
3.1
3.1
3.1
3.1
3.1
3.05
3.05
3.05
3.05
3.05
3.05
3.05
3.05
3.05
3.05
3.05
3.05
3.05
3.05
3.05
3.05
1.1
1.1
1.1
1.1
1.1
1.1
1.1
1.1
1.1
1.1
1.1
1.1
1.1
1.1
1.1
1.1
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Oct-2007
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
TPS62220DDCR
TPS62220DDCT
TPS62221DDCR
TPS62221DDCT
TPS62222DDCR
TPS62222DDCT
TPS62223DDCR
TPS62223DDCT
TPS62224DDCR
TPS62224DDCT
TPS62227DDCR
TPS62227DDCT
TPS62228DDCR
TPS62228DDCT
TPS62229DDCR
TPS62229DDCT
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
DDC
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
SITE 35
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
85.0
85.0
85.0
85.0
85.0
85.0
85.0
85.0
85.0
85.0
85.0
85.0
85.0
85.0
85.0
85.0
Pack Materials-Page 2
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