TPS62291 [TI]
1-A Step Down Converter in 2 x 2 SON Package; 1 -A降压转换器的2× 2 SON封装
| 型号： | TPS62291 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 1-A Step Down Converter in 2 x 2 SON Package |
| 文件： | 总24页 (文件大小：987K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TPS62290, TPS62291, TPS62293
www.ti.com
SLVS764C–JUNE 2007–REVISED MARCH 2008
1-A Step Down Converter in 2 x 2 SON Package
1
FEATURES
DESCRIPTION
•
High Efficiency Step Down Converter
•
•
•
•
•
•
•
•
•
•
Output Current up to 1000 mA
The TPS6229x device is
a
highly efficient
synchronous step down dc-dc converter optimized for
battery powered portable applications. It provides up
to 1000-mA output current from a single Li-Ion cell.
VIN Range From 2.3 V to 6 V
2.25 MHz Fixed Frequency Operation
Power Save Mode at Light Load Currents
Output Voltage Accuracy in PWM mode ±1.5%
Fixed Output Voltage Options
With an input voltage range of 2.3 V to 6 V, the
device supports batteries with extended voltage
range and are ideal to power portable applications
like mobile phones and other portable equipment.
Typ. 15-µA Quiescent Current
The TPS6229x operates at 2.25-MHz fixed switching
frequency and enters Power Save Mode operation at
light load currents to maintain high efficiency over the
entire load current range.
100% Duty Cycle for Lowest Dropout
Voltage Positioning at Light Loads
Available in a 2 × 2 × 0,8 mm SON Package
The Power Save Mode is optimized for low output
voltage ripple. For low noise applications, the device
can be forced into fixed frequency PWM mode by
pulling the MODE pin high. In the shutdown mode,
the current consumption is reduced to less than 1 µA.
The TPS6229x allows the use of small inductors and
capacitors to achieve a small solution size.
APPLICATIONS
•
•
•
•
•
•
Cell Phones, Smart-phones
WLAN
PDAs, Pocket PCs
Low Power DSP Supply
Portable Media Players
POL
The TPS6229x is available in a 2-mm × 2-mm 6-pin
SON package.
V
1.8 V,
100
L1
2.2 mH
OUT
1000 mA
TPS62290DRV
V
V
2.7 V to 6 V
IN
VIN = 4.2 V
IN
SW
90
C
R
1
1
22 pF
C
VIN = 3.8 V
C
OUT
IN
EN
360 kW
10 mF
10 mF
80
VIN = 5 V
FB
GND
R
2
MODE
180 kW
VIN = 4.5 V
70
60
50
40
30
VOUT = 3.3 V,
MODE = GND,
L = 2.2 mH
0.00001 0.0001 0.001
0.01
0.1
1
IO - Output Current - A
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007–2008, Texas Instruments Incorporated
TPS62290, TPS62291, TPS62293
www.ti.com
SLVS764C–JUNE 2007–REVISED MARCH 2008
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
PART
OUTPUT
PACKAGE
DESIGNATOR
PACKAGE
MARKING
TA
PACKAGE(3)
ORDERING
NUMBER(1)
VOLTAGE(2)
TPS62290
TPS62291
TPS62293
adjustable
3.3V
SON 2 x 2
SON 2 x 2
SON 2 x 2
DRV
DRV
DRV
TPS62290DRV
TPS62291DRV
TPS62293DRV
BYN
CFY
CFD
–40°C to 85°C
1.8V
(1) The DRV package is available in tape on reel. Add R suffix to order quantities of 3000 parts per reel.
(2) Contact TI for other fixed output voltage options
(3) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
VALUE
–0.3 to 7
–0.3 to VIN +0.3, ≤ 7
–0.3 to 7
Internally limited
2
UNIT
VI
Input voltage range(2)
Voltage range at EN, MODE
Voltage on SW
V
Peak output current
A
kV
V
HBM Human body model
CDM Charge device model
Machine model
ESD rating(3)
1
200
TJ
Maximum operating junction temperature
Storage temperature range
–40 to 125
–65 to 150
°C
Tstg
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(3) The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin. The machine model is a 200-pF
capacitor discharged directly into each pin.
DISSIPATION RATINGS
PACKAGE
RθJA
POWER RATING FOR TA ≤ 25°C
DERATING FACTOR ABOVE TA = 25°C
13 mW/°C
DRV
76°C/W
1300 mW
RECOMMENDED OPERATING CONDITIONS
MIN
2.3
NOM
MAX
6
UNIT
V
VIN
Supply voltage
Output voltage range for adjustable voltage
Operating ambient temperature
Operating junction temperature
0.6
VIN
85
V
TA
TJ
–40
–40
°C
°C
125
2
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SLVS764C–JUNE 2007–REVISED MARCH 2008
ELECTRICAL CHARACTERISTICS
Over full operating ambient temperature range, typical values are at TA = 25°C. Unless otherwise noted, specifications apply
for condition VIN = EN = 3.6V. External components CIN = 4.7µF 0603, COUT = 10µF 0603, L = 2.2µH, refer to parameter
measurement information.
PARAMETER
Input voltage range
Output current
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
VI
2.3
6
1000
600
V
VIN 2.7 V to 6 V
IO
VIN 2.5 V to 2.7 V
VIN 2.3 V to 2.5 V
mA
300
IO = 0 mA, PFM mode enabled
(MODE = GND) device not switching,
See
15
µA
(1)
IQ
Operating quiescent current
IO = 0 mA, switching with no load
(MODE = VIN) PWM operation,
VO = 1.8 V, VIN = 3V
3.8
mA
ISD
Shutdown current
EN = GND
Falling
0.1
1.85
1.95
1
µA
UVLO
Undervoltage lockout threshold
V
Rising
ENABLE, MODE
High level input voltage, EN,
MODE
2.3 V ≤ VIN ≤ 6 V
1
0
VIN
0.4
1
VIH
V
Low level input voltage, EN,
MODE
2.3 V ≤ VIN ≤ 6 V
VIL
II
V
Input bias current, EN, MODE
EN, MODE = GND or VIN
0.01
µA
POWER SWITCH
High side MOSFET on-resistance
240
185
480
380
RDS(on)
VIN = VGS = 3.6 V, TA = 25°C
mΩ
A
Low side MOSFET on-resistance
Forward current limit MOSFET
high-side and low side
ILIMF
VIN = VGS = 3.6 V
1.19
1.4
1.68
Thermal shutdown
Increasing junction temperature
Decreasing junction temperature
140
20
TSD
°C
Thermal shutdown hysteresis
OSCILLATOR
fSW
Oscillator frequency
2.3 V ≤ VIN ≤ 6 V
2.0
0.6
2.25
2.5
VI
MHz
OUTPUT
VO
Adjustable output voltage range
Reference voltage
V
Vref
600
0
mV
MODE = VIN, PWM operation,
2.3 V ≤ VIN ≤ 6 V, See
VFB(PWM)
VFB(PFM)
Feedback voltage
–1.5
1.5
(2)
%
MODE = GND, device in PFM mode,
+1% voltage positioning active, See
Feedback voltage PFM mode
Load regulation
1
(1)
- 0.5
500
%/A
µs
Time from active EN to reach 95% of
VO
tStart Up
tRamp
Ilkg
Start-up time
VO ramp-up time
Time to ramp from 5% to 95% of VO
VI = 3.6 V, VI = VO = VSW, EN = GND,
250
0.1
µs
Leakage current into SW pin
1
µA
(3)
See
(1) In PFM mode, the internal reference voltage is set to typ. 1.01 × Vref . See the parameter measurement information.
(2) For VIN = VO + 1.0 V
(3) In fixed output voltage versions, the internal resistor divider network is disconnected from FB pin.
Copyright © 2007–2008, Texas Instruments Incorporated
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SLVS764C–JUNE 2007–REVISED MARCH 2008
PIN ASSIGNMENTS
DRV PACKAGE
(TOP VIEW)
1
6
5
4
SW
MODE
FB
GND
VIN
EN
2
3
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
VIN
NO.
5
PWR VIN power supply pin.
PWR GND supply pin
GND
6
This is the enable pin of the device. Pulling this pin to low forces the device into shutdown mode. Pulling
this pin to high enables the device. This pin must be terminated.
EN
4
1
3
2
I
This is the switch pin and is connected to the internal MOSFET switches. Connect the external inductor
between this terminal and the output capacitor.
SW
OUT
Feedback Pin for the internal regulation loop. Connect the external resistor divider to this pin. In case of
fixed output voltage option, connect this pin directly to the output capacitor
FB
I
I
MODE pin = high forces the device to operate in fixed-frequency PWM mode. Mode pin = low enables
the Power Save Mode with automatic transition from PFM mode to fixed-frequency PWM mode.
MODE
FUNCTIONAL BLOCK DIAGRAM
VIN
Current
Limit Comparator
VIN
Undervoltage
Lockout 1.8 V
Thermal
Shutdown
Limit
EN
High Side
PFM Comp .
Reference
0.6 V VREF
+1% Voltage positioning
FB
VREF + 1%
Gate Driver
Anti
Mode
FB
Control
Stage
MODE
Shoot-Through
Error Amp
Softstart
VOUT RAMP
CONTROL
SW1
VREF
Integrator
PWM
FB
Zero-Pole
AMP.
Comp .
Limit
RI1
GND
Low Side
RI..N
Current
Sawtooth
2.25 MHz
Oscillator
Limit Comparator
Generator
Int. Resistor
Network
GND
4
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SLVS764C–JUNE 2007–REVISED MARCH 2008
PARAMETER MEASUREMENT INFORMATION
L
1
TPS62290DRV
V
OUT
2.2
mH
V
IN
SW
C
1
R
C
1
IN
22 pF
EN
10
mF
C
OUT
FB
10
GND
mF
R
2
MODE
L: LPS3015 2.2 mH, 110 mW
C
:
GRM188R60J106M 10 mF Murata 0603 size
: GRM188R60J106M 10 mF Murata 0603 size
IN
OUT
C
TYPICAL CHARACTERISTICS
Table 1. Table Of Graphs
FIGURE
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 8
Figure 7
Figure 6
Figure 9
Figure 10
Figure 11
Figure 12
Figure 13
Efficiency
vs VO 1.8 V Power Save Mode
vs VO 1.8 V Forced Save Mode
vs VO 3.3 V Power Save Mode
vs VO 3.3 V Forced Save Mode
Efficiency
Efficiency
Efficiency
VO ACCURACY
VO ACCURACY
VO ACCURACY
VO ACCURACY
PFM LOAD TRANSIENT
PFM LINE TRANSIENT
PWM LOAD TRANSIENT
PWM LINE TRANSIENT
TYPICAL OPERATION PFM
MODE
TYPICAL OPERATION PWM
MODE
Figure 14
Shutdown Current Into VIN
Quiescent Current
vs Input Voltage, (TA = 85°C, TA = 25°C, TA = -40°C)
vs Input Voltage, (TA = 85°C, TA = 25°C, TA = -40°C)
Figure 15
Figure 16
Figure 17
Figure 18
Static Drain-Source On-State
Resistance
vs Input Voltage, (TA = 85°C, TA = 25°C, TA = -40°C)
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SLVS764C–JUNE 2007–REVISED MARCH 2008
EFFICIENCY (Power Save Mode)
EFFICIENCY (Forced PWM Mode)
vs
vs
OUTPUT CURRENT
OUTPUT CURRENT
100
100
90
V
= 1.8 V,
OUT
MODE = V
,
V
= 2.7 V
IN
IN
90
L = 2.2 mH
V
= 3.3 V
IN
80
70
60
V
= 3.6 V
IN
80
70
V
= 3.3 V
IN
V
= 4.5 V
IN
= 5 V
V
= 2.7 V
IN
V
= 5 V
V
IN
IN
60
50
V
= 4.5 V
IN
50
40
V
= 3.6 V
IN
V
= 1.8 V,
OUT
MODE = GND,
L = 2.2 mH
40
30
30
20
100
1000
100
1000
0.01
0.1
10
10
1
1
I
- Output Current - mA
I
- Output Current - mA
O
O
Figure 1.
Figure 2.
EFFICIENCY (Power Save Mode)
EFFICIENCY (Forced PWM Mode)
vs
vs
OUTPUT CURRENT
OUTPUT CURRENT
100
100
90
V
= 4.2 V
IN
V
= 4.2 V
IN
90
V
= 3.8 V
V
= 3.8 V
IN
IN
80
70
V
= 5 V
IN
80
70
V
= 5 V
IN
V
= 4.5 V
IN
60
50
40
V
= 4.5 V
IN
60
50
30
20
V
= 3.3 V,
V
= 3.3 V,
OUT
MODE = GND,
L = 2.2 mH
OUT
MODE = V
,
IN
40
30
L = 2.2 mH
10
0
100
1000
100
1000
0.01
0.1
10
10
1
1
I
- Output Current - mA
I
- Output Current - mA
O
O
Figure 3.
Figure 4.
6
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SLVS764C–JUNE 2007–REVISED MARCH 2008
OUTPUT VOLTAGE ACCURACY
(1.8V FORCED PWM MODE)
vs
OUTPUT VOLTAGE ACCURACY
(1.8V POWER SAVE MODE)
vs
OUTPUT CURRENT
OUTPUT CURRENT
1.854
1.90
1.88
MODE = V
,
MODE = GND,
L = 2.2 mH
IN
L = 2.2 mH
1.836
1.818
1.8
V
= 2.7 V, T = -40°C
A
IN
V
= 3.6 V, T = -40°C
IN
A
1.86
1.84
1.82
PFM Mode, Voltage Positioning On
V = 3.6 V, T = -40°C
V
= 4.5 V, T = -40°C
A
IN
I
A
V = 2.7 V, T = -40°C
I
A
V = 4.5 V, T = -40°C
I
A
PWM Mode
V
= 2.7 V,
= 25°C
IN
V
= 4.5 V,
= 85°C
IN
T
A
1.782
1.764
1.746
T
A
V
V
= 3.6 V,
= 25°C
V = 4.5 V, T = 85°C
I A
IN
= 3.6 V,
IN
T
V = 3.6 V, T = 85°C
A
V
I
A
T
= 85°C
A
= 4.5 V,
= 25°C
V = 2.7 V, T = 85°C
IN
I
A
V
= 2.7 V,
1.80
1.78
IN
T
V = 4.5 V, T = 25°C
A
I
A
T
= 85°C
A
V = 3.6 V, T = 25°C
I
A
V = 2.7 V, T = 25°C
I
A
0.01
0.1
1
10
100
1000
0.01
0.1
1
10
- Output Current - mA
100
1000
I
I
- Output Current - mA
O
O
Figure 5.
Figure 6.
OUTPUT VOLTAGE ACCURACY
3.3V FORCED PWM MODE
vs
OUTPUT VOLTAGE ACCURACY
3.3V POWER SAVE MODE
vs
OUTPUT CURRENT
OUTPUT CURRENT
3.40
3.38
3.36
3.34
3.32
3.50
3.45
3.40
3.35
V
= 3.3 V,
O
Mode = GND,
L = 2.2 mH
MODE = V ,
I
L = 2.2 mH
T
= 25°C
PFM Mode, Voltage Positioning On
V = 4.5 V, T = -40°C
A
T
A
= -40°C
I
A
V = 4.2 V, T = -40°C
PWM Mode
I
A
3.30
3.28
3.26
3.24
3.22
3.20
T
= 85°C
V = 3.7 V, 4.2 V, 4.5 V
A
I
V = 4.5 V, T = 25°C
I
A
V = 4.2 V, T = 25°C
3.30
3.25
I
A
V = 4.5 V, T = 85°C
I
A
V = 4.2 V, T = 85°C
I
A
1
0.01
0.1
1
10
- Output Current - mA
100
1000
0.01
1000
0.1
10
- Output Current - mA
100
I
I
O
O
Figure 7.
Figure 8.
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SLVS764C–JUNE 2007–REVISED MARCH 2008
PFM LOAD TRANSIENT
PFM LINE TRANSIENT
SW 2V/Div
V
V
I
3.6 V,
IN
1.8 V,
300 mA to 800 mA,
OUT
OUT
MODE = GND
V
100 mV/Div
OUT
V
50 mV/Div
OUT
I
500 mA/Div
OUT
800 mA
V
V
I
3.6 V,
IN
1.8 V,
50 mA to 250 mA,
OUT
300 mA
OUT
250 mA
MODE = GND
I
200 mA/Div
OUT
50 mA
I
500 mA/Div
coil
I
500 mA/Div
coil
Time Base - 20 ms/Div
Time Base - 20 ms/Div
Figure 9.
Figure 10.
PWM LOAD TRANSIENT
PWM LINE TRANSIENT
V
3.6 V to 4.2 V
V
3.6 V to 4.2 V,
IN
500 mV/Div
IN
500 mV/Div
V
= 1.8 V,
OUT
50 mV/Div,
= 50 mA,
V
= 1.8 V,
OUT
50 mV/Div,
= 250 mA,
I
OUT
MODE = GND
I
OUT
MODE = GND
Time Base - 100 ms/Div
Time Base - 100 ms/Div
Figure 11.
Figure 12.
8
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SLVS764C–JUNE 2007–REVISED MARCH 2008
TYPICAL OPERATION
TYPICAL OPERATION
vs
vs
PFM MODE
PWM MODE
V
V
3.6 V,
V
20 mV/Div
IN
OUT
1.8 V, I
150 mA,
10 mF 0603
OUT
OUT
V
10 mV/Div
L 2.2 mH, C
OUT
OUT
V
3.6 V,
IN
V
1.8 V, I
10 mA,
OUT
OUT
SW 2 V/Div
L 2.2 mH, C
10 mF 0603
OUT
SW 2 V/Div
I
200 mA/Div
coil
I
200 mA/Div
coil
Time Base - 10 ms/Div
Time Base - 10 ms/Div
Figure 13.
Figure 14.
SHUTDOWN CURRENT INTO VIN
QUIESCENT CURRENT
vs
vs
INPUT VOLTAGE
INPUT VOLTAGE
20
0.8
MODE = GND,
EN = VIN,
Device Not Switching
EN = GND
0.7
0.6
18
16
14
12
10
8
T
= 85oC
A
T
= 85oC
A
0.5
0.4
0.3
0.2
T
= 25oC
A
T
= -40oC
A
T
= 25oC
T
= -40oC
A
A
0.1
0
2
2.5
3
3.5
4
4.5
5
5.5
6
2
2.5
3
3.5
4
4.5
5
5.5
6
V
− Input Voltage − V
V
− Input Voltage − V
IN
IN
Figure 15.
Figure 16.
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SLVS764C–JUNE 2007–REVISED MARCH 2008
STATIC DRAIN-SOURCE ON-STATE RESISTANCE
STATIC DRAIN-SOURCE ON-STATE RESISTANCE
vs
vs
INPUT VOLTAGE
INPUT VOLTAGE
0.8
0.4
High Side Switching
0.7
Low Side Switching
0.35
0.3
0.6
T
= 85oC
T
= 85oC
A
A
0.5
0.25
T
= 25oC
T
= 25oC
A
A
0.4
0.3
0.2
0.15
0.2
0.1
0
0.1
0.05
0
T
= -40oC
T
= -40oC
A
A
2
2.5
3
3.5
4
4.5
5
2
2.5
3
3.5
4
4.5
5
V
− Input Voltage − V
V
− Input Voltage − V
IN
IN
Figure 17.
Figure 18.
10
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SLVS764C–JUNE 2007–REVISED MARCH 2008
DETAILED DESCRIPTION
OPERATION
The TPS6229x step down converter operates with typically 2.25-MHz fixed frequency pulse width modulation
(PWM) at moderate to heavy load currents. At light load currents, the converter can automatically enter Power
Save Mode and operates then in PFM mode.
During PWM operation, the converter use a unique fast response voltage mode controller scheme with input
voltage feed-forward to achieve good line and load regulation allowing the use of small ceramic input and output
capacitors. At the beginning of each clock cycle initiated by the clock signal, the High Side MOSFET switch is
turned on. The current flows now from the input capacitor via the High Side MOSFET switch through the inductor
to the output capacitor and load. During this phase, the current ramps up until the PWM comparator trips and the
control logic turns off the switch. The current limit comparator also turns off the switch if the current limit of the
High Side MOSFET switch is exceeded. After a dead time preventing shoot through current, the Low Side
MOSFET rectifier is turned on and the inductor current ramps down. The current flows now from the inductor to
the output capacitor and to the load. It returns to the inductor through the Low Side MOSFET rectifier.
The next cycle is initiated by the clock signal again turning off the Low Side MOSFET rectifier and turning on the
on the High Side MOSFET switch.
POWER SAVE MODE
The Power Save Mode is enabled with MODE Pin set to low level. If the load current decreases, the
converter will enter Power Save Mode operation automatically. During Power Save Mode the converter skips
switching and operates with reduced frequency in PFM mode with a minimum quiescent current to maintain
high efficiency. The converter will position the output voltage typically +1% above the nominal output voltage.
This voltage positioning feature minimizes voltage drops caused by a sudden load step.
The transition from PWM mode to PFM mode occurs once the inductor current in the Low Side MOSFET
switch becomes zero, which indicates discontinuous conduction mode.
During the Power Save Mode the output voltage is monitored with a PFM comparator. As the output voltage
falls below the PFM comparator threshold of VOUT nominal +1%, the device starts a PFM current pulse. For
this the High Side MOSFET switch will turn on and the inductor current ramps up. After the On-time expires,
the switch is turned off and the Low Side MOSFET switch is turned on until the inductor current becomes
zero.
The converter effectively delivers a current to the output capacitor and the load. If the load is below the
delivered current, the output voltage will rise. If the output voltage is equal or higher than the PFM
comparator threshold, the device stops switching and enters a sleep mode with typical 15µA current
consumption.
If the output voltage is still below the PFM comparator threshold, a sequence of further PFM current pulses
are generated until the PFM comparator threshold is reached. The converter starts switching again once the
output voltage drops below the PFM comparator threshold.
With a fast single threshold comparator, the output voltage ripple during PFM mode operation can be kept
small. The PFM Pulse is time controlled, which allows to modify the charge transferred to the output
capacitor by the value of the inductor. The resulting PFM output voltage ripple and PFM frequency depend in
first order on the size of the output capacitor and the inductor value. Increasing output capacitor values and
inductor values will minimize the output ripple. The PFM frequency decreases with smaller inductor values
and increases with larger values.
The PFM mode is left and PWM mode entered in case the output current can not longer be supported in
PFM mode. The Power Save Mode can be disabled through the MODE pin set to high. The converter will
then operate in fixed frequency PWM mode.
Dynamic Voltage Positioning
This feature reduces the voltage under/overshoots at load steps from light to heavy load and vice versa. It is
active in Power Save Mode and regulates the output voltage 1% higher than the nominal value. This provides
more headroom for both the voltage drop at a load step, and the voltage increase at a load throw-off.
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SLVS764C–JUNE 2007–REVISED MARCH 2008
Output voltage
Vout +1%
PFM Comparator
threshold
Voltage Positioning
Light load
PFM Mode
Vout (PWM)
moderate to heavy load
PWM Mode
Figure 19. Power Save Mode Operation
100% Duty Cycle Low Dropout Operation
The device starts to enter 100% duty cycle Mode once the input voltage comes close the nominal output voltage.
To maintain the output voltage, the High Side MOSFET switch is turned on 100% for one or more cycles.
With further decreasing VIN the High Side MOSFET switch is turned on completely. In this case, the converter
offers a low input-to-output voltage difference. This is particularly useful in battery-powered applications to
achieve longest operation time by taking full advantage of the whole battery voltage range.
The minimum input voltage to maintain regulation depends on the load current and output voltage, and can be
calculated as:
VINmin = VOmax + IOmax × RDS(on)max + RL)
With:
IOmax = maximum output current plus inductor ripple current
RDS(on)max = maximum P-channel switch RDS(on)
.
RL = DC resistance of the inductor
VOmax = nominal output voltage plus maximum output voltage tolerance
Undervoltage Lockout
The undervoltage lockout circuit prevents the device from malfunctioning at low input voltages and from
excessive discharge of the battery and disables the output stage of the converter. The undervoltage lockout
threshold is typically 1.85V with falling VIN.
MODE SELECTION
The MODE pin allows mode selection between forced PWM mode and Power Save Mode.
Connecting this pin to GND enables the Power Save Mode with automatic transition between PWM and PFM
mode. Pulling the MODE pin high forces the converter to operate in fixed frequency PWM mode even at light
load currents. This allows simple filtering of the switching frequency for noise sensitive applications. In this mode,
the efficiency is lower compared to the power save mode during light loads.
The condition of the MODE pin can be changed during operation and allows efficient power management by
adjusting the operation mode of the converter to the specific system requirements.
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SLVS764C–JUNE 2007–REVISED MARCH 2008
ENABLE
The device is enabled setting EN pin to high. During the start up time tStart Up the internal circuits are settled.
Afterwards, the device activates the soft start circuit. The EN input can be used to control power sequencing in a
system with various dc/dc converters. The EN pin can be connected to the output of another converter, to drive
the EN pin high and getting a sequencing of supply rails. With EN = GND, the device enters shutdown mode. In
this mode, all circuits are disabled. In fixed output voltage versions, the internal resistor divider network is
disconnected from FB pin.
SOFT START
The TPS6229x has an internal soft start circuit that controls the ramp up of the output voltage. The output
voltage ramps up from 5% to 95% of its nominal value within typical 250µs. This limits the inrush current in the
converter during ramp up and prevents possible input voltage drops when a battery or high impedance power
source is used. The soft start circuit is enabled within the start up time tStart Up
.
SHORT-CIRCUIT PROTECTION
The High Side and Low Side MOSFET switches are short-circuit protected with maximum switch current = ILIMF
.
The current in the switches is monitored by current limit comparators. Once the current in the High Side
MOSFET switch exceeds the threshold of it's current limit comparator, it turns off and the Low Side MOSFET
switch is activated to ramp down the current in the inductor and High Side MOSFET switch. The High Side
MOSFET switch can only turn on again, once the current in the Low Side MOSFET switch has decreased below
the threshold of its current limit comparator.
THERMAL SHUTDOWN
As soon as the junction temperature, TJ, exceeds 140°C (typical) the device goes into thermal shutdown. In this
mode, the High Side and Low Side MOSFETs are turned-off. The device continues its operation when the
junction temperature falls below the thermal shutdown hysteresis.
Copyright © 2007–2008, Texas Instruments Incorporated
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TPS62290, TPS62291, TPS62293
www.ti.com
SLVS764C–JUNE 2007–REVISED MARCH 2008
APPLICATION INFORMATION
L
1
TPS62290DRV
V
2.3 V to 6 V
IN
2.2 mH
V
1.8 V,
V
OUT
Up to 1A
IN
SW
C
1
R
C
1
IN
22 pF
EN
360 kW
10 mF
C
OUT
10 mF
FB
GND
R
2
MODE
180 kW
Figure 20. TPS62290DRV Adjustable 1.8 V
L
1
TPS62290DRV
V
3.3 V to 6 V
IN
2.2 mH
V
3.3 V,
V
OUT
Up to 1A
IN
SW
C
R
1
22 pF
1
C
IN
EN
820 kW
10 mF
C
OUT
FB
GND
10 mF
R
2
MODE
182 kW
Figure 21. TPS62290DRV Adjustable 3.3 V
TPS62291DRV
L1
2.2 mH
V
= 3.3 V to 6 V
IN
V
= 3.3 V
V
OUT
IN
SW
Up to 1 A
C
IN
10 mF
EN
C
OUT
10 mF
FB
GND
MODE
Figure 22.
L1
2.2 mH
TPS62293DRV
V
= 2.3 V to 6 V
IN
V
1.8 V
V
OUT
Up to 1 A
IN
SW
C
IN
10 mF
EN
C
OUT
10 mF
FB
GND
MODE
Figure 23.
14
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Product Folder Link(s): TPS62290 TPS62291 TPS62293
TPS62290, TPS62291, TPS62293
www.ti.com
SLVS764C–JUNE 2007–REVISED MARCH 2008
OUTPUT VOLTAGE SETTING
The output voltage can be calculated to:
R
1
ǒ1 ) Ǔ
V
+ V
OUT
REF
R
2
with an internal reference voltage VREF typical 0.6V.
To minimize the current through the feedback divider network, R2 should be 180 kΩ or 360 kΩ. The sum of R1
and R2 should not exceed ~1MΩ, to keep the network robust against noise. An external feed forward capacitor
C1 is required for optimum load transient response. The value of C1 should be in the range between 22pF and
33pF.
Route the FB line away from noise sources, such as the inductor or the SW line.
OUTPUT FILTER DESIGN (INDUCTOR AND OUTPUT CAPACITOR)
The TPS6229x is designed to operate with inductors in the range of 1.5µH to 4.7µH and with output capacitors in
the range of 4.7µF to 22µF. The part is optimized for operation with a 2.2µH inductor and 10µF output capacitor.
Larger or smaller inductor values can be used to optimize the performance of the device for specific operation
conditions. For stable operation, the L and C values of the output filter may not fall below 1µH effective
inductance and 3.5µF effective capacitance.
Inductor Selection
The inductor value has a direct effect on the ripple current. The selected inductor has to be rated for its dc
resistance and saturation current. The inductor ripple current (ΔIL) decreases with higher inductance and
increases with higher VI or VO.
The inductor selection has also impact on the output voltage ripple in PFM mode. Higher inductor values will lead
to lower output voltage ripple and higher PFM frequency, lower inductor values will lead to a higher output
voltage ripple but lower PFM frequency.
Equation 1 calculates the maximum inductor current under static load conditions. The saturation current of the
inductor should be rated higher than the maximum inductor current as calculated with Equation 2. This is
recommended because during heavy load transient the inductor current will rise above the calculated value.
Vout
Vin
1 *
DI + Vout
L
L ƒ
(1)
DI
L
I
+ I
)
outmax
Lmax
2
(2)
With:
f = Switching Frequency (2.25MHz typical)
L = Inductor Value
ΔIL = Peak to Peak inductor ripple current
ILmax = Maximum Inductor current
A more conservative approach is to select the inductor current rating just for the maximum switch current of the
corresponding converter.
Accepting larger values of ripple current allows the use of low inductance values, but results in higher output
voltage ripple, greater core losses, and lower output current capability.
The total losses of the coil have a strong impact on the efficiency of the dc/dc conversion and consist of both the
losses in the dc resistance (R(DC)) and the following frequency-dependent components:
•
•
•
•
The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies)
Additional losses in the conductor from the skin effect (current displacement at high frequencies)
Magnetic field losses of the neighboring windings (proximity effect)
Radiation losses
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SLVS764C–JUNE 2007–REVISED MARCH 2008
Table 2. List of Inductors
DIMENSIONS [mm3]
3 × 3 × 1.5
INDUCTOR TYPE
LPS3015
SUPPLIER
Coilcraft
MURATA
FDK
3 x 3 x 1.5
LQH3NPN2R2NM0
MIPSA3226D2R2
3.2 x 2.6 x 1.2
Output Capacitor Selection
The advanced fast-response voltage mode control scheme of the TPS6229x allows the use of tiny ceramic
capacitors. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are
recommended. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors,
aside from their wide variation in capacitance over temperature, become resistive at high frequencies.
At nominal load current, the device operates in PWM mode and the RMS ripple current is calculated as:
Vout
Vin
L ƒ
1 *
1
I
+ Vout
RMSCout
Ǹ
2 3
(3)
At nominal load current, the device operates in PWM mode and the overall output voltage ripple is the sum of the
voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and discharging the
output capacitor:
Vout
Vin
L ƒ
1 *
1
ǒ
) ESRǓ
DVout + Vout
8 Cout ƒ
(4)
At light load currents the converter operates in Power Save Mode and the output voltage ripple is dependent on
the output capacitor and inductor value. Larger output capacitor and inductor values minimize the voltage ripple
in PFM mode and tighten dc output accuracy in PFM mode.
Input Capacitor Selection
The buck converter has a natural pulsating input current; therefore, a low ESR input capacitor is required for best
input voltage filtering and minimizing the interference with other circuits caused by high input voltage spikes. For
most applications, a 10-µF ceramic capacitor is recommended. The input capacitor can be increased without any
limit for better input voltage filtering.
Take care when using only small ceramic input capacitors. When a ceramic capacitor is used at the input and the
power is being supplied through long wires, such as from a wall adapter, a load step at the output or VIN step on
the input can induce ringing at the VIN pin. The ringing can couple to the output and be mistaken as loop
instability or could even damage the part by exceeding the maximum ratings.
Table 3. List of Capacitor
CAPACITANCE
TYPE
SIZE
SUPPLIER
10µF
GRM188R60J106M69D
0603 1.6x0.8x0.8mm3
Murata
LAYOUT CONSIDERATIONS
As for all switching power supplies, the layout is an important step in the design. Proper function of the device
demands careful attention to PCB layout. Care must be taken in board layout to get the specified performance. If
the layout is not carefully done, the regulator could show poor line and/or load regulation, stability issues as well
as EMI problems. It is critical to provide a low inductance, impedance ground path. Therefore, use wide and
short traces for the main current paths. The input capacitor should be placed as close as possible to the IC pins
as well as the inductor and output capacitor.
Connect the GND Pin of the device to the Power Pad of the PCB and use this Pad as a star point. Use a
16
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TPS62290, TPS62291, TPS62293
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SLVS764C–JUNE 2007–REVISED MARCH 2008
common Power GND node and a different node for the Signal GND to minimize the effects of ground noise.
Connect these ground nodes together to the Power Pad (star point) underneath the IC. Keep the common path
to the GND PIN, which returns the small signal components and the high current of the output capacitors as
short as possible to avoid ground noise. The FB line should be connected right to the output capacitor and routed
away from noisy components and traces (e.g., SW line).
VOUT
GND
C1
R1
VIN
C
OUT
L
U
GND
Figure 24. Layout
Copyright © 2007–2008, Texas Instruments Incorporated
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Product Folder Link(s): TPS62290 TPS62291 TPS62293
PACKAGE OPTION ADDENDUM
www.ti.com
24-Mar-2008
PACKAGING INFORMATION
Orderable Device
TPS62290DRVR
TPS62290DRVRG4
TPS62290DRVT
TPS62290DRVTG4
TPS62291DRVR
TPS62291DRVT
TPS62293DRVR
TPS62293DRVRG4
TPS62293DRVT
TPS62293DRVTG4
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SON
DRV
6
6
6
6
6
6
6
6
6
6
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SON
SON
SON
SON
SON
SON
SON
SON
SON
DRV
DRV
DRV
DRV
DRV
DRV
DRV
DRV
DRV
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-May-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
TPS62290DRVR
TPS62290DRVR
TPS62290DRVT
TPS62290DRVT
TPS62291DRVR
TPS62291DRVT
TPS62293DRVR
TPS62293DRVT
SON
SON
SON
SON
SON
SON
SON
SON
DRV
DRV
DRV
DRV
DRV
DRV
DRV
DRV
6
6
6
6
6
6
6
6
3000
3000
250
330.0
179.0
180.0
179.0
179.0
179.0
179.0
179.0
12.4
8.4
12.4
8.4
8.4
8.4
8.4
8.4
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
2.2
1.1
1.2
1.1
1.2
1.2
1.2
1.2
1.2
8.0
4.0
8.0
4.0
4.0
4.0
4.0
4.0
12.0
8.0
12.0
8.0
8.0
8.0
8.0
8.0
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q2
250
3000
250
3000
250
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-May-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TPS62290DRVR
TPS62290DRVR
TPS62290DRVT
TPS62290DRVT
TPS62291DRVR
TPS62291DRVT
TPS62293DRVR
TPS62293DRVT
SON
SON
SON
SON
SON
SON
SON
SON
DRV
DRV
DRV
DRV
DRV
DRV
DRV
DRV
6
6
6
6
6
6
6
6
3000
3000
250
346.0
195.0
190.5
195.0
195.0
195.0
195.0
195.0
346.0
200.0
212.7
200.0
200.0
200.0
200.0
200.0
29.0
45.0
31.8
45.0
45.0
45.0
45.0
45.0
250
3000
250
3000
250
Pack Materials-Page 2
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相关型号：
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TI
TPS62291DRVRG4
1-A Step Down Converter in 2 x 2 SON PackageWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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TPS62291DRVT
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TPS62291DRVTG4
1-A Step Down Converter in 2 x 2 SON PackageWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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TPS62292
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TPS62293
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TPS62293-Q1
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TPS62293DRV
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TPS62293DRVR
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TPS62293DRVRG4
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TPS62293DRVT
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