TPS62684YFFT [TI]

针对小型解决方案尺寸优化的 1600mA、高效降压转换器 | YFF | 6 | -40 to 85;
TPS62684YFFT
型号: TPS62684YFFT
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

针对小型解决方案尺寸优化的 1600mA、高效降压转换器 | YFF | 6 | -40 to 85

转换器
文件: 总27页 (文件大小:1651K)
中文:  中文翻译
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TPS62684  
ZHCSCC2 APRIL 2014  
TPS62684 1600mA,高效降压转换器  
已针对最小解决方案尺寸进行优化  
1 特性  
3 说明  
1
3.25V 5.5V VIN 范围  
TPS62684 是一款已针对电池供电类便携式应用而进  
行优化的高频同步降压直流到直流转换器,在此类应用  
中,在极小的解决方案尺寸和高度内要求有高负载电  
流。 TPS62684 针对高效和低输出电压纹波进行优  
化,支持高达 1600mA 的负载电流,并且可使用低成  
本芯片电感器和电容器。 借助于 3.25V 5.5V 的输  
入电压范围,此器件支持由锂离子电池以及 5V 电源轨  
供电的应用。  
总体解决方案尺寸 < 12mm2  
需要三个表面贴装外部组件(一个 0805 片式多层  
陶瓷电容器 (MLCC) 电感器、两个小型陶瓷电容  
器)  
完整的 1mm 以下组件外形解决方案  
展频,脉宽调制 (PWM) 频率抖动  
同类产品最佳的 负载与线路瞬态  
直流电压总精度为 ±2%  
TPS62684 借助 PWM 展频功能以 5.5MHz 的频率运  
行。 对于噪声敏感应用,这一特性提供了一个低噪声  
经稳压输出,并且降低了输入上的噪声。 此器件支持  
2.85V 固定输出电压,从而无需外部反馈网络。  
高达 1600mA 负载电流  
5.5MHz 稳频运行  
采用 6 引脚 NanoFree™ 晶圆级芯片封装 (WCSP)  
2 应用范围  
这些特性与高电源抑制比 (PSRR) 和交流负载稳压性  
能组合在一起,使得该器件适合用来替代线性稳压器以  
获得更好的功率转换效率  
平板电脑  
手机、智能电话  
数字电视,无线网局域网 (WLAN),全球定位系统  
(GPS) Bluetooth® 应用范围  
器件信息  
订货编号  
封装  
封装尺寸  
芯片级球状引脚  
栅格阵列  
TPS62684YFF  
1.431mm x 1.135mm  
(DSBGA) (6)  
空格  
空格  
空格  
最小解决方案尺寸应用  
V
BAT  
TPS62684  
L
V
2.85 V  
3.25 V .. 5.5 V  
OUT =  
SW  
VIN  
0.47 mH  
C
I
FB  
AVIN  
EN  
C
O
1.5 mF  
10 mF  
GND  
1
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not necessarily include testing of all parameters.  
English Data Sheet: SLVSAC5  
 
 
TPS62684  
ZHCSCC2 APRIL 2014  
www.ti.com.cn  
效率与负载电流间的关系  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
TPS62684  
VOUT = 2.85V  
VIN = 3.3V  
VIN = 3.6V  
VIN = 4.2V  
VIN = 5.0V  
VIN = 5.5V  
1
10  
100  
Current (mA)  
1000 2000  
G000  
2
版权 © 2014, Texas Instruments Incorporated  
TPS62684  
www.ti.com.cn  
ZHCSCC2 APRIL 2014  
目录  
8.3 Feature Description................................................. 13  
8.4 Device Functional Modes........................................ 14  
Applications and Implementation ...................... 16  
9.1 Application Information............................................ 16  
9.2 Typical Application ................................................. 18  
1
2
3
4
5
6
特性.......................................................................... 1  
应用范围................................................................... 1  
说明.......................................................................... 1  
修订历史记录 ........................................................... 3  
Terminal Configuration and Functions................ 4  
Specifications......................................................... 4  
6.1 Absolute Maximum Ratings ...................................... 4  
6.2 Handling Ratings....................................................... 5  
6.3 Recommended Operating Conditions....................... 5  
6.4 Thermal Information ................................................. 5  
6.5 Electrical Characteristics........................................... 6  
6.6 Timing Requirements................................................ 6  
6.7 Typical Characteristics.............................................. 7  
Parameter Measurement Information ................ 11  
Detailed Description ............................................ 12  
8.1 Overview ................................................................. 12  
8.2 Functional Block Diagram ....................................... 12  
9
10 Power Supply Recommendations ..................... 19  
11 Layout................................................................... 19  
11.1 Layout Guidelines ................................................. 19  
11.2 Layout Example .................................................... 19  
11.3 Thermal, Lifetime Information and Maximum Output  
Current ..................................................................... 19  
12 器件和文档支持 ..................................................... 21  
12.1 器件支持................................................................ 21  
12.2 Trademarks........................................................... 21  
12.3 Electrostatic Discharge Caution............................ 21  
12.4 Glossary................................................................ 21  
13 机械封装和可订购信息 .......................................... 21  
7
8
4 修订历史记录  
日期  
修订版本  
注释  
2014 4 月  
*
最初发布。  
Copyright © 2014, Texas Instruments Incorporated  
3
 
TPS62684  
ZHCSCC2 APRIL 2014  
www.ti.com.cn  
Device Comparison Table  
PART  
NUMBER  
DEVICE SPECIFIC  
PACKAGE MARKING  
OUTPUT VOLTAGE  
FEATURE  
CHIP CODE  
PWM Spread Spectrum  
Modulation  
TPS62684  
2.85V  
D1  
Forced PWM  
Active Output Discharge  
5 Terminal Configuration and Functions  
6-Terminal YFF  
TPS62684  
YFF-6  
(TOP VIEW)  
TPS62684  
YFF-6  
(BOTTOM VIEW)  
VIN  
EN  
A2  
B2  
C2  
A1  
B1  
C1  
A1  
A2  
B2  
VIN  
EN  
AVIN  
SW  
AVIN  
B1  
C1  
SW  
FB  
GND  
C2 GND  
FB  
Terminal Functions  
TERMINAL  
NO.  
I/O  
DESCRIPTION  
NAME  
FB  
C1  
A2  
A1  
B1  
I
I
Output feedback sense input. Connect FB to the converter’s output.  
Power supply input. Make sure the decoupling capacitor is connected as close as possible  
between terminal VIN (A2) and GND (C2).  
VIN  
AVIN  
SW  
I
Bias supply input voltage pin. This pin must be connected to VIN (A2).  
This is the switch pin of the converter and is connected to the drain of the internal Power  
MOSFETs.  
I/O  
This is the enable pin of the device. Connecting this pin low forces the device into shutdown  
mode. Pulling this pin high enables the device. This pin must not be left floating and must be  
terminated. When EN is pulled low, the output capacitor is actively discharged by internal  
circuitry.  
EN  
B2  
C2  
I
GND  
-
Ground pin  
6 Specifications  
6.1 Absolute Maximum Ratings  
over operating free-air temperature range (unless otherwise noted)(1)  
MIN  
–0.3  
–0.3  
–0.3  
MAX  
6
UNIT  
Voltage at VIN(2)  
Voltage at FB(2)  
VI  
3.6  
V
(2)  
Voltage at SW, EN, AVIN  
VIN + 0.3  
890  
Continuous average output current(3)  
Peak output current(3)  
Operating junction temperature(4)  
mA  
mA  
°C  
1600  
150  
TJ  
-40  
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings  
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating  
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) All voltage values are with respect to network ground terminal.  
(3) Limit the junction temperature to 105°C.  
(4) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may  
have to be derated. Maximum ambient temperature (TA(max)) is dependent on the maximum operating junction temperature (TJ(max)), the  
maximum power dissipation of the device in the application (PD(max)), and the junction-to-ambient thermal resistance of the part/package  
in the application (θJA), as given by the following equation: TA(max)= TJ(max)–(θJA X PD(max)). To achieve full lifetime, it is recommended to  
operate the device with a maximum junction temperature of 105°C.  
4
Copyright © 2014, Texas Instruments Incorporated  
TPS62684  
www.ti.com.cn  
ZHCSCC2 APRIL 2014  
6.2 Handling Ratings  
MIN  
MAX  
UNIT  
Tstg  
Storage temperature range  
–65  
150  
2
°C  
Human body model  
Charge device model  
Machine model  
kV  
V
(1)  
ESD rating  
1
100  
(1) The human body model is a 100-pF capacitor discharged through a 1.5-kresistor into each pin. The machine model is a 200-pF  
capacitor discharged directly into each pin.  
6.3 Recommended Operating Conditions  
MIN NOM  
MAX UNIT  
VIN  
IO  
Input voltage range  
3.25  
0
5.5  
960  
V
VIN < VOUT,nom + 1V  
Peak output current(1)  
mA  
µF  
VOUT,nom + 1V VIN 5.5V  
0
1600  
CI  
L
Effective Input Capacitance(2)(3)  
Effective Inductance  
Effective Output Capacitance(2)  
Ambient temperature(4)  
0.5  
0.3  
1.2 µH  
30 µF  
CO  
TA  
TJ  
3.0  
–40  
–40  
5.0  
+85 °C  
+125 °C  
Operating junction temperature(5)  
(1) Operating beyond the continuous average output current of 890mA may decrease the lifetime. See the Thermal, Lifetime Information  
and Maximum Output Current section.  
(2) Due to the dc bias effect of ceramic capacitors, the effective capacitance is lower than the nominal value when a voltage is applied. The  
capacitance is specified to allow the selection of the appropriate capacitor taking into account its dc bias effect.  
(3) Larger values may be required if the source impedance can not support the transient requirements of the load.  
(4) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may  
have to be derated. Maximum ambient temperature (TA(max)) is dependent on the maximum operating junction temperature (TJ(max)), the  
maximum power dissipation of the device in the application (PD(max)), and the junction-to-ambient thermal resistance of the part/package  
in the application (θJA), as given by the following equation: TA(max)= TJ(max)–(θJA X PD(max)). To achieve full lifetime, it is recommended to  
operate the device with a maximum junction temperature of 105°C.  
(5) Limit the junction temperature to 105°C at 1.6A output current for a lifetime of 25k hours.  
6.4 Thermal Information  
TPS62684  
THERMAL METRIC(1)  
YFF  
UNIT  
6 TERMINALS  
RθJA  
Junction-to-ambient thermal resistance  
108.9  
1.0  
RθJC(top)  
RθJB  
Junction-to-case (top) thermal resistance  
Junction-to-board thermal resistance  
17.5  
4.1  
°C/W  
ψJT  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
Junction-to-case (bottom) thermal resistance  
ψJB  
17.5  
n/a  
RθJC(bot)  
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.  
Copyright © 2014, Texas Instruments Incorporated  
5
TPS62684  
ZHCSCC2 APRIL 2014  
www.ti.com.cn  
6.5 Electrical Characteristics  
Minimum and maximum values are at VI = 3.25V to 5.5V, EN = VIN and TA = –40°C to 85°C; Circuit of Parameter  
Measurement Information section (unless otherwise noted). Typical values are at VIN = 3.6V, EN = VIN and TA = 25°C  
(unless otherwise noted).  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX UNIT  
SUPPLY CURRENT into VIN + AVIN  
IQ  
Operating quiescent current  
Shutdown current  
IO = 0mA  
5.8  
0.2  
mA  
ISD  
EN = low; not including high side MOSFET leakage  
1.5  
2.3  
2.1  
μA  
V
VIN rising  
VIN falling  
2.1  
VUVLO  
Undervoltage lockout threshold  
1.95  
V
ENABLE  
VIH  
High-level input voltage  
Low-level input voltage  
Input leakage current  
0.9  
V
V
VIL  
0.4  
0.1  
Ilkg,EN  
EN connected to GND or VIN; TJ = –40°C to 85°C  
0.01  
μA  
POWER SWITCH  
RDS(on),HS High Side MOSFET on resistance  
Ilkg,HS  
RDS(on),LS  
Ilkg,LS  
VIN = 3.6V; TJ = –40°C to 125°C  
VIN = 2.5V  
95  
155  
mΩ  
mΩ  
μA  
170  
High Side MOSFET leakage current VIN = 5.5V; TJ = –40°C to 85°C  
2.6  
VIN = 3.6V; TJ = –40°C to 125°C  
VIN = 2.5V  
75  
155  
mΩ  
mΩ  
μA  
Low Side MOSFET on resistance  
Low Side MOSFET leakage current  
100  
VIN = 5.5V; TJ = –40°C to 85°C  
1
Resistor in parallel to Low Side  
MOSFET  
250  
12  
kΩ  
Discharge resistor for power-down  
sequence  
only active after a first power-up (EN = high to low  
after VIN applied)  
RDIS  
Average High Side MOSFET current  
limit  
1680  
2100  
150  
2850  
mA  
mA  
Input current limit under short-circuit  
conditions  
VOUT shorted to ground  
Thermal shutdown  
Temperature rising  
Temperature falling  
140  
10  
°C  
°C  
Thermal shutdown hysteresis  
OSCILLATOR  
fSW  
Nominal oscillator frequency  
IOUT = 0mA  
5.5  
MHz  
OUTPUT  
VOUT,nom  
Nominal output voltage  
Output voltage accuracy  
2.85  
V
V
0.98×VOUT,N  
1.02×VOUT,N  
3.25V VIN 3.85V, 0mA IO 960 mA  
3.85V VIN 5.5V, 0mA IO 1600 mA  
VOUT,NOM  
OM  
OM  
0.98×VOUT,N  
1.02×VOUT,N  
VOUT,NOM  
V
OM  
OM  
Line regulation  
VIN = VOUT + 0.5V (min 3.25V) to 5.5V, IO = 200 mA  
IO = 0mA to 1600 mA  
0.2  
–0.00085  
1.4  
%/V  
%/mA  
MΩ  
Load regulation  
FB pin input resistance  
6.6 Timing Requirements  
MIN  
TYP  
MAX UNIT  
IO = 0mA, Time from EN = high to start  
switching  
Start-up delay time  
120  
300  
µs  
µs  
µs  
tRAMP  
IO = 0mA, Time from start switching until 95% of  
nominal output voltage  
ramp time  
150  
300  
IO = 0mA, Time from EN = low to VO < 500mV,  
Effective Output Capacitance CO_effective = 5µF  
Shutdown time  
6
Copyright © 2014, Texas Instruments Incorporated  
TPS62684  
www.ti.com.cn  
ZHCSCC2 APRIL 2014  
6.7 Typical Characteristics  
TABLE OF GRAPHS  
FIGURE  
Figure 1, Figure 2, Figure 3,  
Figure 4  
vs Load current  
vs Input voltage  
η
Efficiency  
Figure 5  
Figure 8, Figure 9, Figure 10,  
Figure 11, Figure 12,  
Load transient response  
Figure 13, Figure 14  
AC load transient response  
Line Transient Response  
DC output voltage  
Figure 15  
Figure 16  
VOUT  
fsw  
vs Load current  
vs Input voltage  
vs Load Current  
Figure 6, Figure 7  
Figure 17  
PWM switching frequency  
PWM switching frequency  
PWM operation  
Figure 18  
Figure 19  
Spread spectrum frequency  
modulation operation  
Figure 20  
Start-up  
Figure 21, Figure 22  
Figure 23  
Shutdown  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
VIN = 3.3V  
VIN = 3.6V  
VIN = 4.2V  
VIN = 5.0V  
VIN = 5.5V  
VIN = 3.3V  
VIN = 3.6V  
VIN = 4.2V  
VIN = 5.0V  
VIN = 5.5V  
TPS62684  
VOUT = 2.85V  
L = DFE252012P−R47M (TOKO)  
TPS62684  
VOUT = 2.85V  
L = MDT2012-CRR56M (TOKO)  
1
10  
100  
Current (mA)  
1000 2000  
1
10  
100  
Current (mA)  
1000 2000  
G000  
G000  
Figure 1. Efficiency Vs Load Current  
Figure 2. Efficiency Vs Load Current  
Copyright © 2014, Texas Instruments Incorporated  
7
 
 
TPS62684  
ZHCSCC2 APRIL 2014  
www.ti.com.cn  
Typical Characteristics (continued)  
100  
100  
98  
96  
94  
92  
90  
88  
86  
84  
82  
80  
TPS62684  
VOUT = 2.85V  
TPS62684  
VOUT = 2.85V  
90  
80  
70  
60  
50  
40  
30  
20  
VIN = 5.0V (MDT2012-CRR56)  
VIN = 5.0V (DFE252012P−R47)  
VIN = 5.0V (MDT2012-CRR56)  
VIN = 5.0V (DFE252012P−R47)  
VIN = 3.6V (MDT2012-CRR56)  
VIN = 3.6V (DFE252012P−R47)  
10  
VIN = 3.6V (MDT2012-CRR56)  
VIN = 3.6V (DFE252012P−R47)  
0
1
10  
100  
1000 2000  
100  
1000  
2000  
Current (mA)  
Current (mA)  
G000  
G000  
Figure 3. Efficiency Vs Load Current  
Figure 4. Efficiency Vs Load Current  
100  
2.94  
TPS62684  
VOUT = 2.85V  
L = DFE252012P-R47  
TPS62684  
VOUT = 2.85 V  
98  
96  
94  
92  
90  
88  
86  
84  
82  
80  
2.91  
2.88  
2.85  
2.82  
2.79  
2.76  
VIN = 3.6V  
VIN = 4.2V  
VIN = 5.0V  
VIN = 5.5V  
Load = 400mA  
Load = 800mA  
Load = 1600mA  
3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5  
Input Voltage (V)  
0.1  
1
10  
100  
1000 3000  
Load Current (mA)  
G000  
G000  
Figure 5. Efficiency Vs Input Voltage  
Figure 6. Output Voltage Vs Load Current  
2.94  
2.91  
2.88  
2.85  
2.82  
2.79  
2.76  
V
= 5.0 V, VO = 2.85V  
TPS62684  
VIN = 5 V  
VOUT = 2.85 V  
I
10mA to 400mA Load Step  
100ns trise/tfall  
Temp −40C  
Temp+25C  
Temp +85C  
0.1  
1
10  
100  
1000 3000  
Load Current (mA)  
G000  
Figure 8. Load Transient Response  
Figure 7. Output Voltage Vs Load Current  
8
Copyright © 2014, Texas Instruments Incorporated  
TPS62684  
www.ti.com.cn  
ZHCSCC2 APRIL 2014  
Typical Characteristics (continued)  
V
= 3.6 V, VO = 2.85V  
V
= 5.0 V, VO = 2.85V  
I
I
10mA to 400mA Load Step  
100ns trise/tfall  
10mA to 800mA Load Step  
100ns trise/tfall  
Figure 9. Load Transient Response  
Figure 10. Load Transient Response  
V
= 3.6 V, VO = 2.85V  
V
= 5.0 V, VO = 2.85V  
I
I
10mA to 800mA Load Step  
100ns trise/tfall  
10mA to 1600mA Load Step  
100ns trise/tfall  
Figure 11. Load Transient Response  
Figure 12. Load Transient Response  
V
= 5.0 V, VO = 2.85V  
V = 5.0 V, VO = 2.85V  
I
I
400mA to 1600mA Load Step  
200ns tfall  
400mA to 1600mA Load Step  
200ns trise  
Figure 13. Load Transient Response  
Figure 14. Load Transient Response  
Copyright © 2014, Texas Instruments Incorporated  
9
TPS62684  
ZHCSCC2 APRIL 2014  
www.ti.com.cn  
Typical Characteristics (continued)  
V
V
= 5.0 V,  
VO = 2.85V  
No Load  
I
= 2.85 V  
O
4.75V to 5.25V Line Step  
5us trise/tfall  
5mA to 1600mA Load Sweep  
Figure 15. AC Load Transient Response  
Figure 16. Line Transient Response  
6500  
6500  
6000  
5500  
5000  
4500  
4000  
3500  
3000  
TPS62684  
VOUT = 2.85V  
TPS62684  
VOUT = 2.85V  
6000  
5500  
5000  
4500  
4000  
3500  
3000  
Load = 1mA  
Load = 100mA  
Load = 400mA  
Load = 800mA  
VIN = 4.2V  
VIN = 5.0V  
VIN = 5.5V  
3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5  
Input Voltage (V)  
0.1  
1
10  
100  
1000 3000  
Load Current (mA)  
G000  
G000  
Figure 17. PWM Switching Frequency Vs Input Voltage  
Figure 18. PWM Switching Frequency Vs Load Current  
V
= 5.0 V,  
V
V
= 5.0 V,  
I
I
V
= 2.85 V  
= 2.85 V  
O
O
No Load  
No Load  
Figure 19. PWM Operation  
Figure 20. Spread Spectrum Frequency Modulation  
Operation  
10  
Copyright © 2014, Texas Instruments Incorporated  
TPS62684  
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ZHCSCC2 APRIL 2014  
Typical Characteristics (continued)  
V
= 5.0 V,  
I
VO = 2.85V  
No Load  
V
= 5.0 V,  
I
VO = 2.85V  
Load 6 Ohm  
Figure 21. Start-Up  
Figure 22. Start-Up  
V
= 5.0 V,  
I
VO = 2.85V  
No Load  
Figure 23. Shutdown  
7 Parameter Measurement Information  
TPS62684  
L
VIN  
V
OUT  
SW  
VIN  
FB  
AVIN  
C
I
C
O
EN  
GND  
List of components:  
L = TOKO MDT2012-CRR56M (if not otherwise noted)  
CI = MURATA GRM155R60J155ME80D (1.5μF, 6.3V, 0402, X5R)  
CO = MURATA GRM188R60J106ME84D (10μF, 6.3V, 0603, X5R)  
Copyright © 2014, Texas Instruments Incorporated  
11  
TPS62684  
ZHCSCC2 APRIL 2014  
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8 Detailed Description  
8.1 Overview  
8.1.1 Operation  
The TPS62684 is a synchronous step-down converter typically operating at a regulated 5.5-MHz pulse width  
modulation (PWM) frequency.  
The converter uses a unique frequency locked ring oscillating modulator to achieve best-in-class load and line  
response which allows the use of tiny inductors and small ceramic input and output capacitors. At the beginning  
of each switching cycle, the N-channel high side MOSFET switch is turned on and the inductor current ramps up.  
This raises the output voltage until the main comparator trips; then the control logic turns off the switch.  
One key advantage of the non-linear architecture that there is no traditional feedback loop. The loop response  
time to a change in VOUT is essentially instantaneous. The absence of a traditional, high-gain compensated linear  
loop means that the TPS62684 is inherently stable over a range of L and CO.  
8.1.2 Switching Frequency  
When high or low duty cycles are encountered, the loop runs out of range and the conversion frequency falls  
below 5.5MHz. The tendency is for the converter to operate more towards a "constant inductor peak current"  
rather than a "constant frequency". In addition to this behavior which is observed at high duty cycles, it is also  
noted at low duty cycles.  
When the converter is required to operate towards the 5.5MHz nominal at extreme duty cycles, the application is  
assisted by decreasing the ratio of inductance (L) to the output capacitor's equivalent series inductance (ESL).  
This increases the ESL step seen at the FB pin input, decreasing the propagation delay which increases the  
switching frequency.  
8.2 Functional Block Diagram  
EN  
VIN  
Undervoltage  
Lockout  
Bias Supply  
AVIN  
Soft-Start  
Bandgap  
V
= 0.8 V  
REF  
Control Logic  
Average Current  
Limit Detect  
Thermal  
Shutdown  
Frequency  
Control  
SSFM  
R
1
FB  
-
Gate Driver  
SW  
Anti  
Shoot-Through  
R
V
2
REF  
+
GND  
12  
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TPS62684  
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8.3 Feature Description  
8.3.1 Spread Spectrum, PWM Frequency Dithering  
The goal is to spread out the emitted RF energy over a larger frequency range, so that the resulting EMI is  
similar to white noise. The end result is a spectrum that is continuous and lower in peak amplitude, making it  
easier to comply with electromagnetic interference (EMI) standards and with power supply ripple requirements in  
cellular and non-cellular wireless applications. Radio receivers are typically susceptible to narrowband noise that  
is focused on specific frequencies.  
Switching regulators can be particularly troublesome in applications where electromagnetic interference (EMI) is  
a concern. Switching regulators operate on a cycle-by-cycle basis to transfer power to their output. In most  
cases, the frequency of operation is either fixed or regulated, based on the output load. This method of  
conversion creates large components of noise at the frequency of operation (fundamental) and multiples of the  
operating frequency (harmonics).  
The spread spectrum architecture varies the switching frequency by around ±10% of the nominal switching  
frequency, thereby significantly reducing the peak radiated and conducted noise on both the input and output  
supplies. The frequency dithering scheme is modulated with a triangle profile and a modulation frequency fm.  
0 dBV  
F
Dfc  
ENV,PEAK  
Dfc  
Non-modulated harmonic  
F
1
Side-band harmonics  
window after modulation  
0 dBVref  
B = 2×fm ×(1+ mf )= 2×(Dfc + fm )  
Bh = 2×fm ×(1+ mf ×h)  
B = 2×fm ×(1+ mf )= 2×(Dfc + fm )  
Figure 24. Spectrum Of A Frequency Modulated  
Sin. Wave With Sinusoidal Variation In Time  
Figure 25. Spread Bands Of Harmonics In  
(1)  
Modulated Square Signals  
The above figures show that after modulation the side-band harmonic is attenuated compared to the non-  
modulated harmonic, and the harmonic energy is spread into a certain frequency band. The higher the  
modulation index (mf), the larger the attenuation.  
δ ´ ƒc  
mƒ  
=
ƒm  
(1)  
where:  
fc is the carrier frequency (5.5MHz)  
fm is the modulating frequency (approx. 0.008*fc)  
δ is the modulation ratio (approx 0.1)  
Dƒc  
d =  
ƒc  
(2)  
The maximum switching frequency fc is limited by the device and finally the parameter modulation ratio (δ),  
together with fm , which is the side-band harmonic´s bandwidth around the carrier frequency fc . The bandwidth of  
a frequency modulated waveform is approximately given by Carson’s rule and is summarized as:  
B = 2 ´ ¦m ´ 1 + m = 2 ´ D¦ + ¦m  
(
)
(
)
¦
c
(3)  
13  
(1) Spectrum illustrations and formulae (Figure 24 and Figure 25) copyright IEEE TRANSACTIONS ON ELECTROMAGNETIC  
COMPATIBILITY, VOL. 47, NO.3, AUGUST 2005. See References Section for full citation.  
Copyright © 2014, Texas Instruments Incorporated  
 
TPS62684  
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Feature Description (continued)  
fm < RBW (resolution bandwidth): The receiver is not able to distinguish individual side-band harmonics, so,  
several harmonics are added in the input filter and the measured value is higher than expected in theoretical  
calculations.  
fm > RBW: The receiver is able to properly measure each individual side-band harmonic separately, so the  
measurements match with the theoretical calculations.  
8.4 Device Functional Modes  
8.4.1 Enable  
The TPS62684 device starts operation when EN is set high. For proper operation, the EN pin must be terminated  
and must not be left floating. The device should only be enabled when the input voltage is stable and has  
ramped above its minimum supply of 3.25V.  
Pulling the EN pin low forces the device into shutdown, with a shutdown current of typically 0.2μA. In this mode,  
the internal high side and low side MOSFETs are turned off, the internal resistor feedback divider is  
disconnected, and the entire internal-control circuitry is switched off. The TPS62684 device actively discharges  
the output capacitor when it turns off. The integrated discharge resistor has a typical resistance of 12. This  
internal discharge transistor is only turned on after the device had been enabled at least once. The required time  
to discharge the output capacitor at the output node depends on load current and the effective output  
capacitance. The TPS62684 is designed such that it can start into a pre-biased output, in case the output  
discharge circuit was active for too short a time to fully discharge the output capacitor. In this case, the converter  
starts switching as soon as the internal reference has approximately reached the equivalent voltage to the output  
voltage present. It then ramps the output from that voltage level to its target value.  
8.4.2 Soft Start  
The TPS62684 has an internal soft start circuit that controls the ramp up of the output voltage. Once the  
converter is enabled and the input voltage is above the undervoltage lockout threshold VUVLO, the output voltage  
ramps up to 95% of its nominal value within tRamp of typ. 150μs. This ensures a controlled ramp up of the output  
voltage and limits the input voltage drop when a battery or a high-impedance power source is connected to the  
input of the DC/DC converter.  
The inrush current during start-up is directly related to the effective capacitance and load present at the output of  
the converter.  
During soft start, the current limit is reduced to 2/3 of its nominal value. Once the internal reference voltage has  
reached 90% of its target value, the current limit is set to its nominal target value.  
8.4.3 Undervoltage Lockout  
The undervoltage lockout circuit prevents the device from misoperation at low input voltages. It prevents the  
converter from turning on either MOSFET under undefined conditions. The TPS62684 has a rising UVLO  
threshold of 2.1V (typical).  
8.4.4 Short-Circuit Protection  
The TPS62684 integrates current limit circuitry to protect the device against heavy load or short circuits. When  
the average current in the high side MOSFET reaches its current limit, the high side MOSFET is turned off and  
the low side MOSFET is turned on ramping down the inductor current.  
As soon as the converter detects a short circuit condition it shuts down. After a delay of approximately 20 µs, the  
converter restarts. In case the short circuit condition remains, the converter shuts down again after hitting the  
current limit threshold. In case the short circuit condition remains present on the converters output, the converter  
periodically re-starts with a small duty cycle as the output voltage is zero and shuts down again, thereby limiting  
the current drawn from the input.  
14  
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Device Functional Modes (continued)  
8.4.5 Thermal Shutdown  
As soon as the junction temperature, TJ, exceeds typically 140°C, the device goes into thermal shutdown. In this  
mode, the power stage is turned off. The device continues its operation when the junction temperature falls  
below typically 130°C.  
Copyright © 2014, Texas Instruments Incorporated  
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TPS62684  
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9 Applications and Implementation  
9.1 Application Information  
9.1.1 Inductor Selection  
The TPS62684 series of step-down converters have been optimized to operate with an effective inductance  
value in the range of 0.3μH to 1.2μH and with output capacitors in the range of 3μF up to 30μF effective  
capacitance. The internal compensation is optimized to operate with an output filter of Lnominal = 0.47μH or  
0.56μH and CO_effective = 5μF. Larger or smaller inductor values can be used to optimize the performance of the  
device for specific operation conditions. For more details, see the CHECKING LOOP STABILITY section.  
The inductor value affects its peak-to-peak ripple current, the output voltage ripple and the efficiency. The  
selected inductor has to be rated for its dc resistance and saturation current. The inductor ripple current (ΔIL)  
decreases with higher inductance and increases with higher VIN or VOUT  
.
with: fSW = switching frequency (5.5 MHz typical)  
L = inductor value  
ΔIL = peak-to-peak inductor ripple current  
IL(MAX) = maximum inductor current  
(4)  
In high-frequency converter applications, the efficiency is primarily affected by the inductor AC resistance (i.e.  
quality factor) and to a smaller extent by the inductor DCR value. To achieve high efficiency operation, care  
should be taken in selecting inductors featuring a quality factor above 25 at the switching frequency. Increasing  
the inductor value produces lower RMS currents, but degrades transient response. For a given physical inductor  
size, increased inductance usually results in an inductor with lower saturation current.  
The total inductor losses consist of both the losses in the DC resistance (DCR) and the following frequency-  
dependent components:  
The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies)  
Additional losses in the conductor from the skin effect (current displacement at high frequencies)  
Magnetic field losses of the neighboring windings (proximity effect)  
Radiation losses  
For smallest solution size a 0805 size (2mm x 1.2mm) chip inductor can be used. Please note that the DC  
resistance of the inductor is directly related to its volume (LxWxH). Therefore designing for smallest solution size  
negatively impacts the overall efficiency at heavy load currents.  
The following inductor series from different suppliers have been used with the TPS62684 converter.  
Table 1. List Of Inductors(1)  
MANUFACTURER  
SERIES  
DIMENSIONS (in mm)  
2.0 x 1.2 x 1.0 max. height  
2.5 x 2.0 x 1.2 max. height  
2.0 x 1.2 x 1.0 max. height  
2.0 x 1.6 x 1.0 max. height  
TOKO  
MDT2012-CRR56N  
DFE252012P-R47(2)  
LQM21PNR47MGO  
LQM2MPNR47MGH  
MURATA  
(1) See Third-Party Products Disclaimer  
(2) Planned to be available in mass production by Q2/2014. Contact manufacturer for details.  
16  
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9.1.2 Output Capacitor Selection  
The advanced fast-response voltage mode control scheme of the TPS62684 allows the use of tiny ceramic  
capacitors. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are  
recommended. For best performance, the device should be operated with a minimum effective output  
capacitance of 5μF. A total effective output capacitance between 3μF and 30μF is required. The output capacitor  
requires either an X7R or X5R dielectric. Y5V and Z5U dielectric capacitors, aside from their wide variation in  
capacitance over temperature, become resistive at high frequencies.  
The device operates in PWM mode and the overall output voltage ripple is the sum of the voltage step caused by  
the output capacitor ESL and the ripple current flowing through the output capacitor impedance.  
9.1.3 Output Filter Design  
The inductor and the output capacitor build the output filter. As recommended in the output capacitor and  
inductor sections, these components should be in the range:  
CO = 3µF to 30µF (total effective capacitance)  
L = 0.3 µH to 1.2 µH (effective inductance)  
For best transient performance, the internal control stage is optimized for a LCO product of 0.5µH x 10µF  
(nominal values).  
9.1.4 Input Capacitor Selection  
Because the nature of the buck converter has a pulsating input current, a low ESR input capacitor is required to  
prevent large voltage transients that cause misbehavior of the device or interferences with other circuits in the  
system. For most applications, a 1.5-μF nominal capacitor (0.5μF effective capacitance) with a X5R or X7R  
dielectric is sufficient. If the application exhibits a noisy or erratic switching frequency, the remedy is likely found  
by increasing the value of the input capacitor.  
Take care when using only ceramic input capacitors. When a ceramic capacitor is used at the input and the  
power is being supplied through long wires, such as from a wall adapter, a load step at the output can induce  
ringing at the VIN pin. This ringing can couple to the output and be mistaken as loop instability or could even  
damage the part. Additional "bulk" capacitance (electrolytic or tantalum) should in this circumstance be placed  
between CI and the power source lead to reduce ringing than occurs between the inductance of the power  
source leads and CI.  
9.1.5 Checking Loop Stability  
The first step of circuit and stability evaluation is to look, from a steady-state perspective, at the following signals:  
Switching node, SW  
Inductor current, IL  
Output ripple voltage, VOUT(AC)  
These are the basic signals that need to be measured when evaluating a switching converter. When the  
switching waveform shows large duty cycle jitter or the output voltage or inductor current shows oscillations, the  
regulation loop may be unstable. This is typically caused by board layout and/or LCO combination.  
As a next step in the evaluation of the regulation loop, the load transient response is tested. The time between  
the application of the load transient and the turn on of the high side MOSFET, the output capacitor supplies all of  
the current required by the load. VOUT immediately shifts by an amount equal to ΔI(LOAD) x ESR, where ESR is  
the effective series resistance of CO. ΔI(LOAD) begins to charge or discharge CO generating a feedback error  
signal used by the regulator to return VOUT to its steady-state value.  
During this recovery time, VOUT can be monitored for settling time, overshoot or ringing that helps judge the  
converter’s stability. Without any ringing, the loop usually has more than 45° of phase margin.  
Because the damping factor of the circuitry is directly related to several resistive parameters (e.g., MOSFET  
RDS(on)) that are temperature dependent, the loop stability analysis should be done over the input voltage range,  
load current range, and temperature range.  
Copyright © 2014, Texas Instruments Incorporated  
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9.2 Typical Application  
V
2.85 V  
OUT =  
@ up to 1600mA peak  
TPS62684  
L
V
5.0V  
BAT =  
SW  
VIN  
0.47 mH  
C
FB  
AVIN  
EN  
I
C
O
1.5 mF  
10 mF  
GND  
Figure 26. Typical Application Circuit  
9.2.1 Design Requirements  
Figure 26 shows the schematic of the typical application. The TPS62684 allows the design of a power supply  
with small solution size. In order to properly dissipate the heat, wide copper traces for the power connections  
should be used to distribute the heat across the PCB. If possible, a GND plane should be used as it provides a  
low impedance connection as well as serves as a heat sink. The EN pin should be set high after the supply  
voltage has ramped to at least the minimum input voltage level of 3.25V.  
9.2.2 Detailed Design Procedure  
The TPS62684 allows the design of a complete power supply with only 3 small external components. A X5R or  
X7R ceramic input capacitor close to the VIN pin and GND pin with a nominal value of 1.5uF or higher is  
required. The input capacitance can be increased in case the source impedance is large or if there are high load  
transients expected at the output. The inductor should be placed close to the SW node with a saturation current  
above the current limit. A X5R or X7R ceramic output capacitor should be placed close to the inductor terminal  
and GND. A low impedance GND connection on the output capacitor is required. The feedback (FB) pin should  
be routed to the terminal of the output capacitor. The dc bias effect of the input and output capacitors must be  
taken into account and the total capacitance on the output must not exceed the value given in the recommended  
operating conditions.  
9.2.3 Application Curves  
V
= 5.0 V, VO = 2.85V  
VO = 2.85V  
No Load  
I
4.5V to 5.5V Line Step  
5us trise/tfall  
400mA to 1600mA Load Step  
100ns trise/tfall  
Figure 27. Load Transient Response  
Figure 28. Line Transient Response  
18  
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10 Power Supply Recommendations  
The input voltage range is from 3.25V to 5.5V. The input power supply and the input capacitor(s) should be  
located as close to the device as possible to minimize the impedance of the power-supply line.  
11 Layout  
11.1 Layout Guidelines  
As for all switching power supplies, the layout is an important step in the design. High-speed operation of the  
TPS62684 demands careful attention to PCB layout. Care must be taken in board layout to get the specified  
performance. If the layout is not carefully done, the regulator could show poor line and/or load regulation, stability  
and switching frequency issues as well as EMI problems. It is critical to provide a low inductance, low impedance  
ground path. Therefore, use wide and short traces for the main current paths.  
The input capacitor as well as the inductor and output capacitor should be placed as close as possible to the IC  
pins. The feedback line should be routed away from noisy components and traces (e.g. SW line).  
Figure 29 shows the recommended layout using a 0805 (2.0 mm x 1.2 mm) chip inductor, a 0402 input capacitor  
and a 0603 output capacitor. Total solution size is 12mm².  
11.2 Layout Example  
AVIN  
VIN  
CI  
L
ENABLE  
CO  
GND  
VOUT  
Figure 29. Suggested Layout (Top)  
11.3 Thermal, Lifetime Information and Maximum Output Current  
Implementation of integrated circuits in wafer chipscale packages requires special attention to power dissipation.  
Many system-dependent issues such as thermal coupling, airflow, added heat sinks, and convection surfaces,  
and the presence of other heat-generating components, affect the power-dissipation limits of a given component.  
Three basic approaches for enhancing thermal performance are listed below:  
Improving the power dissipation capability of the PCB design  
Improving the thermal coupling of the component to the PCB  
Introducing airflow into the system  
The maximum recommended junction temperature (TJ) of the TPS62684 for full 100k hour lifetime is 105°C. The  
thermal resistance of the 6-pin WCSP package (YFF-6) is RθJA = 108.9°C/W. Regulator operation is specified to  
a maximum steady-state ambient temperature TA of 85°C. Therefore, the maximum power dissipation at  
TJ=105°C is about 180 mW and at TJ=125°C is about 367mW.  
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Thermal, Lifetime Information and Maximum Output Current (continued)  
(5)  
Proper PCB layout with a focus on thermal performance results in a reduced junction-to-ambient thermal  
resistance RθJA and thereby reduces the device junction temperature, TJ.  
The maximum peak output current of 1600mA for TPS62684 is defined by its internal current limit. The maximum  
dc output current over lifetime (100k hours at TJ= 105°C) is 890mA. The device can supply peak output currents  
above 890mA, so long as there are corresponding output currents below 890mA such that the average output  
current remains below 890mA, while keeping the junction temperature below 105°C. Operating at output currents  
above 890mA at junction temperatures above 105°C reduces the lifetime by electromigration effects.  
For output currents above 960mA, a minimum supply voltage of 3.85V is recommended.  
20  
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TPS62684  
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12 器件和文档支持  
12.1 器件支持  
12.1.1 Third-Party Products Disclaimer  
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT  
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES  
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER  
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.  
12.1.2 参考书目  
使用频率调制技术的开关电源转换器中的电磁干扰 (EMI) 减少《电气与电子工程师协会 (IEEE) 电磁兼容性汇  
刊》,卷4NO.32005  
8 月,第 569-576 作者 Josep BalcellsAlfonso SantolariaAntonio  
OrlandiDavid GonzálezJavier Gago。  
12.2 Trademarks  
NanoFree is a trademark of Texas Instruments.  
Bluetooth is a registered trademark of Bluetooth SIG, Inc.  
12.3 Electrostatic Discharge Caution  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
12.4 Glossary  
SLYZ022 TI Glossary.  
This glossary lists and explains terms, acronyms and definitions.  
13 机械封装和可订购信息  
以下页中包括机械封装和可订购信息。 这些信息是针对指定器件可提供的最新数据。 这些数据会在无通知且不对  
本文档进行修订的情况下发生改变。 要获得这份数据表的浏览器版本,请查阅左侧导航栏。  
Copyright © 2014, Texas Instruments Incorporated  
21  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
TPS62684YFFR  
TPS62684YFFT  
ACTIVE  
ACTIVE  
DSBGA  
DSBGA  
YFF  
YFF  
6
6
3000 RoHS & Green  
250 RoHS & Green  
SNAGCU  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 85  
-40 to 85  
D1  
D1  
SNAGCU  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
Addendum-Page 2  
PACKAGE OUTLINE  
YFF0006  
DSBGA - 0.625 mm max height  
SCALE 10.500  
DIE SIZE BALL GRID ARRAY  
A
B
E
BALL A1  
CORNER  
D
0.625 MAX  
C
SEATING PLANE  
0.05 C  
0.30  
0.12  
BALL TYP  
0.4 TYP  
C
B
SYMM  
0.8  
D: Max = 1.434 mm, Min =1.374 mm  
E: Max = 1.138 mm, Min =1.078 mm  
TYP  
0.4 TYP  
A
0.3  
6X  
2
1
0.2  
SYMM  
0.015  
C A B  
4223785/A 06/2017  
NOTES:  
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing  
per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
YFF0006  
DSBGA - 0.625 mm max height  
DIE SIZE BALL GRID ARRAY  
(0.4) TYP  
6X ( 0.23)  
(0.4) TYP  
1
2
A
SYMM  
B
C
SYMM  
LAND PATTERN EXAMPLE  
EXPOSED METAL SHOWN  
SCALE:30X  
0.05 MAX  
0.05 MIN  
METAL UNDER  
SOLDER MASK  
(
0.23)  
METAL  
EXPOSED  
METAL  
EXPOSED  
METAL  
(
0.23)  
SOLDER MASK  
OPENING  
SOLDER MASK  
OPENING  
NON-SOLDER MASK  
DEFINED  
SOLDER MASK  
DEFINED  
(PREFERRED)  
SOLDER MASK DETAILS  
NOT TO SCALE  
4223785/A 06/2017  
NOTES: (continued)  
3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints. For more information,  
see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009).  
www.ti.com  
EXAMPLE STENCIL DESIGN  
YFF0006  
DSBGA - 0.625 mm max height  
DIE SIZE BALL GRID ARRAY  
(0.4) TYP  
2
6X ( 0.25)  
(0.4) TYP  
(R0.05) TYP  
1
A
B
SYMM  
METAL  
TYP  
C
SYMM  
SOLDER PASTE EXAMPLE  
BASED ON 0.1 mm THICK STENCIL  
SCALE:35X  
4223785/A 06/2017  
NOTES: (continued)  
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.  
www.ti.com  
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