TPS62806YKAT [TI]

1.75-V to 5.5-V input, 600-mA ultra-low IQ step-down converter in 0.7-mm x 1.05-mm WCSP | YKA | 6 | -40 to 125;
TPS62806YKAT
型号: TPS62806YKAT
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

1.75-V to 5.5-V input, 600-mA ultra-low IQ step-down converter in 0.7-mm x 1.05-mm WCSP | YKA | 6 | -40 to 125

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TPS62800, TPS62801, TPS62802, TPS62806, TPS62807, TPS62808  
SLVSDD1F – DECEMBER 2017 – REVISED JUNE 2022  
TPS6280x 1.75-V to 5.5-V, 0.6-A/1-A, 2.3-µA IQ Step Down Converter  
6-Pin, 0.35-mm Pitch WCSP Package  
1 Features  
3 Description  
1.75-V to 5.5-V input voltage range  
2.3-µA operating quiescent current  
Up to 4-MHz switching frequency  
0.6-A or 1-A output current  
1% output voltage accuracy  
Selectable power save and forced PWM mode  
R2D converter for flexible VOUT setting  
16 selectable and one fixed output voltages  
– TPS62800 (4 MHz): 0.4 V to 0.775 V  
– TPS62801 (4 MHz): 0.8 V to 1.55 V  
– TPS62802 (4 MHz): 1.8 V to 3.3 V  
– TPS62806 (1.5 MHz): 0.4 V to 0.775 V  
– TPS62807 (1.5 MHz): 0.8 V to 1.55 V  
– TPS62808 (1.5 MHz): 1.8 V to 3.3 V  
Smart enable pin  
The TPS6280x device family is a step-down converter  
with 2.3-µA typical quiescent current featuring the  
highest efficiency and smallest solution size. TI's  
DCS-Controltopology enables the device to operate  
with tiny inductors and capacitors with a switching  
frequency up to 4 MHz. At light load conditions, the  
device seamlessly enters power save mode to reduce  
switching cycles and maintain high efficiency.  
Connecting the VSEL/MODE pin to GND selects a  
fixed output voltage. With only one external resistor  
connected to VSEL/MODE pin, 16 internally set  
output voltages can be selected. An integrated R2D  
(resistor-to-digital) converter reads out the external  
resistor and sets the output voltage. The same device  
part number can be used for different applications  
and voltage rails just by changing a single resistor.  
Furthermore, the internally set output voltage provides  
better accuracy compared to a traditional external  
resistor divider network. Once the device has started  
up, the DC/DC converter enters forced PWM mode by  
applying a high level at the VSEL/MODE pin. In this  
operating mode, the device runs at a typical 4-MHz or  
1.5-MHz switching frequency, enabling lowest output  
voltage ripple and highest efficiency. The TPS6280x  
device series comes in a tiny 6-pin WCSP package  
with 0.35-mm pitch.  
Optimized pinout to support 0201 components  
DCS-Control topology  
Output discharge  
100% duty cycle operation  
Tiny 6-pin, 0.35-mm pitch WCSP package  
Supports < 0.6-mm solution height  
Supports < 5-mm2 solution size  
Create a custom design using the:  
– TPS62800 WEBENCH® Power Designer  
– TPS62801 WEBENCH® Power Designer  
– TPS62802 WEBENCH® Power Designer  
– TPS62806 WEBENCH® Power Designer  
– TPS62807 WEBENCH® Power Designer  
– TPS62808 WEBENCH® Power Designer  
Device Information  
Part Number  
TPS62800  
TPS62801  
TPS62802  
TPS62806  
TPS62807  
Package(1)  
Body Size (NOM)  
2 Applications  
1.05 mm × 0.70 mm ×  
0.4 mm  
Wearable electronics, IoT applications  
2× AA battery-powered applications  
Smartphones  
DSBGA (6)  
(1) For all available packages, see the orderable addendum at  
the end of the data sheet.  
TPS62801  
95  
90  
85  
80  
75  
70  
65  
16 selectable VOUT  
VIN  
L = 0.47 µH  
1.75V – 5.5V  
0.8 V – 1.55 V  
VIN  
SW  
COUT  
CIN  
4.7  
10  
F
GND  
VOS  
F
PWM  
ON  
OFF  
VSEL/  
MODE  
PFM  
EN  
RVSEL  
TPS62801  
VIN  
1.75 V–5.5 V  
1.2-V VOUT fixed  
COUT  
60  
55  
50  
45  
40  
L = 0.47 µH  
VIN = 1.8V  
VIN = 2.5V  
VIN = 3.3V  
VIN = 3.6V  
VIN = 4.2V  
VIN = 5.0V  
VIN  
SW  
CIN  
4.7  
10  
F
GND  
VOS  
F
ON  
OFF  
VSEL/  
MODE  
EN  
0.001  
0.01  
0.1  
1
IOUT [mA ]  
10  
100  
1000  
SLVS  
Typical Application  
Efficiency Versus IOUT at 1.2 VOUT  
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 
 
 
TPS62800, TPS62801, TPS62802, TPS62806, TPS62807, TPS62808  
SLVSDD1F – DECEMBER 2017 – REVISED JUNE 2022  
www.ti.com  
Table of Contents  
1 Features............................................................................1  
2 Applications.....................................................................1  
3 Description.......................................................................1  
4 Revision History.............................................................. 2  
5 Device Comparison Table...............................................3  
6 Pin Configuration and Functions...................................3  
7 Specifications.................................................................. 5  
7.1 Absolute Maximum Ratings........................................ 5  
7.2 ESD Ratings............................................................... 5  
7.3 Recommended Operating Conditions.........................5  
7.4 Thermal Information....................................................6  
7.5 Electrical Characteristics.............................................6  
7.6 Typical Characteristics................................................8  
8 Detailed Description......................................................10  
8.1 Overview...................................................................10  
8.2 Functional Block Diagram.........................................10  
8.3 Feature Description...................................................10  
8.4 Device Functional Modes..........................................13  
9 Application and Implementation..................................15  
9.1 Application Information............................................. 15  
9.2 Typical Application.................................................... 15  
9.3 System Examples..................................................... 26  
10 Power Supply Recommendations..............................28  
11 Layout...........................................................................28  
11.1 Layout Guidelines................................................... 28  
11.2 Layout Example...................................................... 28  
12 Device and Documentation Support..........................29  
12.1 Device Support....................................................... 29  
12.2 Receiving Notification of Documentation Updates..29  
12.3 Support Resources................................................. 29  
12.4 Trademarks.............................................................29  
12.5 Electrostatic Discharge Caution..............................30  
12.6 Glossary..................................................................30  
13 Mechanical, Packaging, and Orderable  
Information.................................................................... 30  
4 Revision History  
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.  
Changes from Revision E (July 2018) to Revision F (June 2022)  
Page  
Updated the numbering format for tables, figures, and cross-references throughout the document. ................1  
Updated the minimum input voltage to 1.75 V....................................................................................................1  
Updated max rising UVLO spec......................................................................................................................... 6  
Changes from Revision D (July 2018) to Revision E (January 2019)  
Page  
Added devices TPS62807 and TPS62808 throughout data sheet..................................................................... 1  
Copyright © 2022 Texas Instruments Incorporated  
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SLVSDD1F – DECEMBER 2017 – REVISED JUNE 2022  
5 Device Comparison Table  
Selectable  
Function  
Device  
Output  
Voltages  
with RVSEL  
fSW  
[MHz]  
IOUT  
[A]  
Soft  
Start, tSS  
Output  
Discharge  
Fixed VOUT  
VSEL/MODE  
0.4 V–0.775 V  
in 25-mV steps  
TPS62800  
TPS62801  
TPS62802  
TPS62806  
TPS62807  
TPS62808  
VSEL + MODE  
VSEL + MODE  
VSEL + MODE  
VSEL + MODE  
VSEL + MODE  
VSEL + MODE  
0.7 V (VSEL / MODE = GND)  
1.20 V (VSEL / MODE = GND)  
1.8 V (VSEL / MODE = GND)  
0.7 V (VSEL / MODE = GND)  
1.20 V (VSEL / MODE = GND)  
1.8 V (VSEL / MODE = GND)  
4
4
1
1
125 µs  
125 µs  
400 µs  
125 µs  
125 µs  
125 µs  
Yes  
Yes  
Yes  
Yes  
Yes  
Yes  
0.8 V–1.55 V  
in 50-mV steps  
1.8 V–3.3 V  
in 100-mV steps  
4
1
0.4 V–0.775 V  
in 25-mV steps  
1.5  
1.5  
1.5  
0.6  
0.6  
0.6  
0.8 V–1.55 V  
in 50-mV steps  
1.8 V–3.3 V  
in 100-mV steps  
6 Pin Configuration and Functions  
1
2
GND  
VOS  
A
B
C
VIN  
SW  
VSEL/MODE  
EN  
Not to scale  
Figure 6-1. 6-Pin DSBGA YKA Package (Top View)  
Table 6-1. Pin Functions  
Pin  
I/O  
Description  
Name  
NO.  
GND supply pin. Connect this pin close to the GND terminal of the input and output  
capacitor.  
GND  
A1  
PWR  
PWR  
VIN power supply pin. Connect the input capacitor close to this pin for best noise and voltage  
spike suppression. A ceramic capacitor is required.  
VIN  
B1  
C1  
Connecting a resistor to GND selects a pre-defined output voltage. Once the device has  
started up, the R2D converter is disabled and the pin operates as an input. Applying a high  
level selects forced PWM mode operation and a low level power save mode operation.  
VSEL/MODE  
VOS  
IN  
IN  
Output voltage sense pin for the internal feedback divider network and regulation loop. This  
pin also discharges VOUT by an internal MOSFET when the converter is disabled. Connect  
this pin directly to the output capacitor with a short trace.  
A2  
The switch pin is connected to the internal MOSFET switches. Connect the inductor to this  
terminal.  
SW  
EN  
B2  
C2  
OUT  
IN  
A high level enables the devices, and a low level turns the device off. The pin features an  
internal pulldown resistor, which is disabled once the device has started up.  
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TPS62800, TPS62801, TPS62802, TPS62806, TPS62807, TPS62808  
SLVSDD1F – DECEMBER 2017 – REVISED JUNE 2022  
www.ti.com  
Table 6-2. Output Voltage Setting (VSEL/MODE Pin)  
Output Voltage Setting VOUT [V]  
RVSELResistance [kΩ], E96 Resistor Series,  
VSEL  
1% Accuracy, Temperature Coefficient Better or Equal  
than ±200 ppm/°C  
TPS62800  
TPS62806  
TPS62801  
TPS62807  
TPS62802  
TPS62808  
0
1
0.700  
0.400  
0.425  
0.450  
0.475  
0.500  
0.525  
0.550  
0.575  
0.600  
0.625  
0.650  
0.675  
0.700  
0.725  
0.750  
0.775  
1.2  
0.8  
1.8  
1.8  
1.9  
2.0  
2.1  
2.2  
2.3  
2.4  
2.5  
2.6  
2.7  
2.8  
2.9  
3.0  
3.1  
3.2  
3.3  
Connected to GND (no resistor needed)  
10.0  
12.1  
2
0.85  
0.9  
3
15.4  
4
0.95  
1.0  
18.7  
5
23.7  
6
1.05  
1.1  
28.7  
7
36.5  
8
1.15  
1.2  
44.2  
9
56.2  
10  
11  
12  
13  
14  
15  
16  
1.25  
1.3  
68.1  
86.6  
1.35  
1.4  
105.0  
133.0  
162.0  
205.0  
249.0 or larger  
1.45  
1.5  
1.55  
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SLVSDD1F – DECEMBER 2017 – REVISED JUNE 2022  
7 Specifications  
7.1 Absolute Maximum Ratings  
MIN(1)  
–0.3  
–0.3  
–2.5  
–0.3  
–0.3  
–40  
MAX(1)  
UNIT  
V
VIN  
SW  
6
VIN + 0.3 V  
V
Pin voltage(2)  
SW (AC), less than 10 ns while switching  
9
6
V
EN, VSEL/MODE  
VOS  
V
5
V
Operating junction temperature, TJ  
Storage temperature, Tstg  
150  
150  
°C  
°C  
–65  
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings  
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating  
conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.  
(2) All voltage values are with respect to network ground terminal GND.  
7.2 ESD Ratings  
VALUE  
±2000  
±500  
UNIT  
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)  
Electrostatic  
discharge  
V(ESD)  
V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2)  
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. The human body  
model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin.  
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.  
7.3 Recommended Operating Conditions  
MIN  
NOM  
MAX  
5.5  
1
UNIT  
V
VIN  
Supply voltage, VIN  
1.75  
IOUT  
IOUT  
IOUT  
L
Output current, VIN ≥ 2.3 V, TPS62800, TPS62801, TPS62802  
Output current, VIN < 2.3 V, TPS62800, TPS62801, TPS62802  
Output current, TPS62806, TPS62807, TPS62808  
Effective inductance, TPS62800, TPS62801, TPS62802  
Effective output capacitance, TPS62800, TPS62801, TPS62802  
Effective inductance, TPS62806, TPS62807, TPS62808  
Effective output capacitance, TPS62806, TPS62807, TPS62808  
Effective input capacitance  
A
0.7  
0.6  
0.82  
26  
A
A
0.33  
2
0.47  
1.0  
µH  
µF  
µH  
µF  
µF  
pF  
COUT  
L
0.7  
3
1.2  
26  
COUT  
CIN  
0.5  
4.7  
CVSEL/MODE  
External parasitic capacitance at the VSEL/MODE pin  
30  
Resistance range for external resistor at VSEL/MODE pin (E96 1%  
resistor values)  
10  
249  
kΩ  
RVSEL  
External resistor tolerance E96 series at VSEL/MODE pin  
E96 resistor series temperature coefficient (TCR)  
Operating junction temperature range  
1%  
+200  
125  
–200  
–40  
ppm/°C  
°C  
TJ  
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UNIT  
SLVSDD1F – DECEMBER 2017 – REVISED JUNE 2022  
7.4 Thermal Information  
YKA (DSBGA)  
THERMAL METRIC(1)  
6 PINS  
147.7  
1.7  
RθJA  
Junction-to-ambient thermal resistance  
Junction-to-case (top) thermal resistance  
Junction-to-board thermal resistance  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
RθJC(top)  
RθJB  
47.5  
0.5  
ψJT  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
Junction-to-case (bottom) thermal resistance  
ψJB  
47.6  
RθJC(bot)  
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application  
report.  
7.5 Electrical Characteristics  
VIN = 3.6 V, TJ = –40°C to 125°C typical values are at TJ = 25°C (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
SUPPLY  
EN = VIN, IOUT = 0 µA, VOUT = 1.2 V,  
device not switching, TJ = –40°C to +85°C  
2.3  
2.5  
8
4
µA  
µA  
Operating quiescent current  
(power save mode)  
IQ  
EN = VIN, IOUT = 0 µA, VOUT = 1.2 V, device switching  
Operating quiescent current EN = VIN, VSEL/MODE = VIN (after power up),  
mA  
(PWM mode)  
device switching, IOUT = 0 mA, VOUT = 1.2 V  
EN = GND, shutdown current into VIN  
VSEL/MODE = GND, TJ = –40°C to +85°C  
,
ISD  
Shutdown current  
120  
250  
nA  
VTH_ UVLO+  
VTH_UVLO–  
INPUT EN  
VIH TH  
Rising VIN  
Falling VIN  
1.65  
1.56  
1.75  
1.7  
V
V
Undervoltage lockout  
threshold  
High level input voltage  
Low level input voltage  
Input bias current  
0.8  
0.8  
V
V
VIL TH  
0.4  
25  
IIN  
TJ = –40°C to +85°C, EN = high  
10  
nA  
kΩ  
RPD  
Internal pulldown resistance EN = low  
500  
INPUT VSEL/MODE  
High level input voltage  
(digital input)  
VIH TH  
V
Low level input voltage  
(digital input)  
VIL TH  
IIN  
0.4  
25  
V
Input bias current  
EN = high  
10  
nA  
POWER  
SWITCHES  
Leakage current into the SW  
pin  
ILKG_SW  
VSW = 1.2 V, TJ = –40°C to +85°C  
IOUT = 500 mA  
10  
120  
80  
25  
170  
115  
1.2  
nA  
mΩ  
mΩ  
A
High side MOSFET  
on-resistance  
RDS(ON)  
Low side MOSFET  
on-resistance  
IOUT = 500 mA  
High-side MOSFET switch  
current limit  
ILIMF  
ILIMF  
TPS62806, TPS62807, TPS62808  
TPS62806, TPS62807, TPS62808  
0.95  
0.85  
1.1  
1
Low-side MOSFET switch  
current limit  
1.1  
A
TPS62800, TPS62801  
TPS62802  
1.3  
1.4  
1.2  
1.3  
1.45  
1.55  
1.35  
1.45  
1.55  
1.65  
1.45  
1.55  
A
A
A
A
High-side MOSFET switch  
current limit  
ILIMF  
TPS62800, TPS62801  
TPS62802  
Low-side MOSFET switch  
current limit  
ILIMF  
OUTPUT VOLTAGE DISCHARGE  
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SLVSDD1F – DECEMBER 2017 – REVISED JUNE 2022  
VIN = 3.6 V, TJ = –40°C to 125°C typical values are at TJ = 25°C (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
EN = GND, IVOS = –10 mA into the VOS pin  
TJ = –40°C to +85°C  
RDSCH_VOS  
IIN_VOS  
MOSFET on-resistance  
7
11  
Ω
Bias current into the VOS  
pin  
EN = VIN, VOUT = 1.2 V (internal 12-MΩ resistor  
divider), TJ = –40°C to +85°C  
100  
400  
nA  
THERMAL PROTECTION  
Thermal shutdown  
temperature  
Rising junction temperature, PWM mode  
160  
20  
°C  
°C  
TSD  
Thermal shutdown  
hysteresis  
OUTPUT  
VOUT  
VOUT  
VOUT  
VOUT  
VOUT  
VOUT  
fSW  
Output voltage range  
Output voltage range  
Output voltage range  
Output voltage accuracy  
Output voltage accuracy  
Output voltage accuracy  
Switching frequency  
TPS62800, TPS62806, 25-mV steps  
TPS62801, TPS62807, 50-mV steps  
TPS62802, TPS62808, 100-mV steps  
Power save mode  
0.4  
0.8  
1.8  
0.775  
1.55  
3.3  
V
V
V
0%  
0%  
0%  
4
PWM mode, IOUT = 0 mA, TJ = 25°C to +85°C  
PWM mode, IOUT = 0 mA, TJ = –40°C to +125°C  
VIN = 3.6 V, VOUT = 1.2 V, PWM operation  
–1%  
–2%  
1%  
1.7%  
MHz  
MHz  
TPS62806  
VIN = 3.6 V, VOUT = 0.7 V, PWM operation  
fSW  
Switching frequency  
Switching frequency  
Switching frequency  
1.5  
1.5  
TPS62807  
VIN = 3.6 V, VOUT = 1.2 V, PWM operation  
fSW  
MHz  
MHz  
µs  
TPS62808  
VIN = 3.6 V, VOUT = 1.8 V, PWM operation  
fSW  
1.5  
Regulator start-up delay  
time  
From transition EN = low to high until device starts  
switching, VSEL = 16  
tStartup_delay  
500  
125  
125  
400  
1100  
170  
210  
500  
TPS62801, from VOUT = 0 V to 0.95% of VOUT  
nominal  
tSS  
tSS  
tSS  
Soft-start time  
Soft-start time  
Soft-start time  
µs  
TPS62800, TPS62806, TPS62807, TPS62808  
from VOUT = 0 V to 0.95% of VOUT nominal  
µs  
TPS62802, from VOUT = 0 V to 0.95% of VOUT  
nominal  
µs  
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TPS62800, TPS62801, TPS62802, TPS62806, TPS62807, TPS62808  
SLVSDD1F – DECEMBER 2017 – REVISED JUNE 2022  
www.ti.com  
7.6 Typical Characteristics  
0.5  
5
4.5  
4
TJ = -40°C  
TJ = -10°C  
TJ = 30°C  
TJ = 85°C  
TJ = 125°C  
0.45  
0.4  
0.35  
0.3  
3.5  
3
0.25  
0.2  
2.5  
2
0.15  
0.1  
1.5  
1
TJ = -40°C  
TJ = -10°C  
TJ = 30°C  
TJ = 85°C  
TJ = 125°C  
0.05  
0
0.5  
0
1.5  
2
2.5  
3
3.5  
VIN [V]  
4
4.5  
5
5.5  
1.5  
2
2.5  
3
3.5  
VIN [V]  
4
4.5  
5
5.5  
EN = GND  
Device not switching  
Figure 7-1. Shutdown Current, ISD  
Figure 7-2. Quiescent Current, IQ  
14  
13  
12  
11  
10  
9
1000  
100  
10  
TJ = -40°C  
TJ = 25°C  
TJ = 85°C  
TJ = -40°C  
TJ = 25°C  
TJ = 85°C  
8
7
6
5
4
1
3
2
1
0
0.1  
0
0.5  
1
1.5  
2
2.5 3  
VIN [V]  
3.5  
4
4.5  
5
5.5  
0
0.5  
1
1.5  
2
2.5 3  
VIN [V]  
3.5  
4
4.5  
5
5.5  
VIN falling  
EN = VIN  
Device switching, no load, VOUT = 1.2 V  
VSEL/MODE = GND  
VIN rising  
EN = VIN  
Device switching, no load, VOUT = 1.2 V  
VSEL/MODE = GND  
Figure 7-3. Operating Quiescent Current, IQ  
Figure 7-4. Operating Quiescent Current, IQ  
350  
200  
TJ = -40°C  
TJ = -10°C  
TJ = 30°C  
TJ = 85°C  
TJ = 125°C  
TJ = -40°C  
325  
300  
275  
250  
225  
200  
175  
150  
125  
100  
75  
TJ = -10°C  
TJ = 30°C  
TJ = 85°C  
TJ = 125°C  
175  
150  
125  
100  
75  
50  
50  
25  
25  
0
0
1.5  
2
2.5  
3
3.5  
VIN [V]  
4
4.5  
5
5.5  
1.5  
2
2.5  
3
3.5  
VIN [V]  
4
4.5  
5
5.5  
Figure 7-5. High-Side Switch Drain Source  
Resistance, RDS(ON)  
Figure 7-6. Low-Side Switch Drain Source  
Resistance, RDS(ON)  
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20  
18  
16  
14  
12  
10  
8
TJ = -40°C  
TJ = -10°C  
TJ = 30°C  
TJ = 85°C  
TJ = 125°C  
6
4
2
0
1.5  
2
2.5  
3
3.5  
VIN [V]  
4
4.5  
5
5.5  
Figure 7-7. VOS Discharge Switch Drain Source Resistance, RDSCH_VOS  
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8 Detailed Description  
8.1 Overview  
The TPS6280x is a high frequency synchronous step-down converter with ultra-low quiescent current  
consumption. Using TI's DCS-Control topology, the device extends the high efficiency operation area down  
to microamperes of load current during power save mode operation. TI's DCS-Control (Direct Control with  
Seamless Transition into power save mode) is an advanced regulation topology, which combines the advantages  
of hysteretic and voltage mode control. Characteristics of DCS-Control are excellent AC load regulation and  
transient response, low output ripple voltage, and a seamless transition between PFM and PWM mode  
operation. DCS-Control includes an AC loop, which senses the output voltage (VOS pin) and directly feeds  
the information to a fast comparator stage. This comparator sets the switching frequency, which is constant  
for steady state operating conditions, and provides immediate response to dynamic load changes. In order to  
achieve accurate DC load regulation, a voltage feedback loop is used. The internally compensated regulation  
network achieves fast and stable operation with small external components and low-ESR capacitors.  
8.2 Functional Block Diagram  
EN  
Smart Enable  
Ultra Low Power  
0.4V VREF  
UVLO  
Pulldown Control  
Input Buffer  
500kW  
VOS  
Thermal Shutdown  
Control Logic  
VOS  
R2D converter  
UVLO  
VOUT  
Discharge  
VSEL/  
MODE  
Internal  
VFB feedback  
divider  
EN  
Resistor to  
Digital  
Converter  
network  
Power Stage  
Current  
Limit Comparator  
VIN  
SW  
Power Save /  
Forced PWM  
Mode operation  
Limit  
High Side  
PMOS  
VIN  
TON  
Timer  
DCS Control  
VOS  
Ramp  
VOS  
Gate Driver  
Direct Control  
Startup Delay  
VFB  
VREF  
NMOS  
Softstart Timing  
Limit  
Low Side  
Error  
amplifier  
Main  
Comparator  
GND  
Current  
Limit Comparator  
Figure 8-1. Functional Block Diagram  
8.3 Feature Description  
8.3.1 Smart Enable and Shutdown (EN)  
An internal 500-kΩ resistor pulls the EN pin to GND and avoids the pin to be floating, which prevents an  
uncontrolled start-up of the device in case the EN pin cannot be driven to low level safely. With EN low, the  
device is in shutdown mode. The device is turned on with EN set to a high level. The pulldown control circuit  
disconnects the pulldown resistor on the EN pin once the internal control logic and the reference have been  
powered up. With EN set to a low level, the device enters shutdown mode and the pulldown resistor is activated  
again.  
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8.3.2 Soft Start  
Once the device has been enabled with EN high, it initializes and powers up its internal circuits, which occurs  
during the regulator start-up delay time, tStartup_delay. Once tStartup_delay expires, the internal soft-start circuitry  
ramps up the output voltage within the soft-start time, tss. See Figure 8-2.  
The start-up delay time, tStartup_delay, varies depending on the selected VSEL value. tStartup_delay is shortest with  
VSEL = 0 and longest with VSEL = 16. See Figure 9-42 to Figure 9-46.  
EN  
Device starts switching  
and ramps VOUT  
VOUT  
tStartup_delay  
tSS  
Figure 8-2. Device Start-Up  
8.3.3 VSEL/MODE Pin  
This pin has two functions: output voltage selection during start-up of the converter and operating mode  
selection. See Section 5.  
8.3.3.1 Output Voltage Selection (R2D Converter)  
The output voltage is set with a single external resistor connected between the VSEL/MODE pin and GND. Once  
the device has been enabled and the control logic as well as the internal reference have been powered up, a  
R2D (resistor-to-digital) conversion is started to detect the external resistor RVSEL within the regulator start-up  
delay time, tStartup_delay. An internal current source applies current through the external resistor and an internal  
ADC reads back the resulting voltage level. Depending on the level, an internal feedback divider network is  
selected to set the correct output voltage. Once this R2D conversion is finished, the current source is turned off  
to avoid current flow through the external resistor.  
After power up, the pin is configured as an input for mode selection. Therefore, the output voltage is set only  
once. If the mode selection function is used in combination with the VSEL function, ensure that there is no  
additional current path or capacitance greater than 30 pF total to GND during R2D conversion. Otherwise, the  
additional current to GND is interpreted as a lower resistor value and a false output voltage is set. Table 6-2  
lists the correct resistor values for RVSEL to set the appropriate output voltages. The R2D converter is designed  
to operate with resistor values out of the E96 table and requires 1% resistor value accuracy. The external  
resistor, RVSEL, is not a part of the regulator feedback loop and has therefore no impact on the output voltage  
accuracy. Ensure that there is no other leakage path than the RVSEL resistor at the VSEL/MODE pin during an  
undervoltage lockout event. Otherwise, a false output voltage will be set.  
Connecting VSEL/MODE to GND selects a pre-defined output voltage.  
TPS62800 = 0.7 V  
TPS62801 = 1.2 V  
TPS62802 = 1.8 V  
TPS62806 = 0.7 V  
TPS62807 = 1.2 V  
TPS62808 = 1.8 V  
In this case, no external resistor is needed, which enables a smaller solution size.  
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8.3.3.2 Mode Selection — Power Save Mode and Forced PWM Operation  
A low level at this pin selects power save mode operation, and a high level selects forced PWM operation. The  
mode can be changed during operation after the device has been powered up. The mode selection function is  
only available after the R2D converter has read out the external resistor.  
8.3.4 Undervoltage Lockout (UVLO)  
To avoid misoperation of the device at low input voltages, an undervoltage lockout (UVLO) comparator monitors  
the supply voltage. The UVLO comparator shuts down the device at an input voltage of 1.7 V (maximum) with  
falling VIN. The device starts at an input voltage of 1.75 V (maximum) rising VIN. Once the device re-enters  
operation out of an undervoltage lockout condition, it behaves like being enabled. The internal control logic is  
powered up and the external resistor at the VSEL/MODE pin is read out.  
8.3.5 Switch Current Limit and Short Circuit Protection  
The TPS6280x integrates a current limit on the high-side and low-side MOSFETs to protect the device against  
overload or short circuit conditions. The current in the switches is monitored cycle by cycle. If the high-side  
MOSFET current limit, ILIMF, trips, the high-side MOSFET is turned off and the low-side MOSFET is turned on  
to ramp down the inductor current. Once the inductor current through the low-side switch decreases below the  
low-side MOSFET current limit, ILIMF, the low-side MOSFET is turned off and the high-side MOSFET turns on  
again.  
8.3.6 Thermal Shutdown  
The junction temperature (TJ) of the device is monitored by an internal temperature sensor. If TJ exceeds the  
thermal shutdown temperature, TSD, of 160°C (typical), the device enters thermal shutdown. Both the high-side  
and low-side power FETs are turned off. When TJ decreases below the hysteresis amount of typically 20°C, the  
converter resumes operation, beginning with a soft start to the originally set VOUT (there is no R2D conversion of  
RVSEL). The thermal shutdown is not active in power save mode.  
8.3.7 Output Voltage Discharge  
The purpose of the output discharge function is to ensure a defined down-ramp of the output voltage when the  
device is disabled and to keep the output voltage close to 0 V. The output discharge feature is only active once  
the device has been enabled at least once since the supply voltage was applied. The output discharge function  
is not active if the device is disabled and the supply voltage is applied the first time.  
The internal discharge resistor is connected to the VOS pin. The discharge function is enabled as soon as  
the device is disabled. The minimum supply voltage required to keep the discharge function active is VIN  
VTH_UVLO-  
>
.
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8.4 Device Functional Modes  
8.4.1 Power Save Mode Operation  
The DCS-Control topology supports power save mode operation. At light loads, the device operates in PFM  
(pulse frequency modulation) mode that generates a single switching pulse to ramp up the inductor current and  
recharge the output capacitor, followed by a sleep period where most of the internal circuits are shut down  
to achieve lowest operating quiescent current. During this time, the load current is supported by the output  
capacitor. The duration of the sleep period depends on the load current and the inductor peak current. During the  
sleep periods, the current consumption is reduced to typically 2.3 µA. This low quiescent current consumption is  
achieved by an ultra-low power voltage reference, an integrated high impedance feedback divider network, and  
an optimized power save mode operation.  
In PFM mode, the switching frequency varies linearly with the load current. At medium and high load conditions,  
the device automatically enters PWM (pulse width modulation) mode and operates in continuous conduction  
mode with a nominal switch frequency, fsw, of typically 4 MHz or 1.5 MHz. The switching frequency in PWM  
mode is controlled and depends on VIN and VOUT. The boundary between PWM and PFM mode is when the  
inductor current becomes discontinuous.  
If the load current decreases, the converter seamlessly enters PFM mode to maintain high efficiency down  
to very light loads. Since DCS-Control supports both operation modes within one single building block, the  
transition from PWM to PFM ,mode is seamless with minimum output voltage ripple.  
8.4.2 Forced PWM Mode Operation  
After the device has powered up and ramped up VOUT, the VSEL/MODE pin acts as an input. With a high level  
on VSEL/MODE pin, the device enters forced PWM mode and operates with a constant switching frequency  
over the entire load range, even at very light loads. This action reduces or eliminates interference with RF and  
noise sensitive circuits, but lowers efficiency at light loads.  
8.4.3 100% Mode Operation  
The duty cycle of the buck converter operating in PWM mode is given as D = VOUT / VIN. The duty cycle  
increases as the input voltage comes close to the output voltage. In 100% duty cycle mode, the device keeps the  
high-side switch on continuously. The high-side switch stays turned on as long as the output voltage is below the  
internal set point, which allows the conversion of small input to output voltage differences.  
8.4.4 Optimized Transient Performance from PWM-to-PFM Mode Operation  
For most converters, the load transient response in PWM mode is improved compared to PFM mode, since the  
converter reacts faster on the load step and actively sinks energy on the load release. Compare Figure 9-33  
to Figure 9-32. As an additional feature, the TPS6280x automatically enters PWM mode for 16 cycles after  
a heavy load release to bring the output voltage back to the regulation level faster. After 16 cycles of PWM  
mode, the device automatically returns to PFM mode (if VSEL/MODE is driven low). See Figure 8-3. Without this  
optimization, the output voltage overshoot would be higher and would look like the VOUT' trace. This feature is  
only active once the load is high enough and the converter operates in PWM mode.  
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VOUT  
VOUT  
16 PWM  
Cycles  
PWM  
Mode  
PFM Mode  
Figure 8-3. Optimized Transient Performance from PWM-to-PFM Mode  
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9 Application and Implementation  
Note  
Information in the following applications sections is not part of the TI component specification,  
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for  
determining suitability of components for their purposes, as well as validating and testing their design  
implementation to confirm system functionality.  
9.1 Application Information  
The following section discusses the design of the external components to complete the power supply design for  
several input and output voltage options by using typical applications as a reference.  
9.2 Typical Application  
TPS62801  
VIN  
16 selectable VOUT  
0.8 V–1.55 V  
L = 0.47 µH  
1.75 V–5.5 V  
VIN  
SW  
COUT  
CIN  
4.7  
10  
F
F
GND  
VOS  
PWM  
ON  
OFF  
VSEL/  
MODE  
PFM  
RVSEL  
EN  
Figure 9-1. TPS62801 Adjustable VOUT Application Circuit  
Additional circuits are shown in Section 9.3.  
9.2.1 Design Requirements  
Table 9-1 shows the list of components for the application circuit and the characteristic application curves  
Table 9-1. Components for Application Characteristic Curves  
Reference  
Description  
Value  
Size [L × W × T]  
Manufacturer(1)  
TPS62801 / 2  
Step down converter  
1.05 mm × 0.70 mm × 0.4 mm maximum  
Texas Instruments  
Ceramic capacitor,  
GRM155R60J475ME47D  
0402 (1 mm × 0.5 mm × 0.6 mm  
maximum)  
CIN  
COUT  
L
4.7 µF  
10 µF  
Murata  
Murata  
Murata  
Ceramic capacitor,  
GRM155R60J106ME15D  
0402 (1 mm × 0.5 mm × 0.65 mm  
maximum)  
0603 (1.6 mm × 0.8 mm × 1.0 mm  
maximum)  
Inductor DFE18SANR47MG0L  
0.47 µH  
(1) See the Third-party Products Disclaimer.  
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9.2.2 Detailed Design Procedure  
9.2.2.1 Custom Design With WEBENCH® Tools  
Click here to create a custom design using the TPS62800 device with the WEBENCH® Power Designer.  
Click here to create a custom design using the TPS62801 device with the WEBENCH® Power Designer.  
Click here to create a custom design using the TPS62802 device with the WEBENCH® Power Designer.  
Click here to create a custom design using the TPS62806 device with the WEBENCH® Power Designer.  
Click here to create a custom design using the TPS62807 device with the WEBENCH® Power Designer.  
Click here to create a custom design using the TPS62808 device with the WEBENCH® Power Designer.  
1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.  
2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.  
3. Compare the generated design with other possible solutions from Texas Instruments.  
The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time  
pricing and component availability.  
In most cases, these actions are available:  
Run electrical simulations to see important waveforms and circuit performance  
Run thermal simulations to understand board thermal performance  
Export customized schematic and layout into popular CAD formats  
Print PDF reports for the design, and share the design with colleagues  
Get more information about WEBENCH tools at www.ti.com/WEBENCH.  
9.2.2.2 Inductor Selection  
The inductor value affects the peak-to-peak ripple current, the PWM-to-PFM transition point, the output voltage  
ripple, and the efficiency. The selected inductor has to be rated for its DC resistance and saturation current. The  
inductor ripple current (ΔIL) decreases with higher inductance and increases with higher VIN or VOUT and can be  
estimated according to Equation 1.  
Equation 2 calculates the maximum inductor current under static load conditions. The saturation current of  
the inductor must be rated higher than the maximum inductor current, as calculated with Equation 2, which is  
recommended because during a heavy load transient the inductor current rises above the calculated value. A  
more conservative way is to select the inductor saturation current according to the high-side MOSFET switch  
current limit, ILIMF  
.
Vout  
Vin  
1-  
DIL = Vout ´  
L ´ ¦  
(1)  
(2)  
DI  
L
I
= I  
+
Lmax  
outmax  
2
where  
f = switching frequency  
L = inductor value  
ΔIL = peak-to-peak inductor ripple current  
ILmax = maximum inductor current  
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Table 9-2 shows a list of possible inductors.  
Table 9-2. List of Possible Inductors  
Size Imperial  
(Metric)  
Inductance [µH]  
Inductor Series  
Dimensions L × W × T  
Supplier(1)  
0.47  
0.47  
0.47  
0.47  
1.0  
DFE18SAN_G0  
HTEB16080F  
HTET1005FE  
TFM160808ALC  
DFE201610E  
0603 (1608)  
0603 (1608)  
0402 (1005)  
0603 (1608)  
0806 (201610)  
1.6 mm × 0.8 mm × 1.0 mm maximum  
1.6 mm × 0.8 mm × 0.6 mm maximum  
1.0 mm × 0.5 mm × 0.65 mm maximum  
1.6 mm × 0.8 mm × 0.8 mm maximum  
2.0 mm × 1.6 mm × 1.0 mm maximum  
Murata  
Cyntec  
Cyntec  
TDK  
Murata  
(1) See the Third-party Products Disclaimer.  
9.2.2.3 Output Capacitor Selection  
The DCS-Control scheme of the TPS6280x allows the use of tiny ceramic capacitors. Ceramic capacitors with  
low-ESR values have the lowest output voltage ripple and are recommended. The output capacitor requires  
either an X7R or X5R dielectric. At light load currents, the converter operates in power save mode and the output  
voltage ripple is dependent on the output capacitor value. A larger output capacitors can be used reducing the  
output voltage ripple.  
The inductor and output capacitor together provide a low-pass filter. To simplify this process, Table 9-3 outlines  
possible inductor and capacitor value combinations.  
Table 9-3. Recommended LC Output Filter Combinations  
Nominal Output Capacitor Value [µF]  
Device  
Nominal Inductor Value [µH]  
4.7 µF  
10 µF  
2 × 10 µF  
22 µF  
TPS62800,  
TPS62801  
0.47(1)  
0.47(1)  
(3)  
(3)  
TPS62802  
TPS62806,  
TPS62807,  
TPS62808  
1.0(2)  
(3)  
(1) An effective inductance range of 0.33 µH to 0.82 µH is recommended. An effective capacitance range of 2 µF to 26 µF is  
recommended.  
(2) An effective inductance range of 0.7 µH to 1.2 µH is recommended. An effective capacitance range of 3 µF to 26 µF is recommended.  
(3) Typical application configuration. Other check marks indicate alternative filter combinations.  
9.2.2.4 Input Capacitor Selection  
Because the buck converter has a pulsating input current, a low-ESR ceramic input capacitor is required for  
best input voltage filtering to minimize input voltage spikes. For most applications, a 4.7-µF input capacitor is  
sufficient. When operating from a high impedance source, like a coin cell, a larger input buffer capacitor ≥ 10 μF  
is recommended to avoid voltage drops during start-up and load transients. The input capacitor can be increased  
without any limit for better input voltage filtering. The leakage current of the input capacitor adds to the overall  
current consumption.  
Table 9-4 shows a selection of input and output capacitors.  
Table 9-4. List of Possible Capacitors  
Size Imperial  
Capacitance [μF]  
Capacitor Part Number  
GRM155R60J475ME47D  
GRM035R60J475ME15  
GRM155R60J106ME15D  
Dimensions L × W × T  
Supplier(1)  
Murata  
(Metric)  
1.0 mm × 0.5 mm × 0.6 mm  
maximum  
4.7  
4.7  
10  
0402 (1005)  
0.6 mm × 0.3 mm × 0.55 mm  
maximum  
0201 (0603)  
0402 (1005)  
Murata  
1.0 mm × 0.5 mm × 0.65 mm  
maximum  
Murata  
(1) See the Third-party Products Disclaimer.  
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9.2.3 Application Curves  
The conditions for the below application curves are VIN = 3.6 V, VOUT = 1.2 V, and the components listed in Table  
9-1, unless otherwise noted.  
85  
80  
75  
70  
65  
60  
55  
50  
45  
40  
35  
30  
25  
20  
85  
80  
75  
70  
65  
60  
55  
50  
45  
40  
35  
30  
25  
20  
VIN = 1.8V  
VIN = 2.5V  
VIN = 3.3V  
VIN = 3.6V  
VIN = 4.2V  
VIN = 5.0V  
VIN = 1.8V  
VIN = 2.5V  
VIN = 3.3V  
VIN = 3.6V  
VIN = 4.2V  
VIN = 5.0V  
0.01  
0.1  
1
10  
IOUT [mA ]  
100  
1000  
0.01  
0.1  
1
10  
IOUT [mA ]  
100  
1000  
SLVS  
SLVS  
TPS62800  
RVSEL = 10 kΩ to GND  
TPS62800  
VSEL/MODE = GND  
Figure 9-2. Efficiency Power Save Mode  
VOUT = 0.4 V  
Figure 9-3. Efficiency Power Save Mode  
VOUT = 0.7 V  
95  
90  
85  
80  
75  
70  
65  
60  
95  
90  
85  
80  
75  
70  
65  
60  
VIN = 1.8V  
VIN = 2.6V  
VIN = 2.3V  
VIN = 2.7V  
55  
55  
50  
45  
40  
50  
45  
40  
VIN = 3.6V  
VIN = 4.2V  
VIN = 5.0V  
VIN = 3.7V  
VIN = 4.2V  
VIN = 5.0V  
0.001  
0.01  
0.1  
1
IOUT [mA ]  
10  
100  
1000  
0.001  
0.01  
0.1  
1
IOUT [mA]  
10  
100  
1000  
SLVS  
SLVS  
TPS62801  
RVSEL = 10 kΩ to GND  
TPS62801  
RVSEL = 15.4 kΩ to GND  
Figure 9-4. Efficiency Power Save Mode  
VOUT = 0.8 V  
Figure 9-5. Efficiency Power Save Mode  
VOUT = 0.9 V  
95  
90  
85  
80  
75  
70  
65  
90  
80  
70  
60  
50  
40  
VIN = 1.8V  
VIN = 2.5V  
VIN = 3.3V  
VIN = 3.6V  
VIN = 4.2V  
VIN = 5.0V  
60  
55  
50  
45  
40  
VIN = 1.8V  
VIN = 2.5V  
VIN = 3.3V  
VIN = 3.6V  
VIN = 4.2V  
VIN = 5.0V  
30  
20  
10  
0
1
10  
100  
1000  
0.001  
0.01  
0.1  
1
IOUT [mA ]  
10  
100  
1000  
IOUT [mA ]  
SLVS  
SLVS  
TPS62801  
RVSEL = 56.2 kΩ  
TPS62801  
VSEL/MODE = GND  
VSEL/MODE pin = high after start-up  
Figure 9-7. Efficiency Power Save Mode  
VOUT = 1.2 V  
Figure 9-6. Efficiency Forced PWM Mode  
VOUT = 1.2 V  
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SLVSDD1F – DECEMBER 2017 – REVISED JUNE 2022  
90  
100  
95  
90  
85  
80  
75  
70  
65  
85  
80  
75  
70  
65  
60  
55  
50  
45  
40  
DFE18SAN_G0 R47 (1.6 x 1.6 x 1.0 mm)  
HTEB16080F R47 (1.6 x 1.6 x 0.6 mm)  
HTET1005FE R47 (1.0 x 0.5 x 0.65 mm)  
TFM160808ALC R47 (1.6 x 1.6 x 0.8 mm)  
60  
VIN = 2.5V  
VIN = 3.3V  
VIN = 3.6V  
VIN = 4.2V  
VIN = 5.0V  
55  
50  
45  
40  
0.01  
0.1  
1
10  
100  
1000  
0.001  
0.01  
0.1  
1
IOUT [mA ]  
10  
100  
1000  
IOUT [mA ]  
SLPVloSt  
SLVS  
TPS62801  
VSEL/MODE = GND, VOUT = 1.2 V  
TPS62802  
VSEL/MODE = GND  
Figure 9-8. Inductor Comparison  
Figure 9-9. Efficiency Power Save Mode  
VOUT = 1.8 V  
95  
90  
85  
80  
75  
70  
65  
100  
95  
90  
85  
80  
75  
70  
65  
60  
55  
50  
45  
40  
60  
55  
50  
45  
40  
VIN = 1.8V  
VIN = 2.5V  
VIN = 3.3V  
VIN = 3.8V  
VIN = 4.5V  
VIN = 5.0V  
VIN = 3.6V  
VIN = 3.8V  
VIN = 4.2V  
VIN = 5.0V  
0.01  
0.1  
1
10  
100  
600  
IOUT [mA ]  
SLVS  
0.001  
0.01  
0.1  
1
IOUT [mA ]  
10  
100  
1000  
TPS62806  
VOUT = 0.7 V, VSEL/MODE = GND  
L = 1-µH DFE201610E  
SLVS  
TPS62802  
3.3 V VOUT, VSEL/MODE = 249 k  
Figure 9-11. Efficiency Power Save Mode  
VOUT = 0.7 V  
Figure 9-10. Efficiency Power Save Mode  
VOUT = 3.3 V  
100  
100  
95  
90  
85  
80  
75  
70  
65  
60  
55  
50  
45  
40  
95  
90  
85  
80  
75  
70  
65  
60  
55  
50  
45  
40  
VIN=1.8V  
VIN=2.7V  
VIN=3.3V  
VIN=3.6V  
VIN=4.2V  
VIN=4.8V  
VIN=2.1V  
VIN=2.7V  
VIN=3.3V  
VIN=3.6V  
VIN=4.2V  
VIN=4.8V  
10m  
100m  
1m 10m  
Load Current [A]  
100m  
1
10m  
100m  
1m 10m  
Load Current [A]  
100m  
1
Effi  
Effi  
TPS62807  
VOUT = 1.2 V, VSEL/MODE = GND  
L = 1-µH DFE201610E  
TPS62808  
VOUT = 1.8 V, VSEL/MODE = GND  
L = 1-µH DFE201610E  
Figure 9-12. Efficiency Power Save Mode  
VOUT = 1.2 V  
Figure 9-13. Efficiency Power Save Mode  
VOUT = 1.8 V  
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1.248  
1.248  
1.236  
1.224  
1.212  
1.200  
1.188  
1.176  
1.164  
TJ = 25°C  
TJ = -40°C  
1.236  
1.224  
1.212  
1.200  
1.188  
VIN = 1.8V  
VIN = 2.5V  
VIN = 3.3V  
VIN = 3.6V  
VIN = 4.2V  
VIN = 5.0V  
VIN = 1.8V  
VIN = 2.5V  
VIN = 3.3V  
VIN = 3.6V  
VIN = 4.2V  
VIN = 5.0V  
1.176  
1.164  
0.01  
0.1  
1
10  
IOUT [mA ]  
100  
1000  
0.01  
0.1  
1
10  
IOUT [mA ]  
100  
1000  
SLVS  
SLVS  
TPS62801  
VSEL/MODE = GND  
PFM/PWM mode TJ = 25°C  
TPS62801  
VSEL/MODE = GND  
PFM/PWM mode TJ = –40°C  
VOUT = 1.2 V  
VOUT = 1.2 V  
Figure 9-14. Output Voltage vs Output Current  
Figure 9-15. Output Voltage vs Output Current  
1.248  
1.212  
TJ = 85°C  
TJ = 25°C  
1.236  
1.224  
1.212  
1.200  
1.188  
1.200  
VIN = 1.8V  
VIN = 2.5V  
VIN = 3.3V  
VIN = 3.6V  
VIN = 4.2V  
VIN = 5.0V  
VIN = 1.8V  
VIN = 2.5V  
VIN = 3.3V  
VIN = 3.6V  
VIN = 4.2V  
VIN = 5.0V  
1.176  
1.164  
1.188  
0.01  
0.01  
0.1  
1
10  
IOUT [mA ]  
100  
1000  
0.1  
1
10  
IOUT [mA ]  
100  
1000  
SLVS  
SLVS  
TPS62801  
VSEL/MODE = GND  
PFM/PWM mode TJ = 85°C  
TPS62801  
VSEL/MODE = high after start-up  
Forced PWM mode TJ = 25°C  
VOUT = 1.2 V  
VOUT = 1.2 V  
Figure 9-16. Output Voltage vs Output Current  
Figure 9-17. Output Voltage vs Output Current  
1.212  
1.212  
TJ = 85°C  
TJ = -40°C  
1.200  
1.200  
VIN = 1.8V  
VIN = 2.5V  
VIN = 3.3V  
VIN = 3.6V  
VIN = 4.2V  
VIN = 5.0V  
VIN = 1.8V  
VIN = 2.5V  
VIN = 3.3V  
VIN = 3.6V  
VIN = 4.2V  
VIN = 5.0V  
1.188  
0.01  
0.1  
1
10  
IOUT [mA ]  
100  
1000  
1.188  
0.01  
0.1  
1
10  
IOUT [mA ]  
100  
1000  
SLVS  
SLVS  
TPS62801  
VSEL/MODE = high after start-up  
Forced PWM mode TJ = 85°C  
TPS62801  
VSEL/MODE = high after start-up  
Forced PWM mode TJ = –40°C  
VOUT = 1.2 V  
VOUT = 1.2 V  
Figure 9-19. Output Voltage vs Output Current  
Figure 9-18. Output Voltage vs Output Current  
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SLVSDD1F – DECEMBER 2017 – REVISED JUNE 2022  
5000  
100  
90  
80  
70  
60  
50  
4500  
4000  
3500  
3000  
2500  
2000  
1500  
1000  
500  
40  
VIN = 1.8V  
VIN = 2.5V  
VIN = 3.3V  
VIN = 3.6V  
VIN = 4.2V  
VIN = 5.0V  
VIN = 1.8V  
30  
20  
10  
0
VIN = 2.5V  
VIN = 3.3V  
VIN = 3.6V  
VIN = 4.2V  
VIN = 5.0V  
0
0
100 200 300 400 500 600 700 800 900 1000  
IOUT [mA]  
0
1
2
3
4
5
IOUT [mA]  
6
7
8
9
10  
SLVS  
SLVS  
TPS62801  
VSEL/MODE = GND  
PFM/PWM mode TJ = 25°C  
TPS62801  
VOUT = 1.2 V  
VSEL/MODE = GND  
VOUT = 1.2 V  
PFM/PWM mode  
TJ = 25°C  
Figure 9-20. Switching Frequency vs Output  
Current  
Figure 9-21. Switching Frequency (Zoom In)  
5000  
4500  
4000  
3500  
3000  
2500  
4500  
4000  
3500  
3000  
2500  
2000  
1500  
2000  
VIN = 1.8V  
1500  
1000  
500  
0
VIN = 2.5V  
VIN = 3.3V  
VIN = 3.6V  
VIN = 4.2V  
VIN = 5.0V  
VIN = 1.8V  
VIN = 3.6V  
VIN = 4.2V  
VIN = 5.0V  
1000  
500  
0
0
100 200 300 400 500 600 700 800 900 1000  
IOUT [mA]  
SLVS  
0
100 200 300 400 500 600 700 800 900 1000  
IOUT [mA]  
TPS62801  
VSEL/MODE = high after start-up  
Forced PWM Mode TJ = 25°C  
SLVS  
VOUT = 1.2 V  
TPS62801  
VOUT = 0.8 V  
VSEL/MODE = 10 kΩ to GND  
PFM/PWM mode TJ = 25°C  
Figure 9-22. Switching Frequency vs Output  
Current  
Figure 9-23. Switching Frequency vs Output  
Current  
2000  
1800  
1600  
1400  
1200  
1000  
800  
VIN = 1.8V  
600  
400  
200  
0
VIN = 2.5V  
VIN = 3.3V  
VIN = 3.6V  
VIN = 4.2V  
VIN = 5.0V  
0
60 120 180 240 300 360 420 480 540 600  
IOUT [mA]  
SLVS  
TPS62801  
VOUT = 1.2 V  
IOUT = 25 µA  
VSEL/MODE = GND  
PFM mode  
TPS62806  
VOUT = 0.7 V  
VSEL/MODE = GND  
PFM/PWM mode  
L = 1 µH  
TJ = 25°C  
Figure 9-25. Typical Operation Power Save Mode  
Figure 9-24. Switching Frequency vs Output  
Current  
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TPS62801  
VOUT = 1.2 V  
IOUT = 10 mA  
VSEL/MODE = GND  
PFM mode  
VOUT = 0.7 V  
VIN = 3.8 V  
IOUT = 10 mA  
VSEL/MODE = GND  
PFM Mode, L = 1-µH DFE201610E  
Figure 9-26. Typical Operation Power Save Mode  
Figure 9-27. TPS62806 Typical Operation Power  
Save Mode  
VOUT = 0.7 V  
VIN = 3.8 V  
IOUT = 0 mA  
VSEL/MODE = VIN  
(after start-up)  
PWM mode  
VOUT = 1.2 V  
VSEL/MODE = GND  
IOUT = 500 mA  
PFM Mode, L = 1-µH DFE201610E  
Figure 9-29. TPS62801 Typical Operation PWM  
Mode  
Figure 9-28. TPS62806 Typical Forced PWM Mode  
Operation (1.5 MHz)  
Forced PWM  
VOUT = 1.2 V  
IOUT = 0 mA  
TPS62801  
rise / fall time < 1  
µs  
VOUT = 1.2 V  
VSEL/MODE = GND  
mode  
IOUT = 0 mA to 50 mA, PFM Mode  
VSEL/MODE = VIN (after start-up)  
Figure 9-30. TPS62801 Typical Operation Forced  
PWM Mode  
Figure 9-31. Load Transient Power Save Mode  
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SLVSDD1F – DECEMBER 2017 – REVISED JUNE 2022  
TPS62801  
VOUT = 1.2 V  
VSEL/MODE = GND  
PFM / PWM mode  
Forced  
VOUT = 1.2 V  
VSEL/MODE = VIN  
(after start-up)  
rise / fall time < 1 µs  
PWM mode  
IOUT = 5 mA to 500 mA  
rise / fall time < 1 µs  
IOUT = 5 mA to 500 mA  
Figure 9-32. Load Transient Power Save Mode  
Figure 9-33. TPS62801 Load Transient Forced  
PWM Mode  
TPS62801  
VOUT = 1.2 V  
VSEL/MODE = GND  
PFM/PWM mode  
TPS62801  
VOUT = 1.2 V  
VSEL/MODE = VIN  
(after start-up)  
IOUT = 1 mA to 1 A 1 kHz  
IOUT = 1 mA to 1 A, 1 kHz  
Forced PWM mode  
Figure 9-34. AC Load Sweep Power Save Mode  
Figure 9-35. AC Load Sweep Forced PWM Mode  
TPS62801  
VOUT = 1.2 V  
VIN = 3.6 V to 4.2 V  
IOUT = 50 mA  
TPS62801  
VOUT = 1.2 V  
VIN = 3.6 V to 4.2 V  
IOUT = 500 mA  
rise / fall time = 10 µs  
rise / fall time = 10 µs  
Figure 9-36. Line Transient PFM Mode  
Figure 9-37. Line Transient PWM Mode  
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VOUT = 0.8 V  
VSEL/MODE = Low (through RVSEL  
)
TPS62801  
VOUT = 1.2 V  
VSEL/MODE = GND  
RLoad = 220 Ω  
RVSEL = 10 kΩ  
RLoad = 220 Ω  
Figure 9-38. TPS62801 Start-Up, VOUT = 0.8 V  
Figure 9-39. Start-Up, VOUT = 1.2 V  
VOUT = 1.55 V  
RLoad = 220 Ω  
VSEL/MODE = Low (through RVSEL  
)
TPS62801  
VOUT = 1.2 V  
VSEL/MODE = VIN  
No load  
RVSEL = 249 kΩ  
EN = high to low  
Figure 9-40. TPS62801 Start-Up, VOUT = 1.55 V  
Figure 9-41. Output Discharge  
tStartup_delay = 290ms  
tStartup_delay = 300ms  
VSEL/MODE = GND  
RVSEL = 10 kΩ  
Figure 9-42. Start-Up Delay Time, VSEL = 0  
Figure 9-43. Start-Up Delay Time, VSEL = 1  
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SLVSDD1F – DECEMBER 2017 – REVISED JUNE 2022  
tStartup_delay = 427ms  
tStartup_delay = 363ms  
RVSEL = 36.5 kΩ  
RVSEL = 44.2 kΩ  
Figure 9-44. Start-Up Delay Time, VSEL = 7  
Figure 9-45. Start-Up Delay Time, VSEL = 8  
tStartup_delay = 500ms  
RVSEL = 249 kΩ  
Figure 9-46. Start-Up Delay Time, VSEL = 16  
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9.3 System Examples  
This section shows additional circuits for various output voltages.  
TPS62801  
VIN  
L = 0.47 µH  
1.75 V–5.5 V  
1.2-V VOUT fixed  
COUT  
VIN  
SW  
CIN  
4.7  
10  
F
GND  
VOS  
F
ON  
OFF  
VSEL/  
MODE  
EN  
Figure 9-47. TPS62801 VSEL Connected to GND for 1.2-V Fixed VOUT  
TPS62801  
VIN  
16 selectable VOUT  
0.8 V–1.55 V  
L = 0.47 µH  
1.75 V–5.5 V  
VIN  
SW  
COUT  
CIN  
4.7  
10  
F
F
GND  
VOS  
PWM  
ON  
OFF  
VSEL/  
MODE  
PFM  
RVSEL  
EN  
Figure 9-48. TPS62801 Adjustable VOUT Application Circuit  
TPS62802  
L = 0.47 µH  
VIN  
1.75 V–5.5 V  
VOUT = 3.3 V  
VIN  
SW  
CIN  
4.7  
COUT  
2 × 10  
=
F
F
GND  
VOS  
PWM  
ON  
OFF  
VSEL/  
MODE  
EN  
PFM  
R
VSEL  
=
249 k  
Figure 9-49. TPS62802 Adjustable 3.3-V VOUT Application Circuit  
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SLVSDD1F – DECEMBER 2017 – REVISED JUNE 2022  
TPS62802  
VIN  
1.8 V fixed  
L = 0.47 µH  
1.75 V–5.5 V  
VIN  
SW  
COUT  
10 F  
CIN  
4.7 F  
GND  
VOS  
ON  
OFF  
VSEL/  
MODE  
EN  
Figure 9-50. TPS62802 VSEL Connected to GND for 1.8-V Fixed VOUT  
16 selectable VOUT  
0.4 V0.775 V  
IOUT up to 600 mA  
TPS62806  
VIN  
L = 1 µH  
1.75 V–5.5 V  
VIN  
SW  
COUT  
CIN  
4.7  
10  
F
GND  
EN  
VOS  
F
PWM  
ON  
OFF  
VSEL/  
MODE  
PSM  
RVSEL  
Figure 9-51. TPS62806 Adjustable VOUT Application Circuit  
TPS62806  
0.7 V fixed VOUT  
IOUT up to 600 mA  
VIN  
L = 1 µH  
1.75 V–5.5 V  
VIN  
SW  
COUT  
CIN  
4.7  
10  
F
GND  
VOS  
F
ON  
OFF  
VSEL/  
MODE  
EN  
Figure 9-52. TPS62806 VSEL Connected to GND for 0.7-V Fixed VOUT  
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10 Power Supply Recommendations  
The power supply must provide a current rating according to the supply voltage, output voltage, and output  
current of the TPS6280x.  
11 Layout  
11.1 Layout Guidelines  
The pinout of TPS6280x has been optimized to enable a single top layer PCB routing of the IC and its  
critical passive components such as CIN, COUT, and L. Furthermore, this pinout allows the user to connect tiny  
components such as 0201 (0603) size capacitors and a 0402 (1005) size inductor. A solution size smaller than 5  
mm2 can be achieved with a fixed output voltage.  
As for all switching power supplies, the layout is an important step in the design. Take care in board layout to  
get the specified performance.  
It is critical to provide a low inductance, low impedance ground path. Therefore, use wide and short traces for  
the main current paths.  
The input capacitor should be placed as close as possible to the VIN and GND pins of the IC. This is the  
most critical component placement.  
The VOS line is a sensitive, high impedance line and should be connected to the output capacitor and routed  
away from noisy components and traces (for example, SW line) or other noise sources.  
11.2 Layout Example  
VOUT  
GND  
COUT  
GND  
VIN  
VOS  
SW  
EN  
CIN  
L
VSEL/  
MODE  
RVSEL  
VIN  
GND  
Figure 11-1. PCB Layout Example  
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TPS62800, TPS62801, TPS62802, TPS62806, TPS62807, TPS62808  
www.ti.com  
SLVSDD1F – DECEMBER 2017 – REVISED JUNE 2022  
12 Device and Documentation Support  
12.1 Device Support  
12.1.1 Third-Party Products Disclaimer  
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT  
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES  
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER  
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.  
12.1.2 Development Support  
12.1.2.1 Custom Design With WEBENCH® Tools  
Click here to create a custom design using the TPS62800 device with the WEBENCH® Power Designer.  
Click here to create a custom design using the TPS62801 device with the WEBENCH® Power Designer.  
Click here to create a custom design using the TPS62802 device with the WEBENCH® Power Designer.  
Click here to create a custom design using the TPS62806 device with the WEBENCH® Power Designer.  
Click here to create a custom design using the TPS62807 device with the WEBENCH® Power Designer.  
Click here to create a custom design using the TPS62808 device with the WEBENCH® Power Designer.  
1. Start by entering the input voltage (VIN), output voltage (VOUT), and output current (IOUT) requirements.  
2. Optimize the design for key parameters such as efficiency, footprint, and cost using the optimizer dial.  
3. Compare the generated design with other possible solutions from Texas Instruments.  
The WEBENCH Power Designer provides a customized schematic along with a list of materials with real-time  
pricing and component availability.  
In most cases, these actions are available:  
Run electrical simulations to see important waveforms and circuit performance  
Run thermal simulations to understand board thermal performance  
Export customized schematic and layout into popular CAD formats  
Print PDF reports for the design, and share the design with colleagues  
Get more information about WEBENCH tools at www.ti.com/WEBENCH.  
12.2 Receiving Notification of Documentation Updates  
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on  
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For  
change details, review the revision history included in any revised document.  
12.3 Support Resources  
TI E2Esupport forums are an engineer's go-to source for fast, verified answers and design help — straight  
from the experts. Search existing answers or ask your own question to get the quick design help you need.  
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do  
not necessarily reflect TI's views; see TI's Terms of Use.  
12.4 Trademarks  
DCS-Controland TI E2Eare trademarks of Texas Instruments.  
WEBENCH® is a registered trademark of Texas Instruments.  
All trademarks are the property of their respective owners.  
Copyright © 2022 Texas Instruments Incorporated  
Submit Document Feedback  
29  
Product Folder Links: TPS62800 TPS62801 TPS62802 TPS62806 TPS62807 TPS62808  
 
 
 
 
 
 
TPS62800, TPS62801, TPS62802, TPS62806, TPS62807, TPS62808  
SLVSDD1F – DECEMBER 2017 – REVISED JUNE 2022  
www.ti.com  
12.5 Electrostatic Discharge Caution  
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled  
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.  
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may  
be more susceptible to damage because very small parametric changes could cause the device not to meet its published  
specifications.  
12.6 Glossary  
TI Glossary  
This glossary lists and explains terms, acronyms, and definitions.  
13 Mechanical, Packaging, and Orderable Information  
The following pages include mechanical, packaging, and orderable information. This information is the most  
current data available for the designated devices. This data is subject to change without notice and revision of  
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.  
Copyright © 2022 Texas Instruments Incorporated  
30  
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Product Folder Links: TPS62800 TPS62801 TPS62802 TPS62806 TPS62807 TPS62808  
 
 
 
PACKAGE OPTION ADDENDUM  
www.ti.com  
13-Oct-2021  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
TPS62800YKAR  
TPS62801YKAR  
TPS62801YKAT  
TPS62802YKAR  
TPS62802YKAT  
TPS62806YKAR  
TPS62806YKAT  
TPS62807YKAR  
TPS62807YKAT  
TPS62808YKAR  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
6
6
6
6
6
6
6
6
6
6
3000 RoHS & Green SAC396 | SNAGCU  
3000 RoHS & Green SAC396 | SNAGCU  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-
+
+
X
X
J
250  
3000 RoHS & Green SAC396 | SNAGCU  
250 RoHS & Green SAC396 | SNAGCU  
3000 RoHS & Green SAC396 | SNAGCU  
250 RoHS & Green SAC396 | SNAGCU  
3000 RoHS & Green SAC396 | SNAGCU  
250 RoHS & Green SAC396 | SNAGCU  
3000 RoHS & Green SAC396 | SNAGCU  
RoHS & Green SAC396 | SNAGCU  
J
L
L
V
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
13-Oct-2021  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
7-Jul-2023  
TAPE AND REEL INFORMATION  
REEL DIMENSIONS  
TAPE DIMENSIONS  
K0  
P1  
W
B0  
Reel  
Diameter  
Cavity  
A0  
A0 Dimension designed to accommodate the component width  
B0 Dimension designed to accommodate the component length  
K0 Dimension designed to accommodate the component thickness  
Overall width of the carrier tape  
W
P1 Pitch between successive cavity centers  
Reel Width (W1)  
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE  
Sprocket Holes  
Q1 Q2  
Q3 Q4  
Q1 Q2  
Q3 Q4  
User Direction of Feed  
Pocket Quadrants  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
TPS62800YKAR  
TPS62801YKAR  
TPS62801YKAR  
TPS62801YKAT  
TPS62801YKAT  
TPS62802YKAR  
TPS62802YKAR  
TPS62802YKAT  
TPS62806YKAR  
TPS62806YKAT  
TPS62806YKAT  
TPS62807YKAR  
TPS62807YKAR  
TPS62807YKAT  
TPS62807YKAT  
TPS62808YKAR  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
3000  
3000  
3000  
250  
180.0  
180.0  
178.0  
178.0  
180.0  
180.0  
178.0  
180.0  
180.0  
180.0  
178.0  
180.0  
178.0  
178.0  
180.0  
180.0  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
0.81  
0.81  
0.81  
0.81  
0.81  
0.81  
0.81  
0.81  
0.81  
0.81  
0.81  
0.81  
0.81  
0.81  
0.81  
0.81  
1.16  
1.16  
1.16  
1.16  
1.16  
1.16  
1.16  
1.16  
1.16  
1.16  
1.16  
1.16  
1.16  
1.16  
1.16  
1.16  
0.46  
0.46  
0.46  
0.46  
0.46  
0.46  
0.46  
0.46  
0.46  
0.46  
0.46  
0.46  
0.46  
0.46  
0.46  
0.46  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
Q1  
250  
3000  
3000  
250  
3000  
250  
250  
3000  
3000  
250  
250  
3000  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
7-Jul-2023  
TAPE AND REEL BOX DIMENSIONS  
Width (mm)  
H
W
L
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
TPS62800YKAR  
TPS62801YKAR  
TPS62801YKAR  
TPS62801YKAT  
TPS62801YKAT  
TPS62802YKAR  
TPS62802YKAR  
TPS62802YKAT  
TPS62806YKAR  
TPS62806YKAT  
TPS62806YKAT  
TPS62807YKAR  
TPS62807YKAR  
TPS62807YKAT  
TPS62807YKAT  
TPS62808YKAR  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
DSBGA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
YKA  
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
3000  
3000  
3000  
250  
182.0  
182.0  
220.0  
220.0  
182.0  
182.0  
220.0  
182.0  
182.0  
182.0  
220.0  
182.0  
220.0  
220.0  
182.0  
182.0  
182.0  
182.0  
220.0  
220.0  
182.0  
182.0  
220.0  
182.0  
182.0  
182.0  
220.0  
182.0  
220.0  
220.0  
182.0  
182.0  
20.0  
20.0  
35.0  
35.0  
20.0  
20.0  
35.0  
20.0  
20.0  
20.0  
35.0  
20.0  
35.0  
35.0  
20.0  
20.0  
250  
3000  
3000  
250  
3000  
250  
250  
3000  
3000  
250  
250  
3000  
Pack Materials-Page 2  
PACKAGE OUTLINE  
YKA0006  
DSBGA - 0.4 mm max height  
SCALE 12.000  
DIE SIZE BALL GRID ARRAY  
A
B
E
BALL A1  
INDEX AREA  
D
0.4 MAX  
C
SEATING PLANE  
0.05 C  
0.18  
0.13  
BALL  
TYP  
0.35 TYP  
C
B
A
0.7  
TYP  
SYMM  
D: Max = 1.084 mm, Min =1.024 mm  
E: Max = 0.734 mm, Min =0.674 mm  
0.35  
TYP  
1
2
0.24  
6X  
0.19  
SYMM  
0.015  
C A B  
4223607/A 03/2017  
NanoFree Is a trademark of Texas Instruments.  
NOTES:  
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing  
per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
3. NanoFreeTM package configuration.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
YKA0006  
DSBGA - 0.4 mm max height  
DIE SIZE BALL GRID ARRAY  
(0.35) TYP  
6X ( 0.2)  
(0.35) TYP  
1
2
A
B
SYMM  
C
SYMM  
LAND PATTERN EXAMPLE  
EXPOSED METAL SHOWN  
SCALE:50X  
(
0.2)  
0.0325 MAX  
0.0325 MIN  
METAL  
UNDER  
METAL  
SOLDER MASK  
EXSPOSED  
EXPOSED  
METAL  
SOLDER MASK  
OPENING  
(
0.2)  
METAL  
SOLDER MASK  
OPENING  
NON-SOLDER MASK  
DEFINED  
SOLDER MASK  
DEFINED  
(PREFERRED)  
SOLDER MASK DETAILS  
NOT TO SCALE  
4223607/A 03/2017  
NOTES: (continued)  
4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.  
For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009).  
www.ti.com  
EXAMPLE STENCIL DESIGN  
YKA0006  
DSBGA - 0.4 mm max height  
DIE SIZE BALL GRID ARRAY  
(0.35) TYP  
6X ( 0.21)  
(R0.05) TYP  
1
2
A
(0.35) TYP  
SYMM  
B
METAL  
TYP  
C
SYMM  
SOLDER PASTE EXAMPLE  
BASED ON 0.075 mm - 0.1 mm THICK STENCIL  
SCALE:50X  
4223607/A 03/2017  
NOTES: (continued)  
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.  
www.ti.com  
IMPORTANT NOTICE AND DISCLAIMER  
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE  
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”  
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY  
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD  
PARTY INTELLECTUAL PROPERTY RIGHTS.  
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate  
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable  
standards, and any other safety, security, regulatory or other requirements.  
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an  
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license  
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you  
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these  
resources.  
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with  
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for  
TI products.  
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE  
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2023, Texas Instruments Incorporated  

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